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1 | /* | |
2 | * GICv3 ITS emulation | |
3 | * | |
4 | * Copyright (C) 2015,2016 ARM Ltd. | |
5 | * Author: Andre Przywara <andre.przywara@arm.com> | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License version 2 as | |
9 | * published by the Free Software Foundation. | |
10 | * | |
11 | * This program is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | * GNU General Public License for more details. | |
15 | * | |
16 | * You should have received a copy of the GNU General Public License | |
17 | * along with this program. If not, see <http://www.gnu.org/licenses/>. | |
18 | */ | |
19 | ||
20 | #include <linux/cpu.h> | |
21 | #include <linux/kvm.h> | |
22 | #include <linux/kvm_host.h> | |
23 | #include <linux/interrupt.h> | |
24 | #include <linux/list.h> | |
25 | #include <linux/uaccess.h> | |
26 | #include <linux/list_sort.h> | |
27 | ||
28 | #include <linux/irqchip/arm-gic-v3.h> | |
29 | ||
30 | #include <asm/kvm_emulate.h> | |
31 | #include <asm/kvm_arm.h> | |
32 | #include <asm/kvm_mmu.h> | |
33 | ||
34 | #include "vgic.h" | |
35 | #include "vgic-mmio.h" | |
36 | ||
37 | static int vgic_its_save_tables_v0(struct vgic_its *its); | |
38 | static int vgic_its_restore_tables_v0(struct vgic_its *its); | |
39 | static int vgic_its_commit_v0(struct vgic_its *its); | |
40 | static int update_lpi_config(struct kvm *kvm, struct vgic_irq *irq, | |
41 | struct kvm_vcpu *filter_vcpu); | |
42 | ||
43 | /* | |
44 | * Creates a new (reference to a) struct vgic_irq for a given LPI. | |
45 | * If this LPI is already mapped on another ITS, we increase its refcount | |
46 | * and return a pointer to the existing structure. | |
47 | * If this is a "new" LPI, we allocate and initialize a new struct vgic_irq. | |
48 | * This function returns a pointer to the _unlocked_ structure. | |
49 | */ | |
50 | static struct vgic_irq *vgic_add_lpi(struct kvm *kvm, u32 intid, | |
51 | struct kvm_vcpu *vcpu) | |
52 | { | |
53 | struct vgic_dist *dist = &kvm->arch.vgic; | |
54 | struct vgic_irq *irq = vgic_get_irq(kvm, NULL, intid), *oldirq; | |
55 | int ret; | |
56 | ||
57 | /* In this case there is no put, since we keep the reference. */ | |
58 | if (irq) | |
59 | return irq; | |
60 | ||
61 | irq = kzalloc(sizeof(struct vgic_irq), GFP_KERNEL); | |
62 | if (!irq) | |
63 | return ERR_PTR(-ENOMEM); | |
64 | ||
65 | INIT_LIST_HEAD(&irq->lpi_list); | |
66 | INIT_LIST_HEAD(&irq->ap_list); | |
67 | spin_lock_init(&irq->irq_lock); | |
68 | ||
69 | irq->config = VGIC_CONFIG_EDGE; | |
70 | kref_init(&irq->refcount); | |
71 | irq->intid = intid; | |
72 | irq->target_vcpu = vcpu; | |
73 | ||
74 | spin_lock(&dist->lpi_list_lock); | |
75 | ||
76 | /* | |
77 | * There could be a race with another vgic_add_lpi(), so we need to | |
78 | * check that we don't add a second list entry with the same LPI. | |
79 | */ | |
80 | list_for_each_entry(oldirq, &dist->lpi_list_head, lpi_list) { | |
81 | if (oldirq->intid != intid) | |
82 | continue; | |
83 | ||
84 | /* Someone was faster with adding this LPI, lets use that. */ | |
85 | kfree(irq); | |
86 | irq = oldirq; | |
87 | ||
88 | /* | |
89 | * This increases the refcount, the caller is expected to | |
90 | * call vgic_put_irq() on the returned pointer once it's | |
91 | * finished with the IRQ. | |
92 | */ | |
93 | vgic_get_irq_kref(irq); | |
94 | ||
95 | goto out_unlock; | |
96 | } | |
97 | ||
98 | list_add_tail(&irq->lpi_list, &dist->lpi_list_head); | |
99 | dist->lpi_list_count++; | |
100 | ||
101 | out_unlock: | |
102 | spin_unlock(&dist->lpi_list_lock); | |
103 | ||
104 | /* | |
105 | * We "cache" the configuration table entries in our struct vgic_irq's. | |
106 | * However we only have those structs for mapped IRQs, so we read in | |
107 | * the respective config data from memory here upon mapping the LPI. | |
108 | */ | |
109 | ret = update_lpi_config(kvm, irq, NULL); | |
110 | if (ret) | |
111 | return ERR_PTR(ret); | |
112 | ||
113 | ret = vgic_v3_lpi_sync_pending_status(kvm, irq); | |
114 | if (ret) | |
115 | return ERR_PTR(ret); | |
116 | ||
117 | return irq; | |
118 | } | |
119 | ||
120 | struct its_device { | |
121 | struct list_head dev_list; | |
122 | ||
123 | /* the head for the list of ITTEs */ | |
124 | struct list_head itt_head; | |
125 | u32 num_eventid_bits; | |
126 | gpa_t itt_addr; | |
127 | u32 device_id; | |
128 | }; | |
129 | ||
130 | #define COLLECTION_NOT_MAPPED ((u32)~0) | |
131 | ||
132 | struct its_collection { | |
133 | struct list_head coll_list; | |
134 | ||
135 | u32 collection_id; | |
136 | u32 target_addr; | |
137 | }; | |
138 | ||
139 | #define its_is_collection_mapped(coll) ((coll) && \ | |
140 | ((coll)->target_addr != COLLECTION_NOT_MAPPED)) | |
141 | ||
142 | struct its_ite { | |
143 | struct list_head ite_list; | |
144 | ||
145 | struct vgic_irq *irq; | |
146 | struct its_collection *collection; | |
147 | u32 lpi; | |
148 | u32 event_id; | |
149 | }; | |
150 | ||
151 | /** | |
152 | * struct vgic_its_abi - ITS abi ops and settings | |
153 | * @cte_esz: collection table entry size | |
154 | * @dte_esz: device table entry size | |
155 | * @ite_esz: interrupt translation table entry size | |
156 | * @save tables: save the ITS tables into guest RAM | |
157 | * @restore_tables: restore the ITS internal structs from tables | |
158 | * stored in guest RAM | |
159 | * @commit: initialize the registers which expose the ABI settings, | |
160 | * especially the entry sizes | |
161 | */ | |
162 | struct vgic_its_abi { | |
163 | int cte_esz; | |
164 | int dte_esz; | |
165 | int ite_esz; | |
166 | int (*save_tables)(struct vgic_its *its); | |
167 | int (*restore_tables)(struct vgic_its *its); | |
168 | int (*commit)(struct vgic_its *its); | |
169 | }; | |
170 | ||
171 | static const struct vgic_its_abi its_table_abi_versions[] = { | |
172 | [0] = {.cte_esz = 8, .dte_esz = 8, .ite_esz = 8, | |
173 | .save_tables = vgic_its_save_tables_v0, | |
174 | .restore_tables = vgic_its_restore_tables_v0, | |
175 | .commit = vgic_its_commit_v0, | |
176 | }, | |
177 | }; | |
178 | ||
179 | #define NR_ITS_ABIS ARRAY_SIZE(its_table_abi_versions) | |
180 | ||
181 | inline const struct vgic_its_abi *vgic_its_get_abi(struct vgic_its *its) | |
182 | { | |
183 | return &its_table_abi_versions[its->abi_rev]; | |
184 | } | |
185 | ||
186 | int vgic_its_set_abi(struct vgic_its *its, int rev) | |
187 | { | |
188 | const struct vgic_its_abi *abi; | |
189 | ||
190 | its->abi_rev = rev; | |
191 | abi = vgic_its_get_abi(its); | |
192 | return abi->commit(its); | |
193 | } | |
194 | ||
195 | /* | |
196 | * Find and returns a device in the device table for an ITS. | |
197 | * Must be called with the its_lock mutex held. | |
198 | */ | |
199 | static struct its_device *find_its_device(struct vgic_its *its, u32 device_id) | |
200 | { | |
201 | struct its_device *device; | |
202 | ||
203 | list_for_each_entry(device, &its->device_list, dev_list) | |
204 | if (device_id == device->device_id) | |
205 | return device; | |
206 | ||
207 | return NULL; | |
208 | } | |
209 | ||
210 | /* | |
211 | * Find and returns an interrupt translation table entry (ITTE) for a given | |
212 | * Device ID/Event ID pair on an ITS. | |
213 | * Must be called with the its_lock mutex held. | |
214 | */ | |
215 | static struct its_ite *find_ite(struct vgic_its *its, u32 device_id, | |
216 | u32 event_id) | |
217 | { | |
218 | struct its_device *device; | |
219 | struct its_ite *ite; | |
220 | ||
221 | device = find_its_device(its, device_id); | |
222 | if (device == NULL) | |
223 | return NULL; | |
224 | ||
225 | list_for_each_entry(ite, &device->itt_head, ite_list) | |
226 | if (ite->event_id == event_id) | |
227 | return ite; | |
228 | ||
229 | return NULL; | |
230 | } | |
231 | ||
232 | /* To be used as an iterator this macro misses the enclosing parentheses */ | |
233 | #define for_each_lpi_its(dev, ite, its) \ | |
234 | list_for_each_entry(dev, &(its)->device_list, dev_list) \ | |
235 | list_for_each_entry(ite, &(dev)->itt_head, ite_list) | |
236 | ||
237 | /* | |
238 | * We only implement 48 bits of PA at the moment, although the ITS | |
239 | * supports more. Let's be restrictive here. | |
240 | */ | |
241 | #define BASER_ADDRESS(x) ((x) & GENMASK_ULL(47, 16)) | |
242 | #define CBASER_ADDRESS(x) ((x) & GENMASK_ULL(47, 12)) | |
243 | ||
244 | #define GIC_LPI_OFFSET 8192 | |
245 | ||
246 | #define VITS_TYPER_IDBITS 16 | |
247 | #define VITS_TYPER_DEVBITS 16 | |
248 | #define VITS_DTE_MAX_DEVID_OFFSET (BIT(14) - 1) | |
249 | #define VITS_ITE_MAX_EVENTID_OFFSET (BIT(16) - 1) | |
250 | ||
251 | /* | |
252 | * Finds and returns a collection in the ITS collection table. | |
253 | * Must be called with the its_lock mutex held. | |
254 | */ | |
255 | static struct its_collection *find_collection(struct vgic_its *its, int coll_id) | |
256 | { | |
257 | struct its_collection *collection; | |
258 | ||
259 | list_for_each_entry(collection, &its->collection_list, coll_list) { | |
260 | if (coll_id == collection->collection_id) | |
261 | return collection; | |
262 | } | |
263 | ||
264 | return NULL; | |
265 | } | |
266 | ||
267 | #define LPI_PROP_ENABLE_BIT(p) ((p) & LPI_PROP_ENABLED) | |
268 | #define LPI_PROP_PRIORITY(p) ((p) & 0xfc) | |
269 | ||
270 | /* | |
271 | * Reads the configuration data for a given LPI from guest memory and | |
272 | * updates the fields in struct vgic_irq. | |
273 | * If filter_vcpu is not NULL, applies only if the IRQ is targeting this | |
274 | * VCPU. Unconditionally applies if filter_vcpu is NULL. | |
275 | */ | |
276 | static int update_lpi_config(struct kvm *kvm, struct vgic_irq *irq, | |
277 | struct kvm_vcpu *filter_vcpu) | |
278 | { | |
279 | u64 propbase = GICR_PROPBASER_ADDRESS(kvm->arch.vgic.propbaser); | |
280 | u8 prop; | |
281 | int ret; | |
282 | ||
283 | ret = kvm_read_guest(kvm, propbase + irq->intid - GIC_LPI_OFFSET, | |
284 | &prop, 1); | |
285 | ||
286 | if (ret) | |
287 | return ret; | |
288 | ||
289 | spin_lock(&irq->irq_lock); | |
290 | ||
291 | if (!filter_vcpu || filter_vcpu == irq->target_vcpu) { | |
292 | irq->priority = LPI_PROP_PRIORITY(prop); | |
293 | irq->enabled = LPI_PROP_ENABLE_BIT(prop); | |
294 | ||
295 | vgic_queue_irq_unlock(kvm, irq); | |
296 | } else { | |
297 | spin_unlock(&irq->irq_lock); | |
298 | } | |
299 | ||
300 | return 0; | |
301 | } | |
302 | ||
303 | /* | |
304 | * Create a snapshot of the current LPIs targeting @vcpu, so that we can | |
305 | * enumerate those LPIs without holding any lock. | |
306 | * Returns their number and puts the kmalloc'ed array into intid_ptr. | |
307 | */ | |
308 | static int vgic_copy_lpi_list(struct kvm_vcpu *vcpu, u32 **intid_ptr) | |
309 | { | |
310 | struct vgic_dist *dist = &vcpu->kvm->arch.vgic; | |
311 | struct vgic_irq *irq; | |
312 | u32 *intids; | |
313 | int irq_count = dist->lpi_list_count, i = 0; | |
314 | ||
315 | /* | |
316 | * We use the current value of the list length, which may change | |
317 | * after the kmalloc. We don't care, because the guest shouldn't | |
318 | * change anything while the command handling is still running, | |
319 | * and in the worst case we would miss a new IRQ, which one wouldn't | |
320 | * expect to be covered by this command anyway. | |
321 | */ | |
322 | intids = kmalloc_array(irq_count, sizeof(intids[0]), GFP_KERNEL); | |
323 | if (!intids) | |
324 | return -ENOMEM; | |
325 | ||
326 | spin_lock(&dist->lpi_list_lock); | |
327 | list_for_each_entry(irq, &dist->lpi_list_head, lpi_list) { | |
328 | /* We don't need to "get" the IRQ, as we hold the list lock. */ | |
329 | if (irq->target_vcpu != vcpu) | |
330 | continue; | |
331 | intids[i++] = irq->intid; | |
332 | } | |
333 | spin_unlock(&dist->lpi_list_lock); | |
334 | ||
335 | *intid_ptr = intids; | |
336 | return i; | |
337 | } | |
338 | ||
339 | /* | |
340 | * Promotes the ITS view of affinity of an ITTE (which redistributor this LPI | |
341 | * is targeting) to the VGIC's view, which deals with target VCPUs. | |
342 | * Needs to be called whenever either the collection for a LPIs has | |
343 | * changed or the collection itself got retargeted. | |
344 | */ | |
345 | static void update_affinity_ite(struct kvm *kvm, struct its_ite *ite) | |
346 | { | |
347 | struct kvm_vcpu *vcpu; | |
348 | ||
349 | if (!its_is_collection_mapped(ite->collection)) | |
350 | return; | |
351 | ||
352 | vcpu = kvm_get_vcpu(kvm, ite->collection->target_addr); | |
353 | ||
354 | spin_lock(&ite->irq->irq_lock); | |
355 | ite->irq->target_vcpu = vcpu; | |
356 | spin_unlock(&ite->irq->irq_lock); | |
357 | } | |
358 | ||
359 | /* | |
360 | * Updates the target VCPU for every LPI targeting this collection. | |
361 | * Must be called with the its_lock mutex held. | |
362 | */ | |
363 | static void update_affinity_collection(struct kvm *kvm, struct vgic_its *its, | |
364 | struct its_collection *coll) | |
365 | { | |
366 | struct its_device *device; | |
367 | struct its_ite *ite; | |
368 | ||
369 | for_each_lpi_its(device, ite, its) { | |
370 | if (!ite->collection || coll != ite->collection) | |
371 | continue; | |
372 | ||
373 | update_affinity_ite(kvm, ite); | |
374 | } | |
375 | } | |
376 | ||
377 | static u32 max_lpis_propbaser(u64 propbaser) | |
378 | { | |
379 | int nr_idbits = (propbaser & 0x1f) + 1; | |
380 | ||
381 | return 1U << min(nr_idbits, INTERRUPT_ID_BITS_ITS); | |
382 | } | |
383 | ||
384 | /* | |
385 | * Sync the pending table pending bit of LPIs targeting @vcpu | |
386 | * with our own data structures. This relies on the LPI being | |
387 | * mapped before. | |
388 | */ | |
389 | static int its_sync_lpi_pending_table(struct kvm_vcpu *vcpu) | |
390 | { | |
391 | gpa_t pendbase = GICR_PENDBASER_ADDRESS(vcpu->arch.vgic_cpu.pendbaser); | |
392 | struct vgic_irq *irq; | |
393 | int last_byte_offset = -1; | |
394 | int ret = 0; | |
395 | u32 *intids; | |
396 | int nr_irqs, i; | |
397 | ||
398 | nr_irqs = vgic_copy_lpi_list(vcpu, &intids); | |
399 | if (nr_irqs < 0) | |
400 | return nr_irqs; | |
401 | ||
402 | for (i = 0; i < nr_irqs; i++) { | |
403 | int byte_offset, bit_nr; | |
404 | u8 pendmask; | |
405 | ||
406 | byte_offset = intids[i] / BITS_PER_BYTE; | |
407 | bit_nr = intids[i] % BITS_PER_BYTE; | |
408 | ||
409 | /* | |
410 | * For contiguously allocated LPIs chances are we just read | |
411 | * this very same byte in the last iteration. Reuse that. | |
412 | */ | |
413 | if (byte_offset != last_byte_offset) { | |
414 | ret = kvm_read_guest(vcpu->kvm, pendbase + byte_offset, | |
415 | &pendmask, 1); | |
416 | if (ret) { | |
417 | kfree(intids); | |
418 | return ret; | |
419 | } | |
420 | last_byte_offset = byte_offset; | |
421 | } | |
422 | ||
423 | irq = vgic_get_irq(vcpu->kvm, NULL, intids[i]); | |
424 | spin_lock(&irq->irq_lock); | |
425 | irq->pending_latch = pendmask & (1U << bit_nr); | |
426 | vgic_queue_irq_unlock(vcpu->kvm, irq); | |
427 | vgic_put_irq(vcpu->kvm, irq); | |
428 | } | |
429 | ||
430 | kfree(intids); | |
431 | ||
432 | return ret; | |
433 | } | |
434 | ||
435 | static unsigned long vgic_mmio_read_its_typer(struct kvm *kvm, | |
436 | struct vgic_its *its, | |
437 | gpa_t addr, unsigned int len) | |
438 | { | |
439 | const struct vgic_its_abi *abi = vgic_its_get_abi(its); | |
440 | u64 reg = GITS_TYPER_PLPIS; | |
441 | ||
442 | /* | |
443 | * We use linear CPU numbers for redistributor addressing, | |
444 | * so GITS_TYPER.PTA is 0. | |
445 | * Also we force all PROPBASER registers to be the same, so | |
446 | * CommonLPIAff is 0 as well. | |
447 | * To avoid memory waste in the guest, we keep the number of IDBits and | |
448 | * DevBits low - as least for the time being. | |
449 | */ | |
450 | reg |= GIC_ENCODE_SZ(VITS_TYPER_DEVBITS, 5) << GITS_TYPER_DEVBITS_SHIFT; | |
451 | reg |= GIC_ENCODE_SZ(VITS_TYPER_IDBITS, 5) << GITS_TYPER_IDBITS_SHIFT; | |
452 | reg |= GIC_ENCODE_SZ(abi->ite_esz, 4) << GITS_TYPER_ITT_ENTRY_SIZE_SHIFT; | |
453 | ||
454 | return extract_bytes(reg, addr & 7, len); | |
455 | } | |
456 | ||
457 | static unsigned long vgic_mmio_read_its_iidr(struct kvm *kvm, | |
458 | struct vgic_its *its, | |
459 | gpa_t addr, unsigned int len) | |
460 | { | |
461 | u32 val; | |
462 | ||
463 | val = (its->abi_rev << GITS_IIDR_REV_SHIFT) & GITS_IIDR_REV_MASK; | |
464 | val |= (PRODUCT_ID_KVM << GITS_IIDR_PRODUCTID_SHIFT) | IMPLEMENTER_ARM; | |
465 | return val; | |
466 | } | |
467 | ||
468 | static int vgic_mmio_uaccess_write_its_iidr(struct kvm *kvm, | |
469 | struct vgic_its *its, | |
470 | gpa_t addr, unsigned int len, | |
471 | unsigned long val) | |
472 | { | |
473 | u32 rev = GITS_IIDR_REV(val); | |
474 | ||
475 | if (rev >= NR_ITS_ABIS) | |
476 | return -EINVAL; | |
477 | return vgic_its_set_abi(its, rev); | |
478 | } | |
479 | ||
480 | static unsigned long vgic_mmio_read_its_idregs(struct kvm *kvm, | |
481 | struct vgic_its *its, | |
482 | gpa_t addr, unsigned int len) | |
483 | { | |
484 | switch (addr & 0xffff) { | |
485 | case GITS_PIDR0: | |
486 | return 0x92; /* part number, bits[7:0] */ | |
487 | case GITS_PIDR1: | |
488 | return 0xb4; /* part number, bits[11:8] */ | |
489 | case GITS_PIDR2: | |
490 | return GIC_PIDR2_ARCH_GICv3 | 0x0b; | |
491 | case GITS_PIDR4: | |
492 | return 0x40; /* This is a 64K software visible page */ | |
493 | /* The following are the ID registers for (any) GIC. */ | |
494 | case GITS_CIDR0: | |
495 | return 0x0d; | |
496 | case GITS_CIDR1: | |
497 | return 0xf0; | |
498 | case GITS_CIDR2: | |
499 | return 0x05; | |
500 | case GITS_CIDR3: | |
501 | return 0xb1; | |
502 | } | |
503 | ||
504 | return 0; | |
505 | } | |
506 | ||
507 | /* | |
508 | * Find the target VCPU and the LPI number for a given devid/eventid pair | |
509 | * and make this IRQ pending, possibly injecting it. | |
510 | * Must be called with the its_lock mutex held. | |
511 | * Returns 0 on success, a positive error value for any ITS mapping | |
512 | * related errors and negative error values for generic errors. | |
513 | */ | |
514 | static int vgic_its_trigger_msi(struct kvm *kvm, struct vgic_its *its, | |
515 | u32 devid, u32 eventid) | |
516 | { | |
517 | struct kvm_vcpu *vcpu; | |
518 | struct its_ite *ite; | |
519 | ||
520 | if (!its->enabled) | |
521 | return -EBUSY; | |
522 | ||
523 | ite = find_ite(its, devid, eventid); | |
524 | if (!ite || !its_is_collection_mapped(ite->collection)) | |
525 | return E_ITS_INT_UNMAPPED_INTERRUPT; | |
526 | ||
527 | vcpu = kvm_get_vcpu(kvm, ite->collection->target_addr); | |
528 | if (!vcpu) | |
529 | return E_ITS_INT_UNMAPPED_INTERRUPT; | |
530 | ||
531 | if (!vcpu->arch.vgic_cpu.lpis_enabled) | |
532 | return -EBUSY; | |
533 | ||
534 | spin_lock(&ite->irq->irq_lock); | |
535 | ite->irq->pending_latch = true; | |
536 | vgic_queue_irq_unlock(kvm, ite->irq); | |
537 | ||
538 | return 0; | |
539 | } | |
540 | ||
541 | static struct vgic_io_device *vgic_get_its_iodev(struct kvm_io_device *dev) | |
542 | { | |
543 | struct vgic_io_device *iodev; | |
544 | ||
545 | if (dev->ops != &kvm_io_gic_ops) | |
546 | return NULL; | |
547 | ||
548 | iodev = container_of(dev, struct vgic_io_device, dev); | |
549 | ||
550 | if (iodev->iodev_type != IODEV_ITS) | |
551 | return NULL; | |
552 | ||
553 | return iodev; | |
554 | } | |
555 | ||
556 | /* | |
557 | * Queries the KVM IO bus framework to get the ITS pointer from the given | |
558 | * doorbell address. | |
559 | * We then call vgic_its_trigger_msi() with the decoded data. | |
560 | * According to the KVM_SIGNAL_MSI API description returns 1 on success. | |
561 | */ | |
562 | int vgic_its_inject_msi(struct kvm *kvm, struct kvm_msi *msi) | |
563 | { | |
564 | u64 address; | |
565 | struct kvm_io_device *kvm_io_dev; | |
566 | struct vgic_io_device *iodev; | |
567 | int ret; | |
568 | ||
569 | if (!vgic_has_its(kvm)) | |
570 | return -ENODEV; | |
571 | ||
572 | if (!(msi->flags & KVM_MSI_VALID_DEVID)) | |
573 | return -EINVAL; | |
574 | ||
575 | address = (u64)msi->address_hi << 32 | msi->address_lo; | |
576 | ||
577 | kvm_io_dev = kvm_io_bus_get_dev(kvm, KVM_MMIO_BUS, address); | |
578 | if (!kvm_io_dev) | |
579 | return -EINVAL; | |
580 | ||
581 | iodev = vgic_get_its_iodev(kvm_io_dev); | |
582 | if (!iodev) | |
583 | return -EINVAL; | |
584 | ||
585 | mutex_lock(&iodev->its->its_lock); | |
586 | ret = vgic_its_trigger_msi(kvm, iodev->its, msi->devid, msi->data); | |
587 | mutex_unlock(&iodev->its->its_lock); | |
588 | ||
589 | if (ret < 0) | |
590 | return ret; | |
591 | ||
592 | /* | |
593 | * KVM_SIGNAL_MSI demands a return value > 0 for success and 0 | |
594 | * if the guest has blocked the MSI. So we map any LPI mapping | |
595 | * related error to that. | |
596 | */ | |
597 | if (ret) | |
598 | return 0; | |
599 | else | |
600 | return 1; | |
601 | } | |
602 | ||
603 | /* Requires the its_lock to be held. */ | |
604 | static void its_free_ite(struct kvm *kvm, struct its_ite *ite) | |
605 | { | |
606 | list_del(&ite->ite_list); | |
607 | ||
608 | /* This put matches the get in vgic_add_lpi. */ | |
609 | if (ite->irq) | |
610 | vgic_put_irq(kvm, ite->irq); | |
611 | ||
612 | kfree(ite); | |
613 | } | |
614 | ||
615 | static u64 its_cmd_mask_field(u64 *its_cmd, int word, int shift, int size) | |
616 | { | |
617 | return (le64_to_cpu(its_cmd[word]) >> shift) & (BIT_ULL(size) - 1); | |
618 | } | |
619 | ||
620 | #define its_cmd_get_command(cmd) its_cmd_mask_field(cmd, 0, 0, 8) | |
621 | #define its_cmd_get_deviceid(cmd) its_cmd_mask_field(cmd, 0, 32, 32) | |
622 | #define its_cmd_get_size(cmd) (its_cmd_mask_field(cmd, 1, 0, 5) + 1) | |
623 | #define its_cmd_get_id(cmd) its_cmd_mask_field(cmd, 1, 0, 32) | |
624 | #define its_cmd_get_physical_id(cmd) its_cmd_mask_field(cmd, 1, 32, 32) | |
625 | #define its_cmd_get_collection(cmd) its_cmd_mask_field(cmd, 2, 0, 16) | |
626 | #define its_cmd_get_ittaddr(cmd) (its_cmd_mask_field(cmd, 2, 8, 44) << 8) | |
627 | #define its_cmd_get_target_addr(cmd) its_cmd_mask_field(cmd, 2, 16, 32) | |
628 | #define its_cmd_get_validbit(cmd) its_cmd_mask_field(cmd, 2, 63, 1) | |
629 | ||
630 | /* | |
631 | * The DISCARD command frees an Interrupt Translation Table Entry (ITTE). | |
632 | * Must be called with the its_lock mutex held. | |
633 | */ | |
634 | static int vgic_its_cmd_handle_discard(struct kvm *kvm, struct vgic_its *its, | |
635 | u64 *its_cmd) | |
636 | { | |
637 | u32 device_id = its_cmd_get_deviceid(its_cmd); | |
638 | u32 event_id = its_cmd_get_id(its_cmd); | |
639 | struct its_ite *ite; | |
640 | ||
641 | ||
642 | ite = find_ite(its, device_id, event_id); | |
643 | if (ite && ite->collection) { | |
644 | /* | |
645 | * Though the spec talks about removing the pending state, we | |
646 | * don't bother here since we clear the ITTE anyway and the | |
647 | * pending state is a property of the ITTE struct. | |
648 | */ | |
649 | its_free_ite(kvm, ite); | |
650 | return 0; | |
651 | } | |
652 | ||
653 | return E_ITS_DISCARD_UNMAPPED_INTERRUPT; | |
654 | } | |
655 | ||
656 | /* | |
657 | * The MOVI command moves an ITTE to a different collection. | |
658 | * Must be called with the its_lock mutex held. | |
659 | */ | |
660 | static int vgic_its_cmd_handle_movi(struct kvm *kvm, struct vgic_its *its, | |
661 | u64 *its_cmd) | |
662 | { | |
663 | u32 device_id = its_cmd_get_deviceid(its_cmd); | |
664 | u32 event_id = its_cmd_get_id(its_cmd); | |
665 | u32 coll_id = its_cmd_get_collection(its_cmd); | |
666 | struct kvm_vcpu *vcpu; | |
667 | struct its_ite *ite; | |
668 | struct its_collection *collection; | |
669 | ||
670 | ite = find_ite(its, device_id, event_id); | |
671 | if (!ite) | |
672 | return E_ITS_MOVI_UNMAPPED_INTERRUPT; | |
673 | ||
674 | if (!its_is_collection_mapped(ite->collection)) | |
675 | return E_ITS_MOVI_UNMAPPED_COLLECTION; | |
676 | ||
677 | collection = find_collection(its, coll_id); | |
678 | if (!its_is_collection_mapped(collection)) | |
679 | return E_ITS_MOVI_UNMAPPED_COLLECTION; | |
680 | ||
681 | ite->collection = collection; | |
682 | vcpu = kvm_get_vcpu(kvm, collection->target_addr); | |
683 | ||
684 | spin_lock(&ite->irq->irq_lock); | |
685 | ite->irq->target_vcpu = vcpu; | |
686 | spin_unlock(&ite->irq->irq_lock); | |
687 | ||
688 | return 0; | |
689 | } | |
690 | ||
691 | /* | |
692 | * Check whether an ID can be stored into the corresponding guest table. | |
693 | * For a direct table this is pretty easy, but gets a bit nasty for | |
694 | * indirect tables. We check whether the resulting guest physical address | |
695 | * is actually valid (covered by a memslot and guest accessible). | |
696 | * For this we have to read the respective first level entry. | |
697 | */ | |
698 | static bool vgic_its_check_id(struct vgic_its *its, u64 baser, u32 id, | |
699 | gpa_t *eaddr) | |
700 | { | |
701 | int l1_tbl_size = GITS_BASER_NR_PAGES(baser) * SZ_64K; | |
702 | u64 indirect_ptr, type = GITS_BASER_TYPE(baser); | |
703 | int esz = GITS_BASER_ENTRY_SIZE(baser); | |
704 | int index; | |
705 | gfn_t gfn; | |
706 | ||
707 | switch (type) { | |
708 | case GITS_BASER_TYPE_DEVICE: | |
709 | if (id >= BIT_ULL(VITS_TYPER_DEVBITS)) | |
710 | return false; | |
711 | break; | |
712 | case GITS_BASER_TYPE_COLLECTION: | |
713 | /* as GITS_TYPER.CIL == 0, ITS supports 16-bit collection ID */ | |
714 | if (id >= BIT_ULL(16)) | |
715 | return false; | |
716 | break; | |
717 | default: | |
718 | return false; | |
719 | } | |
720 | ||
721 | if (!(baser & GITS_BASER_INDIRECT)) { | |
722 | phys_addr_t addr; | |
723 | ||
724 | if (id >= (l1_tbl_size / esz)) | |
725 | return false; | |
726 | ||
727 | addr = BASER_ADDRESS(baser) + id * esz; | |
728 | gfn = addr >> PAGE_SHIFT; | |
729 | ||
730 | if (eaddr) | |
731 | *eaddr = addr; | |
732 | return kvm_is_visible_gfn(its->dev->kvm, gfn); | |
733 | } | |
734 | ||
735 | /* calculate and check the index into the 1st level */ | |
736 | index = id / (SZ_64K / esz); | |
737 | if (index >= (l1_tbl_size / sizeof(u64))) | |
738 | return false; | |
739 | ||
740 | /* Each 1st level entry is represented by a 64-bit value. */ | |
741 | if (kvm_read_guest(its->dev->kvm, | |
742 | BASER_ADDRESS(baser) + index * sizeof(indirect_ptr), | |
743 | &indirect_ptr, sizeof(indirect_ptr))) | |
744 | return false; | |
745 | ||
746 | indirect_ptr = le64_to_cpu(indirect_ptr); | |
747 | ||
748 | /* check the valid bit of the first level entry */ | |
749 | if (!(indirect_ptr & BIT_ULL(63))) | |
750 | return false; | |
751 | ||
752 | /* | |
753 | * Mask the guest physical address and calculate the frame number. | |
754 | * Any address beyond our supported 48 bits of PA will be caught | |
755 | * by the actual check in the final step. | |
756 | */ | |
757 | indirect_ptr &= GENMASK_ULL(51, 16); | |
758 | ||
759 | /* Find the address of the actual entry */ | |
760 | index = id % (SZ_64K / esz); | |
761 | indirect_ptr += index * esz; | |
762 | gfn = indirect_ptr >> PAGE_SHIFT; | |
763 | ||
764 | if (eaddr) | |
765 | *eaddr = indirect_ptr; | |
766 | return kvm_is_visible_gfn(its->dev->kvm, gfn); | |
767 | } | |
768 | ||
769 | static int vgic_its_alloc_collection(struct vgic_its *its, | |
770 | struct its_collection **colp, | |
771 | u32 coll_id) | |
772 | { | |
773 | struct its_collection *collection; | |
774 | ||
775 | if (!vgic_its_check_id(its, its->baser_coll_table, coll_id, NULL)) | |
776 | return E_ITS_MAPC_COLLECTION_OOR; | |
777 | ||
778 | collection = kzalloc(sizeof(*collection), GFP_KERNEL); | |
779 | ||
780 | collection->collection_id = coll_id; | |
781 | collection->target_addr = COLLECTION_NOT_MAPPED; | |
782 | ||
783 | list_add_tail(&collection->coll_list, &its->collection_list); | |
784 | *colp = collection; | |
785 | ||
786 | return 0; | |
787 | } | |
788 | ||
789 | static void vgic_its_free_collection(struct vgic_its *its, u32 coll_id) | |
790 | { | |
791 | struct its_collection *collection; | |
792 | struct its_device *device; | |
793 | struct its_ite *ite; | |
794 | ||
795 | /* | |
796 | * Clearing the mapping for that collection ID removes the | |
797 | * entry from the list. If there wasn't any before, we can | |
798 | * go home early. | |
799 | */ | |
800 | collection = find_collection(its, coll_id); | |
801 | if (!collection) | |
802 | return; | |
803 | ||
804 | for_each_lpi_its(device, ite, its) | |
805 | if (ite->collection && | |
806 | ite->collection->collection_id == coll_id) | |
807 | ite->collection = NULL; | |
808 | ||
809 | list_del(&collection->coll_list); | |
810 | kfree(collection); | |
811 | } | |
812 | ||
813 | /* Must be called with its_lock mutex held */ | |
814 | static struct its_ite *vgic_its_alloc_ite(struct its_device *device, | |
815 | struct its_collection *collection, | |
816 | u32 lpi_id, u32 event_id) | |
817 | { | |
818 | struct its_ite *ite; | |
819 | ||
820 | ite = kzalloc(sizeof(*ite), GFP_KERNEL); | |
821 | if (!ite) | |
822 | return ERR_PTR(-ENOMEM); | |
823 | ||
824 | ite->event_id = event_id; | |
825 | ite->collection = collection; | |
826 | ite->lpi = lpi_id; | |
827 | ||
828 | list_add_tail(&ite->ite_list, &device->itt_head); | |
829 | return ite; | |
830 | } | |
831 | ||
832 | /* | |
833 | * The MAPTI and MAPI commands map LPIs to ITTEs. | |
834 | * Must be called with its_lock mutex held. | |
835 | */ | |
836 | static int vgic_its_cmd_handle_mapi(struct kvm *kvm, struct vgic_its *its, | |
837 | u64 *its_cmd) | |
838 | { | |
839 | u32 device_id = its_cmd_get_deviceid(its_cmd); | |
840 | u32 event_id = its_cmd_get_id(its_cmd); | |
841 | u32 coll_id = its_cmd_get_collection(its_cmd); | |
842 | struct its_ite *ite; | |
843 | struct kvm_vcpu *vcpu = NULL; | |
844 | struct its_device *device; | |
845 | struct its_collection *collection, *new_coll = NULL; | |
846 | struct vgic_irq *irq; | |
847 | int lpi_nr; | |
848 | ||
849 | device = find_its_device(its, device_id); | |
850 | if (!device) | |
851 | return E_ITS_MAPTI_UNMAPPED_DEVICE; | |
852 | ||
853 | if (event_id >= BIT_ULL(device->num_eventid_bits)) | |
854 | return E_ITS_MAPTI_ID_OOR; | |
855 | ||
856 | if (its_cmd_get_command(its_cmd) == GITS_CMD_MAPTI) | |
857 | lpi_nr = its_cmd_get_physical_id(its_cmd); | |
858 | else | |
859 | lpi_nr = event_id; | |
860 | if (lpi_nr < GIC_LPI_OFFSET || | |
861 | lpi_nr >= max_lpis_propbaser(kvm->arch.vgic.propbaser)) | |
862 | return E_ITS_MAPTI_PHYSICALID_OOR; | |
863 | ||
864 | /* If there is an existing mapping, behavior is UNPREDICTABLE. */ | |
865 | if (find_ite(its, device_id, event_id)) | |
866 | return 0; | |
867 | ||
868 | collection = find_collection(its, coll_id); | |
869 | if (!collection) { | |
870 | int ret = vgic_its_alloc_collection(its, &collection, coll_id); | |
871 | if (ret) | |
872 | return ret; | |
873 | new_coll = collection; | |
874 | } | |
875 | ||
876 | ite = vgic_its_alloc_ite(device, collection, lpi_nr, event_id); | |
877 | if (IS_ERR(ite)) { | |
878 | if (new_coll) | |
879 | vgic_its_free_collection(its, coll_id); | |
880 | return PTR_ERR(ite); | |
881 | } | |
882 | ||
883 | if (its_is_collection_mapped(collection)) | |
884 | vcpu = kvm_get_vcpu(kvm, collection->target_addr); | |
885 | ||
886 | irq = vgic_add_lpi(kvm, lpi_nr, vcpu); | |
887 | if (IS_ERR(irq)) { | |
888 | if (new_coll) | |
889 | vgic_its_free_collection(its, coll_id); | |
890 | its_free_ite(kvm, ite); | |
891 | return PTR_ERR(irq); | |
892 | } | |
893 | ite->irq = irq; | |
894 | ||
895 | return 0; | |
896 | } | |
897 | ||
898 | /* Requires the its_lock to be held. */ | |
899 | static void vgic_its_unmap_device(struct kvm *kvm, struct its_device *device) | |
900 | { | |
901 | struct its_ite *ite, *temp; | |
902 | ||
903 | /* | |
904 | * The spec says that unmapping a device with still valid | |
905 | * ITTEs associated is UNPREDICTABLE. We remove all ITTEs, | |
906 | * since we cannot leave the memory unreferenced. | |
907 | */ | |
908 | list_for_each_entry_safe(ite, temp, &device->itt_head, ite_list) | |
909 | its_free_ite(kvm, ite); | |
910 | ||
911 | list_del(&device->dev_list); | |
912 | kfree(device); | |
913 | } | |
914 | ||
915 | /* Must be called with its_lock mutex held */ | |
916 | static struct its_device *vgic_its_alloc_device(struct vgic_its *its, | |
917 | u32 device_id, gpa_t itt_addr, | |
918 | u8 num_eventid_bits) | |
919 | { | |
920 | struct its_device *device; | |
921 | ||
922 | device = kzalloc(sizeof(*device), GFP_KERNEL); | |
923 | if (!device) | |
924 | return ERR_PTR(-ENOMEM); | |
925 | ||
926 | device->device_id = device_id; | |
927 | device->itt_addr = itt_addr; | |
928 | device->num_eventid_bits = num_eventid_bits; | |
929 | INIT_LIST_HEAD(&device->itt_head); | |
930 | ||
931 | list_add_tail(&device->dev_list, &its->device_list); | |
932 | return device; | |
933 | } | |
934 | ||
935 | /* | |
936 | * MAPD maps or unmaps a device ID to Interrupt Translation Tables (ITTs). | |
937 | * Must be called with the its_lock mutex held. | |
938 | */ | |
939 | static int vgic_its_cmd_handle_mapd(struct kvm *kvm, struct vgic_its *its, | |
940 | u64 *its_cmd) | |
941 | { | |
942 | u32 device_id = its_cmd_get_deviceid(its_cmd); | |
943 | bool valid = its_cmd_get_validbit(its_cmd); | |
944 | u8 num_eventid_bits = its_cmd_get_size(its_cmd); | |
945 | gpa_t itt_addr = its_cmd_get_ittaddr(its_cmd); | |
946 | struct its_device *device; | |
947 | ||
948 | if (!vgic_its_check_id(its, its->baser_device_table, device_id, NULL)) | |
949 | return E_ITS_MAPD_DEVICE_OOR; | |
950 | ||
951 | if (valid && num_eventid_bits > VITS_TYPER_IDBITS) | |
952 | return E_ITS_MAPD_ITTSIZE_OOR; | |
953 | ||
954 | device = find_its_device(its, device_id); | |
955 | ||
956 | /* | |
957 | * The spec says that calling MAPD on an already mapped device | |
958 | * invalidates all cached data for this device. We implement this | |
959 | * by removing the mapping and re-establishing it. | |
960 | */ | |
961 | if (device) | |
962 | vgic_its_unmap_device(kvm, device); | |
963 | ||
964 | /* | |
965 | * The spec does not say whether unmapping a not-mapped device | |
966 | * is an error, so we are done in any case. | |
967 | */ | |
968 | if (!valid) | |
969 | return 0; | |
970 | ||
971 | device = vgic_its_alloc_device(its, device_id, itt_addr, | |
972 | num_eventid_bits); | |
973 | if (IS_ERR(device)) | |
974 | return PTR_ERR(device); | |
975 | ||
976 | return 0; | |
977 | } | |
978 | ||
979 | /* | |
980 | * The MAPC command maps collection IDs to redistributors. | |
981 | * Must be called with the its_lock mutex held. | |
982 | */ | |
983 | static int vgic_its_cmd_handle_mapc(struct kvm *kvm, struct vgic_its *its, | |
984 | u64 *its_cmd) | |
985 | { | |
986 | u16 coll_id; | |
987 | u32 target_addr; | |
988 | struct its_collection *collection; | |
989 | bool valid; | |
990 | ||
991 | valid = its_cmd_get_validbit(its_cmd); | |
992 | coll_id = its_cmd_get_collection(its_cmd); | |
993 | target_addr = its_cmd_get_target_addr(its_cmd); | |
994 | ||
995 | if (target_addr >= atomic_read(&kvm->online_vcpus)) | |
996 | return E_ITS_MAPC_PROCNUM_OOR; | |
997 | ||
998 | if (!valid) { | |
999 | vgic_its_free_collection(its, coll_id); | |
1000 | } else { | |
1001 | collection = find_collection(its, coll_id); | |
1002 | ||
1003 | if (!collection) { | |
1004 | int ret; | |
1005 | ||
1006 | ret = vgic_its_alloc_collection(its, &collection, | |
1007 | coll_id); | |
1008 | if (ret) | |
1009 | return ret; | |
1010 | collection->target_addr = target_addr; | |
1011 | } else { | |
1012 | collection->target_addr = target_addr; | |
1013 | update_affinity_collection(kvm, its, collection); | |
1014 | } | |
1015 | } | |
1016 | ||
1017 | return 0; | |
1018 | } | |
1019 | ||
1020 | /* | |
1021 | * The CLEAR command removes the pending state for a particular LPI. | |
1022 | * Must be called with the its_lock mutex held. | |
1023 | */ | |
1024 | static int vgic_its_cmd_handle_clear(struct kvm *kvm, struct vgic_its *its, | |
1025 | u64 *its_cmd) | |
1026 | { | |
1027 | u32 device_id = its_cmd_get_deviceid(its_cmd); | |
1028 | u32 event_id = its_cmd_get_id(its_cmd); | |
1029 | struct its_ite *ite; | |
1030 | ||
1031 | ||
1032 | ite = find_ite(its, device_id, event_id); | |
1033 | if (!ite) | |
1034 | return E_ITS_CLEAR_UNMAPPED_INTERRUPT; | |
1035 | ||
1036 | ite->irq->pending_latch = false; | |
1037 | ||
1038 | return 0; | |
1039 | } | |
1040 | ||
1041 | /* | |
1042 | * The INV command syncs the configuration bits from the memory table. | |
1043 | * Must be called with the its_lock mutex held. | |
1044 | */ | |
1045 | static int vgic_its_cmd_handle_inv(struct kvm *kvm, struct vgic_its *its, | |
1046 | u64 *its_cmd) | |
1047 | { | |
1048 | u32 device_id = its_cmd_get_deviceid(its_cmd); | |
1049 | u32 event_id = its_cmd_get_id(its_cmd); | |
1050 | struct its_ite *ite; | |
1051 | ||
1052 | ||
1053 | ite = find_ite(its, device_id, event_id); | |
1054 | if (!ite) | |
1055 | return E_ITS_INV_UNMAPPED_INTERRUPT; | |
1056 | ||
1057 | return update_lpi_config(kvm, ite->irq, NULL); | |
1058 | } | |
1059 | ||
1060 | /* | |
1061 | * The INVALL command requests flushing of all IRQ data in this collection. | |
1062 | * Find the VCPU mapped to that collection, then iterate over the VM's list | |
1063 | * of mapped LPIs and update the configuration for each IRQ which targets | |
1064 | * the specified vcpu. The configuration will be read from the in-memory | |
1065 | * configuration table. | |
1066 | * Must be called with the its_lock mutex held. | |
1067 | */ | |
1068 | static int vgic_its_cmd_handle_invall(struct kvm *kvm, struct vgic_its *its, | |
1069 | u64 *its_cmd) | |
1070 | { | |
1071 | u32 coll_id = its_cmd_get_collection(its_cmd); | |
1072 | struct its_collection *collection; | |
1073 | struct kvm_vcpu *vcpu; | |
1074 | struct vgic_irq *irq; | |
1075 | u32 *intids; | |
1076 | int irq_count, i; | |
1077 | ||
1078 | collection = find_collection(its, coll_id); | |
1079 | if (!its_is_collection_mapped(collection)) | |
1080 | return E_ITS_INVALL_UNMAPPED_COLLECTION; | |
1081 | ||
1082 | vcpu = kvm_get_vcpu(kvm, collection->target_addr); | |
1083 | ||
1084 | irq_count = vgic_copy_lpi_list(vcpu, &intids); | |
1085 | if (irq_count < 0) | |
1086 | return irq_count; | |
1087 | ||
1088 | for (i = 0; i < irq_count; i++) { | |
1089 | irq = vgic_get_irq(kvm, NULL, intids[i]); | |
1090 | if (!irq) | |
1091 | continue; | |
1092 | update_lpi_config(kvm, irq, vcpu); | |
1093 | vgic_put_irq(kvm, irq); | |
1094 | } | |
1095 | ||
1096 | kfree(intids); | |
1097 | ||
1098 | return 0; | |
1099 | } | |
1100 | ||
1101 | /* | |
1102 | * The MOVALL command moves the pending state of all IRQs targeting one | |
1103 | * redistributor to another. We don't hold the pending state in the VCPUs, | |
1104 | * but in the IRQs instead, so there is really not much to do for us here. | |
1105 | * However the spec says that no IRQ must target the old redistributor | |
1106 | * afterwards, so we make sure that no LPI is using the associated target_vcpu. | |
1107 | * This command affects all LPIs in the system that target that redistributor. | |
1108 | */ | |
1109 | static int vgic_its_cmd_handle_movall(struct kvm *kvm, struct vgic_its *its, | |
1110 | u64 *its_cmd) | |
1111 | { | |
1112 | struct vgic_dist *dist = &kvm->arch.vgic; | |
1113 | u32 target1_addr = its_cmd_get_target_addr(its_cmd); | |
1114 | u32 target2_addr = its_cmd_mask_field(its_cmd, 3, 16, 32); | |
1115 | struct kvm_vcpu *vcpu1, *vcpu2; | |
1116 | struct vgic_irq *irq; | |
1117 | ||
1118 | if (target1_addr >= atomic_read(&kvm->online_vcpus) || | |
1119 | target2_addr >= atomic_read(&kvm->online_vcpus)) | |
1120 | return E_ITS_MOVALL_PROCNUM_OOR; | |
1121 | ||
1122 | if (target1_addr == target2_addr) | |
1123 | return 0; | |
1124 | ||
1125 | vcpu1 = kvm_get_vcpu(kvm, target1_addr); | |
1126 | vcpu2 = kvm_get_vcpu(kvm, target2_addr); | |
1127 | ||
1128 | spin_lock(&dist->lpi_list_lock); | |
1129 | ||
1130 | list_for_each_entry(irq, &dist->lpi_list_head, lpi_list) { | |
1131 | spin_lock(&irq->irq_lock); | |
1132 | ||
1133 | if (irq->target_vcpu == vcpu1) | |
1134 | irq->target_vcpu = vcpu2; | |
1135 | ||
1136 | spin_unlock(&irq->irq_lock); | |
1137 | } | |
1138 | ||
1139 | spin_unlock(&dist->lpi_list_lock); | |
1140 | ||
1141 | return 0; | |
1142 | } | |
1143 | ||
1144 | /* | |
1145 | * The INT command injects the LPI associated with that DevID/EvID pair. | |
1146 | * Must be called with the its_lock mutex held. | |
1147 | */ | |
1148 | static int vgic_its_cmd_handle_int(struct kvm *kvm, struct vgic_its *its, | |
1149 | u64 *its_cmd) | |
1150 | { | |
1151 | u32 msi_data = its_cmd_get_id(its_cmd); | |
1152 | u64 msi_devid = its_cmd_get_deviceid(its_cmd); | |
1153 | ||
1154 | return vgic_its_trigger_msi(kvm, its, msi_devid, msi_data); | |
1155 | } | |
1156 | ||
1157 | /* | |
1158 | * This function is called with the its_cmd lock held, but the ITS data | |
1159 | * structure lock dropped. | |
1160 | */ | |
1161 | static int vgic_its_handle_command(struct kvm *kvm, struct vgic_its *its, | |
1162 | u64 *its_cmd) | |
1163 | { | |
1164 | int ret = -ENODEV; | |
1165 | ||
1166 | mutex_lock(&its->its_lock); | |
1167 | switch (its_cmd_get_command(its_cmd)) { | |
1168 | case GITS_CMD_MAPD: | |
1169 | ret = vgic_its_cmd_handle_mapd(kvm, its, its_cmd); | |
1170 | break; | |
1171 | case GITS_CMD_MAPC: | |
1172 | ret = vgic_its_cmd_handle_mapc(kvm, its, its_cmd); | |
1173 | break; | |
1174 | case GITS_CMD_MAPI: | |
1175 | ret = vgic_its_cmd_handle_mapi(kvm, its, its_cmd); | |
1176 | break; | |
1177 | case GITS_CMD_MAPTI: | |
1178 | ret = vgic_its_cmd_handle_mapi(kvm, its, its_cmd); | |
1179 | break; | |
1180 | case GITS_CMD_MOVI: | |
1181 | ret = vgic_its_cmd_handle_movi(kvm, its, its_cmd); | |
1182 | break; | |
1183 | case GITS_CMD_DISCARD: | |
1184 | ret = vgic_its_cmd_handle_discard(kvm, its, its_cmd); | |
1185 | break; | |
1186 | case GITS_CMD_CLEAR: | |
1187 | ret = vgic_its_cmd_handle_clear(kvm, its, its_cmd); | |
1188 | break; | |
1189 | case GITS_CMD_MOVALL: | |
1190 | ret = vgic_its_cmd_handle_movall(kvm, its, its_cmd); | |
1191 | break; | |
1192 | case GITS_CMD_INT: | |
1193 | ret = vgic_its_cmd_handle_int(kvm, its, its_cmd); | |
1194 | break; | |
1195 | case GITS_CMD_INV: | |
1196 | ret = vgic_its_cmd_handle_inv(kvm, its, its_cmd); | |
1197 | break; | |
1198 | case GITS_CMD_INVALL: | |
1199 | ret = vgic_its_cmd_handle_invall(kvm, its, its_cmd); | |
1200 | break; | |
1201 | case GITS_CMD_SYNC: | |
1202 | /* we ignore this command: we are in sync all of the time */ | |
1203 | ret = 0; | |
1204 | break; | |
1205 | } | |
1206 | mutex_unlock(&its->its_lock); | |
1207 | ||
1208 | return ret; | |
1209 | } | |
1210 | ||
1211 | static u64 vgic_sanitise_its_baser(u64 reg) | |
1212 | { | |
1213 | reg = vgic_sanitise_field(reg, GITS_BASER_SHAREABILITY_MASK, | |
1214 | GITS_BASER_SHAREABILITY_SHIFT, | |
1215 | vgic_sanitise_shareability); | |
1216 | reg = vgic_sanitise_field(reg, GITS_BASER_INNER_CACHEABILITY_MASK, | |
1217 | GITS_BASER_INNER_CACHEABILITY_SHIFT, | |
1218 | vgic_sanitise_inner_cacheability); | |
1219 | reg = vgic_sanitise_field(reg, GITS_BASER_OUTER_CACHEABILITY_MASK, | |
1220 | GITS_BASER_OUTER_CACHEABILITY_SHIFT, | |
1221 | vgic_sanitise_outer_cacheability); | |
1222 | ||
1223 | /* Bits 15:12 contain bits 51:48 of the PA, which we don't support. */ | |
1224 | reg &= ~GENMASK_ULL(15, 12); | |
1225 | ||
1226 | /* We support only one (ITS) page size: 64K */ | |
1227 | reg = (reg & ~GITS_BASER_PAGE_SIZE_MASK) | GITS_BASER_PAGE_SIZE_64K; | |
1228 | ||
1229 | return reg; | |
1230 | } | |
1231 | ||
1232 | static u64 vgic_sanitise_its_cbaser(u64 reg) | |
1233 | { | |
1234 | reg = vgic_sanitise_field(reg, GITS_CBASER_SHAREABILITY_MASK, | |
1235 | GITS_CBASER_SHAREABILITY_SHIFT, | |
1236 | vgic_sanitise_shareability); | |
1237 | reg = vgic_sanitise_field(reg, GITS_CBASER_INNER_CACHEABILITY_MASK, | |
1238 | GITS_CBASER_INNER_CACHEABILITY_SHIFT, | |
1239 | vgic_sanitise_inner_cacheability); | |
1240 | reg = vgic_sanitise_field(reg, GITS_CBASER_OUTER_CACHEABILITY_MASK, | |
1241 | GITS_CBASER_OUTER_CACHEABILITY_SHIFT, | |
1242 | vgic_sanitise_outer_cacheability); | |
1243 | ||
1244 | /* | |
1245 | * Sanitise the physical address to be 64k aligned. | |
1246 | * Also limit the physical addresses to 48 bits. | |
1247 | */ | |
1248 | reg &= ~(GENMASK_ULL(51, 48) | GENMASK_ULL(15, 12)); | |
1249 | ||
1250 | return reg; | |
1251 | } | |
1252 | ||
1253 | static unsigned long vgic_mmio_read_its_cbaser(struct kvm *kvm, | |
1254 | struct vgic_its *its, | |
1255 | gpa_t addr, unsigned int len) | |
1256 | { | |
1257 | return extract_bytes(its->cbaser, addr & 7, len); | |
1258 | } | |
1259 | ||
1260 | static void vgic_mmio_write_its_cbaser(struct kvm *kvm, struct vgic_its *its, | |
1261 | gpa_t addr, unsigned int len, | |
1262 | unsigned long val) | |
1263 | { | |
1264 | /* When GITS_CTLR.Enable is 1, this register is RO. */ | |
1265 | if (its->enabled) | |
1266 | return; | |
1267 | ||
1268 | mutex_lock(&its->cmd_lock); | |
1269 | its->cbaser = update_64bit_reg(its->cbaser, addr & 7, len, val); | |
1270 | its->cbaser = vgic_sanitise_its_cbaser(its->cbaser); | |
1271 | its->creadr = 0; | |
1272 | /* | |
1273 | * CWRITER is architecturally UNKNOWN on reset, but we need to reset | |
1274 | * it to CREADR to make sure we start with an empty command buffer. | |
1275 | */ | |
1276 | its->cwriter = its->creadr; | |
1277 | mutex_unlock(&its->cmd_lock); | |
1278 | } | |
1279 | ||
1280 | #define ITS_CMD_BUFFER_SIZE(baser) ((((baser) & 0xff) + 1) << 12) | |
1281 | #define ITS_CMD_SIZE 32 | |
1282 | #define ITS_CMD_OFFSET(reg) ((reg) & GENMASK(19, 5)) | |
1283 | ||
1284 | /* Must be called with the cmd_lock held. */ | |
1285 | static void vgic_its_process_commands(struct kvm *kvm, struct vgic_its *its) | |
1286 | { | |
1287 | gpa_t cbaser; | |
1288 | u64 cmd_buf[4]; | |
1289 | ||
1290 | /* Commands are only processed when the ITS is enabled. */ | |
1291 | if (!its->enabled) | |
1292 | return; | |
1293 | ||
1294 | cbaser = CBASER_ADDRESS(its->cbaser); | |
1295 | ||
1296 | while (its->cwriter != its->creadr) { | |
1297 | int ret = kvm_read_guest(kvm, cbaser + its->creadr, | |
1298 | cmd_buf, ITS_CMD_SIZE); | |
1299 | /* | |
1300 | * If kvm_read_guest() fails, this could be due to the guest | |
1301 | * programming a bogus value in CBASER or something else going | |
1302 | * wrong from which we cannot easily recover. | |
1303 | * According to section 6.3.2 in the GICv3 spec we can just | |
1304 | * ignore that command then. | |
1305 | */ | |
1306 | if (!ret) | |
1307 | vgic_its_handle_command(kvm, its, cmd_buf); | |
1308 | ||
1309 | its->creadr += ITS_CMD_SIZE; | |
1310 | if (its->creadr == ITS_CMD_BUFFER_SIZE(its->cbaser)) | |
1311 | its->creadr = 0; | |
1312 | } | |
1313 | } | |
1314 | ||
1315 | /* | |
1316 | * By writing to CWRITER the guest announces new commands to be processed. | |
1317 | * To avoid any races in the first place, we take the its_cmd lock, which | |
1318 | * protects our ring buffer variables, so that there is only one user | |
1319 | * per ITS handling commands at a given time. | |
1320 | */ | |
1321 | static void vgic_mmio_write_its_cwriter(struct kvm *kvm, struct vgic_its *its, | |
1322 | gpa_t addr, unsigned int len, | |
1323 | unsigned long val) | |
1324 | { | |
1325 | u64 reg; | |
1326 | ||
1327 | if (!its) | |
1328 | return; | |
1329 | ||
1330 | mutex_lock(&its->cmd_lock); | |
1331 | ||
1332 | reg = update_64bit_reg(its->cwriter, addr & 7, len, val); | |
1333 | reg = ITS_CMD_OFFSET(reg); | |
1334 | if (reg >= ITS_CMD_BUFFER_SIZE(its->cbaser)) { | |
1335 | mutex_unlock(&its->cmd_lock); | |
1336 | return; | |
1337 | } | |
1338 | its->cwriter = reg; | |
1339 | ||
1340 | vgic_its_process_commands(kvm, its); | |
1341 | ||
1342 | mutex_unlock(&its->cmd_lock); | |
1343 | } | |
1344 | ||
1345 | static unsigned long vgic_mmio_read_its_cwriter(struct kvm *kvm, | |
1346 | struct vgic_its *its, | |
1347 | gpa_t addr, unsigned int len) | |
1348 | { | |
1349 | return extract_bytes(its->cwriter, addr & 0x7, len); | |
1350 | } | |
1351 | ||
1352 | static unsigned long vgic_mmio_read_its_creadr(struct kvm *kvm, | |
1353 | struct vgic_its *its, | |
1354 | gpa_t addr, unsigned int len) | |
1355 | { | |
1356 | return extract_bytes(its->creadr, addr & 0x7, len); | |
1357 | } | |
1358 | ||
1359 | static int vgic_mmio_uaccess_write_its_creadr(struct kvm *kvm, | |
1360 | struct vgic_its *its, | |
1361 | gpa_t addr, unsigned int len, | |
1362 | unsigned long val) | |
1363 | { | |
1364 | u32 cmd_offset; | |
1365 | int ret = 0; | |
1366 | ||
1367 | mutex_lock(&its->cmd_lock); | |
1368 | ||
1369 | if (its->enabled) { | |
1370 | ret = -EBUSY; | |
1371 | goto out; | |
1372 | } | |
1373 | ||
1374 | cmd_offset = ITS_CMD_OFFSET(val); | |
1375 | if (cmd_offset >= ITS_CMD_BUFFER_SIZE(its->cbaser)) { | |
1376 | ret = -EINVAL; | |
1377 | goto out; | |
1378 | } | |
1379 | ||
1380 | its->creadr = cmd_offset; | |
1381 | out: | |
1382 | mutex_unlock(&its->cmd_lock); | |
1383 | return ret; | |
1384 | } | |
1385 | ||
1386 | #define BASER_INDEX(addr) (((addr) / sizeof(u64)) & 0x7) | |
1387 | static unsigned long vgic_mmio_read_its_baser(struct kvm *kvm, | |
1388 | struct vgic_its *its, | |
1389 | gpa_t addr, unsigned int len) | |
1390 | { | |
1391 | u64 reg; | |
1392 | ||
1393 | switch (BASER_INDEX(addr)) { | |
1394 | case 0: | |
1395 | reg = its->baser_device_table; | |
1396 | break; | |
1397 | case 1: | |
1398 | reg = its->baser_coll_table; | |
1399 | break; | |
1400 | default: | |
1401 | reg = 0; | |
1402 | break; | |
1403 | } | |
1404 | ||
1405 | return extract_bytes(reg, addr & 7, len); | |
1406 | } | |
1407 | ||
1408 | #define GITS_BASER_RO_MASK (GENMASK_ULL(52, 48) | GENMASK_ULL(58, 56)) | |
1409 | static void vgic_mmio_write_its_baser(struct kvm *kvm, | |
1410 | struct vgic_its *its, | |
1411 | gpa_t addr, unsigned int len, | |
1412 | unsigned long val) | |
1413 | { | |
1414 | const struct vgic_its_abi *abi = vgic_its_get_abi(its); | |
1415 | u64 entry_size, device_type; | |
1416 | u64 reg, *regptr, clearbits = 0; | |
1417 | ||
1418 | /* When GITS_CTLR.Enable is 1, we ignore write accesses. */ | |
1419 | if (its->enabled) | |
1420 | return; | |
1421 | ||
1422 | switch (BASER_INDEX(addr)) { | |
1423 | case 0: | |
1424 | regptr = &its->baser_device_table; | |
1425 | entry_size = abi->dte_esz; | |
1426 | device_type = GITS_BASER_TYPE_DEVICE; | |
1427 | break; | |
1428 | case 1: | |
1429 | regptr = &its->baser_coll_table; | |
1430 | entry_size = abi->cte_esz; | |
1431 | device_type = GITS_BASER_TYPE_COLLECTION; | |
1432 | clearbits = GITS_BASER_INDIRECT; | |
1433 | break; | |
1434 | default: | |
1435 | return; | |
1436 | } | |
1437 | ||
1438 | reg = update_64bit_reg(*regptr, addr & 7, len, val); | |
1439 | reg &= ~GITS_BASER_RO_MASK; | |
1440 | reg &= ~clearbits; | |
1441 | ||
1442 | reg |= (entry_size - 1) << GITS_BASER_ENTRY_SIZE_SHIFT; | |
1443 | reg |= device_type << GITS_BASER_TYPE_SHIFT; | |
1444 | reg = vgic_sanitise_its_baser(reg); | |
1445 | ||
1446 | *regptr = reg; | |
1447 | } | |
1448 | ||
1449 | static unsigned long vgic_mmio_read_its_ctlr(struct kvm *vcpu, | |
1450 | struct vgic_its *its, | |
1451 | gpa_t addr, unsigned int len) | |
1452 | { | |
1453 | u32 reg = 0; | |
1454 | ||
1455 | mutex_lock(&its->cmd_lock); | |
1456 | if (its->creadr == its->cwriter) | |
1457 | reg |= GITS_CTLR_QUIESCENT; | |
1458 | if (its->enabled) | |
1459 | reg |= GITS_CTLR_ENABLE; | |
1460 | mutex_unlock(&its->cmd_lock); | |
1461 | ||
1462 | return reg; | |
1463 | } | |
1464 | ||
1465 | static void vgic_mmio_write_its_ctlr(struct kvm *kvm, struct vgic_its *its, | |
1466 | gpa_t addr, unsigned int len, | |
1467 | unsigned long val) | |
1468 | { | |
1469 | mutex_lock(&its->cmd_lock); | |
1470 | ||
1471 | its->enabled = !!(val & GITS_CTLR_ENABLE); | |
1472 | ||
1473 | /* | |
1474 | * Try to process any pending commands. This function bails out early | |
1475 | * if the ITS is disabled or no commands have been queued. | |
1476 | */ | |
1477 | vgic_its_process_commands(kvm, its); | |
1478 | ||
1479 | mutex_unlock(&its->cmd_lock); | |
1480 | } | |
1481 | ||
1482 | #define REGISTER_ITS_DESC(off, rd, wr, length, acc) \ | |
1483 | { \ | |
1484 | .reg_offset = off, \ | |
1485 | .len = length, \ | |
1486 | .access_flags = acc, \ | |
1487 | .its_read = rd, \ | |
1488 | .its_write = wr, \ | |
1489 | } | |
1490 | ||
1491 | #define REGISTER_ITS_DESC_UACCESS(off, rd, wr, uwr, length, acc)\ | |
1492 | { \ | |
1493 | .reg_offset = off, \ | |
1494 | .len = length, \ | |
1495 | .access_flags = acc, \ | |
1496 | .its_read = rd, \ | |
1497 | .its_write = wr, \ | |
1498 | .uaccess_its_write = uwr, \ | |
1499 | } | |
1500 | ||
1501 | static void its_mmio_write_wi(struct kvm *kvm, struct vgic_its *its, | |
1502 | gpa_t addr, unsigned int len, unsigned long val) | |
1503 | { | |
1504 | /* Ignore */ | |
1505 | } | |
1506 | ||
1507 | static struct vgic_register_region its_registers[] = { | |
1508 | REGISTER_ITS_DESC(GITS_CTLR, | |
1509 | vgic_mmio_read_its_ctlr, vgic_mmio_write_its_ctlr, 4, | |
1510 | VGIC_ACCESS_32bit), | |
1511 | REGISTER_ITS_DESC_UACCESS(GITS_IIDR, | |
1512 | vgic_mmio_read_its_iidr, its_mmio_write_wi, | |
1513 | vgic_mmio_uaccess_write_its_iidr, 4, | |
1514 | VGIC_ACCESS_32bit), | |
1515 | REGISTER_ITS_DESC(GITS_TYPER, | |
1516 | vgic_mmio_read_its_typer, its_mmio_write_wi, 8, | |
1517 | VGIC_ACCESS_64bit | VGIC_ACCESS_32bit), | |
1518 | REGISTER_ITS_DESC(GITS_CBASER, | |
1519 | vgic_mmio_read_its_cbaser, vgic_mmio_write_its_cbaser, 8, | |
1520 | VGIC_ACCESS_64bit | VGIC_ACCESS_32bit), | |
1521 | REGISTER_ITS_DESC(GITS_CWRITER, | |
1522 | vgic_mmio_read_its_cwriter, vgic_mmio_write_its_cwriter, 8, | |
1523 | VGIC_ACCESS_64bit | VGIC_ACCESS_32bit), | |
1524 | REGISTER_ITS_DESC_UACCESS(GITS_CREADR, | |
1525 | vgic_mmio_read_its_creadr, its_mmio_write_wi, | |
1526 | vgic_mmio_uaccess_write_its_creadr, 8, | |
1527 | VGIC_ACCESS_64bit | VGIC_ACCESS_32bit), | |
1528 | REGISTER_ITS_DESC(GITS_BASER, | |
1529 | vgic_mmio_read_its_baser, vgic_mmio_write_its_baser, 0x40, | |
1530 | VGIC_ACCESS_64bit | VGIC_ACCESS_32bit), | |
1531 | REGISTER_ITS_DESC(GITS_IDREGS_BASE, | |
1532 | vgic_mmio_read_its_idregs, its_mmio_write_wi, 0x30, | |
1533 | VGIC_ACCESS_32bit), | |
1534 | }; | |
1535 | ||
1536 | /* This is called on setting the LPI enable bit in the redistributor. */ | |
1537 | void vgic_enable_lpis(struct kvm_vcpu *vcpu) | |
1538 | { | |
1539 | if (!(vcpu->arch.vgic_cpu.pendbaser & GICR_PENDBASER_PTZ)) | |
1540 | its_sync_lpi_pending_table(vcpu); | |
1541 | } | |
1542 | ||
1543 | static int vgic_register_its_iodev(struct kvm *kvm, struct vgic_its *its, | |
1544 | u64 addr) | |
1545 | { | |
1546 | struct vgic_io_device *iodev = &its->iodev; | |
1547 | int ret; | |
1548 | ||
1549 | mutex_lock(&kvm->slots_lock); | |
1550 | if (!IS_VGIC_ADDR_UNDEF(its->vgic_its_base)) { | |
1551 | ret = -EBUSY; | |
1552 | goto out; | |
1553 | } | |
1554 | ||
1555 | its->vgic_its_base = addr; | |
1556 | iodev->regions = its_registers; | |
1557 | iodev->nr_regions = ARRAY_SIZE(its_registers); | |
1558 | kvm_iodevice_init(&iodev->dev, &kvm_io_gic_ops); | |
1559 | ||
1560 | iodev->base_addr = its->vgic_its_base; | |
1561 | iodev->iodev_type = IODEV_ITS; | |
1562 | iodev->its = its; | |
1563 | ret = kvm_io_bus_register_dev(kvm, KVM_MMIO_BUS, iodev->base_addr, | |
1564 | KVM_VGIC_V3_ITS_SIZE, &iodev->dev); | |
1565 | out: | |
1566 | mutex_unlock(&kvm->slots_lock); | |
1567 | ||
1568 | return ret; | |
1569 | } | |
1570 | ||
1571 | #define INITIAL_BASER_VALUE \ | |
1572 | (GIC_BASER_CACHEABILITY(GITS_BASER, INNER, RaWb) | \ | |
1573 | GIC_BASER_CACHEABILITY(GITS_BASER, OUTER, SameAsInner) | \ | |
1574 | GIC_BASER_SHAREABILITY(GITS_BASER, InnerShareable) | \ | |
1575 | GITS_BASER_PAGE_SIZE_64K) | |
1576 | ||
1577 | #define INITIAL_PROPBASER_VALUE \ | |
1578 | (GIC_BASER_CACHEABILITY(GICR_PROPBASER, INNER, RaWb) | \ | |
1579 | GIC_BASER_CACHEABILITY(GICR_PROPBASER, OUTER, SameAsInner) | \ | |
1580 | GIC_BASER_SHAREABILITY(GICR_PROPBASER, InnerShareable)) | |
1581 | ||
1582 | static int vgic_its_create(struct kvm_device *dev, u32 type) | |
1583 | { | |
1584 | struct vgic_its *its; | |
1585 | ||
1586 | if (type != KVM_DEV_TYPE_ARM_VGIC_ITS) | |
1587 | return -ENODEV; | |
1588 | ||
1589 | its = kzalloc(sizeof(struct vgic_its), GFP_KERNEL); | |
1590 | if (!its) | |
1591 | return -ENOMEM; | |
1592 | ||
1593 | mutex_init(&its->its_lock); | |
1594 | mutex_init(&its->cmd_lock); | |
1595 | ||
1596 | its->vgic_its_base = VGIC_ADDR_UNDEF; | |
1597 | ||
1598 | INIT_LIST_HEAD(&its->device_list); | |
1599 | INIT_LIST_HEAD(&its->collection_list); | |
1600 | ||
1601 | dev->kvm->arch.vgic.has_its = true; | |
1602 | its->enabled = false; | |
1603 | its->dev = dev; | |
1604 | ||
1605 | its->baser_device_table = INITIAL_BASER_VALUE | | |
1606 | ((u64)GITS_BASER_TYPE_DEVICE << GITS_BASER_TYPE_SHIFT); | |
1607 | its->baser_coll_table = INITIAL_BASER_VALUE | | |
1608 | ((u64)GITS_BASER_TYPE_COLLECTION << GITS_BASER_TYPE_SHIFT); | |
1609 | dev->kvm->arch.vgic.propbaser = INITIAL_PROPBASER_VALUE; | |
1610 | ||
1611 | dev->private = its; | |
1612 | ||
1613 | return vgic_its_set_abi(its, NR_ITS_ABIS - 1); | |
1614 | } | |
1615 | ||
1616 | static void vgic_its_destroy(struct kvm_device *kvm_dev) | |
1617 | { | |
1618 | struct kvm *kvm = kvm_dev->kvm; | |
1619 | struct vgic_its *its = kvm_dev->private; | |
1620 | struct its_device *dev; | |
1621 | struct its_ite *ite; | |
1622 | struct list_head *dev_cur, *dev_temp; | |
1623 | struct list_head *cur, *temp; | |
1624 | ||
1625 | /* | |
1626 | * We may end up here without the lists ever having been initialized. | |
1627 | * Check this and bail out early to avoid dereferencing a NULL pointer. | |
1628 | */ | |
1629 | if (!its->device_list.next) | |
1630 | return; | |
1631 | ||
1632 | mutex_lock(&its->its_lock); | |
1633 | list_for_each_safe(dev_cur, dev_temp, &its->device_list) { | |
1634 | dev = container_of(dev_cur, struct its_device, dev_list); | |
1635 | list_for_each_safe(cur, temp, &dev->itt_head) { | |
1636 | ite = (container_of(cur, struct its_ite, ite_list)); | |
1637 | its_free_ite(kvm, ite); | |
1638 | } | |
1639 | list_del(dev_cur); | |
1640 | kfree(dev); | |
1641 | } | |
1642 | ||
1643 | list_for_each_safe(cur, temp, &its->collection_list) { | |
1644 | list_del(cur); | |
1645 | kfree(container_of(cur, struct its_collection, coll_list)); | |
1646 | } | |
1647 | mutex_unlock(&its->its_lock); | |
1648 | ||
1649 | kfree(its); | |
1650 | } | |
1651 | ||
1652 | int vgic_its_has_attr_regs(struct kvm_device *dev, | |
1653 | struct kvm_device_attr *attr) | |
1654 | { | |
1655 | const struct vgic_register_region *region; | |
1656 | gpa_t offset = attr->attr; | |
1657 | int align; | |
1658 | ||
1659 | align = (offset < GITS_TYPER) || (offset >= GITS_PIDR4) ? 0x3 : 0x7; | |
1660 | ||
1661 | if (offset & align) | |
1662 | return -EINVAL; | |
1663 | ||
1664 | region = vgic_find_mmio_region(its_registers, | |
1665 | ARRAY_SIZE(its_registers), | |
1666 | offset); | |
1667 | if (!region) | |
1668 | return -ENXIO; | |
1669 | ||
1670 | return 0; | |
1671 | } | |
1672 | ||
1673 | int vgic_its_attr_regs_access(struct kvm_device *dev, | |
1674 | struct kvm_device_attr *attr, | |
1675 | u64 *reg, bool is_write) | |
1676 | { | |
1677 | const struct vgic_register_region *region; | |
1678 | struct vgic_its *its; | |
1679 | gpa_t addr, offset; | |
1680 | unsigned int len; | |
1681 | int align, ret = 0; | |
1682 | ||
1683 | its = dev->private; | |
1684 | offset = attr->attr; | |
1685 | ||
1686 | /* | |
1687 | * Although the spec supports upper/lower 32-bit accesses to | |
1688 | * 64-bit ITS registers, the userspace ABI requires 64-bit | |
1689 | * accesses to all 64-bit wide registers. We therefore only | |
1690 | * support 32-bit accesses to GITS_CTLR, GITS_IIDR and GITS ID | |
1691 | * registers | |
1692 | */ | |
1693 | if ((offset < GITS_TYPER) || (offset >= GITS_PIDR4)) | |
1694 | align = 0x3; | |
1695 | else | |
1696 | align = 0x7; | |
1697 | ||
1698 | if (offset & align) | |
1699 | return -EINVAL; | |
1700 | ||
1701 | mutex_lock(&dev->kvm->lock); | |
1702 | ||
1703 | if (IS_VGIC_ADDR_UNDEF(its->vgic_its_base)) { | |
1704 | ret = -ENXIO; | |
1705 | goto out; | |
1706 | } | |
1707 | ||
1708 | region = vgic_find_mmio_region(its_registers, | |
1709 | ARRAY_SIZE(its_registers), | |
1710 | offset); | |
1711 | if (!region) { | |
1712 | ret = -ENXIO; | |
1713 | goto out; | |
1714 | } | |
1715 | ||
1716 | if (!lock_all_vcpus(dev->kvm)) { | |
1717 | ret = -EBUSY; | |
1718 | goto out; | |
1719 | } | |
1720 | ||
1721 | addr = its->vgic_its_base + offset; | |
1722 | ||
1723 | len = region->access_flags & VGIC_ACCESS_64bit ? 8 : 4; | |
1724 | ||
1725 | if (is_write) { | |
1726 | if (region->uaccess_its_write) | |
1727 | ret = region->uaccess_its_write(dev->kvm, its, addr, | |
1728 | len, *reg); | |
1729 | else | |
1730 | region->its_write(dev->kvm, its, addr, len, *reg); | |
1731 | } else { | |
1732 | *reg = region->its_read(dev->kvm, its, addr, len); | |
1733 | } | |
1734 | unlock_all_vcpus(dev->kvm); | |
1735 | out: | |
1736 | mutex_unlock(&dev->kvm->lock); | |
1737 | return ret; | |
1738 | } | |
1739 | ||
1740 | static u32 compute_next_devid_offset(struct list_head *h, | |
1741 | struct its_device *dev) | |
1742 | { | |
1743 | struct its_device *next; | |
1744 | u32 next_offset; | |
1745 | ||
1746 | if (list_is_last(&dev->dev_list, h)) | |
1747 | return 0; | |
1748 | next = list_next_entry(dev, dev_list); | |
1749 | next_offset = next->device_id - dev->device_id; | |
1750 | ||
1751 | return min_t(u32, next_offset, VITS_DTE_MAX_DEVID_OFFSET); | |
1752 | } | |
1753 | ||
1754 | static u32 compute_next_eventid_offset(struct list_head *h, struct its_ite *ite) | |
1755 | { | |
1756 | struct its_ite *next; | |
1757 | u32 next_offset; | |
1758 | ||
1759 | if (list_is_last(&ite->ite_list, h)) | |
1760 | return 0; | |
1761 | next = list_next_entry(ite, ite_list); | |
1762 | next_offset = next->event_id - ite->event_id; | |
1763 | ||
1764 | return min_t(u32, next_offset, VITS_ITE_MAX_EVENTID_OFFSET); | |
1765 | } | |
1766 | ||
1767 | /** | |
1768 | * entry_fn_t - Callback called on a table entry restore path | |
1769 | * @its: its handle | |
1770 | * @id: id of the entry | |
1771 | * @entry: pointer to the entry | |
1772 | * @opaque: pointer to an opaque data | |
1773 | * | |
1774 | * Return: < 0 on error, 0 if last element was identified, id offset to next | |
1775 | * element otherwise | |
1776 | */ | |
1777 | typedef int (*entry_fn_t)(struct vgic_its *its, u32 id, void *entry, | |
1778 | void *opaque); | |
1779 | ||
1780 | /** | |
1781 | * scan_its_table - Scan a contiguous table in guest RAM and applies a function | |
1782 | * to each entry | |
1783 | * | |
1784 | * @its: its handle | |
1785 | * @base: base gpa of the table | |
1786 | * @size: size of the table in bytes | |
1787 | * @esz: entry size in bytes | |
1788 | * @start_id: the ID of the first entry in the table | |
1789 | * (non zero for 2d level tables) | |
1790 | * @fn: function to apply on each entry | |
1791 | * | |
1792 | * Return: < 0 on error, 0 if last element was identified, 1 otherwise | |
1793 | * (the last element may not be found on second level tables) | |
1794 | */ | |
1795 | static int scan_its_table(struct vgic_its *its, gpa_t base, int size, int esz, | |
1796 | int start_id, entry_fn_t fn, void *opaque) | |
1797 | { | |
1798 | void *entry = kzalloc(esz, GFP_KERNEL); | |
1799 | struct kvm *kvm = its->dev->kvm; | |
1800 | unsigned long len = size; | |
1801 | int id = start_id; | |
1802 | gpa_t gpa = base; | |
1803 | int ret; | |
1804 | ||
1805 | while (len > 0) { | |
1806 | int next_offset; | |
1807 | size_t byte_offset; | |
1808 | ||
1809 | ret = kvm_read_guest(kvm, gpa, entry, esz); | |
1810 | if (ret) | |
1811 | goto out; | |
1812 | ||
1813 | next_offset = fn(its, id, entry, opaque); | |
1814 | if (next_offset <= 0) { | |
1815 | ret = next_offset; | |
1816 | goto out; | |
1817 | } | |
1818 | ||
1819 | byte_offset = next_offset * esz; | |
1820 | id += next_offset; | |
1821 | gpa += byte_offset; | |
1822 | len -= byte_offset; | |
1823 | } | |
1824 | ret = 1; | |
1825 | ||
1826 | out: | |
1827 | kfree(entry); | |
1828 | return ret; | |
1829 | } | |
1830 | ||
1831 | /** | |
1832 | * vgic_its_save_ite - Save an interrupt translation entry at @gpa | |
1833 | */ | |
1834 | static int vgic_its_save_ite(struct vgic_its *its, struct its_device *dev, | |
1835 | struct its_ite *ite, gpa_t gpa, int ite_esz) | |
1836 | { | |
1837 | struct kvm *kvm = its->dev->kvm; | |
1838 | u32 next_offset; | |
1839 | u64 val; | |
1840 | ||
1841 | next_offset = compute_next_eventid_offset(&dev->itt_head, ite); | |
1842 | val = ((u64)next_offset << KVM_ITS_ITE_NEXT_SHIFT) | | |
1843 | ((u64)ite->lpi << KVM_ITS_ITE_PINTID_SHIFT) | | |
1844 | ite->collection->collection_id; | |
1845 | val = cpu_to_le64(val); | |
1846 | return kvm_write_guest(kvm, gpa, &val, ite_esz); | |
1847 | } | |
1848 | ||
1849 | /** | |
1850 | * vgic_its_restore_ite - restore an interrupt translation entry | |
1851 | * @event_id: id used for indexing | |
1852 | * @ptr: pointer to the ITE entry | |
1853 | * @opaque: pointer to the its_device | |
1854 | */ | |
1855 | static int vgic_its_restore_ite(struct vgic_its *its, u32 event_id, | |
1856 | void *ptr, void *opaque) | |
1857 | { | |
1858 | struct its_device *dev = (struct its_device *)opaque; | |
1859 | struct its_collection *collection; | |
1860 | struct kvm *kvm = its->dev->kvm; | |
1861 | struct kvm_vcpu *vcpu = NULL; | |
1862 | u64 val; | |
1863 | u64 *p = (u64 *)ptr; | |
1864 | struct vgic_irq *irq; | |
1865 | u32 coll_id, lpi_id; | |
1866 | struct its_ite *ite; | |
1867 | u32 offset; | |
1868 | ||
1869 | val = *p; | |
1870 | ||
1871 | val = le64_to_cpu(val); | |
1872 | ||
1873 | coll_id = val & KVM_ITS_ITE_ICID_MASK; | |
1874 | lpi_id = (val & KVM_ITS_ITE_PINTID_MASK) >> KVM_ITS_ITE_PINTID_SHIFT; | |
1875 | ||
1876 | if (!lpi_id) | |
1877 | return 1; /* invalid entry, no choice but to scan next entry */ | |
1878 | ||
1879 | if (lpi_id < VGIC_MIN_LPI) | |
1880 | return -EINVAL; | |
1881 | ||
1882 | offset = val >> KVM_ITS_ITE_NEXT_SHIFT; | |
1883 | if (event_id + offset >= BIT_ULL(dev->num_eventid_bits)) | |
1884 | return -EINVAL; | |
1885 | ||
1886 | collection = find_collection(its, coll_id); | |
1887 | if (!collection) | |
1888 | return -EINVAL; | |
1889 | ||
1890 | ite = vgic_its_alloc_ite(dev, collection, lpi_id, event_id); | |
1891 | if (IS_ERR(ite)) | |
1892 | return PTR_ERR(ite); | |
1893 | ||
1894 | if (its_is_collection_mapped(collection)) | |
1895 | vcpu = kvm_get_vcpu(kvm, collection->target_addr); | |
1896 | ||
1897 | irq = vgic_add_lpi(kvm, lpi_id, vcpu); | |
1898 | if (IS_ERR(irq)) | |
1899 | return PTR_ERR(irq); | |
1900 | ite->irq = irq; | |
1901 | ||
1902 | return offset; | |
1903 | } | |
1904 | ||
1905 | static int vgic_its_ite_cmp(void *priv, struct list_head *a, | |
1906 | struct list_head *b) | |
1907 | { | |
1908 | struct its_ite *itea = container_of(a, struct its_ite, ite_list); | |
1909 | struct its_ite *iteb = container_of(b, struct its_ite, ite_list); | |
1910 | ||
1911 | if (itea->event_id < iteb->event_id) | |
1912 | return -1; | |
1913 | else | |
1914 | return 1; | |
1915 | } | |
1916 | ||
1917 | static int vgic_its_save_itt(struct vgic_its *its, struct its_device *device) | |
1918 | { | |
1919 | const struct vgic_its_abi *abi = vgic_its_get_abi(its); | |
1920 | gpa_t base = device->itt_addr; | |
1921 | struct its_ite *ite; | |
1922 | int ret; | |
1923 | int ite_esz = abi->ite_esz; | |
1924 | ||
1925 | list_sort(NULL, &device->itt_head, vgic_its_ite_cmp); | |
1926 | ||
1927 | list_for_each_entry(ite, &device->itt_head, ite_list) { | |
1928 | gpa_t gpa = base + ite->event_id * ite_esz; | |
1929 | ||
1930 | ret = vgic_its_save_ite(its, device, ite, gpa, ite_esz); | |
1931 | if (ret) | |
1932 | return ret; | |
1933 | } | |
1934 | return 0; | |
1935 | } | |
1936 | ||
1937 | static int vgic_its_restore_itt(struct vgic_its *its, struct its_device *dev) | |
1938 | { | |
1939 | const struct vgic_its_abi *abi = vgic_its_get_abi(its); | |
1940 | gpa_t base = dev->itt_addr; | |
1941 | int ret; | |
1942 | int ite_esz = abi->ite_esz; | |
1943 | size_t max_size = BIT_ULL(dev->num_eventid_bits) * ite_esz; | |
1944 | ||
1945 | ret = scan_its_table(its, base, max_size, ite_esz, 0, | |
1946 | vgic_its_restore_ite, dev); | |
1947 | ||
1948 | return ret; | |
1949 | } | |
1950 | ||
1951 | /** | |
1952 | * vgic_its_save_dte - Save a device table entry at a given GPA | |
1953 | * | |
1954 | * @its: ITS handle | |
1955 | * @dev: ITS device | |
1956 | * @ptr: GPA | |
1957 | */ | |
1958 | static int vgic_its_save_dte(struct vgic_its *its, struct its_device *dev, | |
1959 | gpa_t ptr, int dte_esz) | |
1960 | { | |
1961 | struct kvm *kvm = its->dev->kvm; | |
1962 | u64 val, itt_addr_field; | |
1963 | u32 next_offset; | |
1964 | ||
1965 | itt_addr_field = dev->itt_addr >> 8; | |
1966 | next_offset = compute_next_devid_offset(&its->device_list, dev); | |
1967 | val = (1ULL << KVM_ITS_DTE_VALID_SHIFT | | |
1968 | ((u64)next_offset << KVM_ITS_DTE_NEXT_SHIFT) | | |
1969 | (itt_addr_field << KVM_ITS_DTE_ITTADDR_SHIFT) | | |
1970 | (dev->num_eventid_bits - 1)); | |
1971 | val = cpu_to_le64(val); | |
1972 | return kvm_write_guest(kvm, ptr, &val, dte_esz); | |
1973 | } | |
1974 | ||
1975 | /** | |
1976 | * vgic_its_restore_dte - restore a device table entry | |
1977 | * | |
1978 | * @its: its handle | |
1979 | * @id: device id the DTE corresponds to | |
1980 | * @ptr: kernel VA where the 8 byte DTE is located | |
1981 | * @opaque: unused | |
1982 | * | |
1983 | * Return: < 0 on error, 0 if the dte is the last one, id offset to the | |
1984 | * next dte otherwise | |
1985 | */ | |
1986 | static int vgic_its_restore_dte(struct vgic_its *its, u32 id, | |
1987 | void *ptr, void *opaque) | |
1988 | { | |
1989 | struct its_device *dev; | |
1990 | gpa_t itt_addr; | |
1991 | u8 num_eventid_bits; | |
1992 | u64 entry = *(u64 *)ptr; | |
1993 | bool valid; | |
1994 | u32 offset; | |
1995 | int ret; | |
1996 | ||
1997 | entry = le64_to_cpu(entry); | |
1998 | ||
1999 | valid = entry >> KVM_ITS_DTE_VALID_SHIFT; | |
2000 | num_eventid_bits = (entry & KVM_ITS_DTE_SIZE_MASK) + 1; | |
2001 | itt_addr = ((entry & KVM_ITS_DTE_ITTADDR_MASK) | |
2002 | >> KVM_ITS_DTE_ITTADDR_SHIFT) << 8; | |
2003 | ||
2004 | if (!valid) | |
2005 | return 1; | |
2006 | ||
2007 | /* dte entry is valid */ | |
2008 | offset = (entry & KVM_ITS_DTE_NEXT_MASK) >> KVM_ITS_DTE_NEXT_SHIFT; | |
2009 | ||
2010 | dev = vgic_its_alloc_device(its, id, itt_addr, num_eventid_bits); | |
2011 | if (IS_ERR(dev)) | |
2012 | return PTR_ERR(dev); | |
2013 | ||
2014 | ret = vgic_its_restore_itt(its, dev); | |
2015 | if (ret) | |
2016 | return ret; | |
2017 | ||
2018 | return offset; | |
2019 | } | |
2020 | ||
2021 | static int vgic_its_device_cmp(void *priv, struct list_head *a, | |
2022 | struct list_head *b) | |
2023 | { | |
2024 | struct its_device *deva = container_of(a, struct its_device, dev_list); | |
2025 | struct its_device *devb = container_of(b, struct its_device, dev_list); | |
2026 | ||
2027 | if (deva->device_id < devb->device_id) | |
2028 | return -1; | |
2029 | else | |
2030 | return 1; | |
2031 | } | |
2032 | ||
2033 | /** | |
2034 | * vgic_its_save_device_tables - Save the device table and all ITT | |
2035 | * into guest RAM | |
2036 | * | |
2037 | * L1/L2 handling is hidden by vgic_its_check_id() helper which directly | |
2038 | * returns the GPA of the device entry | |
2039 | */ | |
2040 | static int vgic_its_save_device_tables(struct vgic_its *its) | |
2041 | { | |
2042 | const struct vgic_its_abi *abi = vgic_its_get_abi(its); | |
2043 | struct its_device *dev; | |
2044 | int dte_esz = abi->dte_esz; | |
2045 | u64 baser; | |
2046 | ||
2047 | baser = its->baser_device_table; | |
2048 | ||
2049 | list_sort(NULL, &its->device_list, vgic_its_device_cmp); | |
2050 | ||
2051 | list_for_each_entry(dev, &its->device_list, dev_list) { | |
2052 | int ret; | |
2053 | gpa_t eaddr; | |
2054 | ||
2055 | if (!vgic_its_check_id(its, baser, | |
2056 | dev->device_id, &eaddr)) | |
2057 | return -EINVAL; | |
2058 | ||
2059 | ret = vgic_its_save_itt(its, dev); | |
2060 | if (ret) | |
2061 | return ret; | |
2062 | ||
2063 | ret = vgic_its_save_dte(its, dev, eaddr, dte_esz); | |
2064 | if (ret) | |
2065 | return ret; | |
2066 | } | |
2067 | return 0; | |
2068 | } | |
2069 | ||
2070 | /** | |
2071 | * handle_l1_dte - callback used for L1 device table entries (2 stage case) | |
2072 | * | |
2073 | * @its: its handle | |
2074 | * @id: index of the entry in the L1 table | |
2075 | * @addr: kernel VA | |
2076 | * @opaque: unused | |
2077 | * | |
2078 | * L1 table entries are scanned by steps of 1 entry | |
2079 | * Return < 0 if error, 0 if last dte was found when scanning the L2 | |
2080 | * table, +1 otherwise (meaning next L1 entry must be scanned) | |
2081 | */ | |
2082 | static int handle_l1_dte(struct vgic_its *its, u32 id, void *addr, | |
2083 | void *opaque) | |
2084 | { | |
2085 | const struct vgic_its_abi *abi = vgic_its_get_abi(its); | |
2086 | int l2_start_id = id * (SZ_64K / abi->dte_esz); | |
2087 | u64 entry = *(u64 *)addr; | |
2088 | int dte_esz = abi->dte_esz; | |
2089 | gpa_t gpa; | |
2090 | int ret; | |
2091 | ||
2092 | entry = le64_to_cpu(entry); | |
2093 | ||
2094 | if (!(entry & KVM_ITS_L1E_VALID_MASK)) | |
2095 | return 1; | |
2096 | ||
2097 | gpa = entry & KVM_ITS_L1E_ADDR_MASK; | |
2098 | ||
2099 | ret = scan_its_table(its, gpa, SZ_64K, dte_esz, | |
2100 | l2_start_id, vgic_its_restore_dte, NULL); | |
2101 | ||
2102 | if (ret <= 0) | |
2103 | return ret; | |
2104 | ||
2105 | return 1; | |
2106 | } | |
2107 | ||
2108 | /** | |
2109 | * vgic_its_restore_device_tables - Restore the device table and all ITT | |
2110 | * from guest RAM to internal data structs | |
2111 | */ | |
2112 | static int vgic_its_restore_device_tables(struct vgic_its *its) | |
2113 | { | |
2114 | const struct vgic_its_abi *abi = vgic_its_get_abi(its); | |
2115 | u64 baser = its->baser_device_table; | |
2116 | int l1_esz, ret; | |
2117 | int l1_tbl_size = GITS_BASER_NR_PAGES(baser) * SZ_64K; | |
2118 | gpa_t l1_gpa; | |
2119 | ||
2120 | if (!(baser & GITS_BASER_VALID)) | |
2121 | return 0; | |
2122 | ||
2123 | l1_gpa = BASER_ADDRESS(baser); | |
2124 | ||
2125 | if (baser & GITS_BASER_INDIRECT) { | |
2126 | l1_esz = GITS_LVL1_ENTRY_SIZE; | |
2127 | ret = scan_its_table(its, l1_gpa, l1_tbl_size, l1_esz, 0, | |
2128 | handle_l1_dte, NULL); | |
2129 | } else { | |
2130 | l1_esz = abi->dte_esz; | |
2131 | ret = scan_its_table(its, l1_gpa, l1_tbl_size, l1_esz, 0, | |
2132 | vgic_its_restore_dte, NULL); | |
2133 | } | |
2134 | ||
2135 | if (ret > 0) | |
2136 | ret = -EINVAL; | |
2137 | ||
2138 | return ret; | |
2139 | } | |
2140 | ||
2141 | static int vgic_its_save_cte(struct vgic_its *its, | |
2142 | struct its_collection *collection, | |
2143 | gpa_t gpa, int esz) | |
2144 | { | |
2145 | u64 val; | |
2146 | ||
2147 | val = (1ULL << KVM_ITS_CTE_VALID_SHIFT | | |
2148 | ((u64)collection->target_addr << KVM_ITS_CTE_RDBASE_SHIFT) | | |
2149 | collection->collection_id); | |
2150 | val = cpu_to_le64(val); | |
2151 | return kvm_write_guest(its->dev->kvm, gpa, &val, esz); | |
2152 | } | |
2153 | ||
2154 | static int vgic_its_restore_cte(struct vgic_its *its, gpa_t gpa, int esz) | |
2155 | { | |
2156 | struct its_collection *collection; | |
2157 | struct kvm *kvm = its->dev->kvm; | |
2158 | u32 target_addr, coll_id; | |
2159 | u64 val; | |
2160 | int ret; | |
2161 | ||
2162 | BUG_ON(esz > sizeof(val)); | |
2163 | ret = kvm_read_guest(kvm, gpa, &val, esz); | |
2164 | if (ret) | |
2165 | return ret; | |
2166 | val = le64_to_cpu(val); | |
2167 | if (!(val & KVM_ITS_CTE_VALID_MASK)) | |
2168 | return 0; | |
2169 | ||
2170 | target_addr = (u32)(val >> KVM_ITS_CTE_RDBASE_SHIFT); | |
2171 | coll_id = val & KVM_ITS_CTE_ICID_MASK; | |
2172 | ||
2173 | if (target_addr >= atomic_read(&kvm->online_vcpus)) | |
2174 | return -EINVAL; | |
2175 | ||
2176 | collection = find_collection(its, coll_id); | |
2177 | if (collection) | |
2178 | return -EEXIST; | |
2179 | ret = vgic_its_alloc_collection(its, &collection, coll_id); | |
2180 | if (ret) | |
2181 | return ret; | |
2182 | collection->target_addr = target_addr; | |
2183 | return 1; | |
2184 | } | |
2185 | ||
2186 | /** | |
2187 | * vgic_its_save_collection_table - Save the collection table into | |
2188 | * guest RAM | |
2189 | */ | |
2190 | static int vgic_its_save_collection_table(struct vgic_its *its) | |
2191 | { | |
2192 | const struct vgic_its_abi *abi = vgic_its_get_abi(its); | |
2193 | struct its_collection *collection; | |
2194 | u64 val; | |
2195 | gpa_t gpa; | |
2196 | size_t max_size, filled = 0; | |
2197 | int ret, cte_esz = abi->cte_esz; | |
2198 | ||
2199 | gpa = BASER_ADDRESS(its->baser_coll_table); | |
2200 | if (!gpa) | |
2201 | return 0; | |
2202 | ||
2203 | max_size = GITS_BASER_NR_PAGES(its->baser_coll_table) * SZ_64K; | |
2204 | ||
2205 | list_for_each_entry(collection, &its->collection_list, coll_list) { | |
2206 | ret = vgic_its_save_cte(its, collection, gpa, cte_esz); | |
2207 | if (ret) | |
2208 | return ret; | |
2209 | gpa += cte_esz; | |
2210 | filled += cte_esz; | |
2211 | } | |
2212 | ||
2213 | if (filled == max_size) | |
2214 | return 0; | |
2215 | ||
2216 | /* | |
2217 | * table is not fully filled, add a last dummy element | |
2218 | * with valid bit unset | |
2219 | */ | |
2220 | val = 0; | |
2221 | BUG_ON(cte_esz > sizeof(val)); | |
2222 | ret = kvm_write_guest(its->dev->kvm, gpa, &val, cte_esz); | |
2223 | return ret; | |
2224 | } | |
2225 | ||
2226 | /** | |
2227 | * vgic_its_restore_collection_table - reads the collection table | |
2228 | * in guest memory and restores the ITS internal state. Requires the | |
2229 | * BASER registers to be restored before. | |
2230 | */ | |
2231 | static int vgic_its_restore_collection_table(struct vgic_its *its) | |
2232 | { | |
2233 | const struct vgic_its_abi *abi = vgic_its_get_abi(its); | |
2234 | int cte_esz = abi->cte_esz; | |
2235 | size_t max_size, read = 0; | |
2236 | gpa_t gpa; | |
2237 | int ret; | |
2238 | ||
2239 | if (!(its->baser_coll_table & GITS_BASER_VALID)) | |
2240 | return 0; | |
2241 | ||
2242 | gpa = BASER_ADDRESS(its->baser_coll_table); | |
2243 | ||
2244 | max_size = GITS_BASER_NR_PAGES(its->baser_coll_table) * SZ_64K; | |
2245 | ||
2246 | while (read < max_size) { | |
2247 | ret = vgic_its_restore_cte(its, gpa, cte_esz); | |
2248 | if (ret <= 0) | |
2249 | break; | |
2250 | gpa += cte_esz; | |
2251 | read += cte_esz; | |
2252 | } | |
2253 | return ret; | |
2254 | } | |
2255 | ||
2256 | /** | |
2257 | * vgic_its_save_tables_v0 - Save the ITS tables into guest ARM | |
2258 | * according to v0 ABI | |
2259 | */ | |
2260 | static int vgic_its_save_tables_v0(struct vgic_its *its) | |
2261 | { | |
2262 | struct kvm *kvm = its->dev->kvm; | |
2263 | int ret; | |
2264 | ||
2265 | mutex_lock(&kvm->lock); | |
2266 | mutex_lock(&its->its_lock); | |
2267 | ||
2268 | if (!lock_all_vcpus(kvm)) { | |
2269 | mutex_unlock(&its->its_lock); | |
2270 | mutex_unlock(&kvm->lock); | |
2271 | return -EBUSY; | |
2272 | } | |
2273 | ||
2274 | ret = vgic_its_save_device_tables(its); | |
2275 | if (ret) | |
2276 | goto out; | |
2277 | ||
2278 | ret = vgic_its_save_collection_table(its); | |
2279 | ||
2280 | out: | |
2281 | unlock_all_vcpus(kvm); | |
2282 | mutex_unlock(&its->its_lock); | |
2283 | mutex_unlock(&kvm->lock); | |
2284 | return ret; | |
2285 | } | |
2286 | ||
2287 | /** | |
2288 | * vgic_its_restore_tables_v0 - Restore the ITS tables from guest RAM | |
2289 | * to internal data structs according to V0 ABI | |
2290 | * | |
2291 | */ | |
2292 | static int vgic_its_restore_tables_v0(struct vgic_its *its) | |
2293 | { | |
2294 | struct kvm *kvm = its->dev->kvm; | |
2295 | int ret; | |
2296 | ||
2297 | mutex_lock(&kvm->lock); | |
2298 | mutex_lock(&its->its_lock); | |
2299 | ||
2300 | if (!lock_all_vcpus(kvm)) { | |
2301 | mutex_unlock(&its->its_lock); | |
2302 | mutex_unlock(&kvm->lock); | |
2303 | return -EBUSY; | |
2304 | } | |
2305 | ||
2306 | ret = vgic_its_restore_collection_table(its); | |
2307 | if (ret) | |
2308 | goto out; | |
2309 | ||
2310 | ret = vgic_its_restore_device_tables(its); | |
2311 | out: | |
2312 | unlock_all_vcpus(kvm); | |
2313 | mutex_unlock(&its->its_lock); | |
2314 | mutex_unlock(&kvm->lock); | |
2315 | ||
2316 | return ret; | |
2317 | } | |
2318 | ||
2319 | static int vgic_its_commit_v0(struct vgic_its *its) | |
2320 | { | |
2321 | const struct vgic_its_abi *abi; | |
2322 | ||
2323 | abi = vgic_its_get_abi(its); | |
2324 | its->baser_coll_table &= ~GITS_BASER_ENTRY_SIZE_MASK; | |
2325 | its->baser_device_table &= ~GITS_BASER_ENTRY_SIZE_MASK; | |
2326 | ||
2327 | its->baser_coll_table |= (GIC_ENCODE_SZ(abi->cte_esz, 5) | |
2328 | << GITS_BASER_ENTRY_SIZE_SHIFT); | |
2329 | ||
2330 | its->baser_device_table |= (GIC_ENCODE_SZ(abi->dte_esz, 5) | |
2331 | << GITS_BASER_ENTRY_SIZE_SHIFT); | |
2332 | return 0; | |
2333 | } | |
2334 | ||
2335 | static int vgic_its_has_attr(struct kvm_device *dev, | |
2336 | struct kvm_device_attr *attr) | |
2337 | { | |
2338 | switch (attr->group) { | |
2339 | case KVM_DEV_ARM_VGIC_GRP_ADDR: | |
2340 | switch (attr->attr) { | |
2341 | case KVM_VGIC_ITS_ADDR_TYPE: | |
2342 | return 0; | |
2343 | } | |
2344 | break; | |
2345 | case KVM_DEV_ARM_VGIC_GRP_CTRL: | |
2346 | switch (attr->attr) { | |
2347 | case KVM_DEV_ARM_VGIC_CTRL_INIT: | |
2348 | return 0; | |
2349 | case KVM_DEV_ARM_ITS_SAVE_TABLES: | |
2350 | return 0; | |
2351 | case KVM_DEV_ARM_ITS_RESTORE_TABLES: | |
2352 | return 0; | |
2353 | } | |
2354 | break; | |
2355 | case KVM_DEV_ARM_VGIC_GRP_ITS_REGS: | |
2356 | return vgic_its_has_attr_regs(dev, attr); | |
2357 | } | |
2358 | return -ENXIO; | |
2359 | } | |
2360 | ||
2361 | static int vgic_its_set_attr(struct kvm_device *dev, | |
2362 | struct kvm_device_attr *attr) | |
2363 | { | |
2364 | struct vgic_its *its = dev->private; | |
2365 | int ret; | |
2366 | ||
2367 | switch (attr->group) { | |
2368 | case KVM_DEV_ARM_VGIC_GRP_ADDR: { | |
2369 | u64 __user *uaddr = (u64 __user *)(long)attr->addr; | |
2370 | unsigned long type = (unsigned long)attr->attr; | |
2371 | u64 addr; | |
2372 | ||
2373 | if (type != KVM_VGIC_ITS_ADDR_TYPE) | |
2374 | return -ENODEV; | |
2375 | ||
2376 | if (copy_from_user(&addr, uaddr, sizeof(addr))) | |
2377 | return -EFAULT; | |
2378 | ||
2379 | ret = vgic_check_ioaddr(dev->kvm, &its->vgic_its_base, | |
2380 | addr, SZ_64K); | |
2381 | if (ret) | |
2382 | return ret; | |
2383 | ||
2384 | return vgic_register_its_iodev(dev->kvm, its, addr); | |
2385 | } | |
2386 | case KVM_DEV_ARM_VGIC_GRP_CTRL: { | |
2387 | const struct vgic_its_abi *abi = vgic_its_get_abi(its); | |
2388 | ||
2389 | switch (attr->attr) { | |
2390 | case KVM_DEV_ARM_VGIC_CTRL_INIT: | |
2391 | /* Nothing to do */ | |
2392 | return 0; | |
2393 | case KVM_DEV_ARM_ITS_SAVE_TABLES: | |
2394 | return abi->save_tables(its); | |
2395 | case KVM_DEV_ARM_ITS_RESTORE_TABLES: | |
2396 | return abi->restore_tables(its); | |
2397 | } | |
2398 | } | |
2399 | case KVM_DEV_ARM_VGIC_GRP_ITS_REGS: { | |
2400 | u64 __user *uaddr = (u64 __user *)(long)attr->addr; | |
2401 | u64 reg; | |
2402 | ||
2403 | if (get_user(reg, uaddr)) | |
2404 | return -EFAULT; | |
2405 | ||
2406 | return vgic_its_attr_regs_access(dev, attr, ®, true); | |
2407 | } | |
2408 | } | |
2409 | return -ENXIO; | |
2410 | } | |
2411 | ||
2412 | static int vgic_its_get_attr(struct kvm_device *dev, | |
2413 | struct kvm_device_attr *attr) | |
2414 | { | |
2415 | switch (attr->group) { | |
2416 | case KVM_DEV_ARM_VGIC_GRP_ADDR: { | |
2417 | struct vgic_its *its = dev->private; | |
2418 | u64 addr = its->vgic_its_base; | |
2419 | u64 __user *uaddr = (u64 __user *)(long)attr->addr; | |
2420 | unsigned long type = (unsigned long)attr->attr; | |
2421 | ||
2422 | if (type != KVM_VGIC_ITS_ADDR_TYPE) | |
2423 | return -ENODEV; | |
2424 | ||
2425 | if (copy_to_user(uaddr, &addr, sizeof(addr))) | |
2426 | return -EFAULT; | |
2427 | break; | |
2428 | } | |
2429 | case KVM_DEV_ARM_VGIC_GRP_ITS_REGS: { | |
2430 | u64 __user *uaddr = (u64 __user *)(long)attr->addr; | |
2431 | u64 reg; | |
2432 | int ret; | |
2433 | ||
2434 | ret = vgic_its_attr_regs_access(dev, attr, ®, false); | |
2435 | if (ret) | |
2436 | return ret; | |
2437 | return put_user(reg, uaddr); | |
2438 | } | |
2439 | default: | |
2440 | return -ENXIO; | |
2441 | } | |
2442 | ||
2443 | return 0; | |
2444 | } | |
2445 | ||
2446 | static struct kvm_device_ops kvm_arm_vgic_its_ops = { | |
2447 | .name = "kvm-arm-vgic-its", | |
2448 | .create = vgic_its_create, | |
2449 | .destroy = vgic_its_destroy, | |
2450 | .set_attr = vgic_its_set_attr, | |
2451 | .get_attr = vgic_its_get_attr, | |
2452 | .has_attr = vgic_its_has_attr, | |
2453 | }; | |
2454 | ||
2455 | int kvm_vgic_register_its_device(void) | |
2456 | { | |
2457 | return kvm_register_device_ops(&kvm_arm_vgic_its_ops, | |
2458 | KVM_DEV_TYPE_ARM_VGIC_ITS); | |
2459 | } |