3 Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
5 SPDX-License-Identifier: BSD-2-Clause-Patent
9 #include <Library/IoLib.h>
10 #include <Library/DebugLib.h>
12 #include <Omap3530/Omap3530.h>
19 //DPLL1 - DPLL4 are configured part of Configuration header which OMAP3 ROM parses.
21 // Enable PLL5 and set to 120 MHz as a reference clock.
22 MmioWrite32 (CM_CLKSEL4_PLL
, CM_CLKSEL_PLL_MULT(120) | CM_CLKSEL_PLL_DIV(13));
23 MmioWrite32 (CM_CLKSEL5_PLL
, CM_CLKSEL_DIV_120M(1));
24 MmioWrite32 (CM_CLKEN2_PLL
, CM_CLKEN_FREQSEL_075_100
| CM_CLKEN_ENABLE
);
26 // Turn on functional & interface clocks to the USBHOST power domain
27 MmioOr32(CM_FCLKEN_USBHOST
, CM_FCLKEN_USBHOST_EN_USBHOST2_ENABLE
28 | CM_FCLKEN_USBHOST_EN_USBHOST1_ENABLE
);
29 MmioOr32(CM_ICLKEN_USBHOST
, CM_ICLKEN_USBHOST_EN_USBHOST_ENABLE
);
31 // Turn on functional & interface clocks to the USBTLL block.
32 MmioOr32(CM_FCLKEN3_CORE
, CM_FCLKEN3_CORE_EN_USBTLL_ENABLE
);
33 MmioOr32(CM_ICLKEN3_CORE
, CM_ICLKEN3_CORE_EN_USBTLL_ENABLE
);
35 // Turn on functional & interface clocks to MMC1 and I2C1 modules.
36 MmioOr32(CM_FCLKEN1_CORE
, CM_FCLKEN1_CORE_EN_MMC1_ENABLE
37 | CM_FCLKEN1_CORE_EN_I2C1_ENABLE
);
38 MmioOr32(CM_ICLKEN1_CORE
, CM_ICLKEN1_CORE_EN_MMC1_ENABLE
39 | CM_ICLKEN1_CORE_EN_I2C1_ENABLE
);
41 // Turn on functional & interface clocks to various Peripherals.
42 MmioOr32(CM_FCLKEN_PER
, CM_FCLKEN_PER_EN_UART3_ENABLE
43 | CM_FCLKEN_PER_EN_GPT4_ENABLE
44 | CM_FCLKEN_PER_EN_GPIO2_ENABLE
45 | CM_FCLKEN_PER_EN_GPIO3_ENABLE
46 | CM_FCLKEN_PER_EN_GPIO4_ENABLE
47 | CM_FCLKEN_PER_EN_GPIO5_ENABLE
48 | CM_FCLKEN_PER_EN_GPIO6_ENABLE
);
49 MmioOr32(CM_ICLKEN_PER
, CM_ICLKEN_PER_EN_UART3_ENABLE
50 | CM_ICLKEN_PER_EN_GPT3_ENABLE
51 | CM_ICLKEN_PER_EN_GPT4_ENABLE
52 | CM_ICLKEN_PER_EN_GPIO2_ENABLE
53 | CM_ICLKEN_PER_EN_GPIO3_ENABLE
54 | CM_ICLKEN_PER_EN_GPIO4_ENABLE
55 | CM_ICLKEN_PER_EN_GPIO5_ENABLE
56 | CM_ICLKEN_PER_EN_GPIO6_ENABLE
);
58 // Turn on functional & inteface clocks to various wakeup modules.
59 MmioOr32(CM_FCLKEN_WKUP
, CM_FCLKEN_WKUP_EN_GPIO1_ENABLE
60 | CM_FCLKEN_WKUP_EN_WDT2_ENABLE
);
61 MmioOr32(CM_ICLKEN_WKUP
, CM_ICLKEN_WKUP_EN_GPIO1_ENABLE
62 | CM_ICLKEN_WKUP_EN_WDT2_ENABLE
);