Documentation/devicetree/bindings/clock/mvebu-gated-clock.txt

   1 * Gated Clock bindings for Marvell EBU SoCs
   2
   3 Marvell Armada 370/375/380/385/39x/XP, Dove and Kirkwood allow some
   4 peripheral clocks to be gated to save some power. The clock consumer
   5 should specify the desired clock by having the clock ID in its
   6 "clocks" phandle cell. The clock ID is directly mapped to the
   7 corresponding clock gating control bit in HW to ease manual clock
   8 lookup in datasheet.
   9
  10 The following is a list of provided IDs for Armada 370:
  11 ID      Clock   Peripheral
  12 -----------------------------------
  13 0       Audio   AC97 Cntrl
  14 1       pex0_en PCIe 0 Clock out
  15 2       pex1_en PCIe 1 Clock out
  16 3       ge1     Gigabit Ethernet 1
  17 4       ge0     Gigabit Ethernet 0
  18 5       pex0    PCIe Cntrl 0
  19 9       pex1    PCIe Cntrl 1
  20 15      sata0   SATA Host 0
  21 17      sdio    SDHCI Host
  22 23      crypto  CESA (crypto engine)
  23 25      tdm     Time Division Mplx
  24 28      ddr     DDR Cntrl
  25 30      sata1   SATA Host 0
  26
  27 The following is a list of provided IDs for Armada 375:
  28 ID      Clock           Peripheral
  29 -----------------------------------
  30 2       mu              Management Unit
  31 3       pp              Packet Processor
  32 4       ptp             PTP
  33 5       pex0            PCIe 0 Clock out
  34 6       pex1            PCIe 1 Clock out
  35 8       audio           Audio Cntrl
  36 11      nd_clk          Nand Flash Cntrl
  37 14      sata0_link      SATA 0 Link
  38 15      sata0_core      SATA 0 Core
  39 16      usb3            USB3 Host
  40 17      sdio            SDHCI Host
  41 18      usb             USB Host
  42 19      gop             Gigabit Ethernet MAC
  43 20      sata1_link      SATA 1 Link
  44 21      sata1_core      SATA 1 Core
  45 22      xor0            XOR DMA 0
  46 23      xor1            XOR DMA 0
  47 24      copro           Coprocessor
  48 25      tdm             Time Division Mplx
  49 28      crypto0_enc     Cryptographic Unit Port 0 Encryption
  50 29      crypto0_core    Cryptographic Unit Port 0 Core
  51 30      crypto1_enc     Cryptographic Unit Port 1 Encryption
  52 31      crypto1_core    Cryptographic Unit Port 1 Core
  53
  54 The following is a list of provided IDs for Armada 380/385:
  55 ID      Clock           Peripheral
  56 -----------------------------------
  57 0       audio           Audio
  58 2       ge2             Gigabit Ethernet 2
  59 3       ge1             Gigabit Ethernet 1
  60 4       ge0             Gigabit Ethernet 0
  61 5       pex1            PCIe 1
  62 6       pex2            PCIe 2
  63 7       pex3            PCIe 3
  64 8       pex0            PCIe 0
  65 9       usb3h0          USB3 Host 0
  66 10      usb3h1          USB3 Host 1
  67 11      usb3d           USB3 Device
  68 13      bm              Buffer Management
  69 14      crypto0z        Cryptographic 0 Z
  70 15      sata0           SATA 0
  71 16      crypto1z        Cryptographic 1 Z
  72 17      sdio            SDIO
  73 18      usb2            USB 2
  74 21      crypto1         Cryptographic 1
  75 22      xor0            XOR 0
  76 23      crypto0         Cryptographic 0
  77 25      tdm             Time Division Multiplexing
  78 28      xor1            XOR 1
  79 30      sata1           SATA 1
  80
  81 The following is a list of provided IDs for Armada 39x:
  82 ID      Clock           Peripheral
  83 -----------------------------------
  84 5       pex1            PCIe 1
  85 6       pex2            PCIe 2
  86 7       pex3            PCIe 3
  87 8       pex0            PCIe 0
  88 9       usb3h0          USB3 Host 0
  89 10      usb3h1          USB3 Host 1
  90 15      sata0           SATA 0
  91 17      sdio            SDIO
  92 22      xor0            XOR 0
  93 28      xor1            XOR 1
  94
  95 The following is a list of provided IDs for Armada XP:
  96 ID      Clock   Peripheral
  97 -----------------------------------
  98 0       audio   Audio Cntrl
  99 1       ge3     Gigabit Ethernet 3
 100 2       ge2     Gigabit Ethernet 2
 101 3       ge1     Gigabit Ethernet 1
 102 4       ge0     Gigabit Ethernet 0
 103 5       pex0    PCIe Cntrl 0
 104 6       pex1    PCIe Cntrl 1
 105 7       pex2    PCIe Cntrl 2
 106 8       pex3    PCIe Cntrl 3
 107 13      bp
 108 14      sata0lnk
 109 15      sata0   SATA Host 0
 110 16      lcd     LCD Cntrl
 111 17      sdio    SDHCI Host
 112 18      usb0    USB Host 0
 113 19      usb1    USB Host 1
 114 20      usb2    USB Host 2
 115 22      xor0    XOR DMA 0
 116 23      crypto  CESA engine
 117 25      tdm     Time Division Mplx
 118 28      xor1    XOR DMA 1
 119 29      sata1lnk
 120 30      sata1   SATA Host 0
 121
 122 The following is a list of provided IDs for Dove:
 123 ID      Clock   Peripheral
 124 -----------------------------------
 125 0       usb0    USB Host 0
 126 1       usb1    USB Host 1
 127 2       ge      Gigabit Ethernet
 128 3       sata    SATA Host
 129 4       pex0    PCIe Cntrl 0
 130 5       pex1    PCIe Cntrl 1
 131 8       sdio0   SDHCI Host 0
 132 9       sdio1   SDHCI Host 1
 133 10      nand    NAND Cntrl
 134 11      camera  Camera Cntrl
 135 12      i2s0    I2S Cntrl 0
 136 13      i2s1    I2S Cntrl 1
 137 15      crypto  CESA engine
 138 21      ac97    AC97 Cntrl
 139 22      pdma    Peripheral DMA
 140 23      xor0    XOR DMA 0
 141 24      xor1    XOR DMA 1
 142 30      gephy   Gigabit Ethernel PHY
 143 Note: gephy(30) is implemented as a parent clock of ge(2)
 144
 145 The following is a list of provided IDs for Kirkwood:
 146 ID      Clock   Peripheral
 147 -----------------------------------
 148 0       ge0     Gigabit Ethernet 0
 149 2       pex0    PCIe Cntrl 0
 150 3       usb0    USB Host 0
 151 4       sdio    SDIO Cntrl
 152 5       tsu     Transp. Stream Unit
 153 6       dunit   SDRAM Cntrl
 154 7       runit   Runit
 155 8       xor0    XOR DMA 0
 156 9       audio   I2S Cntrl 0
 157 14      sata0   SATA Host 0
 158 15      sata1   SATA Host 1
 159 16      xor1    XOR DMA 1
 160 17      crypto  CESA engine
 161 18      pex1    PCIe Cntrl 1
 162 19      ge1     Gigabit Ethernet 1
 163 20      tdm     Time Division Mplx
 164
 165 Required properties:
 166 - compatible : shall be one of the following:
 167         "marvell,armada-370-gating-clock" - for Armada 370 SoC clock gating
 168         "marvell,armada-375-gating-clock" - for Armada 375 SoC clock gating
 169         "marvell,armada-380-gating-clock" - for Armada 380/385 SoC clock gating
 170         "marvell,armada-390-gating-clock" - for Armada 39x SoC clock gating
 171         "marvell,armada-xp-gating-clock" - for Armada XP SoC clock gating
 172         "marvell,dove-gating-clock" - for Dove SoC clock gating
 173         "marvell,kirkwood-gating-clock" - for Kirkwood SoC clock gating
 174 - reg : shall be the register address of the Clock Gating Control register
 175 - #clock-cells : from common clock binding; shall be set to 1
 176
 177 Optional properties:
 178 - clocks : default parent clock phandle (e.g. tclk)
 179
 180 Example:
 181
 182 gate_clk: clock-gating-control@d0038 {
 183         compatible = "marvell,dove-gating-clock";
 184         reg = <0xd0038 0x4>;
 185         /* default parent clock is tclk */
 186         clocks = <&core_clk 0>;
 187         #clock-cells = <1>;
 188 };
 189
 190 sdio0: sdio@92000 {
 191         compatible = "marvell,dove-sdhci";
 192         /* get clk gate bit 8 (sdio0) */
 193         clocks = <&gate_clk 8>;
 194 };