3 Copyright (c) 2007, Intel Corporation
4 All rights reserved. This program and the accompanying materials
5 are licensed and made available under the terms and conditions of the BSD License
6 which accompanies this distribution. The full text of the license may be found at
7 http://opensource.org/licenses/bsd-license.php
9 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
10 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
17 Defives data structures per Multi Processor Specification Ver 1.4.
21 #ifndef LEGACY_BIOS_MPTABLE_H_
22 #define LEGACY_BIOS_MPTABLE_H_
24 #define EFI_LEGACY_MP_TABLE_REV_1_4 0x04
27 // Define MP table structures. All are packed.
31 #define EFI_LEGACY_MP_TABLE_FLOATING_POINTER_SIGNATURE SIGNATURE_32 ('_', 'M', 'P', '_')
34 UINT32 PhysicalAddress
;
41 UINT32 MutipleClk
: 1;
43 UINT32 Reserved2
: 24;
45 } EFI_LEGACY_MP_TABLE_FLOATING_POINTER
;
47 #define EFI_LEGACY_MP_TABLE_HEADER_SIGNATURE SIGNATURE_32 ('P', 'C', 'M', 'P')
50 UINT16 BaseTableLength
;
54 CHAR8 OemProductId
[12];
55 UINT32 OemTablePointer
;
58 UINT32 LocalApicAddress
;
59 UINT16 ExtendedTableLength
;
60 UINT8 ExtendedChecksum
;
62 } EFI_LEGACY_MP_TABLE_HEADER
;
66 } EFI_LEGACY_MP_TABLE_ENTRY_TYPE
;
69 // Entry Type 0: Processor.
71 #define EFI_LEGACY_MP_TABLE_ENTRY_TYPE_PROCESSOR 0x00
93 UINT32 Reserved2
: 22;
97 } EFI_LEGACY_MP_TABLE_ENTRY_PROCESSOR
;
100 // Entry Type 1: Bus.
102 #define EFI_LEGACY_MP_TABLE_ENTRY_TYPE_BUS 0x01
107 } EFI_LEGACY_MP_TABLE_ENTRY_BUS
;
109 #define EFI_LEGACY_MP_TABLE_ENTRY_BUS_STRING_CBUS "CBUS " // Corollary CBus
110 #define EFI_LEGACY_MP_TABLE_ENTRY_BUS_STRING_CBUSII "CBUSII" // Corollary CBUS II
111 #define EFI_LEGACY_MP_TABLE_ENTRY_BUS_STRING_EISA "EISA " // Extended ISA
112 #define EFI_LEGACY_MP_TABLE_ENTRY_BUS_STRING_FUTURE "FUTURE" // IEEE FutureBus
113 #define EFI_LEGACY_MP_TABLE_ENTRY_BUS_STRING_INTERN "INTERN" // Internal bus
114 #define EFI_LEGACY_MP_TABLE_ENTRY_BUS_STRING_ISA "ISA " // Industry Standard Architecture
115 #define EFI_LEGACY_MP_TABLE_ENTRY_BUS_STRING_MBI "MBI " // Multibus I
116 #define EFI_LEGACY_MP_TABLE_ENTRY_BUS_STRING_MBII "MBII " // Multibus II
117 #define EFI_LEGACY_MP_TABLE_ENTRY_BUS_STRING_MCA "MCA " // Micro Channel Architecture
118 #define EFI_LEGACY_MP_TABLE_ENTRY_BUS_STRING_MPI "MPI " // MPI
119 #define EFI_LEGACY_MP_TABLE_ENTRY_BUS_STRING_MPSA "MPSA " // MPSA
120 #define EFI_LEGACY_MP_TABLE_ENTRY_BUS_STRING_NUBUS "NUBUS " // Apple Macintosh NuBus
121 #define EFI_LEGACY_MP_TABLE_ENTRY_BUS_STRING_PCI "PCI " // Peripheral Component Interconnect
122 #define EFI_LEGACY_MP_TABLE_ENTRY_BUS_STRING_PCMCIA "PCMCIA" // PC Memory Card International Assoc.
123 #define EFI_LEGACY_MP_TABLE_ENTRY_BUS_STRING_TC "TC " // DEC TurboChannel
124 #define EFI_LEGACY_MP_TABLE_ENTRY_BUS_STRING_VL "VL " // VESA Local Bus
125 #define EFI_LEGACY_MP_TABLE_ENTRY_BUS_STRING_VME "VME " // VMEbus
126 #define EFI_LEGACY_MP_TABLE_ENTRY_BUS_STRING_XPRESS "XPRESS" // Express System Bus
128 // Entry Type 2: I/O APIC.
130 #define EFI_LEGACY_MP_TABLE_ENTRY_TYPE_IOAPIC 0x02
140 } EFI_LEGACY_MP_TABLE_ENTRY_IOAPIC
;
143 // Entry Type 3: I/O Interrupt Assignment.
145 #define EFI_LEGACY_MP_TABLE_ENTRY_TYPE_IO_INT 0x03
152 UINT16 Reserved
: 12;
165 } EFI_LEGACY_MP_TABLE_ENTRY_IO_INT
;
168 EfiLegacyMpTableEntryIoIntTypeInt
= 0,
169 EfiLegacyMpTableEntryIoIntTypeNmi
= 1,
170 EfiLegacyMpTableEntryIoIntTypeSmi
= 2,
171 EfiLegacyMpTableEntryIoIntTypeExtInt
= 3,
172 } EFI_LEGACY_MP_TABLE_ENTRY_IO_INT_TYPE
;
175 EfiLegacyMpTableEntryIoIntFlagsPolaritySpec
= 0x0,
176 EfiLegacyMpTableEntryIoIntFlagsPolarityActiveHigh
= 0x1,
177 EfiLegacyMpTableEntryIoIntFlagsPolarityReserved
= 0x2,
178 EfiLegacyMpTableEntryIoIntFlagsPolarityActiveLow
= 0x3,
179 } EFI_LEGACY_MP_TABLE_ENTRY_IO_INT_FLAGS_POLARITY
;
182 EfiLegacyMpTableEntryIoIntFlagsTriggerSpec
= 0x0,
183 EfiLegacyMpTableEntryIoIntFlagsTriggerEdge
= 0x1,
184 EfiLegacyMpTableEntryIoIntFlagsTriggerReserved
= 0x2,
185 EfiLegacyMpTableEntryIoIntFlagsTriggerLevel
= 0x3,
186 } EFI_LEGACY_MP_TABLE_ENTRY_IO_INT_FLAGS_TRIGGER
;
189 // Entry Type 4: Local Interrupt Assignment.
191 #define EFI_LEGACY_MP_TABLE_ENTRY_TYPE_LOCAL_INT 0x04
198 UINT16 Reserved
: 12;
204 } EFI_LEGACY_MP_TABLE_ENTRY_LOCAL_INT
;
207 EfiLegacyMpTableEntryLocalIntTypeInt
= 0,
208 EfiLegacyMpTableEntryLocalIntTypeNmi
= 1,
209 EfiLegacyMpTableEntryLocalIntTypeSmi
= 2,
210 EfiLegacyMpTableEntryLocalIntTypeExtInt
= 3,
211 } EFI_LEGACY_MP_TABLE_ENTRY_LOCAL_INT_TYPE
;
214 EfiLegacyMpTableEntryLocalIntFlagsPolaritySpec
= 0x0,
215 EfiLegacyMpTableEntryLocalIntFlagsPolarityActiveHigh
= 0x1,
216 EfiLegacyMpTableEntryLocalIntFlagsPolarityReserved
= 0x2,
217 EfiLegacyMpTableEntryLocalIntFlagsPolarityActiveLow
= 0x3,
218 } EFI_LEGACY_MP_TABLE_ENTRY_LOCAL_INT_FLAGS_POLARITY
;
221 EfiLegacyMpTableEntryLocalIntFlagsTriggerSpec
= 0x0,
222 EfiLegacyMpTableEntryLocalIntFlagsTriggerEdge
= 0x1,
223 EfiLegacyMpTableEntryLocalIntFlagsTriggerReserved
= 0x2,
224 EfiLegacyMpTableEntryLocalIntFlagsTriggerLevel
= 0x3,
225 } EFI_LEGACY_MP_TABLE_ENTRY_LOCAL_INT_FLAGS_TRIGGER
;
228 // Entry Type 128: System Address Space Mapping.
230 #define EFI_LEGACY_MP_TABLE_ENTRY_EXT_TYPE_SYS_ADDR_SPACE_MAPPING 0x80
237 UINT64 AddressLength
;
238 } EFI_LEGACY_MP_TABLE_ENTRY_EXT_SYS_ADDR_SPACE_MAPPING
;
241 EfiLegacyMpTableEntryExtSysAddrSpaceMappingIo
= 0,
242 EfiLegacyMpTableEntryExtSysAddrSpaceMappingMemory
= 1,
243 EfiLegacyMpTableEntryExtSysAddrSpaceMappingPrefetch
= 2,
244 } EFI_LEGACY_MP_TABLE_ENTRY_EXT_SYS_ADDR_SPACE_MAPPING_TYPE
;
247 // Entry Type 129: Bus Hierarchy.
249 #define EFI_LEGACY_MP_TABLE_ENTRY_EXT_TYPE_BUS_HIERARCHY 0x81
255 UINT8 SubtractiveDecode
: 1;
262 } EFI_LEGACY_MP_TABLE_ENTRY_EXT_BUS_HIERARCHY
;
265 // Entry Type 130: Compatibility Bus Address Space Modifier.
267 #define EFI_LEGACY_MP_TABLE_ENTRY_EXT_TYPE_COMPAT_BUS_ADDR_SPACE_MODIFIER 0x82
276 UINT32 PredefinedRangeList
;
277 } EFI_LEGACY_MP_TABLE_ENTRY_EXT_COMPAT_BUS_ADDR_SPACE_MODIFIER
;