3 Copyright (c) 2005 - 2012, Intel Corporation. All rights reserved.<BR>
4 This program and the accompanying materials
5 are licensed and made available under the terms and conditions of the BSD License
6 which accompanies this distribution. The full text of the license may be found at
7 http://opensource.org/licenses/bsd-license.php
9 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
10 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
17 EFI PC AT PCI Root Bridge Io Protocol
23 #include "PcatPciRootBridge.h"
26 // Protocol Member Function Prototypes
30 PcatRootBridgeIoPollMem (
31 IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL
*This
,
32 IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width
,
42 PcatRootBridgeIoPollIo (
43 IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL
*This
,
44 IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width
,
54 PcatRootBridgeIoMemRead (
55 IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL
*This
,
56 IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width
,
64 PcatRootBridgeIoMemWrite (
65 IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL
*This
,
66 IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width
,
74 PcatRootBridgeIoCopyMem (
75 IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL
*This
,
76 IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width
,
77 IN UINT64 DestAddress
,
84 PcatRootBridgeIoPciRead (
85 IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL
*This
,
86 IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width
,
94 PcatRootBridgeIoPciWrite (
95 IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL
*This
,
96 IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width
,
104 PcatRootBridgeIoMap (
105 IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL
*This
,
106 IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_OPERATION Operation
,
107 IN VOID
*HostAddress
,
108 IN OUT UINTN
*NumberOfBytes
,
109 OUT EFI_PHYSICAL_ADDRESS
*DeviceAddress
,
115 PcatRootBridgeIoUnmap (
116 IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL
*This
,
122 PcatRootBridgeIoAllocateBuffer (
123 IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL
*This
,
124 IN EFI_ALLOCATE_TYPE Type
,
125 IN EFI_MEMORY_TYPE MemoryType
,
127 OUT VOID
**HostAddress
,
133 PcatRootBridgeIoFreeBuffer (
134 IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL
*This
,
136 OUT VOID
*HostAddress
141 PcatRootBridgeIoFlush (
142 IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL
*This
147 PcatRootBridgeIoGetAttributes (
148 IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL
*This
,
149 OUT UINT64
*Supported
,
150 OUT UINT64
*Attributes
155 PcatRootBridgeIoSetAttributes (
156 IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL
*This
,
157 IN UINT64 Attributes
,
158 IN OUT UINT64
*ResourceBase
,
159 IN OUT UINT64
*ResourceLength
164 PcatRootBridgeIoConfiguration (
165 IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL
*This
,
170 // Private Function Prototypes
174 PcatRootBridgeIoMemRW (
175 IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width
,
177 IN BOOLEAN InStrideFlag
,
179 IN BOOLEAN OutStrideFlag
,
184 PcatRootBridgeIoConstructor (
185 IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL
*Protocol
,
186 IN UINTN SegmentNumber
192 Contruct the Pci Root Bridge Io protocol
196 Protocol - protocol to initialize
204 Protocol
->ParentHandle
= NULL
;
206 Protocol
->PollMem
= PcatRootBridgeIoPollMem
;
207 Protocol
->PollIo
= PcatRootBridgeIoPollIo
;
209 Protocol
->Mem
.Read
= PcatRootBridgeIoMemRead
;
210 Protocol
->Mem
.Write
= PcatRootBridgeIoMemWrite
;
212 Protocol
->Io
.Read
= PcatRootBridgeIoIoRead
;
213 Protocol
->Io
.Write
= PcatRootBridgeIoIoWrite
;
215 Protocol
->CopyMem
= PcatRootBridgeIoCopyMem
;
217 Protocol
->Pci
.Read
= PcatRootBridgeIoPciRead
;
218 Protocol
->Pci
.Write
= PcatRootBridgeIoPciWrite
;
220 Protocol
->Map
= PcatRootBridgeIoMap
;
221 Protocol
->Unmap
= PcatRootBridgeIoUnmap
;
223 Protocol
->AllocateBuffer
= PcatRootBridgeIoAllocateBuffer
;
224 Protocol
->FreeBuffer
= PcatRootBridgeIoFreeBuffer
;
226 Protocol
->Flush
= PcatRootBridgeIoFlush
;
228 Protocol
->GetAttributes
= PcatRootBridgeIoGetAttributes
;
229 Protocol
->SetAttributes
= PcatRootBridgeIoSetAttributes
;
231 Protocol
->Configuration
= PcatRootBridgeIoConfiguration
;
233 Protocol
->SegmentNumber
= (UINT32
)SegmentNumber
;
240 PcatRootBridgeIoPollMem (
241 IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL
*This
,
242 IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width
,
251 UINT64 NumberOfTicks
;
254 if (Result
== NULL
) {
255 return EFI_INVALID_PARAMETER
;
259 if ((UINT32
)Width
> EfiPciWidthUint64
) {
260 return EFI_INVALID_PARAMETER
;
263 // No matter what, always do a single poll.
265 Status
= This
->Mem
.Read (This
, Width
, Address
, 1, Result
);
266 if ( EFI_ERROR(Status
) ) {
269 if ( (*Result
& Mask
) == Value
) {
277 NumberOfTicks
= DivU64x32Remainder (Delay
, 100, &Remainder
);
278 if ( Remainder
!=0 ) {
283 while ( NumberOfTicks
) {
287 Status
= This
->Mem
.Read (This
, Width
, Address
, 1, Result
);
288 if ( EFI_ERROR(Status
) ) {
292 if ( (*Result
& Mask
) == Value
) {
304 PcatRootBridgeIoPollIo (
305 IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL
*This
,
306 IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width
,
315 UINT64 NumberOfTicks
;
318 if (Result
== NULL
) {
319 return EFI_INVALID_PARAMETER
;
322 if ((UINT32
)Width
> EfiPciWidthUint64
) {
323 return EFI_INVALID_PARAMETER
;
326 // No matter what, always do a single poll.
328 Status
= This
->Io
.Read (This
, Width
, Address
, 1, Result
);
329 if ( EFI_ERROR(Status
) ) {
332 if ( (*Result
& Mask
) == Value
) {
340 NumberOfTicks
= DivU64x32Remainder (Delay
, 100, &Remainder
);
341 if ( Remainder
!=0 ) {
346 while ( NumberOfTicks
) {
350 Status
= This
->Io
.Read (This
, Width
, Address
, 1, Result
);
351 if ( EFI_ERROR(Status
) ) {
355 if ( (*Result
& Mask
) == Value
) {
366 PcatRootBridgeMemAddressValid (
367 IN PCAT_PCI_ROOT_BRIDGE_INSTANCE
*PrivateData
,
371 if ((Address
>= PrivateData
->PciExpressBaseAddress
) && (Address
< PrivateData
->PciExpressBaseAddress
+ 0x10000000)) {
374 if ((Address
>= PrivateData
->MemBase
) && (Address
< PrivateData
->MemLimit
)) {
383 PcatRootBridgeIoMemRead (
384 IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL
*This
,
385 IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width
,
391 PCAT_PCI_ROOT_BRIDGE_INSTANCE
*PrivateData
;
396 if ( Buffer
== NULL
) {
397 return EFI_INVALID_PARAMETER
;
400 PrivateData
= DRIVER_INSTANCE_FROM_PCI_ROOT_BRIDGE_IO_THIS(This
);
402 if (!PcatRootBridgeMemAddressValid (PrivateData
, Address
)) {
403 return EFI_INVALID_PARAMETER
;
406 AlignMask
= (1 << (Width
& 0x03)) - 1;
407 if (Address
& AlignMask
) {
408 return EFI_INVALID_PARAMETER
;
411 Address
+= PrivateData
->PhysicalMemoryBase
;
414 Out
.buf
= (VOID
*)(UINTN
) Address
;
415 if ((UINT32
)Width
<= EfiPciWidthUint64
) {
416 return PcatRootBridgeIoMemRW (Width
, Count
, TRUE
, In
, TRUE
, Out
);
418 if (Width
>= EfiPciWidthFifoUint8
&& Width
<= EfiPciWidthFifoUint64
) {
419 return PcatRootBridgeIoMemRW (Width
, Count
, TRUE
, In
, FALSE
, Out
);
421 if (Width
>= EfiPciWidthFillUint8
&& Width
<= EfiPciWidthFillUint64
) {
422 return PcatRootBridgeIoMemRW (Width
, Count
, FALSE
, In
, TRUE
, Out
);
425 return EFI_INVALID_PARAMETER
;
430 PcatRootBridgeIoMemWrite (
431 IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL
*This
,
432 IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width
,
438 PCAT_PCI_ROOT_BRIDGE_INSTANCE
*PrivateData
;
443 if ( Buffer
== NULL
) {
444 return EFI_INVALID_PARAMETER
;
447 PrivateData
= DRIVER_INSTANCE_FROM_PCI_ROOT_BRIDGE_IO_THIS(This
);
449 if (!PcatRootBridgeMemAddressValid (PrivateData
, Address
)) {
450 return EFI_INVALID_PARAMETER
;
453 AlignMask
= (1 << (Width
& 0x03)) - 1;
454 if (Address
& AlignMask
) {
455 return EFI_INVALID_PARAMETER
;
458 Address
+= PrivateData
->PhysicalMemoryBase
;
460 In
.buf
= (VOID
*)(UINTN
) Address
;
462 if ((UINT32
)Width
<= EfiPciWidthUint64
) {
463 return PcatRootBridgeIoMemRW (Width
, Count
, TRUE
, In
, TRUE
, Out
);
465 if (Width
>= EfiPciWidthFifoUint8
&& Width
<= EfiPciWidthFifoUint64
) {
466 return PcatRootBridgeIoMemRW (Width
, Count
, FALSE
, In
, TRUE
, Out
);
468 if (Width
>= EfiPciWidthFillUint8
&& Width
<= EfiPciWidthFillUint64
) {
469 return PcatRootBridgeIoMemRW (Width
, Count
, TRUE
, In
, FALSE
, Out
);
472 return EFI_INVALID_PARAMETER
;
477 PcatRootBridgeIoCopyMem (
478 IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL
*This
,
479 IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width
,
480 IN UINT64 DestAddress
,
481 IN UINT64 SrcAddress
,
492 if ((UINT32
)Width
> EfiPciWidthUint64
) {
493 return EFI_INVALID_PARAMETER
;
496 if (DestAddress
== SrcAddress
) {
500 Stride
= (UINTN
)1 << Width
;
503 if ((DestAddress
> SrcAddress
) && (DestAddress
< (SrcAddress
+ Count
* Stride
))) {
505 SrcAddress
= SrcAddress
+ (Count
-1) * Stride
;
506 DestAddress
= DestAddress
+ (Count
-1) * Stride
;
509 for (Index
= 0;Index
< Count
;Index
++) {
510 Status
= PcatRootBridgeIoMemRead (
517 if (EFI_ERROR (Status
)) {
520 Status
= PcatRootBridgeIoMemWrite (
527 if (EFI_ERROR (Status
)) {
531 SrcAddress
+= Stride
;
532 DestAddress
+= Stride
;
534 SrcAddress
-= Stride
;
535 DestAddress
-= Stride
;
543 PcatRootBridgeIoPciRead (
544 IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL
*This
,
545 IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width
,
551 if (Buffer
== NULL
) {
552 return EFI_INVALID_PARAMETER
;
555 return PcatRootBridgeIoPciRW (This
, FALSE
, Width
, Address
, Count
, Buffer
);
560 PcatRootBridgeIoPciWrite (
561 IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL
*This
,
562 IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width
,
568 if (Buffer
== NULL
) {
569 return EFI_INVALID_PARAMETER
;
572 return PcatRootBridgeIoPciRW (This
, TRUE
, Width
, Address
, Count
, Buffer
);
577 PcatRootBridgeIoMap (
578 IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL
*This
,
579 IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_OPERATION Operation
,
580 IN VOID
*HostAddress
,
581 IN OUT UINTN
*NumberOfBytes
,
582 OUT EFI_PHYSICAL_ADDRESS
*DeviceAddress
,
588 EFI_PHYSICAL_ADDRESS PhysicalAddress
;
590 MAP_INFO_INSTANCE
*MapInstance
;
591 PCAT_PCI_ROOT_BRIDGE_INSTANCE
*PrivateData
;
593 if ( HostAddress
== NULL
|| NumberOfBytes
== NULL
||
594 DeviceAddress
== NULL
|| Mapping
== NULL
) {
596 return EFI_INVALID_PARAMETER
;
600 // Perform a fence operation to make sure all memory operations are flushed
605 // Initialize the return values to their defaults
610 // Make sure that Operation is valid
612 if ((UINT32
)Operation
>= EfiPciOperationMaximum
) {
613 return EFI_INVALID_PARAMETER
;
617 // Most PCAT like chipsets can not handle performing DMA above 4GB.
618 // If any part of the DMA transfer being mapped is above 4GB, then
619 // map the DMA transfer to a buffer below 4GB.
621 PhysicalAddress
= (EFI_PHYSICAL_ADDRESS
)(UINTN
)HostAddress
;
622 if ((PhysicalAddress
+ *NumberOfBytes
) > 0x100000000ULL
) {
625 // Common Buffer operations can not be remapped. If the common buffer
626 // if above 4GB, then it is not possible to generate a mapping, so return
629 if (Operation
== EfiPciOperationBusMasterCommonBuffer
|| Operation
== EfiPciOperationBusMasterCommonBuffer64
) {
630 return EFI_UNSUPPORTED
;
634 // Allocate a MAP_INFO structure to remember the mapping when Unmap() is
637 Status
= gBS
->AllocatePool (
642 if (EFI_ERROR (Status
)) {
648 // Return a pointer to the MAP_INFO structure in Mapping
653 // Initialize the MAP_INFO structure
655 MapInfo
->Operation
= Operation
;
656 MapInfo
->NumberOfBytes
= *NumberOfBytes
;
657 MapInfo
->NumberOfPages
= EFI_SIZE_TO_PAGES(*NumberOfBytes
);
658 MapInfo
->HostAddress
= PhysicalAddress
;
659 MapInfo
->MappedHostAddress
= 0x00000000ffffffff;
662 // Allocate a buffer below 4GB to map the transfer to.
664 Status
= gBS
->AllocatePages (
667 MapInfo
->NumberOfPages
,
668 &MapInfo
->MappedHostAddress
670 if (EFI_ERROR(Status
)) {
671 gBS
->FreePool (MapInfo
);
677 // If this is a read operation from the Bus Master's point of view,
678 // then copy the contents of the real buffer into the mapped buffer
679 // so the Bus Master can read the contents of the real buffer.
681 if (Operation
== EfiPciOperationBusMasterRead
|| Operation
== EfiPciOperationBusMasterRead64
) {
683 (VOID
*)(UINTN
)MapInfo
->MappedHostAddress
,
684 (VOID
*)(UINTN
)MapInfo
->HostAddress
,
685 MapInfo
->NumberOfBytes
690 Status
=gBS
->AllocatePool (
692 sizeof(MAP_INFO_INSTANCE
),
693 (VOID
**)&MapInstance
695 if (EFI_ERROR(Status
)) {
696 gBS
->FreePages (MapInfo
->MappedHostAddress
,MapInfo
->NumberOfPages
);
697 gBS
->FreePool (MapInfo
);
702 MapInstance
->Map
=MapInfo
;
703 PrivateData
= DRIVER_INSTANCE_FROM_PCI_ROOT_BRIDGE_IO_THIS(This
);
704 InsertTailList(&PrivateData
->MapInfo
,&MapInstance
->Link
);
707 // The DeviceAddress is the address of the maped buffer below 4GB
709 *DeviceAddress
= MapInfo
->MappedHostAddress
;
712 // The transfer is below 4GB, so the DeviceAddress is simply the HostAddress
714 *DeviceAddress
= PhysicalAddress
;
718 // Perform a fence operation to make sure all memory operations are flushed
727 PcatRootBridgeIoUnmap (
728 IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL
*This
,
734 PCAT_PCI_ROOT_BRIDGE_INSTANCE
*PrivateData
;
738 // Perform a fence operation to make sure all memory operations are flushed
742 PrivateData
= DRIVER_INSTANCE_FROM_PCI_ROOT_BRIDGE_IO_THIS(This
);
744 // See if the Map() operation associated with this Unmap() required a mapping buffer.
745 // If a mapping buffer was not required, then this function simply returns EFI_SUCCESS.
747 if (Mapping
!= NULL
) {
749 // Get the MAP_INFO structure from Mapping
751 MapInfo
= (MAP_INFO
*)Mapping
;
753 for (Link
= PrivateData
->MapInfo
.ForwardLink
; Link
!= &PrivateData
->MapInfo
; Link
= Link
->ForwardLink
) {
754 if (((MAP_INFO_INSTANCE
*)Link
)->Map
== MapInfo
)
758 if (Link
== &PrivateData
->MapInfo
) {
759 return EFI_INVALID_PARAMETER
;
762 RemoveEntryList(Link
);
763 ((MAP_INFO_INSTANCE
*)Link
)->Map
= NULL
;
764 gBS
->FreePool((MAP_INFO_INSTANCE
*)Link
);
767 // If this is a write operation from the Bus Master's point of view,
768 // then copy the contents of the mapped buffer into the real buffer
769 // so the processor can read the contents of the real buffer.
771 if (MapInfo
->Operation
== EfiPciOperationBusMasterWrite
|| MapInfo
->Operation
== EfiPciOperationBusMasterWrite64
) {
773 (VOID
*)(UINTN
)MapInfo
->HostAddress
,
774 (VOID
*)(UINTN
)MapInfo
->MappedHostAddress
,
775 MapInfo
->NumberOfBytes
780 // Free the mapped buffer and the MAP_INFO structure.
782 gBS
->FreePages (MapInfo
->MappedHostAddress
, MapInfo
->NumberOfPages
);
783 gBS
->FreePool (Mapping
);
787 // Perform a fence operation to make sure all memory operations are flushed
796 PcatRootBridgeIoAllocateBuffer (
797 IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL
*This
,
798 IN EFI_ALLOCATE_TYPE Type
,
799 IN EFI_MEMORY_TYPE MemoryType
,
801 OUT VOID
**HostAddress
,
806 EFI_PHYSICAL_ADDRESS PhysicalAddress
;
809 // Validate Attributes
811 if (Attributes
& EFI_PCI_ATTRIBUTE_INVALID_FOR_ALLOCATE_BUFFER
) {
812 return EFI_UNSUPPORTED
;
816 // Check for invalid inputs
818 if (HostAddress
== NULL
) {
819 return EFI_INVALID_PARAMETER
;
823 // The only valid memory types are EfiBootServicesData and EfiRuntimeServicesData
825 if (MemoryType
!= EfiBootServicesData
&& MemoryType
!= EfiRuntimeServicesData
) {
826 return EFI_INVALID_PARAMETER
;
830 // Limit allocations to memory below 4GB
832 PhysicalAddress
= (EFI_PHYSICAL_ADDRESS
)(0xffffffff);
834 Status
= gBS
->AllocatePages (AllocateMaxAddress
, MemoryType
, Pages
, &PhysicalAddress
);
835 if (EFI_ERROR (Status
)) {
839 *HostAddress
= (VOID
*)(UINTN
)PhysicalAddress
;
846 PcatRootBridgeIoFreeBuffer (
847 IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL
*This
,
849 OUT VOID
*HostAddress
854 if( HostAddress
== NULL
){
855 return EFI_INVALID_PARAMETER
;
857 return gBS
->FreePages ((EFI_PHYSICAL_ADDRESS
)(UINTN
)HostAddress
, Pages
);
862 PcatRootBridgeIoFlush (
863 IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL
*This
868 // Perform a fence operation to make sure all memory operations are flushed
877 PcatRootBridgeIoGetAttributes (
878 IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL
*This
,
879 OUT UINT64
*Supported
, OPTIONAL
880 OUT UINT64
*Attributes
884 PCAT_PCI_ROOT_BRIDGE_INSTANCE
*PrivateData
;
886 PrivateData
= DRIVER_INSTANCE_FROM_PCI_ROOT_BRIDGE_IO_THIS(This
);
888 if (Attributes
== NULL
&& Supported
== NULL
) {
889 return EFI_INVALID_PARAMETER
;
893 // Supported is an OPTIONAL parameter. See if it is NULL
897 // This is a generic driver for a PC-AT class system. It does not have any
898 // chipset specific knowlegde, so none of the attributes can be set or
899 // cleared. Any attempt to set attribute that are already set will succeed,
900 // and any attempt to set an attribute that is not supported will fail.
902 *Supported
= PrivateData
->Attributes
;
906 // Set Attrbutes to the attributes detected when the PCI Root Bridge was initialized
910 *Attributes
= PrivateData
->Attributes
;
919 PcatRootBridgeIoSetAttributes (
920 IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL
*This
,
921 IN UINT64 Attributes
,
922 IN OUT UINT64
*ResourceBase
,
923 IN OUT UINT64
*ResourceLength
927 PCAT_PCI_ROOT_BRIDGE_INSTANCE
*PrivateData
;
929 PrivateData
= DRIVER_INSTANCE_FROM_PCI_ROOT_BRIDGE_IO_THIS(This
);
932 // This is a generic driver for a PC-AT class system. It does not have any
933 // chipset specific knowlegde, so none of the attributes can be set or
934 // cleared. Any attempt to set attribute that are already set will succeed,
935 // and any attempt to set an attribute that is not supported will fail.
937 if (Attributes
& (~PrivateData
->Attributes
)) {
938 return EFI_UNSUPPORTED
;
946 PcatRootBridgeIoConfiguration (
947 IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL
*This
,
952 PCAT_PCI_ROOT_BRIDGE_INSTANCE
*PrivateData
;
954 PrivateData
= DRIVER_INSTANCE_FROM_PCI_ROOT_BRIDGE_IO_THIS(This
);
956 *Resources
= PrivateData
->Configuration
;
967 PcatRootBridgeIoMemRW (
968 IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width
,
970 IN BOOLEAN InStrideFlag
,
972 IN BOOLEAN OutStrideFlag
,
979 Private service to provide the memory read/write
983 Width of the Memory Access
984 Count of the number of accesses to perform
990 EFI_SUCCESS - Successful transaction
991 EFI_INVALID_PARAMETER - Unsupported width and address combination
1000 Width
= (EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH
) (Width
& 0x03);
1001 Stride
= (UINTN
)1 << Width
;
1002 InStride
= InStrideFlag
? Stride
: 0;
1003 OutStride
= OutStrideFlag
? Stride
: 0;
1006 // Loop for each iteration and move the data
1009 case EfiPciWidthUint8
:
1010 for (;Count
> 0; Count
--, In
.buf
+= InStride
, Out
.buf
+= OutStride
) {
1016 case EfiPciWidthUint16
:
1017 for (;Count
> 0; Count
--, In
.buf
+= InStride
, Out
.buf
+= OutStride
) {
1019 *In
.ui16
= *Out
.ui16
;
1023 case EfiPciWidthUint32
:
1024 for (;Count
> 0; Count
--, In
.buf
+= InStride
, Out
.buf
+= OutStride
) {
1026 *In
.ui32
= *Out
.ui32
;
1031 return EFI_INVALID_PARAMETER
;