2 EFI PCI IO protocol functions implementation for PCI Bus module.
4 Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
5 This program and the accompanying materials
6 are licensed and made available under the terms and conditions of the BSD License
7 which accompanies this distribution. The full text of the license may be found at
8 http://opensource.org/licenses/bsd-license.php
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
18 // Pci Io Protocol Interface
20 EFI_PCI_IO_PROTOCOL mPciIoInterface
= {
43 PciIoGetBarAttributes
,
44 PciIoSetBarAttributes
,
50 Initializes a PCI I/O Instance.
52 @param PciIoDevice Pci device instance.
56 InitializePciIoInstance (
57 IN PCI_IO_DEVICE
*PciIoDevice
60 CopyMem (&PciIoDevice
->PciIo
, &mPciIoInterface
, sizeof (EFI_PCI_IO_PROTOCOL
));
64 Verifies access to a PCI Base Address Register (BAR).
66 @param PciIoDevice Pci device instance.
67 @param BarIndex The BAR index of the standard PCI Configuration header to use as the
68 base address for the memory or I/O operation to perform.
69 @param Type Operation type could be memory or I/O.
70 @param Width Signifies the width of the memory or I/O operations.
71 @param Count The number of memory or I/O operations to perform.
72 @param Offset The offset within the PCI configuration space for the PCI controller.
74 @retval EFI_INVALID_PARAMETER Invalid Width/BarIndex or Bar type.
75 @retval EFI_SUCCESS Successfully verified.
79 PciIoVerifyBarAccess (
80 IN PCI_IO_DEVICE
*PciIoDevice
,
83 IN IN EFI_PCI_IO_PROTOCOL_WIDTH Width
,
88 if ((UINT32
)Width
>= EfiPciIoWidthMaximum
) {
89 return EFI_INVALID_PARAMETER
;
92 if (BarIndex
== EFI_PCI_IO_PASS_THROUGH_BAR
) {
97 // BarIndex 0-5 is legal
99 if (BarIndex
>= PCI_MAX_BAR
) {
100 return EFI_INVALID_PARAMETER
;
103 if (!CheckBarType (PciIoDevice
, BarIndex
, Type
)) {
104 return EFI_INVALID_PARAMETER
;
108 // If Width is EfiPciIoWidthFifoUintX then convert to EfiPciIoWidthUintX
109 // If Width is EfiPciIoWidthFillUintX then convert to EfiPciIoWidthUintX
111 if (Width
>= EfiPciIoWidthFifoUint8
&& Width
<= EfiPciIoWidthFifoUint64
) {
115 Width
= (EFI_PCI_IO_PROTOCOL_WIDTH
) (Width
& 0x03);
117 if ((*Offset
+ Count
* (UINTN
)(1 << Width
)) - 1 >= PciIoDevice
->PciBar
[BarIndex
].Length
) {
118 return EFI_INVALID_PARAMETER
;
121 *Offset
= *Offset
+ PciIoDevice
->PciBar
[BarIndex
].BaseAddress
;
127 Verifies access to a PCI Configuration Header.
129 @param PciIoDevice Pci device instance.
130 @param Width Signifies the width of the memory or I/O operations.
131 @param Count The number of memory or I/O operations to perform.
132 @param Offset The offset within the PCI configuration space for the PCI controller.
134 @retval EFI_INVALID_PARAMETER Invalid Width
135 @retval EFI_UNSUPPORTED Offset overflowed.
136 @retval EFI_SUCCESS Successfully verified.
140 PciIoVerifyConfigAccess (
141 IN PCI_IO_DEVICE
*PciIoDevice
,
142 IN EFI_PCI_IO_PROTOCOL_WIDTH Width
,
149 if ((UINT32
)Width
>= EfiPciIoWidthMaximum
) {
150 return EFI_INVALID_PARAMETER
;
154 // If Width is EfiPciIoWidthFillUintX then convert to EfiPciIoWidthUintX
156 Width
= (EFI_PCI_IO_PROTOCOL_WIDTH
) (Width
& 0x03);
158 if (PciIoDevice
->IsPciExp
) {
159 if ((*Offset
+ Count
* (UINTN
)(1 << Width
)) - 1 >= PCI_EXP_MAX_CONFIG_OFFSET
) {
160 return EFI_UNSUPPORTED
;
163 ExtendOffset
= LShiftU64 (*Offset
, 32);
164 *Offset
= EFI_PCI_ADDRESS (PciIoDevice
->BusNumber
, PciIoDevice
->DeviceNumber
, PciIoDevice
->FunctionNumber
, 0);
165 *Offset
= (*Offset
) | ExtendOffset
;
168 if ((*Offset
+ Count
* (UINTN
)(1 << Width
)) - 1 >= PCI_MAX_CONFIG_OFFSET
) {
169 return EFI_UNSUPPORTED
;
172 *Offset
= EFI_PCI_ADDRESS (PciIoDevice
->BusNumber
, PciIoDevice
->DeviceNumber
, PciIoDevice
->FunctionNumber
, *Offset
);
179 Reads from the memory space of a PCI controller. Returns either when the polling exit criteria is
180 satisfied or after a defined duration.
182 @param This A pointer to the EFI_PCI_IO_PROTOCOL instance.
183 @param Width Signifies the width of the memory or I/O operations.
184 @param BarIndex The BAR index of the standard PCI Configuration header to use as the
185 base address for the memory operation to perform.
186 @param Offset The offset within the selected BAR to start the memory operation.
187 @param Mask Mask used for the polling criteria.
188 @param Value The comparison value used for the polling exit criteria.
189 @param Delay The number of 100 ns units to poll.
190 @param Result Pointer to the last value read from the memory location.
192 @retval EFI_SUCCESS The last data returned from the access matched the poll exit criteria.
193 @retval EFI_UNSUPPORTED BarIndex not valid for this PCI controller.
194 @retval EFI_UNSUPPORTED Offset is not valid for the BarIndex of this PCI controller.
195 @retval EFI_TIMEOUT Delay expired before a match occurred.
196 @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.
197 @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
203 IN EFI_PCI_IO_PROTOCOL
*This
,
204 IN EFI_PCI_IO_PROTOCOL_WIDTH Width
,
214 PCI_IO_DEVICE
*PciIoDevice
;
216 PciIoDevice
= PCI_IO_DEVICE_FROM_PCI_IO_THIS (This
);
218 if ((UINT32
)Width
>= EfiPciIoWidthMaximum
) {
219 return EFI_INVALID_PARAMETER
;
222 Status
= PciIoVerifyBarAccess (PciIoDevice
, BarIndex
, PciBarTypeMem
, Width
, 1, &Offset
);
223 if (EFI_ERROR (Status
)) {
224 return EFI_UNSUPPORTED
;
227 if (Width
> EfiPciIoWidthUint64
) {
228 return EFI_INVALID_PARAMETER
;
232 // If request is not aligned, then convert request to EfiPciIoWithXXXUint8
234 if (FeaturePcdGet (PcdUnalignedPciIoEnable
)) {
235 if ((Offset
& ((1 << (Width
& 0x03)) - 1)) != 0) {
236 Status
= PciIoMemRead (This
, Width
, BarIndex
, Offset
, 1, Result
);
237 if (EFI_ERROR (Status
)) {
240 if ((*Result
& Mask
) == Value
|| Delay
== 0) {
245 // Stall 10 us = 100 * 100ns
249 Status
= PciIoMemRead (This
, Width
, BarIndex
, Offset
, 1, Result
);
250 if (EFI_ERROR (Status
)) {
253 if ((*Result
& Mask
) == Value
) {
264 Status
= PciIoDevice
->PciRootBridgeIo
->PollMem (
265 PciIoDevice
->PciRootBridgeIo
,
266 (EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH
) Width
,
274 if (EFI_ERROR (Status
)) {
275 REPORT_STATUS_CODE_WITH_DEVICE_PATH (
276 EFI_ERROR_CODE
| EFI_ERROR_MINOR
,
277 EFI_IO_BUS_PCI
| EFI_IOB_EC_CONTROLLER_ERROR
,
278 PciIoDevice
->DevicePath
286 Reads from the memory space of a PCI controller. Returns either when the polling exit criteria is
287 satisfied or after a defined duration.
289 @param This A pointer to the EFI_PCI_IO_PROTOCOL instance.
290 @param Width Signifies the width of the memory or I/O operations.
291 @param BarIndex The BAR index of the standard PCI Configuration header to use as the
292 base address for the memory operation to perform.
293 @param Offset The offset within the selected BAR to start the memory operation.
294 @param Mask Mask used for the polling criteria.
295 @param Value The comparison value used for the polling exit criteria.
296 @param Delay The number of 100 ns units to poll.
297 @param Result Pointer to the last value read from the memory location.
299 @retval EFI_SUCCESS The last data returned from the access matched the poll exit criteria.
300 @retval EFI_UNSUPPORTED BarIndex not valid for this PCI controller.
301 @retval EFI_UNSUPPORTED Offset is not valid for the BarIndex of this PCI controller.
302 @retval EFI_TIMEOUT Delay expired before a match occurred.
303 @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.
304 @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
310 IN EFI_PCI_IO_PROTOCOL
*This
,
311 IN EFI_PCI_IO_PROTOCOL_WIDTH Width
,
321 PCI_IO_DEVICE
*PciIoDevice
;
323 PciIoDevice
= PCI_IO_DEVICE_FROM_PCI_IO_THIS (This
);
325 if ((UINT32
)Width
> EfiPciIoWidthUint64
) {
326 return EFI_INVALID_PARAMETER
;
329 Status
= PciIoVerifyBarAccess (PciIoDevice
, BarIndex
, PciBarTypeIo
, Width
, 1, &Offset
);
330 if (EFI_ERROR (Status
)) {
331 return EFI_UNSUPPORTED
;
335 // If request is not aligned, then convert request to EfiPciIoWithXXXUint8
337 if (FeaturePcdGet (PcdUnalignedPciIoEnable
)) {
338 if ((Offset
& ((1 << (Width
& 0x03)) - 1)) != 0) {
339 Status
= PciIoIoRead (This
, Width
, BarIndex
, Offset
, 1, Result
);
340 if (EFI_ERROR (Status
)) {
343 if ((*Result
& Mask
) == Value
|| Delay
== 0) {
348 // Stall 10 us = 100 * 100ns
352 Status
= PciIoIoRead (This
, Width
, BarIndex
, Offset
, 1, Result
);
353 if (EFI_ERROR (Status
)) {
356 if ((*Result
& Mask
) == Value
) {
367 Status
= PciIoDevice
->PciRootBridgeIo
->PollIo (
368 PciIoDevice
->PciRootBridgeIo
,
369 (EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH
) Width
,
377 if (EFI_ERROR (Status
)) {
378 REPORT_STATUS_CODE_WITH_DEVICE_PATH (
379 EFI_ERROR_CODE
| EFI_ERROR_MINOR
,
380 EFI_IO_BUS_PCI
| EFI_IOB_EC_CONTROLLER_ERROR
,
381 PciIoDevice
->DevicePath
389 Enable a PCI driver to access PCI controller registers in the PCI memory or I/O space.
391 @param This A pointer to the EFI_PCI_IO_PROTOCOL instance.
392 @param Width Signifies the width of the memory or I/O operations.
393 @param BarIndex The BAR index of the standard PCI Configuration header to use as the
394 base address for the memory or I/O operation to perform.
395 @param Offset The offset within the selected BAR to start the memory or I/O operation.
396 @param Count The number of memory or I/O operations to perform.
397 @param Buffer For read operations, the destination buffer to store the results. For write
398 operations, the source buffer to write data from.
400 @retval EFI_SUCCESS The data was read from or written to the PCI controller.
401 @retval EFI_UNSUPPORTED BarIndex not valid for this PCI controller.
402 @retval EFI_UNSUPPORTED The address range specified by Offset, Width, and Count is not
403 valid for the PCI BAR specified by BarIndex.
404 @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.
405 @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
411 IN EFI_PCI_IO_PROTOCOL
*This
,
412 IN EFI_PCI_IO_PROTOCOL_WIDTH Width
,
420 PCI_IO_DEVICE
*PciIoDevice
;
422 PciIoDevice
= PCI_IO_DEVICE_FROM_PCI_IO_THIS (This
);
424 if ((UINT32
)Width
>= EfiPciIoWidthMaximum
) {
425 return EFI_INVALID_PARAMETER
;
428 if (Buffer
== NULL
) {
429 return EFI_INVALID_PARAMETER
;
432 Status
= PciIoVerifyBarAccess (PciIoDevice
, BarIndex
, PciBarTypeMem
, Width
, Count
, &Offset
);
433 if (EFI_ERROR (Status
)) {
434 return EFI_UNSUPPORTED
;
438 // If request is not aligned, then convert request to EfiPciIoWithXXXUint8
440 if (FeaturePcdGet (PcdUnalignedPciIoEnable
)) {
441 if ((Offset
& ((1 << (Width
& 0x03)) - 1)) != 0) {
442 Count
*= (UINTN
)(1 << (Width
& 0x03));
443 Width
= (EFI_PCI_IO_PROTOCOL_WIDTH
) (Width
& (~0x03));
448 Status
= PciIoDevice
->PciRootBridgeIo
->Mem
.Read (
449 PciIoDevice
->PciRootBridgeIo
,
450 (EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH
) Width
,
456 if (EFI_ERROR (Status
)) {
457 REPORT_STATUS_CODE_WITH_DEVICE_PATH (
458 EFI_ERROR_CODE
| EFI_ERROR_MINOR
,
459 EFI_IO_BUS_PCI
| EFI_IOB_EC_READ_ERROR
,
460 PciIoDevice
->DevicePath
468 Enable a PCI driver to access PCI controller registers in the PCI memory or I/O space.
470 @param This A pointer to the EFI_PCI_IO_PROTOCOL instance.
471 @param Width Signifies the width of the memory or I/O operations.
472 @param BarIndex The BAR index of the standard PCI Configuration header to use as the
473 base address for the memory or I/O operation to perform.
474 @param Offset The offset within the selected BAR to start the memory or I/O operation.
475 @param Count The number of memory or I/O operations to perform.
476 @param Buffer For read operations, the destination buffer to store the results. For write
477 operations, the source buffer to write data from.
479 @retval EFI_SUCCESS The data was read from or written to the PCI controller.
480 @retval EFI_UNSUPPORTED BarIndex not valid for this PCI controller.
481 @retval EFI_UNSUPPORTED The address range specified by Offset, Width, and Count is not
482 valid for the PCI BAR specified by BarIndex.
483 @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.
484 @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
490 IN EFI_PCI_IO_PROTOCOL
*This
,
491 IN EFI_PCI_IO_PROTOCOL_WIDTH Width
,
499 PCI_IO_DEVICE
*PciIoDevice
;
501 PciIoDevice
= PCI_IO_DEVICE_FROM_PCI_IO_THIS (This
);
503 if ((UINT32
)Width
>= EfiPciIoWidthMaximum
) {
504 return EFI_INVALID_PARAMETER
;
507 if (Buffer
== NULL
) {
508 return EFI_INVALID_PARAMETER
;
511 Status
= PciIoVerifyBarAccess (PciIoDevice
, BarIndex
, PciBarTypeMem
, Width
, Count
, &Offset
);
512 if (EFI_ERROR (Status
)) {
513 return EFI_UNSUPPORTED
;
517 // If request is not aligned, then convert request to EfiPciIoWithXXXUint8
519 if (FeaturePcdGet (PcdUnalignedPciIoEnable
)) {
520 if ((Offset
& ((1 << (Width
& 0x03)) - 1)) != 0) {
521 Count
*= (UINTN
)(1 << (Width
& 0x03));
522 Width
= (EFI_PCI_IO_PROTOCOL_WIDTH
) (Width
& (~0x03));
526 Status
= PciIoDevice
->PciRootBridgeIo
->Mem
.Write (
527 PciIoDevice
->PciRootBridgeIo
,
528 (EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH
) Width
,
534 if (EFI_ERROR (Status
)) {
535 REPORT_STATUS_CODE_WITH_DEVICE_PATH (
536 EFI_ERROR_CODE
| EFI_ERROR_MINOR
,
537 EFI_IO_BUS_PCI
| EFI_IOB_EC_WRITE_ERROR
,
538 PciIoDevice
->DevicePath
546 Enable a PCI driver to access PCI controller registers in the PCI memory or I/O space.
548 @param This A pointer to the EFI_PCI_IO_PROTOCOL instance.
549 @param Width Signifies the width of the memory or I/O operations.
550 @param BarIndex The BAR index of the standard PCI Configuration header to use as the
551 base address for the memory or I/O operation to perform.
552 @param Offset The offset within the selected BAR to start the memory or I/O operation.
553 @param Count The number of memory or I/O operations to perform.
554 @param Buffer For read operations, the destination buffer to store the results. For write
555 operations, the source buffer to write data from.
557 @retval EFI_SUCCESS The data was read from or written to the PCI controller.
558 @retval EFI_UNSUPPORTED BarIndex not valid for this PCI controller.
559 @retval EFI_UNSUPPORTED The address range specified by Offset, Width, and Count is not
560 valid for the PCI BAR specified by BarIndex.
561 @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.
562 @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
568 IN EFI_PCI_IO_PROTOCOL
*This
,
569 IN EFI_PCI_IO_PROTOCOL_WIDTH Width
,
577 PCI_IO_DEVICE
*PciIoDevice
;
579 PciIoDevice
= PCI_IO_DEVICE_FROM_PCI_IO_THIS (This
);
581 if ((UINT32
)Width
>= EfiPciIoWidthMaximum
) {
582 return EFI_INVALID_PARAMETER
;
585 if (Buffer
== NULL
) {
586 return EFI_INVALID_PARAMETER
;
589 Status
= PciIoVerifyBarAccess (PciIoDevice
, BarIndex
, PciBarTypeIo
, Width
, Count
, &Offset
);
590 if (EFI_ERROR (Status
)) {
591 return EFI_UNSUPPORTED
;
595 // If request is not aligned, then convert request to EfiPciIoWithXXXUint8
597 if (FeaturePcdGet (PcdUnalignedPciIoEnable
)) {
598 if ((Offset
& ((1 << (Width
& 0x03)) - 1)) != 0) {
599 Count
*= (UINTN
)(1 << (Width
& 0x03));
600 Width
= (EFI_PCI_IO_PROTOCOL_WIDTH
) (Width
& (~0x03));
604 Status
= PciIoDevice
->PciRootBridgeIo
->Io
.Read (
605 PciIoDevice
->PciRootBridgeIo
,
606 (EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH
) Width
,
612 if (EFI_ERROR (Status
)) {
613 REPORT_STATUS_CODE_WITH_DEVICE_PATH (
614 EFI_ERROR_CODE
| EFI_ERROR_MINOR
,
615 EFI_IO_BUS_PCI
| EFI_IOB_EC_READ_ERROR
,
616 PciIoDevice
->DevicePath
624 Enable a PCI driver to access PCI controller registers in the PCI memory or I/O space.
626 @param This A pointer to the EFI_PCI_IO_PROTOCOL instance.
627 @param Width Signifies the width of the memory or I/O operations.
628 @param BarIndex The BAR index of the standard PCI Configuration header to use as the
629 base address for the memory or I/O operation to perform.
630 @param Offset The offset within the selected BAR to start the memory or I/O operation.
631 @param Count The number of memory or I/O operations to perform.
632 @param Buffer For read operations, the destination buffer to store the results. For write
633 operations, the source buffer to write data from.
635 @retval EFI_SUCCESS The data was read from or written to the PCI controller.
636 @retval EFI_UNSUPPORTED BarIndex not valid for this PCI controller.
637 @retval EFI_UNSUPPORTED The address range specified by Offset, Width, and Count is not
638 valid for the PCI BAR specified by BarIndex.
639 @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.
640 @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
646 IN EFI_PCI_IO_PROTOCOL
*This
,
647 IN EFI_PCI_IO_PROTOCOL_WIDTH Width
,
655 PCI_IO_DEVICE
*PciIoDevice
;
657 PciIoDevice
= PCI_IO_DEVICE_FROM_PCI_IO_THIS (This
);
659 if ((UINT32
)Width
>= EfiPciIoWidthMaximum
) {
660 return EFI_INVALID_PARAMETER
;
663 if (Buffer
== NULL
) {
664 return EFI_INVALID_PARAMETER
;
667 Status
= PciIoVerifyBarAccess (PciIoDevice
, BarIndex
, PciBarTypeIo
, Width
, Count
, &Offset
);
668 if (EFI_ERROR (Status
)) {
669 return EFI_UNSUPPORTED
;
673 // If request is not aligned, then convert request to EfiPciIoWithXXXUint8
675 if (FeaturePcdGet (PcdUnalignedPciIoEnable
)) {
676 if ((Offset
& ((1 << (Width
& 0x03)) - 1)) != 0) {
677 Count
*= (UINTN
)(1 << (Width
& 0x03));
678 Width
= (EFI_PCI_IO_PROTOCOL_WIDTH
) (Width
& (~0x03));
682 Status
= PciIoDevice
->PciRootBridgeIo
->Io
.Write (
683 PciIoDevice
->PciRootBridgeIo
,
684 (EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH
) Width
,
690 if (EFI_ERROR (Status
)) {
691 REPORT_STATUS_CODE_WITH_DEVICE_PATH (
692 EFI_ERROR_CODE
| EFI_ERROR_MINOR
,
693 EFI_IO_BUS_PCI
| EFI_IOB_EC_WRITE_ERROR
,
694 PciIoDevice
->DevicePath
702 Enable a PCI driver to access PCI controller registers in PCI configuration space.
704 @param This A pointer to the EFI_PCI_IO_PROTOCOL instance.
705 @param Width Signifies the width of the memory operations.
706 @param Offset The offset within the PCI configuration space for the PCI controller.
707 @param Count The number of PCI configuration operations to perform.
708 @param Buffer For read operations, the destination buffer to store the results. For write
709 operations, the source buffer to write data from.
712 @retval EFI_SUCCESS The data was read from or written to the PCI controller.
713 @retval EFI_UNSUPPORTED The address range specified by Offset, Width, and Count is not
714 valid for the PCI configuration header of the PCI controller.
715 @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.
716 @retval EFI_INVALID_PARAMETER Buffer is NULL or Width is invalid.
722 IN EFI_PCI_IO_PROTOCOL
*This
,
723 IN EFI_PCI_IO_PROTOCOL_WIDTH Width
,
730 PCI_IO_DEVICE
*PciIoDevice
;
733 PciIoDevice
= PCI_IO_DEVICE_FROM_PCI_IO_THIS (This
);
736 Status
= PciIoVerifyConfigAccess (PciIoDevice
, Width
, Count
, &Address
);
737 if (EFI_ERROR (Status
)) {
742 // If request is not aligned, then convert request to EfiPciIoWithXXXUint8
744 if (FeaturePcdGet (PcdUnalignedPciIoEnable
)) {
745 if ((Offset
& ((1 << (Width
& 0x03)) - 1)) != 0) {
746 Count
*= (UINTN
)(1 << (Width
& 0x03));
747 Width
= (EFI_PCI_IO_PROTOCOL_WIDTH
) (Width
& (~0x03));
751 Status
= PciIoDevice
->PciRootBridgeIo
->Pci
.Read (
752 PciIoDevice
->PciRootBridgeIo
,
753 (EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH
) Width
,
759 if (EFI_ERROR (Status
)) {
760 REPORT_STATUS_CODE_WITH_DEVICE_PATH (
761 EFI_ERROR_CODE
| EFI_ERROR_MINOR
,
762 EFI_IO_BUS_PCI
| EFI_IOB_EC_READ_ERROR
,
763 PciIoDevice
->DevicePath
771 Enable a PCI driver to access PCI controller registers in PCI configuration space.
773 @param This A pointer to the EFI_PCI_IO_PROTOCOL instance.
774 @param Width Signifies the width of the memory operations.
775 @param Offset The offset within the PCI configuration space for the PCI controller.
776 @param Count The number of PCI configuration operations to perform.
777 @param Buffer For read operations, the destination buffer to store the results. For write
778 operations, the source buffer to write data from.
781 @retval EFI_SUCCESS The data was read from or written to the PCI controller.
782 @retval EFI_UNSUPPORTED The address range specified by Offset, Width, and Count is not
783 valid for the PCI configuration header of the PCI controller.
784 @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.
785 @retval EFI_INVALID_PARAMETER Buffer is NULL or Width is invalid.
791 IN EFI_PCI_IO_PROTOCOL
*This
,
792 IN EFI_PCI_IO_PROTOCOL_WIDTH Width
,
799 PCI_IO_DEVICE
*PciIoDevice
;
802 PciIoDevice
= PCI_IO_DEVICE_FROM_PCI_IO_THIS (This
);
805 Status
= PciIoVerifyConfigAccess (PciIoDevice
, Width
, Count
, &Address
);
806 if (EFI_ERROR (Status
)) {
811 // If request is not aligned, then convert request to EfiPciIoWithXXXUint8
813 if (FeaturePcdGet (PcdUnalignedPciIoEnable
)) {
814 if ((Offset
& ((1 << (Width
& 0x03)) - 1)) != 0) {
815 Count
*= (UINTN
)(1 << (Width
& 0x03));
816 Width
= (EFI_PCI_IO_PROTOCOL_WIDTH
) (Width
& (~0x03));
820 Status
= PciIoDevice
->PciRootBridgeIo
->Pci
.Write (
821 PciIoDevice
->PciRootBridgeIo
,
822 (EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH
) Width
,
828 if (EFI_ERROR (Status
)) {
829 REPORT_STATUS_CODE_WITH_DEVICE_PATH (
830 EFI_ERROR_CODE
| EFI_ERROR_MINOR
,
831 EFI_IO_BUS_PCI
| EFI_IOB_EC_WRITE_ERROR
,
832 PciIoDevice
->DevicePath
840 Enables a PCI driver to copy one region of PCI memory space to another region of PCI
843 @param This A pointer to the EFI_PCI_IO_PROTOCOL instance.
844 @param Width Signifies the width of the memory operations.
845 @param DestBarIndex The BAR index in the standard PCI Configuration header to use as the
846 base address for the memory operation to perform.
847 @param DestOffset The destination offset within the BAR specified by DestBarIndex to
848 start the memory writes for the copy operation.
849 @param SrcBarIndex The BAR index in the standard PCI Configuration header to use as the
850 base address for the memory operation to perform.
851 @param SrcOffset The source offset within the BAR specified by SrcBarIndex to start
852 the memory reads for the copy operation.
853 @param Count The number of memory operations to perform. Bytes moved is Width
854 size * Count, starting at DestOffset and SrcOffset.
856 @retval EFI_SUCCESS The data was copied from one memory region to another memory region.
857 @retval EFI_UNSUPPORTED DestBarIndex not valid for this PCI controller.
858 @retval EFI_UNSUPPORTED SrcBarIndex not valid for this PCI controller.
859 @retval EFI_UNSUPPORTED The address range specified by DestOffset, Width, and Count
860 is not valid for the PCI BAR specified by DestBarIndex.
861 @retval EFI_UNSUPPORTED The address range specified by SrcOffset, Width, and Count is
862 not valid for the PCI BAR specified by SrcBarIndex.
863 @retval EFI_INVALID_PARAMETER Width is invalid.
864 @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.
870 IN EFI_PCI_IO_PROTOCOL
*This
,
871 IN EFI_PCI_IO_PROTOCOL_WIDTH Width
,
872 IN UINT8 DestBarIndex
,
873 IN UINT64 DestOffset
,
874 IN UINT8 SrcBarIndex
,
880 PCI_IO_DEVICE
*PciIoDevice
;
882 PciIoDevice
= PCI_IO_DEVICE_FROM_PCI_IO_THIS (This
);
884 if ((UINT32
)Width
>= EfiPciIoWidthMaximum
) {
885 return EFI_INVALID_PARAMETER
;
888 if (Width
== EfiPciIoWidthFifoUint8
||
889 Width
== EfiPciIoWidthFifoUint16
||
890 Width
== EfiPciIoWidthFifoUint32
||
891 Width
== EfiPciIoWidthFifoUint64
||
892 Width
== EfiPciIoWidthFillUint8
||
893 Width
== EfiPciIoWidthFillUint16
||
894 Width
== EfiPciIoWidthFillUint32
||
895 Width
== EfiPciIoWidthFillUint64
) {
896 return EFI_INVALID_PARAMETER
;
899 Status
= PciIoVerifyBarAccess (PciIoDevice
, DestBarIndex
, PciBarTypeMem
, Width
, Count
, &DestOffset
);
900 if (EFI_ERROR (Status
)) {
901 return EFI_UNSUPPORTED
;
904 Status
= PciIoVerifyBarAccess (PciIoDevice
, SrcBarIndex
, PciBarTypeMem
, Width
, Count
, &SrcOffset
);
905 if (EFI_ERROR (Status
)) {
906 return EFI_UNSUPPORTED
;
910 // If request is not aligned, then convert request to EfiPciIoWithXXXUint8
912 if (FeaturePcdGet (PcdUnalignedPciIoEnable
)) {
913 if ((SrcOffset
& ((1 << (Width
& 0x03)) - 1)) != 0 || (DestOffset
& ((1 << (Width
& 0x03)) - 1)) != 0) {
914 Count
*= (UINTN
)(1 << (Width
& 0x03));
915 Width
= (EFI_PCI_IO_PROTOCOL_WIDTH
) (Width
& (~0x03));
919 Status
= PciIoDevice
->PciRootBridgeIo
->CopyMem (
920 PciIoDevice
->PciRootBridgeIo
,
921 (EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH
) Width
,
927 if (EFI_ERROR (Status
)) {
928 REPORT_STATUS_CODE_WITH_DEVICE_PATH (
929 EFI_ERROR_CODE
| EFI_ERROR_MINOR
,
930 EFI_IO_BUS_PCI
| EFI_IOB_EC_CONTROLLER_ERROR
,
931 PciIoDevice
->DevicePath
939 Provides the PCI controller-specific addresses needed to access system memory.
941 @param This A pointer to the EFI_PCI_IO_PROTOCOL instance.
942 @param Operation Indicates if the bus master is going to read or write to system memory.
943 @param HostAddress The system memory address to map to the PCI controller.
944 @param NumberOfBytes On input the number of bytes to map. On output the number of bytes
946 @param DeviceAddress The resulting map address for the bus master PCI controller to use to
947 access the hosts HostAddress.
948 @param Mapping A resulting value to pass to Unmap().
950 @retval EFI_SUCCESS The range was mapped for the returned NumberOfBytes.
951 @retval EFI_UNSUPPORTED The HostAddress cannot be mapped as a common buffer.
952 @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
953 @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.
954 @retval EFI_DEVICE_ERROR The system hardware could not map the requested address.
960 IN EFI_PCI_IO_PROTOCOL
*This
,
961 IN EFI_PCI_IO_PROTOCOL_OPERATION Operation
,
962 IN VOID
*HostAddress
,
963 IN OUT UINTN
*NumberOfBytes
,
964 OUT EFI_PHYSICAL_ADDRESS
*DeviceAddress
,
969 PCI_IO_DEVICE
*PciIoDevice
;
971 PciIoDevice
= PCI_IO_DEVICE_FROM_PCI_IO_THIS (This
);
973 if ((UINT32
)Operation
>= EfiPciIoOperationMaximum
) {
974 return EFI_INVALID_PARAMETER
;
977 if (HostAddress
== NULL
|| NumberOfBytes
== NULL
|| DeviceAddress
== NULL
|| Mapping
== NULL
) {
978 return EFI_INVALID_PARAMETER
;
981 if ((PciIoDevice
->Attributes
& EFI_PCI_IO_ATTRIBUTE_DUAL_ADDRESS_CYCLE
) != 0) {
982 Operation
= (EFI_PCI_IO_PROTOCOL_OPERATION
) (Operation
+ EfiPciOperationBusMasterRead64
);
985 Status
= PciIoDevice
->PciRootBridgeIo
->Map (
986 PciIoDevice
->PciRootBridgeIo
,
987 (EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_OPERATION
) Operation
,
994 if (EFI_ERROR (Status
)) {
995 REPORT_STATUS_CODE_WITH_DEVICE_PATH (
996 EFI_ERROR_CODE
| EFI_ERROR_MINOR
,
997 EFI_IO_BUS_PCI
| EFI_IOB_EC_CONTROLLER_ERROR
,
998 PciIoDevice
->DevicePath
1006 Completes the Map() operation and releases any corresponding resources.
1008 @param This A pointer to the EFI_PCI_IO_PROTOCOL instance.
1009 @param Mapping The mapping value returned from Map().
1011 @retval EFI_SUCCESS The range was unmapped.
1012 @retval EFI_DEVICE_ERROR The data was not committed to the target system memory.
1018 IN EFI_PCI_IO_PROTOCOL
*This
,
1023 PCI_IO_DEVICE
*PciIoDevice
;
1025 PciIoDevice
= PCI_IO_DEVICE_FROM_PCI_IO_THIS (This
);
1027 Status
= PciIoDevice
->PciRootBridgeIo
->Unmap (
1028 PciIoDevice
->PciRootBridgeIo
,
1032 if (EFI_ERROR (Status
)) {
1033 REPORT_STATUS_CODE_WITH_DEVICE_PATH (
1034 EFI_ERROR_CODE
| EFI_ERROR_MINOR
,
1035 EFI_IO_BUS_PCI
| EFI_IOB_EC_CONTROLLER_ERROR
,
1036 PciIoDevice
->DevicePath
1044 Allocates pages that are suitable for an EfiPciIoOperationBusMasterCommonBuffer
1047 @param This A pointer to the EFI_PCI_IO_PROTOCOL instance.
1048 @param Type This parameter is not used and must be ignored.
1049 @param MemoryType The type of memory to allocate, EfiBootServicesData or
1050 EfiRuntimeServicesData.
1051 @param Pages The number of pages to allocate.
1052 @param HostAddress A pointer to store the base system memory address of the
1054 @param Attributes The requested bit mask of attributes for the allocated range.
1056 @retval EFI_SUCCESS The requested memory pages were allocated.
1057 @retval EFI_UNSUPPORTED Attributes is unsupported. The only legal attribute bits are
1058 MEMORY_WRITE_COMBINE and MEMORY_CACHED.
1059 @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
1060 @retval EFI_OUT_OF_RESOURCES The memory pages could not be allocated.
1065 PciIoAllocateBuffer (
1066 IN EFI_PCI_IO_PROTOCOL
*This
,
1067 IN EFI_ALLOCATE_TYPE Type
,
1068 IN EFI_MEMORY_TYPE MemoryType
,
1070 OUT VOID
**HostAddress
,
1071 IN UINT64 Attributes
1075 PCI_IO_DEVICE
*PciIoDevice
;
1078 (~(EFI_PCI_ATTRIBUTE_MEMORY_WRITE_COMBINE
| EFI_PCI_ATTRIBUTE_MEMORY_CACHED
))) != 0){
1079 return EFI_UNSUPPORTED
;
1082 PciIoDevice
= PCI_IO_DEVICE_FROM_PCI_IO_THIS (This
);
1084 if ((PciIoDevice
->Attributes
& EFI_PCI_IO_ATTRIBUTE_DUAL_ADDRESS_CYCLE
) != 0) {
1085 Attributes
|= EFI_PCI_ATTRIBUTE_DUAL_ADDRESS_CYCLE
;
1088 Status
= PciIoDevice
->PciRootBridgeIo
->AllocateBuffer (
1089 PciIoDevice
->PciRootBridgeIo
,
1097 if (EFI_ERROR (Status
)) {
1098 REPORT_STATUS_CODE_WITH_DEVICE_PATH (
1099 EFI_ERROR_CODE
| EFI_ERROR_MINOR
,
1100 EFI_IO_BUS_PCI
| EFI_IOB_EC_CONTROLLER_ERROR
,
1101 PciIoDevice
->DevicePath
1109 Frees memory that was allocated with AllocateBuffer().
1111 @param This A pointer to the EFI_PCI_IO_PROTOCOL instance.
1112 @param Pages The number of pages to free.
1113 @param HostAddress The base system memory address of the allocated range.
1115 @retval EFI_SUCCESS The requested memory pages were freed.
1116 @retval EFI_INVALID_PARAMETER The memory range specified by HostAddress and Pages
1117 was not allocated with AllocateBuffer().
1123 IN EFI_PCI_IO_PROTOCOL
*This
,
1125 IN VOID
*HostAddress
1129 PCI_IO_DEVICE
*PciIoDevice
;
1131 PciIoDevice
= PCI_IO_DEVICE_FROM_PCI_IO_THIS (This
);
1133 Status
= PciIoDevice
->PciRootBridgeIo
->FreeBuffer (
1134 PciIoDevice
->PciRootBridgeIo
,
1139 if (EFI_ERROR (Status
)) {
1140 REPORT_STATUS_CODE_WITH_DEVICE_PATH (
1141 EFI_ERROR_CODE
| EFI_ERROR_MINOR
,
1142 EFI_IO_BUS_PCI
| EFI_IOB_EC_CONTROLLER_ERROR
,
1143 PciIoDevice
->DevicePath
1151 Flushes all PCI posted write transactions from a PCI host bridge to system memory.
1153 @param This A pointer to the EFI_PCI_IO_PROTOCOL instance.
1155 @retval EFI_SUCCESS The PCI posted write transactions were flushed from the PCI host
1156 bridge to system memory.
1157 @retval EFI_DEVICE_ERROR The PCI posted write transactions were not flushed from the PCI
1158 host bridge due to a hardware error.
1164 IN EFI_PCI_IO_PROTOCOL
*This
1168 PCI_IO_DEVICE
*PciIoDevice
;
1170 PciIoDevice
= PCI_IO_DEVICE_FROM_PCI_IO_THIS (This
);
1172 Status
= PciIoDevice
->PciRootBridgeIo
->Flush (
1173 PciIoDevice
->PciRootBridgeIo
1175 if (EFI_ERROR (Status
)) {
1176 REPORT_STATUS_CODE_WITH_DEVICE_PATH (
1177 EFI_ERROR_CODE
| EFI_ERROR_MINOR
,
1178 EFI_IO_BUS_PCI
| EFI_IOB_EC_CONTROLLER_ERROR
,
1179 PciIoDevice
->DevicePath
1187 Retrieves this PCI controller's current PCI bus number, device number, and function number.
1189 @param This A pointer to the EFI_PCI_IO_PROTOCOL instance.
1190 @param SegmentNumber The PCI controller's current PCI segment number.
1191 @param BusNumber The PCI controller's current PCI bus number.
1192 @param DeviceNumber The PCI controller's current PCI device number.
1193 @param FunctionNumber The PCI controller's current PCI function number.
1195 @retval EFI_SUCCESS The PCI controller location was returned.
1196 @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
1202 IN EFI_PCI_IO_PROTOCOL
*This
,
1209 PCI_IO_DEVICE
*PciIoDevice
;
1211 PciIoDevice
= PCI_IO_DEVICE_FROM_PCI_IO_THIS (This
);
1213 if (Segment
== NULL
|| Bus
== NULL
|| Device
== NULL
|| Function
== NULL
) {
1214 return EFI_INVALID_PARAMETER
;
1217 *Segment
= PciIoDevice
->PciRootBridgeIo
->SegmentNumber
;
1218 *Bus
= PciIoDevice
->BusNumber
;
1219 *Device
= PciIoDevice
->DeviceNumber
;
1220 *Function
= PciIoDevice
->FunctionNumber
;
1226 Check BAR type for PCI resource.
1228 @param PciIoDevice PCI device instance.
1229 @param BarIndex The BAR index of the standard PCI Configuration header to use as the
1230 base address for the memory or I/O operation to perform.
1231 @param BarType Memory or I/O.
1233 @retval TRUE Pci device's bar type is same with input BarType.
1234 @retval TRUE Pci device's bar type is not same with input BarType.
1239 IN PCI_IO_DEVICE
*PciIoDevice
,
1241 IN PCI_BAR_TYPE BarType
1248 if (PciIoDevice
->PciBar
[BarIndex
].BarType
!= PciBarTypeMem32
&&
1249 PciIoDevice
->PciBar
[BarIndex
].BarType
!= PciBarTypePMem32
&&
1250 PciIoDevice
->PciBar
[BarIndex
].BarType
!= PciBarTypePMem64
&&
1251 PciIoDevice
->PciBar
[BarIndex
].BarType
!= PciBarTypeMem64
) {
1258 if (PciIoDevice
->PciBar
[BarIndex
].BarType
!= PciBarTypeIo32
&&
1259 PciIoDevice
->PciBar
[BarIndex
].BarType
!= PciBarTypeIo16
){
1273 Set/Disable new attributes to a Root Bridge.
1275 @param PciIoDevice Pci device instance.
1276 @param Attributes New attribute want to be set.
1277 @param Operation Set or Disable.
1279 @retval EFI_UNSUPPORTED If root bridge does not support change attribute.
1280 @retval EFI_SUCCESS Successfully set new attributs.
1284 ModifyRootBridgeAttributes (
1285 IN PCI_IO_DEVICE
*PciIoDevice
,
1286 IN UINT64 Attributes
,
1287 IN EFI_PCI_IO_PROTOCOL_ATTRIBUTE_OPERATION Operation
1290 UINT64 PciRootBridgeSupports
;
1291 UINT64 PciRootBridgeAttributes
;
1292 UINT64 NewPciRootBridgeAttributes
;
1296 // Get the current attributes of this PCI device's PCI Root Bridge
1298 Status
= PciIoDevice
->PciRootBridgeIo
->GetAttributes (
1299 PciIoDevice
->PciRootBridgeIo
,
1300 &PciRootBridgeSupports
,
1301 &PciRootBridgeAttributes
1303 if (EFI_ERROR (Status
)) {
1304 return EFI_UNSUPPORTED
;
1308 // Mask off attributes not supported by PCI root bridge.
1310 Attributes
&= ~(UINT64
)(EFI_PCI_IO_ATTRIBUTE_EMBEDDED_DEVICE
|
1311 EFI_PCI_IO_ATTRIBUTE_EMBEDDED_ROM
|
1312 EFI_PCI_IO_ATTRIBUTE_DUAL_ADDRESS_CYCLE
);
1315 // Record the new attribute of the Root Bridge
1317 if (Operation
== EfiPciIoAttributeOperationEnable
) {
1318 NewPciRootBridgeAttributes
= PciRootBridgeAttributes
| Attributes
;
1320 NewPciRootBridgeAttributes
= PciRootBridgeAttributes
& (~Attributes
);
1324 // Call the PCI Root Bridge to attempt to modify the attributes
1326 if ((NewPciRootBridgeAttributes
^ PciRootBridgeAttributes
) != 0) {
1328 Status
= PciIoDevice
->PciRootBridgeIo
->SetAttributes (
1329 PciIoDevice
->PciRootBridgeIo
,
1330 NewPciRootBridgeAttributes
,
1334 if (EFI_ERROR (Status
)) {
1336 // The PCI Root Bridge could not modify the attributes, so return the error.
1338 return EFI_UNSUPPORTED
;
1343 // Also update the attributes for this Root Bridge structure
1345 PciIoDevice
->Attributes
= NewPciRootBridgeAttributes
;
1351 Check whether this device can be enable/disable to snoop.
1353 @param PciIoDevice Pci device instance.
1354 @param Operation Enable/Disable.
1356 @retval EFI_UNSUPPORTED Pci device is not GFX device or not support snoop.
1357 @retval EFI_SUCCESS Snoop can be supported.
1361 SupportPaletteSnoopAttributes (
1362 IN PCI_IO_DEVICE
*PciIoDevice
,
1363 IN EFI_PCI_IO_PROTOCOL_ATTRIBUTE_OPERATION Operation
1366 PCI_IO_DEVICE
*Temp
;
1370 // Snoop attribute can be only modified by GFX
1372 if (!IS_PCI_GFX (&PciIoDevice
->Pci
)) {
1373 return EFI_UNSUPPORTED
;
1377 // Get the boot VGA on the same segement
1379 Temp
= ActiveVGADeviceOnTheSameSegment (PciIoDevice
);
1383 // If there is no VGA device on the segement, set
1384 // this graphics card to decode the palette range
1390 // Check these two agents are on the same path
1392 if (!PciDevicesOnTheSamePath (Temp
, PciIoDevice
)) {
1394 // they are not on the same path, so snoop can be enabled or disabled
1399 // Check if they are on the same bus
1401 if (Temp
->Parent
== PciIoDevice
->Parent
) {
1403 PCI_READ_COMMAND_REGISTER (Temp
, &VGACommand
);
1406 // If they are on the same bus, either one can
1407 // be set to snoop, the other set to decode
1409 if ((VGACommand
& EFI_PCI_COMMAND_VGA_PALETTE_SNOOP
) != 0) {
1411 // VGA has set to snoop, so GFX can be only set to disable snoop
1413 if (Operation
== EfiPciIoAttributeOperationEnable
) {
1414 return EFI_UNSUPPORTED
;
1418 // VGA has disabled to snoop, so GFX can be only enabled
1420 if (Operation
== EfiPciIoAttributeOperationDisable
) {
1421 return EFI_UNSUPPORTED
;
1429 // If they are on the same path but on the different bus
1430 // The first agent is set to snoop, the second one set to
1434 if (Temp
->BusNumber
< PciIoDevice
->BusNumber
) {
1436 // GFX should be set to decode
1438 if (Operation
== EfiPciIoAttributeOperationDisable
) {
1439 PCI_ENABLE_COMMAND_REGISTER (Temp
, EFI_PCI_COMMAND_VGA_PALETTE_SNOOP
);
1440 Temp
->Attributes
|= EFI_PCI_COMMAND_VGA_PALETTE_SNOOP
;
1442 return EFI_UNSUPPORTED
;
1447 // GFX should be set to snoop
1449 if (Operation
== EfiPciIoAttributeOperationEnable
) {
1450 PCI_DISABLE_COMMAND_REGISTER (Temp
, EFI_PCI_COMMAND_VGA_PALETTE_SNOOP
);
1451 Temp
->Attributes
&= (~(UINT64
)EFI_PCI_COMMAND_VGA_PALETTE_SNOOP
);
1453 return EFI_UNSUPPORTED
;
1462 Performs an operation on the attributes that this PCI controller supports. The operations include
1463 getting the set of supported attributes, retrieving the current attributes, setting the current
1464 attributes, enabling attributes, and disabling attributes.
1466 @param This A pointer to the EFI_PCI_IO_PROTOCOL instance.
1467 @param Operation The operation to perform on the attributes for this PCI controller.
1468 @param Attributes The mask of attributes that are used for Set, Enable, and Disable
1470 @param Result A pointer to the result mask of attributes that are returned for the Get
1471 and Supported operations.
1473 @retval EFI_SUCCESS The operation on the PCI controller's attributes was completed.
1474 @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
1475 @retval EFI_UNSUPPORTED one or more of the bits set in
1476 Attributes are not supported by this PCI controller or one of
1477 its parent bridges when Operation is Set, Enable or Disable.
1483 IN EFI_PCI_IO_PROTOCOL
* This
,
1484 IN EFI_PCI_IO_PROTOCOL_ATTRIBUTE_OPERATION Operation
,
1485 IN UINT64 Attributes
,
1486 OUT UINT64
*Result OPTIONAL
1491 PCI_IO_DEVICE
*PciIoDevice
;
1492 PCI_IO_DEVICE
*UpStreamBridge
;
1493 PCI_IO_DEVICE
*Temp
;
1496 UINT64 UpStreamAttributes
;
1497 UINT16 BridgeControl
;
1500 PciIoDevice
= PCI_IO_DEVICE_FROM_PCI_IO_THIS (This
);
1502 switch (Operation
) {
1503 case EfiPciIoAttributeOperationGet
:
1504 if (Result
== NULL
) {
1505 return EFI_INVALID_PARAMETER
;
1508 *Result
= PciIoDevice
->Attributes
;
1511 case EfiPciIoAttributeOperationSupported
:
1512 if (Result
== NULL
) {
1513 return EFI_INVALID_PARAMETER
;
1516 *Result
= PciIoDevice
->Supports
;
1519 case EfiPciIoAttributeOperationSet
:
1520 Status
= PciIoDevice
->PciIo
.Attributes (
1521 &(PciIoDevice
->PciIo
),
1522 EfiPciIoAttributeOperationEnable
,
1526 if (EFI_ERROR (Status
)) {
1527 return EFI_UNSUPPORTED
;
1530 Status
= PciIoDevice
->PciIo
.Attributes (
1531 &(PciIoDevice
->PciIo
),
1532 EfiPciIoAttributeOperationDisable
,
1533 (~Attributes
) & (PciIoDevice
->Supports
),
1536 if (EFI_ERROR (Status
)) {
1537 return EFI_UNSUPPORTED
;
1542 case EfiPciIoAttributeOperationEnable
:
1543 case EfiPciIoAttributeOperationDisable
:
1547 return EFI_INVALID_PARAMETER
;
1550 // Just a trick for ENABLE attribute
1551 // EFI_PCI_DEVICE_ENABLE is not defined in UEFI spec, which is the internal usage.
1552 // So, this logic doesn't confrom to UEFI spec, which should be removed.
1553 // But this trick logic is still kept for some binary drivers that depend on it.
1555 if ((Attributes
& EFI_PCI_DEVICE_ENABLE
) == EFI_PCI_DEVICE_ENABLE
) {
1556 Attributes
&= (PciIoDevice
->Supports
);
1559 // Raise the EFI_P_PC_ENABLE Status code
1561 REPORT_STATUS_CODE_WITH_DEVICE_PATH (
1563 EFI_IO_BUS_PCI
| EFI_P_PC_ENABLE
,
1564 PciIoDevice
->DevicePath
1569 // Check VGA and VGA16, they can not be set at the same time
1571 if ((Attributes
& (EFI_PCI_IO_ATTRIBUTE_VGA_IO
| EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO
)) != 0) {
1572 if ((Attributes
& (EFI_PCI_IO_ATTRIBUTE_VGA_IO_16
| EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO_16
)) != 0) {
1573 return EFI_UNSUPPORTED
;
1578 // If no attributes can be supported, then return.
1579 // Otherwise, set the attributes that it can support.
1581 Supports
= (PciIoDevice
->Supports
) & Attributes
;
1582 if (Supports
!= Attributes
) {
1583 return EFI_UNSUPPORTED
;
1587 // For Root Bridge, just call RootBridgeIo to set attributes;
1589 if (PciIoDevice
->Parent
== NULL
) {
1590 Status
= ModifyRootBridgeAttributes (PciIoDevice
, Attributes
, Operation
);
1598 // For PPB & P2C, set relevant attribute bits
1600 if (IS_PCI_BRIDGE (&PciIoDevice
->Pci
) || IS_CARDBUS_BRIDGE (&PciIoDevice
->Pci
)) {
1602 if ((Attributes
& (EFI_PCI_IO_ATTRIBUTE_VGA_IO
| EFI_PCI_IO_ATTRIBUTE_VGA_IO_16
)) != 0) {
1603 BridgeControl
|= EFI_PCI_BRIDGE_CONTROL_VGA
;
1606 if ((Attributes
& EFI_PCI_IO_ATTRIBUTE_ISA_IO
) != 0) {
1607 BridgeControl
|= EFI_PCI_BRIDGE_CONTROL_ISA
;
1610 if ((Attributes
& (EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO
| EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO_16
)) != 0) {
1611 Command
|= EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO
;
1614 if ((Attributes
& (EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO_16
| EFI_PCI_IO_ATTRIBUTE_VGA_IO_16
)) != 0) {
1615 BridgeControl
|= EFI_PCI_BRIDGE_CONTROL_VGA_16
;
1620 // Do with the attributes on VGA
1621 // Only for VGA's legacy resource, we just can enable once.
1624 (EFI_PCI_IO_ATTRIBUTE_VGA_IO
|
1625 EFI_PCI_IO_ATTRIBUTE_VGA_IO_16
|
1626 EFI_PCI_IO_ATTRIBUTE_VGA_MEMORY
)) != 0) {
1628 // Check if a VGA has been enabled before enabling a new one
1630 if (Operation
== EfiPciIoAttributeOperationEnable
) {
1632 // Check if there have been an active VGA device on the same segment
1634 Temp
= ActiveVGADeviceOnTheSameSegment (PciIoDevice
);
1635 if (Temp
!= NULL
&& Temp
!= PciIoDevice
) {
1637 // An active VGA has been detected, so can not enable another
1639 return EFI_UNSUPPORTED
;
1645 // Do with the attributes on GFX
1647 if ((Attributes
& (EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO
| EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO_16
)) != 0) {
1649 if (Operation
== EfiPciIoAttributeOperationEnable
) {
1651 // Check if snoop can be enabled in current configuration
1653 Status
= SupportPaletteSnoopAttributes (PciIoDevice
, Operation
);
1655 if (EFI_ERROR (Status
)) {
1658 // Enable operation is forbidden, so mask the bit in attributes
1659 // so as to keep consistent with the actual Status
1661 // Attributes &= (~EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO);
1665 return EFI_UNSUPPORTED
;
1671 // It can be supported, so get ready to set the bit
1673 Command
|= EFI_PCI_COMMAND_VGA_PALETTE_SNOOP
;
1677 if ((Attributes
& EFI_PCI_IO_ATTRIBUTE_IO
) != 0) {
1678 Command
|= EFI_PCI_COMMAND_IO_SPACE
;
1681 if ((Attributes
& EFI_PCI_IO_ATTRIBUTE_MEMORY
) != 0) {
1682 Command
|= EFI_PCI_COMMAND_MEMORY_SPACE
;
1685 if ((Attributes
& EFI_PCI_IO_ATTRIBUTE_BUS_MASTER
) != 0) {
1686 Command
|= EFI_PCI_COMMAND_BUS_MASTER
;
1689 // The upstream bridge should be also set to revelant attribute
1690 // expect for IO, Mem and BusMaster
1692 UpStreamAttributes
= Attributes
&
1693 (~(EFI_PCI_IO_ATTRIBUTE_IO
|
1694 EFI_PCI_IO_ATTRIBUTE_MEMORY
|
1695 EFI_PCI_IO_ATTRIBUTE_BUS_MASTER
1698 UpStreamBridge
= PciIoDevice
->Parent
;
1700 if (Operation
== EfiPciIoAttributeOperationEnable
) {
1702 // Enable relevant attributes to command register and bridge control register
1704 Status
= PCI_ENABLE_COMMAND_REGISTER (PciIoDevice
, Command
);
1705 if (BridgeControl
!= 0) {
1706 Status
= PCI_ENABLE_BRIDGE_CONTROL_REGISTER (PciIoDevice
, BridgeControl
);
1709 PciIoDevice
->Attributes
|= Attributes
;
1712 // Enable attributes of the upstream bridge
1714 Status
= UpStreamBridge
->PciIo
.Attributes (
1715 &(UpStreamBridge
->PciIo
),
1716 EfiPciIoAttributeOperationEnable
,
1723 // Disable relevant attributes to command register and bridge control register
1725 Status
= PCI_DISABLE_COMMAND_REGISTER (PciIoDevice
, Command
);
1726 if (BridgeControl
!= 0) {
1727 Status
= PCI_DISABLE_BRIDGE_CONTROL_REGISTER (PciIoDevice
, BridgeControl
);
1730 PciIoDevice
->Attributes
&= (~Attributes
);
1731 Status
= EFI_SUCCESS
;
1735 if (EFI_ERROR (Status
)) {
1736 REPORT_STATUS_CODE_WITH_DEVICE_PATH (
1737 EFI_ERROR_CODE
| EFI_ERROR_MINOR
,
1738 EFI_IO_BUS_PCI
| EFI_IOB_EC_CONTROLLER_ERROR
,
1739 PciIoDevice
->DevicePath
1747 Gets the attributes that this PCI controller supports setting on a BAR using
1748 SetBarAttributes(), and retrieves the list of resource descriptors for a BAR.
1750 @param This A pointer to the EFI_PCI_IO_PROTOCOL instance.
1751 @param BarIndex The BAR index of the standard PCI Configuration header to use as the
1752 base address for resource range. The legal range for this field is 0..5.
1753 @param Supports A pointer to the mask of attributes that this PCI controller supports
1754 setting for this BAR with SetBarAttributes().
1755 @param Resources A pointer to the ACPI 2.0 resource descriptors that describe the current
1756 configuration of this BAR of the PCI controller.
1758 @retval EFI_SUCCESS If Supports is not NULL, then the attributes that the PCI
1759 controller supports are returned in Supports. If Resources
1760 is not NULL, then the ACPI 2.0 resource descriptors that the PCI
1761 controller is currently using are returned in Resources.
1762 @retval EFI_INVALID_PARAMETER Both Supports and Attributes are NULL.
1763 @retval EFI_UNSUPPORTED BarIndex not valid for this PCI controller.
1764 @retval EFI_OUT_OF_RESOURCES There are not enough resources available to allocate
1770 PciIoGetBarAttributes (
1771 IN EFI_PCI_IO_PROTOCOL
* This
,
1773 OUT UINT64
*Supports
, OPTIONAL
1774 OUT VOID
**Resources OPTIONAL
1777 UINT8
*Configuration
;
1778 PCI_IO_DEVICE
*PciIoDevice
;
1779 EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR
*AddressSpace
;
1780 EFI_ACPI_END_TAG_DESCRIPTOR
*End
;
1782 PciIoDevice
= PCI_IO_DEVICE_FROM_PCI_IO_THIS (This
);
1784 if (Supports
== NULL
&& Resources
== NULL
) {
1785 return EFI_INVALID_PARAMETER
;
1788 if ((BarIndex
>= PCI_MAX_BAR
) || (PciIoDevice
->PciBar
[BarIndex
].BarType
== PciBarTypeUnknown
)) {
1789 return EFI_UNSUPPORTED
;
1793 // This driver does not support modifications to the WRITE_COMBINE or
1794 // CACHED attributes for BAR ranges.
1796 if (Supports
!= NULL
) {
1797 *Supports
= PciIoDevice
->Supports
& EFI_PCI_IO_ATTRIBUTE_MEMORY_CACHED
& EFI_PCI_IO_ATTRIBUTE_MEMORY_WRITE_COMBINE
;
1800 if (Resources
!= NULL
) {
1801 Configuration
= AllocateZeroPool (sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR
) + sizeof (EFI_ACPI_END_TAG_DESCRIPTOR
));
1802 if (Configuration
== NULL
) {
1803 return EFI_OUT_OF_RESOURCES
;
1806 AddressSpace
= (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR
*) Configuration
;
1808 AddressSpace
->Desc
= ACPI_ADDRESS_SPACE_DESCRIPTOR
;
1809 AddressSpace
->Len
= (UINT16
) (sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR
) - 3);
1811 AddressSpace
->AddrRangeMin
= PciIoDevice
->PciBar
[BarIndex
].BaseAddress
;
1812 AddressSpace
->AddrLen
= PciIoDevice
->PciBar
[BarIndex
].Length
;
1813 AddressSpace
->AddrRangeMax
= PciIoDevice
->PciBar
[BarIndex
].Alignment
;
1815 switch (PciIoDevice
->PciBar
[BarIndex
].BarType
) {
1816 case PciBarTypeIo16
:
1817 case PciBarTypeIo32
:
1821 AddressSpace
->ResType
= ACPI_ADDRESS_SPACE_TYPE_IO
;
1824 case PciBarTypeMem32
:
1828 AddressSpace
->ResType
= ACPI_ADDRESS_SPACE_TYPE_MEM
;
1832 AddressSpace
->AddrSpaceGranularity
= 32;
1835 case PciBarTypePMem32
:
1839 AddressSpace
->ResType
= ACPI_ADDRESS_SPACE_TYPE_MEM
;
1843 AddressSpace
->SpecificFlag
= 0x6;
1847 AddressSpace
->AddrSpaceGranularity
= 32;
1850 case PciBarTypeMem64
:
1854 AddressSpace
->ResType
= ACPI_ADDRESS_SPACE_TYPE_MEM
;
1858 AddressSpace
->AddrSpaceGranularity
= 64;
1861 case PciBarTypePMem64
:
1865 AddressSpace
->ResType
= ACPI_ADDRESS_SPACE_TYPE_MEM
;
1869 AddressSpace
->SpecificFlag
= 0x6;
1873 AddressSpace
->AddrSpaceGranularity
= 64;
1883 End
= (EFI_ACPI_END_TAG_DESCRIPTOR
*) (AddressSpace
+ 1);
1884 End
->Desc
= ACPI_END_TAG_DESCRIPTOR
;
1887 *Resources
= Configuration
;
1894 Sets the attributes for a range of a BAR on a PCI controller.
1896 @param This A pointer to the EFI_PCI_IO_PROTOCOL instance.
1897 @param Attributes The mask of attributes to set for the resource range specified by
1898 BarIndex, Offset, and Length.
1899 @param BarIndex The BAR index of the standard PCI Configuration header to use as the
1900 base address for resource range. The legal range for this field is 0..5.
1901 @param Offset A pointer to the BAR relative base address of the resource range to be
1902 modified by the attributes specified by Attributes.
1903 @param Length A pointer to the length of the resource range to be modified by the
1904 attributes specified by Attributes.
1906 @retval EFI_SUCCESS The set of attributes specified by Attributes for the resource
1907 range specified by BarIndex, Offset, and Length were
1908 set on the PCI controller, and the actual resource range is returned
1909 in Offset and Length.
1910 @retval EFI_INVALID_PARAMETER Offset or Length is NULL.
1911 @retval EFI_UNSUPPORTED BarIndex not valid for this PCI controller.
1912 @retval EFI_OUT_OF_RESOURCES There are not enough resources to set the attributes on the
1913 resource range specified by BarIndex, Offset, and
1919 PciIoSetBarAttributes (
1920 IN EFI_PCI_IO_PROTOCOL
*This
,
1921 IN UINT64 Attributes
,
1923 IN OUT UINT64
*Offset
,
1924 IN OUT UINT64
*Length
1928 PCI_IO_DEVICE
*PciIoDevice
;
1929 UINT64 NonRelativeOffset
;
1932 PciIoDevice
= PCI_IO_DEVICE_FROM_PCI_IO_THIS (This
);
1935 // Make sure Offset and Length are not NULL
1937 if (Offset
== NULL
|| Length
== NULL
) {
1938 return EFI_INVALID_PARAMETER
;
1941 if (PciIoDevice
->PciBar
[BarIndex
].BarType
== PciBarTypeUnknown
) {
1942 return EFI_UNSUPPORTED
;
1945 // This driver does not support setting the WRITE_COMBINE or the CACHED attributes.
1946 // If Attributes is not 0, then return EFI_UNSUPPORTED.
1948 Supports
= PciIoDevice
->Supports
& EFI_PCI_IO_ATTRIBUTE_MEMORY_CACHED
& EFI_PCI_IO_ATTRIBUTE_MEMORY_WRITE_COMBINE
;
1950 if (Attributes
!= (Attributes
& Supports
)) {
1951 return EFI_UNSUPPORTED
;
1954 // Attributes must be supported. Make sure the BAR range describd by BarIndex, Offset, and
1955 // Length are valid for this PCI device.
1957 NonRelativeOffset
= *Offset
;
1958 Status
= PciIoVerifyBarAccess (
1966 if (EFI_ERROR (Status
)) {
1967 return EFI_UNSUPPORTED
;
1974 Program parent bridge's attribute recurrently.
1976 @param PciIoDevice Child Pci device instance
1977 @param Operation The operation to perform on the attributes for this PCI controller.
1978 @param Attributes The mask of attributes that are used for Set, Enable, and Disable
1981 @retval EFI_SUCCESS The operation on the PCI controller's attributes was completed.
1982 @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
1983 @retval EFI_UNSUPPORTED one or more of the bits set in
1984 Attributes are not supported by this PCI controller or one of
1985 its parent bridges when Operation is Set, Enable or Disable.
1989 UpStreamBridgesAttributes (
1990 IN PCI_IO_DEVICE
*PciIoDevice
,
1991 IN EFI_PCI_IO_PROTOCOL_ATTRIBUTE_OPERATION Operation
,
1992 IN UINT64 Attributes
1995 PCI_IO_DEVICE
*Parent
;
1996 EFI_PCI_IO_PROTOCOL
*PciIo
;
1998 Parent
= PciIoDevice
->Parent
;
2000 while (Parent
!= NULL
&& IS_PCI_BRIDGE (&Parent
->Pci
)) {
2003 // Get the PciIo Protocol
2005 PciIo
= &Parent
->PciIo
;
2007 PciIo
->Attributes (PciIo
, Operation
, Attributes
, NULL
);
2009 Parent
= Parent
->Parent
;
2016 Test whether two Pci devices has same parent bridge.
2018 @param PciDevice1 The first pci device for testing.
2019 @param PciDevice2 The second pci device for testing.
2021 @retval TRUE Two Pci device has the same parent bridge.
2022 @retval FALSE Two Pci device has not the same parent bridge.
2026 PciDevicesOnTheSamePath (
2027 IN PCI_IO_DEVICE
*PciDevice1
,
2028 IN PCI_IO_DEVICE
*PciDevice2
2034 if (PciDevice1
->Parent
== PciDevice2
->Parent
) {
2038 Existed1
= PciDeviceExisted (PciDevice1
->Parent
, PciDevice2
);
2039 Existed2
= PciDeviceExisted (PciDevice2
->Parent
, PciDevice1
);
2041 return (BOOLEAN
) (Existed1
|| Existed2
);