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2 Provides services to access PCI Configuration Space on a platform with multiple PCI segments.
4 The PCI Segment Library function provide services to read, write, and modify the PCI configuration
5 registers on PCI root bridges on any supported PCI segment. These library services take a single
6 address parameter that encodes the PCI Segment, PCI Bus, PCI Device, PCI Function, and PCI Register.
7 The layout of this address parameter is as follows:
9 PCI Register: Bits 0..11
10 PCI Function Bits 12..14
11 PCI Device Bits 15..19
13 Reserved Bits 28..31. Must be 0.
14 PCI Segment Bits 32..47
15 Reserved Bits 48..63. Must be 0.
17 | Reserved (MBZ) | Segment | Reserved (MBZ) | Bus | Device | Function | Register |
18 63 48 47 32 31 28 27 20 19 15 14 12 11 0
20 These functions perform PCI configuration cycles using the default PCI configuration access
21 method. This may use I/O ports 0xCF8 and 0xCFC to perform PCI configuration accesses, or it
22 may use MMIO registers relative to the PcdPciExpressBaseAddress, or it may use some alternate
23 access method. Modules will typically use the PCI Segment Library for its PCI configuration
24 accesses when PCI Segments other than Segment #0 must be accessed.
26 Copyright (c) 2006 - 2009, Intel Corporation
27 All rights reserved. This program and the accompanying materials
28 are licensed and made available under the terms and conditions of the BSD License
29 which accompanies this distribution. The full text of the license may be found at
30 http://opensource.org/licenses/bsd-license.php
32 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
33 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
37 #ifndef __PCI_SEGMENT_LIB__
38 #define __PCI_SEGMENT_LIB__
42 Macro that converts PCI Segment, PCI Bus, PCI Device, PCI Function,
43 and PCI Register to an address that can be passed to the PCI Segment Library functions.
45 Computes an address that is compatible with the PCI Segment Library functions.
46 The unused upper bits of Segment, Bus, Device, Function,
47 and Register are stripped prior to the generation of the address.
49 @param Segment PCI Segment number. Range 0..65535.
50 @param Bus PCI Bus number. Range 0..255.
51 @param Device PCI Device number. Range 0..31.
52 @param Function PCI Function number. Range 0..7.
53 @param Register PCI Register number. Range 0..255 for PCI. Range 0..4095 for PCI Express.
55 @return The address that is compatible with the PCI Segment Library functions.
58 #define PCI_SEGMENT_LIB_ADDRESS(Segment,Bus,Device,Function,Register) \
59 ( ((Register) & 0xfff) | \
60 (((Function) & 0x07) << 12) | \
61 (((Device) & 0x1f) << 15) | \
62 (((Bus) & 0xff) << 20) | \
63 (LShiftU64((Segment) & 0xffff, 32)) \
67 Register a PCI device so PCI configuration registers may be accessed after
68 SetVirtualAddressMap().
70 If any reserved bits in Address are set, then ASSERT().
72 @param Address Address that encodes the PCI Bus, Device, Function and
75 @retval RETURN_SUCCESS The PCI device was registered for runtime access.
76 @retval RETURN_UNSUPPORTED An attempt was made to call this function
77 after ExitBootServices().
78 @retval RETURN_UNSUPPORTED The resources required to access the PCI device
79 at runtime could not be mapped.
80 @retval RETURN_OUT_OF_RESOURCES There are not enough resources available to
81 complete the registration.
86 PciSegmentRegisterForRuntimeAccess (
91 Reads an 8-bit PCI configuration register.
93 Reads and returns the 8-bit PCI configuration register specified by Address.
94 This function must guarantee that all PCI read and write operations are serialized.
96 If any reserved bits in Address are set, then ASSERT().
98 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
100 @return The 8-bit PCI configuration register specified by Address.
110 Writes an 8-bit PCI configuration register.
112 Writes the 8-bit PCI configuration register specified by Address with the value specified by Value.
113 Value is returned. This function must guarantee that all PCI read and write operations are serialized.
115 If any reserved bits in Address are set, then ASSERT().
117 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
118 @param Value The value to write.
120 @return The value written to the PCI configuration register.
131 Performs a bitwise OR of an 8-bit PCI configuration register with an 8-bit value.
133 Reads the 8-bit PCI configuration register specified by Address,
134 performs a bitwise OR between the read result and the value specified by OrData,
135 and writes the result to the 8-bit PCI configuration register specified by Address.
136 The value written to the PCI configuration register is returned.
137 This function must guarantee that all PCI read and write operations are serialized.
139 If any reserved bits in Address are set, then ASSERT().
141 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
142 @param OrData The value to OR with the PCI configuration register.
144 @return The value written to the PCI configuration register.
155 Performs a bitwise AND of an 8-bit PCI configuration register with an 8-bit value.
157 Reads the 8-bit PCI configuration register specified by Address,
158 performs a bitwise AND between the read result and the value specified by AndData,
159 and writes the result to the 8-bit PCI configuration register specified by Address.
160 The value written to the PCI configuration register is returned.
161 This function must guarantee that all PCI read and write operations are serialized.
162 If any reserved bits in Address are set, then ASSERT().
164 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
165 @param AndData The value to AND with the PCI configuration register.
167 @return The value written to the PCI configuration register.
178 Performs a bitwise AND of an 8-bit PCI configuration register with an 8-bit value,
179 followed a bitwise OR with another 8-bit value.
181 Reads the 8-bit PCI configuration register specified by Address,
182 performs a bitwise AND between the read result and the value specified by AndData,
183 performs a bitwise OR between the result of the AND operation and the value specified by OrData,
184 and writes the result to the 8-bit PCI configuration register specified by Address.
185 The value written to the PCI configuration register is returned.
186 This function must guarantee that all PCI read and write operations are serialized.
188 If any reserved bits in Address are set, then ASSERT().
190 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
191 @param AndData The value to AND with the PCI configuration register.
192 @param OrData The value to OR with the PCI configuration register.
194 @return The value written to the PCI configuration register.
199 PciSegmentAndThenOr8 (
206 Reads a bit field of a PCI configuration register.
208 Reads the bit field in an 8-bit PCI configuration register. The bit field is
209 specified by the StartBit and the EndBit. The value of the bit field is
212 If any reserved bits in Address are set, then ASSERT().
213 If StartBit is greater than 7, then ASSERT().
214 If EndBit is greater than 7, then ASSERT().
215 If EndBit is less than StartBit, then ASSERT().
217 @param Address PCI configuration register to read.
218 @param StartBit The ordinal of the least significant bit in the bit field.
220 @param EndBit The ordinal of the most significant bit in the bit field.
223 @return The value of the bit field read from the PCI configuration register.
228 PciSegmentBitFieldRead8 (
235 Writes a bit field to a PCI configuration register.
237 Writes Value to the bit field of the PCI configuration register. The bit
238 field is specified by the StartBit and the EndBit. All other bits in the
239 destination PCI configuration register are preserved. The new value of the
240 8-bit register is returned.
242 If any reserved bits in Address are set, then ASSERT().
243 If StartBit is greater than 7, then ASSERT().
244 If EndBit is greater than 7, then ASSERT().
245 If EndBit is less than StartBit, then ASSERT().
247 @param Address PCI configuration register to write.
248 @param StartBit The ordinal of the least significant bit in the bit field.
250 @param EndBit The ordinal of the most significant bit in the bit field.
252 @param Value New value of the bit field.
254 @return The value written back to the PCI configuration register.
259 PciSegmentBitFieldWrite8 (
267 Reads a bit field in an 8-bit PCI configuration, performs a bitwise OR, and
268 writes the result back to the bit field in the 8-bit port.
270 Reads the 8-bit PCI configuration register specified by Address, performs a
271 bitwise OR between the read result and the value specified by
272 OrData, and writes the result to the 8-bit PCI configuration register
273 specified by Address. The value written to the PCI configuration register is
274 returned. This function must guarantee that all PCI read and write operations
275 are serialized. Extra left bits in OrData are stripped.
277 If any reserved bits in Address are set, then ASSERT().
278 If StartBit is greater than 7, then ASSERT().
279 If EndBit is greater than 7, then ASSERT().
280 If EndBit is less than StartBit, then ASSERT().
282 @param Address PCI configuration register to write.
283 @param StartBit The ordinal of the least significant bit in the bit field.
285 @param EndBit The ordinal of the most significant bit in the bit field.
287 @param OrData The value to OR with the PCI configuration register.
289 @return The value written back to the PCI configuration register.
294 PciSegmentBitFieldOr8 (
302 Reads a bit field in an 8-bit PCI configuration register, performs a bitwise
303 AND, and writes the result back to the bit field in the 8-bit register.
305 Reads the 8-bit PCI configuration register specified by Address, performs a
306 bitwise AND between the read result and the value specified by AndData, and
307 writes the result to the 8-bit PCI configuration register specified by
308 Address. The value written to the PCI configuration register is returned.
309 This function must guarantee that all PCI read and write operations are
310 serialized. Extra left bits in AndData are stripped.
312 If any reserved bits in Address are set, then ASSERT().
313 If StartBit is greater than 7, then ASSERT().
314 If EndBit is greater than 7, then ASSERT().
315 If EndBit is less than StartBit, then ASSERT().
317 @param Address PCI configuration register to write.
318 @param StartBit The ordinal of the least significant bit in the bit field.
320 @param EndBit The ordinal of the most significant bit in the bit field.
322 @param AndData The value to AND with the PCI configuration register.
324 @return The value written back to the PCI configuration register.
329 PciSegmentBitFieldAnd8 (
337 Reads a bit field in an 8-bit port, performs a bitwise AND followed by a
338 bitwise OR, and writes the result back to the bit field in the
341 Reads the 8-bit PCI configuration register specified by Address, performs a
342 bitwise AND followed by a bitwise OR between the read result and
343 the value specified by AndData, and writes the result to the 8-bit PCI
344 configuration register specified by Address. The value written to the PCI
345 configuration register is returned. This function must guarantee that all PCI
346 read and write operations are serialized. Extra left bits in both AndData and
349 If any reserved bits in Address are set, then ASSERT().
350 If StartBit is greater than 7, then ASSERT().
351 If EndBit is greater than 7, then ASSERT().
352 If EndBit is less than StartBit, then ASSERT().
354 @param Address PCI configuration register to write.
355 @param StartBit The ordinal of the least significant bit in the bit field.
357 @param EndBit The ordinal of the most significant bit in the bit field.
359 @param AndData The value to AND with the PCI configuration register.
360 @param OrData The value to OR with the result of the AND operation.
362 @return The value written back to the PCI configuration register.
367 PciSegmentBitFieldAndThenOr8 (
376 Reads a 16-bit PCI configuration register.
378 Reads and returns the 16-bit PCI configuration register specified by Address.
379 This function must guarantee that all PCI read and write operations are serialized.
381 If any reserved bits in Address are set, then ASSERT().
382 If Address is not aligned on a 16-bit boundary, then ASSERT().
384 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
386 @return The 16-bit PCI configuration register specified by Address.
396 Writes a 16-bit PCI configuration register.
398 Writes the 16-bit PCI configuration register specified by Address with the value specified by Value.
399 Value is returned. This function must guarantee that all PCI read and write operations are serialized.
401 If any reserved bits in Address are set, then ASSERT().
402 If Address is not aligned on a 16-bit boundary, then ASSERT().
404 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
405 @param Value The value to write.
407 @return The parameter of Value.
418 Performs a bitwise OR of a 16-bit PCI configuration register with
421 Reads the 16-bit PCI configuration register specified by Address, performs a
422 bitwise OR between the read result and the value specified by
423 OrData, and writes the result to the 16-bit PCI configuration register
424 specified by Address. The value written to the PCI configuration register is
425 returned. This function must guarantee that all PCI read and write operations
428 If any reserved bits in Address are set, then ASSERT().
429 If Address is not aligned on a 16-bit boundary, then ASSERT().
431 @param Address Address that encodes the PCI Segment, Bus, Device, Function and
433 @param OrData The value to OR with the PCI configuration register.
435 @return The value written back to the PCI configuration register.
446 Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit value.
448 Reads the 16-bit PCI configuration register specified by Address,
449 performs a bitwise AND between the read result and the value specified by AndData,
450 and writes the result to the 16-bit PCI configuration register specified by Address.
451 The value written to the PCI configuration register is returned.
452 This function must guarantee that all PCI read and write operations are serialized.
454 If any reserved bits in Address are set, then ASSERT().
455 If Address is not aligned on a 16-bit boundary, then ASSERT().
457 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
458 @param AndData The value to AND with the PCI configuration register.
460 @return The value written to the PCI configuration register.
471 Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit value,
472 followed a bitwise OR with another 16-bit value.
474 Reads the 16-bit PCI configuration register specified by Address,
475 performs a bitwise AND between the read result and the value specified by AndData,
476 performs a bitwise OR between the result of the AND operation and the value specified by OrData,
477 and writes the result to the 16-bit PCI configuration register specified by Address.
478 The value written to the PCI configuration register is returned.
479 This function must guarantee that all PCI read and write operations are serialized.
481 If any reserved bits in Address are set, then ASSERT().
482 If Address is not aligned on a 16-bit boundary, then ASSERT().
484 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
485 @param AndData The value to AND with the PCI configuration register.
486 @param OrData The value to OR with the PCI configuration register.
488 @return The value written to the PCI configuration register.
493 PciSegmentAndThenOr16 (
500 Reads a bit field of a PCI configuration register.
502 Reads the bit field in a 16-bit PCI configuration register. The bit field is
503 specified by the StartBit and the EndBit. The value of the bit field is
506 If any reserved bits in Address are set, then ASSERT().
507 If Address is not aligned on a 16-bit boundary, then ASSERT().
508 If StartBit is greater than 15, then ASSERT().
509 If EndBit is greater than 15, then ASSERT().
510 If EndBit is less than StartBit, then ASSERT().
512 @param Address PCI configuration register to read.
513 @param StartBit The ordinal of the least significant bit in the bit field.
515 @param EndBit The ordinal of the most significant bit in the bit field.
518 @return The value of the bit field read from the PCI configuration register.
523 PciSegmentBitFieldRead16 (
530 Writes a bit field to a PCI configuration register.
532 Writes Value to the bit field of the PCI configuration register. The bit
533 field is specified by the StartBit and the EndBit. All other bits in the
534 destination PCI configuration register are preserved. The new value of the
535 16-bit register is returned.
537 If any reserved bits in Address are set, then ASSERT().
538 If Address is not aligned on a 16-bit boundary, then ASSERT().
539 If StartBit is greater than 15, then ASSERT().
540 If EndBit is greater than 15, then ASSERT().
541 If EndBit is less than StartBit, then ASSERT().
543 @param Address PCI configuration register to write.
544 @param StartBit The ordinal of the least significant bit in the bit field.
546 @param EndBit The ordinal of the most significant bit in the bit field.
548 @param Value New value of the bit field.
550 @return The value written back to the PCI configuration register.
555 PciSegmentBitFieldWrite16 (
563 Reads the 16-bit PCI configuration register specified by Address,
564 performs a bitwise OR between the read result and the value specified by OrData,
565 and writes the result to the 16-bit PCI configuration register specified by Address.
567 If any reserved bits in Address are set, then ASSERT().
568 If Address is not aligned on a 16-bit boundary, then ASSERT().
569 If StartBit is greater than 15, then ASSERT().
570 If EndBit is greater than 15, then ASSERT().
571 If EndBit is less than StartBit, then ASSERT().
573 @param Address PCI configuration register to write.
574 @param StartBit The ordinal of the least significant bit in the bit field.
576 @param EndBit The ordinal of the most significant bit in the bit field.
578 @param OrData The value to OR with the PCI configuration register.
580 @return The value written back to the PCI configuration register.
585 PciSegmentBitFieldOr16 (
593 Reads a bit field in a 16-bit PCI configuration, performs a bitwise OR,
594 and writes the result back to the bit field in the 16-bit port.
596 Reads the 16-bit PCI configuration register specified by Address,
597 performs a bitwise OR between the read result and the value specified by OrData,
598 and writes the result to the 16-bit PCI configuration register specified by Address.
599 The value written to the PCI configuration register is returned.
600 This function must guarantee that all PCI read and write operations are serialized.
601 Extra left bits in OrData are stripped.
603 If any reserved bits in Address are set, then ASSERT().
604 If Address is not aligned on a 16-bit boundary, then ASSERT().
605 If StartBit is greater than 7, then ASSERT().
606 If EndBit is greater than 7, then ASSERT().
607 If EndBit is less than StartBit, then ASSERT().
609 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
610 @param StartBit The ordinal of the least significant bit in the bit field.
611 The ordinal of the least significant bit in a byte is bit 0.
612 @param EndBit The ordinal of the most significant bit in the bit field.
613 The ordinal of the most significant bit in a byte is bit 7.
614 @param AndData The value to AND with the read value from the PCI configuration register.
616 @return The value written to the PCI configuration register.
621 PciSegmentBitFieldAnd16 (
629 Reads a bit field in a 16-bit port, performs a bitwise AND followed by a
630 bitwise OR, and writes the result back to the bit field in the
633 Reads the 16-bit PCI configuration register specified by Address, performs a
634 bitwise AND followed by a bitwise OR between the read result and
635 the value specified by AndData, and writes the result to the 16-bit PCI
636 configuration register specified by Address. The value written to the PCI
637 configuration register is returned. This function must guarantee that all PCI
638 read and write operations are serialized. Extra left bits in both AndData and
641 If any reserved bits in Address are set, then ASSERT().
642 If StartBit is greater than 15, then ASSERT().
643 If EndBit is greater than 15, then ASSERT().
644 If EndBit is less than StartBit, then ASSERT().
646 @param Address PCI configuration register to write.
647 @param StartBit The ordinal of the least significant bit in the bit field.
649 @param EndBit The ordinal of the most significant bit in the bit field.
651 @param AndData The value to AND with the PCI configuration register.
652 @param OrData The value to OR with the result of the AND operation.
654 @return The value written back to the PCI configuration register.
659 PciSegmentBitFieldAndThenOr16 (
668 Reads a 32-bit PCI configuration register.
670 Reads and returns the 32-bit PCI configuration register specified by Address.
671 This function must guarantee that all PCI read and write operations are serialized.
673 If any reserved bits in Address are set, then ASSERT().
674 If Address is not aligned on a 32-bit boundary, then ASSERT().
676 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
678 @return The 32-bit PCI configuration register specified by Address.
688 Writes a 32-bit PCI configuration register.
690 Writes the 32-bit PCI configuration register specified by Address with the value specified by Value.
691 Value is returned. This function must guarantee that all PCI read and write operations are serialized.
693 If any reserved bits in Address are set, then ASSERT().
694 If Address is not aligned on a 32-bit boundary, then ASSERT().
696 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
697 @param Value The value to write.
699 @return The parameter of Value.
710 Performs a bitwise OR of a 32-bit PCI configuration register with a 32-bit value.
712 Reads the 32-bit PCI configuration register specified by Address,
713 performs a bitwise OR between the read result and the value specified by OrData,
714 and writes the result to the 32-bit PCI configuration register specified by Address.
715 The value written to the PCI configuration register is returned.
716 This function must guarantee that all PCI read and write operations are serialized.
718 If any reserved bits in Address are set, then ASSERT().
719 If Address is not aligned on a 32-bit boundary, then ASSERT().
721 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
722 @param OrData The value to OR with the PCI configuration register.
724 @return The value written to the PCI configuration register.
735 Performs a bitwise AND of a 32-bit PCI configuration register with a 32-bit value.
737 Reads the 32-bit PCI configuration register specified by Address,
738 performs a bitwise AND between the read result and the value specified by AndData,
739 and writes the result to the 32-bit PCI configuration register specified by Address.
740 The value written to the PCI configuration register is returned.
741 This function must guarantee that all PCI read and write operations are serialized.
743 If any reserved bits in Address are set, then ASSERT().
744 If Address is not aligned on a 32-bit boundary, then ASSERT().
746 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
747 @param AndData The value to AND with the PCI configuration register.
749 @return The value written to the PCI configuration register.
760 Performs a bitwise AND of a 32-bit PCI configuration register with a 32-bit value,
761 followed a bitwise OR with another 32-bit value.
763 Reads the 32-bit PCI configuration register specified by Address,
764 performs a bitwise AND between the read result and the value specified by AndData,
765 performs a bitwise OR between the result of the AND operation and the value specified by OrData,
766 and writes the result to the 32-bit PCI configuration register specified by Address.
767 The value written to the PCI configuration register is returned.
768 This function must guarantee that all PCI read and write operations are serialized.
770 If any reserved bits in Address are set, then ASSERT().
771 If Address is not aligned on a 32-bit boundary, then ASSERT().
773 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
774 @param AndData The value to AND with the PCI configuration register.
775 @param OrData The value to OR with the PCI configuration register.
777 @return The value written to the PCI configuration register.
782 PciSegmentAndThenOr32 (
789 Reads a bit field of a PCI configuration register.
791 Reads the bit field in a 32-bit PCI configuration register. The bit field is
792 specified by the StartBit and the EndBit. The value of the bit field is
795 If any reserved bits in Address are set, then ASSERT().
796 If Address is not aligned on a 32-bit boundary, then ASSERT().
797 If StartBit is greater than 31, then ASSERT().
798 If EndBit is greater than 31, then ASSERT().
799 If EndBit is less than StartBit, then ASSERT().
801 @param Address PCI configuration register to read.
802 @param StartBit The ordinal of the least significant bit in the bit field.
804 @param EndBit The ordinal of the most significant bit in the bit field.
807 @return The value of the bit field read from the PCI configuration register.
812 PciSegmentBitFieldRead32 (
819 Writes a bit field to a PCI configuration register.
821 Writes Value to the bit field of the PCI configuration register. The bit
822 field is specified by the StartBit and the EndBit. All other bits in the
823 destination PCI configuration register are preserved. The new value of the
824 32-bit register is returned.
826 If any reserved bits in Address are set, then ASSERT().
827 If Address is not aligned on a 32-bit boundary, then ASSERT().
828 If StartBit is greater than 31, then ASSERT().
829 If EndBit is greater than 31, then ASSERT().
830 If EndBit is less than StartBit, then ASSERT().
832 @param Address PCI configuration register to write.
833 @param StartBit The ordinal of the least significant bit in the bit field.
835 @param EndBit The ordinal of the most significant bit in the bit field.
837 @param Value New value of the bit field.
839 @return The value written back to the PCI configuration register.
844 PciSegmentBitFieldWrite32 (
852 Reads a bit field in a 32-bit PCI configuration, performs a bitwise OR, and
853 writes the result back to the bit field in the 32-bit port.
855 Reads the 32-bit PCI configuration register specified by Address, performs a
856 bitwise OR between the read result and the value specified by
857 OrData, and writes the result to the 32-bit PCI configuration register
858 specified by Address. The value written to the PCI configuration register is
859 returned. This function must guarantee that all PCI read and write operations
860 are serialized. Extra left bits in OrData are stripped.
862 If any reserved bits in Address are set, then ASSERT().
863 If StartBit is greater than 31, then ASSERT().
864 If EndBit is greater than 31, then ASSERT().
865 If EndBit is less than StartBit, then ASSERT().
867 @param Address PCI configuration register to write.
868 @param StartBit The ordinal of the least significant bit in the bit field.
870 @param EndBit The ordinal of the most significant bit in the bit field.
872 @param OrData The value to OR with the PCI configuration register.
874 @return The value written back to the PCI configuration register.
879 PciSegmentBitFieldOr32 (
887 Reads a bit field in a 32-bit PCI configuration register, performs a bitwise
888 AND, and writes the result back to the bit field in the 32-bit register.
891 Reads the 32-bit PCI configuration register specified by Address, performs a bitwise
892 AND between the read result and the value specified by AndData, and writes the result
893 to the 32-bit PCI configuration register specified by Address. The value written to
894 the PCI configuration register is returned. This function must guarantee that all PCI
895 read and write operations are serialized. Extra left bits in AndData are stripped.
896 If any reserved bits in Address are set, then ASSERT().
897 If Address is not aligned on a 32-bit boundary, then ASSERT().
898 If StartBit is greater than 31, then ASSERT().
899 If EndBit is greater than 31, then ASSERT().
900 If EndBit is less than StartBit, then ASSERT().
903 @param Address PCI configuration register to write.
904 @param StartBit The ordinal of the least significant bit in the bit field.
906 @param EndBit The ordinal of the most significant bit in the bit field.
908 @param AndData The value to AND with the PCI configuration register.
910 @return The value written back to the PCI configuration register.
915 PciSegmentBitFieldAnd32 (
923 Reads a bit field in a 32-bit port, performs a bitwise AND followed by a
924 bitwise OR, and writes the result back to the bit field in the
927 Reads the 32-bit PCI configuration register specified by Address, performs a
928 bitwise AND followed by a bitwise OR between the read result and
929 the value specified by AndData, and writes the result to the 32-bit PCI
930 configuration register specified by Address. The value written to the PCI
931 configuration register is returned. This function must guarantee that all PCI
932 read and write operations are serialized. Extra left bits in both AndData and
935 If any reserved bits in Address are set, then ASSERT().
936 If StartBit is greater than 31, then ASSERT().
937 If EndBit is greater than 31, then ASSERT().
938 If EndBit is less than StartBit, then ASSERT().
940 @param Address PCI configuration register to write.
941 @param StartBit The ordinal of the least significant bit in the bit field.
943 @param EndBit The ordinal of the most significant bit in the bit field.
945 @param AndData The value to AND with the PCI configuration register.
946 @param OrData The value to OR with the result of the AND operation.
948 @return The value written back to the PCI configuration register.
953 PciSegmentBitFieldAndThenOr32 (
962 Reads a range of PCI configuration registers into a caller supplied buffer.
964 Reads the range of PCI configuration registers specified by StartAddress and
965 Size into the buffer specified by Buffer. This function only allows the PCI
966 configuration registers from a single PCI function to be read. Size is
967 returned. When possible 32-bit PCI configuration read cycles are used to read
968 from StartAdress to StartAddress + Size. Due to alignment restrictions, 8-bit
969 and 16-bit PCI configuration read cycles may be used at the beginning and the
972 If any reserved bits in StartAddress are set, then ASSERT().
973 If ((StartAddress & 0xFFF) + Size) > 0x1000, then ASSERT().
974 If Size > 0 and Buffer is NULL, then ASSERT().
976 @param StartAddress Starting address that encodes the PCI Segment, Bus, Device,
977 Function and Register.
978 @param Size Size in bytes of the transfer.
979 @param Buffer Pointer to a buffer receiving the data read.
986 PciSegmentReadBuffer (
987 IN UINT64 StartAddress
,
993 Copies the data in a caller supplied buffer to a specified range of PCI
996 Writes the range of PCI configuration registers specified by StartAddress and
997 Size from the buffer specified by Buffer. This function only allows the PCI
998 configuration registers from a single PCI function to be written. Size is
999 returned. When possible 32-bit PCI configuration write cycles are used to
1000 write from StartAdress to StartAddress + Size. Due to alignment restrictions,
1001 8-bit and 16-bit PCI configuration write cycles may be used at the beginning
1002 and the end of the range.
1004 If any reserved bits in StartAddress are set, then ASSERT().
1005 If ((StartAddress & 0xFFF) + Size) > 0x1000, then ASSERT().
1006 If Size > 0 and Buffer is NULL, then ASSERT().
1008 @param StartAddress Starting address that encodes the PCI Segment, Bus, Device,
1009 Function and Register.
1010 @param Size Size in bytes of the transfer.
1011 @param Buffer Pointer to a buffer containing the data to write.
1013 @return The parameter of Size.
1018 PciSegmentWriteBuffer (
1019 IN UINT64 StartAddress
,