2 The multiple segments PCI configuration Library Services that carry out
3 PCI configuration and enable the PCI operations to be replayed during an
4 S3 resume. This library class maps directly on top of the PciSegmentLib class.
6 Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
7 This program and the accompanying materials
8 are licensed and made available under the terms and conditions of the BSD License
9 which accompanies this distribution. The full text of the license may be found at
10 http://opensource.org/licenses/bsd-license.php
12 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
13 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
20 #include <Library/DebugLib.h>
21 #include <Library/S3BootScriptLib.h>
22 #include <Library/PciSegmentLib.h>
25 Macro that converts address in PciSegmentLib format to the new address that can be pass
26 to the S3 Boot Script Library functions. The Segment is dropped.
28 @param Address Address in PciSegmentLib format.
30 @retval New address that can be pass to the S3 Boot Script Library functions.
32 #define PCI_SEGMENT_LIB_ADDRESS_TO_S3_BOOT_SCRIPT_PCI_ADDRESS(Address) \
33 ((((UINT32)(Address) >> 20) & 0xff) << 24) | \
34 ((((UINT32)(Address) >> 15) & 0x1f) << 16) | \
35 ((((UINT32)(Address) >> 12) & 0x07) << 8) | \
36 LShiftU64 ((Address) & 0xfff, 32) // Always put Register in high four bytes.
39 Saves a PCI configuration value to the boot script.
41 This internal worker function saves a PCI configuration value in
42 the S3 script to be replayed on S3 resume.
44 If the saving process fails, then ASSERT().
46 @param Width The width of PCI configuration.
47 @param Address Address that encodes the PCI Bus, Device, Function and
49 @param Buffer The buffer containing value.
53 InternalSavePciSegmentWriteValueToBootScript (
54 IN S3_BOOT_SCRIPT_LIB_WIDTH Width
,
61 Status
= S3BootScriptSavePciCfg2Write (
63 RShiftU64 ((Address
), 32) & 0xffff,
64 PCI_SEGMENT_LIB_ADDRESS_TO_S3_BOOT_SCRIPT_PCI_ADDRESS (Address
),
68 ASSERT_RETURN_ERROR (Status
);
72 Saves an 8-bit PCI configuration value to the boot script.
74 This internal worker function saves an 8-bit PCI configuration value in
75 the S3 script to be replayed on S3 resume.
77 If the saving process fails, then ASSERT().
79 @param Address Address that encodes the PCI Bus, Device, Function and
81 @param Value The value saved to boot script.
87 InternalSavePciSegmentWrite8ValueToBootScript (
92 InternalSavePciSegmentWriteValueToBootScript (S3BootScriptWidthUint8
, Address
, &Value
);
98 Reads an 8-bit PCI configuration register, and saves the value in the S3 script to
99 be replayed on S3 resume.
101 Reads and returns the 8-bit PCI configuration register specified by Address.
102 This function must guarantee that all PCI read and write operations are serialized.
104 If any reserved bits in Address are set, then ASSERT().
106 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
108 @return The 8-bit PCI configuration register specified by Address.
117 return InternalSavePciSegmentWrite8ValueToBootScript (Address
, PciSegmentRead8 (Address
));
121 Writes an 8-bit PCI configuration register, and saves the value in the S3 script to
122 be replayed on S3 resume.
124 Writes the 8-bit PCI configuration register specified by Address with the value specified by Value.
125 Value is returned. This function must guarantee that all PCI read and write operations are serialized.
127 If any reserved bits in Address are set, then ASSERT().
129 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
130 @param Value The value to write.
132 @return The value written to the PCI configuration register.
142 return InternalSavePciSegmentWrite8ValueToBootScript (Address
, PciSegmentWrite8 (Address
, Value
));
146 Performs a bitwise OR of an 8-bit PCI configuration register with an 8-bit value, and saves
147 the value in the S3 script to be replayed on S3 resume.
149 Reads the 8-bit PCI configuration register specified by Address,
150 performs a bitwise OR between the read result and the value specified by OrData,
151 and writes the result to the 8-bit PCI configuration register specified by Address.
152 The value written to the PCI configuration register is returned.
153 This function must guarantee that all PCI read and write operations are serialized.
155 If any reserved bits in Address are set, then ASSERT().
157 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
158 @param OrData The value to OR with the PCI configuration register.
160 @return The value written to the PCI configuration register.
170 return InternalSavePciSegmentWrite8ValueToBootScript (Address
, PciSegmentOr8 (Address
, OrData
));
174 Performs a bitwise AND of an 8-bit PCI configuration register with an 8-bit value, and
175 saves the value in the S3 script to be replayed on S3 resume.
177 Reads the 8-bit PCI configuration register specified by Address,
178 performs a bitwise AND between the read result and the value specified by AndData,
179 and writes the result to the 8-bit PCI configuration register specified by Address.
180 The value written to the PCI configuration register is returned.
181 This function must guarantee that all PCI read and write operations are serialized.
182 If any reserved bits in Address are set, then ASSERT().
184 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
185 @param AndData The value to AND with the PCI configuration register.
187 @return The value written to the PCI configuration register.
197 return InternalSavePciSegmentWrite8ValueToBootScript (Address
, PciSegmentAnd8 (Address
, AndData
));
201 Performs a bitwise AND of an 8-bit PCI configuration register with an 8-bit value,
202 followed a bitwise OR with another 8-bit value, and saves the value in the S3 script to
203 be replayed on S3 resume.
205 Reads the 8-bit PCI configuration register specified by Address,
206 performs a bitwise AND between the read result and the value specified by AndData,
207 performs a bitwise OR between the result of the AND operation and the value specified by OrData,
208 and writes the result to the 8-bit PCI configuration register specified by Address.
209 The value written to the PCI configuration register is returned.
210 This function must guarantee that all PCI read and write operations are serialized.
212 If any reserved bits in Address are set, then ASSERT().
214 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
215 @param AndData The value to AND with the PCI configuration register.
216 @param OrData The value to OR with the PCI configuration register.
218 @return The value written to the PCI configuration register.
223 S3PciSegmentAndThenOr8 (
229 return InternalSavePciSegmentWrite8ValueToBootScript (Address
, PciSegmentAndThenOr8 (Address
, AndData
, OrData
));
233 Reads a bit field of a PCI configuration register, and saves the value in the
234 S3 script to be replayed on S3 resume.
236 Reads the bit field in an 8-bit PCI configuration register. The bit field is
237 specified by the StartBit and the EndBit. The value of the bit field is
240 If any reserved bits in Address are set, then ASSERT().
241 If StartBit is greater than 7, then ASSERT().
242 If EndBit is greater than 7, then ASSERT().
243 If EndBit is less than StartBit, then ASSERT().
245 @param Address PCI configuration register to read.
246 @param StartBit The ordinal of the least significant bit in the bit field.
248 @param EndBit The ordinal of the most significant bit in the bit field.
251 @return The value of the bit field read from the PCI configuration register.
256 S3PciSegmentBitFieldRead8 (
262 return InternalSavePciSegmentWrite8ValueToBootScript (Address
, PciSegmentBitFieldRead8 (Address
, StartBit
, EndBit
));
266 Writes a bit field to a PCI configuration register, and saves the value in
267 the S3 script to be replayed on S3 resume.
269 Writes Value to the bit field of the PCI configuration register. The bit
270 field is specified by the StartBit and the EndBit. All other bits in the
271 destination PCI configuration register are preserved. The new value of the
272 8-bit register is returned.
274 If any reserved bits in Address are set, then ASSERT().
275 If StartBit is greater than 7, then ASSERT().
276 If EndBit is greater than 7, then ASSERT().
277 If EndBit is less than StartBit, then ASSERT().
278 If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
280 @param Address PCI configuration register to write.
281 @param StartBit The ordinal of the least significant bit in the bit field.
283 @param EndBit The ordinal of the most significant bit in the bit field.
285 @param Value New value of the bit field.
287 @return The value written back to the PCI configuration register.
292 S3PciSegmentBitFieldWrite8 (
299 return InternalSavePciSegmentWrite8ValueToBootScript (Address
, PciSegmentBitFieldWrite8 (Address
, StartBit
, EndBit
, Value
));
303 Reads a bit field in an 8-bit PCI configuration, performs a bitwise OR, writes
304 the result back to the bit field in the 8-bit port, and saves the value in the
305 S3 script to be replayed on S3 resume.
307 Reads the 8-bit PCI configuration register specified by Address, performs a
308 bitwise OR between the read result and the value specified by
309 OrData, and writes the result to the 8-bit PCI configuration register
310 specified by Address. The value written to the PCI configuration register is
311 returned. This function must guarantee that all PCI read and write operations
312 are serialized. Extra left bits in OrData are stripped.
314 If any reserved bits in Address are set, then ASSERT().
315 If StartBit is greater than 7, then ASSERT().
316 If EndBit is greater than 7, then ASSERT().
317 If EndBit is less than StartBit, then ASSERT().
318 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
320 @param Address PCI configuration register to write.
321 @param StartBit The ordinal of the least significant bit in the bit field.
323 @param EndBit The ordinal of the most significant bit in the bit field.
325 @param OrData The value to OR with the PCI configuration register.
327 @return The value written back to the PCI configuration register.
332 S3PciSegmentBitFieldOr8 (
339 return InternalSavePciSegmentWrite8ValueToBootScript (Address
, PciSegmentBitFieldOr8 (Address
, StartBit
, EndBit
, OrData
));
343 Reads a bit field in an 8-bit PCI configuration register, performs a bitwise
344 AND, writes the result back to the bit field in the 8-bit register, and
345 saves the value in the S3 script to be replayed on S3 resume.
347 Reads the 8-bit PCI configuration register specified by Address, performs a
348 bitwise AND between the read result and the value specified by AndData, and
349 writes the result to the 8-bit PCI configuration register specified by
350 Address. The value written to the PCI configuration register is returned.
351 This function must guarantee that all PCI read and write operations are
352 serialized. Extra left bits in AndData are stripped.
354 If any reserved bits in Address are set, then ASSERT().
355 If StartBit is greater than 7, then ASSERT().
356 If EndBit is greater than 7, then ASSERT().
357 If EndBit is less than StartBit, then ASSERT().
358 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
360 @param Address PCI configuration register to write.
361 @param StartBit The ordinal of the least significant bit in the bit field.
363 @param EndBit The ordinal of the most significant bit in the bit field.
365 @param AndData The value to AND with the PCI configuration register.
367 @return The value written back to the PCI configuration register.
372 S3PciSegmentBitFieldAnd8 (
379 return InternalSavePciSegmentWrite8ValueToBootScript (Address
, PciSegmentBitFieldAnd8 (Address
, StartBit
, EndBit
, AndData
));
383 Reads a bit field in an 8-bit port, performs a bitwise AND followed by a
384 bitwise OR, writes the result back to the bit field in the 8-bit port,
385 and saves the value in the S3 script to be replayed on S3 resume.
387 Reads the 8-bit PCI configuration register specified by Address, performs a
388 bitwise AND followed by a bitwise OR between the read result and
389 the value specified by AndData, and writes the result to the 8-bit PCI
390 configuration register specified by Address. The value written to the PCI
391 configuration register is returned. This function must guarantee that all PCI
392 read and write operations are serialized. Extra left bits in both AndData and
395 If any reserved bits in Address are set, then ASSERT().
396 If StartBit is greater than 7, then ASSERT().
397 If EndBit is greater than 7, then ASSERT().
398 If EndBit is less than StartBit, then ASSERT().
399 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
400 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
402 @param Address PCI configuration register to write.
403 @param StartBit The ordinal of the least significant bit in the bit field.
405 @param EndBit The ordinal of the most significant bit in the bit field.
407 @param AndData The value to AND with the PCI configuration register.
408 @param OrData The value to OR with the result of the AND operation.
410 @return The value written back to the PCI configuration register.
415 S3PciSegmentBitFieldAndThenOr8 (
423 return InternalSavePciSegmentWrite8ValueToBootScript (Address
, PciSegmentBitFieldAndThenOr8 (Address
, StartBit
, EndBit
, AndData
, OrData
));
427 Saves a 16-bit PCI configuration value to the boot script.
429 This internal worker function saves a 16-bit PCI configuration value in
430 the S3 script to be replayed on S3 resume.
432 If the saving process fails, then ASSERT().
434 @param Address Address that encodes the PCI Bus, Device, Function and
436 @param Value The value saved to boot script.
442 InternalSavePciSegmentWrite16ValueToBootScript (
447 InternalSavePciSegmentWriteValueToBootScript (S3BootScriptWidthUint16
, Address
, &Value
);
453 Reads a 16-bit PCI configuration register, and saves the value in the S3 script
454 to be replayed on S3 resume.
456 Reads and returns the 16-bit PCI configuration register specified by Address.
457 This function must guarantee that all PCI read and write operations are serialized.
459 If any reserved bits in Address are set, then ASSERT().
460 If Address is not aligned on a 16-bit boundary, then ASSERT().
462 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
464 @return The 16-bit PCI configuration register specified by Address.
473 return InternalSavePciSegmentWrite16ValueToBootScript (Address
, PciSegmentRead16 (Address
));
477 Writes a 16-bit PCI configuration register, and saves the value in the S3 script to
478 be replayed on S3 resume.
480 Writes the 16-bit PCI configuration register specified by Address with the value specified by Value.
481 Value is returned. This function must guarantee that all PCI read and write operations are serialized.
483 If any reserved bits in Address are set, then ASSERT().
484 If Address is not aligned on a 16-bit boundary, then ASSERT().
486 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
487 @param Value The value to write.
489 @return The parameter of Value.
494 S3PciSegmentWrite16 (
499 return InternalSavePciSegmentWrite16ValueToBootScript (Address
, PciSegmentWrite16 (Address
, Value
));
503 Performs a bitwise OR of a 16-bit PCI configuration register with a 16-bit
504 value, and saves the value in the S3 script to be replayed on S3 resume.
506 Reads the 16-bit PCI configuration register specified by Address, performs a
507 bitwise OR between the read result and the value specified by OrData, and
508 writes the result to the 16-bit PCI configuration register specified by Address.
509 The value written to the PCI configuration register is returned. This function
510 must guarantee that all PCI read and write operations are serialized.
512 If any reserved bits in Address are set, then ASSERT().
513 If Address is not aligned on a 16-bit boundary, then ASSERT().
515 @param Address Address that encodes the PCI Segment, Bus, Device, Function and
517 @param OrData The value to OR with the PCI configuration register.
519 @return The value written back to the PCI configuration register.
529 return InternalSavePciSegmentWrite16ValueToBootScript (Address
, PciSegmentOr16 (Address
, OrData
));
533 Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit value, and
534 saves the value in the S3 script to be replayed on S3 resume.
536 Reads the 16-bit PCI configuration register specified by Address,
537 performs a bitwise AND between the read result and the value specified by AndData,
538 and writes the result to the 16-bit PCI configuration register specified by Address.
539 The value written to the PCI configuration register is returned.
540 This function must guarantee that all PCI read and write operations are serialized.
542 If any reserved bits in Address are set, then ASSERT().
543 If Address is not aligned on a 16-bit boundary, then ASSERT().
545 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
546 @param AndData The value to AND with the PCI configuration register.
548 @return The value written to the PCI configuration register.
558 return InternalSavePciSegmentWrite16ValueToBootScript (Address
, PciSegmentAnd16 (Address
, AndData
));
562 Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit value,
563 followed a bitwise OR with another 16-bit value, and saves the value in the S3 script to
564 be replayed on S3 resume.
566 Reads the 16-bit PCI configuration register specified by Address,
567 performs a bitwise AND between the read result and the value specified by AndData,
568 performs a bitwise OR between the result of the AND operation and the value specified by OrData,
569 and writes the result to the 16-bit PCI configuration register specified by Address.
570 The value written to the PCI configuration register is returned.
571 This function must guarantee that all PCI read and write operations are serialized.
573 If any reserved bits in Address are set, then ASSERT().
574 If Address is not aligned on a 16-bit boundary, then ASSERT().
576 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
577 @param AndData The value to AND with the PCI configuration register.
578 @param OrData The value to OR with the PCI configuration register.
580 @return The value written to the PCI configuration register.
585 S3PciSegmentAndThenOr16 (
591 return InternalSavePciSegmentWrite16ValueToBootScript (Address
, PciSegmentAndThenOr16 (Address
, AndData
, OrData
));
595 Reads a bit field of a PCI configuration register, and saves the value in the
596 S3 script to be replayed on S3 resume.
598 Reads the bit field in a 16-bit PCI configuration register. The bit field is
599 specified by the StartBit and the EndBit. The value of the bit field is
602 If any reserved bits in Address are set, then ASSERT().
603 If Address is not aligned on a 16-bit boundary, then ASSERT().
604 If StartBit is greater than 15, then ASSERT().
605 If EndBit is greater than 15, then ASSERT().
606 If EndBit is less than StartBit, then ASSERT().
608 @param Address PCI configuration register to read.
609 @param StartBit The ordinal of the least significant bit in the bit field.
611 @param EndBit The ordinal of the most significant bit in the bit field.
614 @return The value of the bit field read from the PCI configuration register.
619 S3PciSegmentBitFieldRead16 (
625 return InternalSavePciSegmentWrite16ValueToBootScript (Address
, PciSegmentBitFieldRead16 (Address
, StartBit
, EndBit
));
629 Writes a bit field to a PCI configuration register, and saves the value in
630 the S3 script to be replayed on S3 resume.
632 Writes Value to the bit field of the PCI configuration register. The bit
633 field is specified by the StartBit and the EndBit. All other bits in the
634 destination PCI configuration register are preserved. The new value of the
635 16-bit register is returned.
637 If any reserved bits in Address are set, then ASSERT().
638 If Address is not aligned on a 16-bit boundary, then ASSERT().
639 If StartBit is greater than 15, then ASSERT().
640 If EndBit is greater than 15, then ASSERT().
641 If EndBit is less than StartBit, then ASSERT().
642 If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
644 @param Address PCI configuration register to write.
645 @param StartBit The ordinal of the least significant bit in the bit field.
647 @param EndBit The ordinal of the most significant bit in the bit field.
649 @param Value New value of the bit field.
651 @return The value written back to the PCI configuration register.
656 S3PciSegmentBitFieldWrite16 (
663 return InternalSavePciSegmentWrite16ValueToBootScript (Address
, PciSegmentBitFieldWrite16 (Address
, StartBit
, EndBit
, Value
));
667 Reads a bit field in a 16-bit PCI configuration, performs a bitwise OR, writes
668 the result back to the bit field in the 16-bit port, and saves the value in the
669 S3 script to be replayed on S3 resume.
671 Reads the 16-bit PCI configuration register specified by Address, performs a
672 bitwise OR between the read result and the value specified by
673 OrData, and writes the result to the 16-bit PCI configuration register
674 specified by Address. The value written to the PCI configuration register is
675 returned. This function must guarantee that all PCI read and write operations
676 are serialized. Extra left bits in OrData are stripped.
678 If any reserved bits in Address are set, then ASSERT().
679 If Address is not aligned on a 16-bit boundary, then ASSERT().
680 If StartBit is greater than 15, then ASSERT().
681 If EndBit is greater than 15, then ASSERT().
682 If EndBit is less than StartBit, then ASSERT().
683 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
685 @param Address PCI configuration register to write.
686 @param StartBit The ordinal of the least significant bit in the bit field.
688 @param EndBit The ordinal of the most significant bit in the bit field.
690 @param OrData The value to OR with the PCI configuration register.
692 @return The value written back to the PCI configuration register.
697 S3PciSegmentBitFieldOr16 (
704 return InternalSavePciSegmentWrite16ValueToBootScript (Address
, PciSegmentBitFieldOr16 (Address
, StartBit
, EndBit
, OrData
));
708 Reads a bit field in a 16-bit PCI configuration register, performs a bitwise
709 AND, writes the result back to the bit field in the 16-bit register, and
710 saves the value in the S3 script to be replayed on S3 resume.
712 Reads the 16-bit PCI configuration register specified by Address, performs a
713 bitwise AND between the read result and the value specified by AndData, and
714 writes the result to the 16-bit PCI configuration register specified by
715 Address. The value written to the PCI configuration register is returned.
716 This function must guarantee that all PCI read and write operations are
717 serialized. Extra left bits in AndData are stripped.
719 If any reserved bits in Address are set, then ASSERT().
720 If Address is not aligned on a 16-bit boundary, then ASSERT().
721 If StartBit is greater than 15, then ASSERT().
722 If EndBit is greater than 15, then ASSERT().
723 If EndBit is less than StartBit, then ASSERT().
724 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
726 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
727 @param StartBit The ordinal of the least significant bit in the bit field.
729 @param EndBit The ordinal of the most significant bit in the bit field.
731 @param AndData The value to AND with the PCI configuration register.
733 @return The value written back to the PCI configuration register.
738 S3PciSegmentBitFieldAnd16 (
745 return InternalSavePciSegmentWrite16ValueToBootScript (Address
, PciSegmentBitFieldAnd16 (Address
, StartBit
, EndBit
, AndData
));
749 Reads a bit field in a 16-bit port, performs a bitwise AND followed by a
750 bitwise OR, writes the result back to the bit field in the 16-bit port,
751 and saves the value in the S3 script to be replayed on S3 resume.
753 Reads the 16-bit PCI configuration register specified by Address, performs a
754 bitwise AND followed by a bitwise OR between the read result and
755 the value specified by AndData, and writes the result to the 16-bit PCI
756 configuration register specified by Address. The value written to the PCI
757 configuration register is returned. This function must guarantee that all PCI
758 read and write operations are serialized. Extra left bits in both AndData and
761 If any reserved bits in Address are set, then ASSERT().
762 If StartBit is greater than 15, then ASSERT().
763 If EndBit is greater than 15, then ASSERT().
764 If EndBit is less than StartBit, then ASSERT().
765 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
766 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
768 @param Address PCI configuration register to write.
769 @param StartBit The ordinal of the least significant bit in the bit field.
771 @param EndBit The ordinal of the most significant bit in the bit field.
773 @param AndData The value to AND with the PCI configuration register.
774 @param OrData The value to OR with the result of the AND operation.
776 @return The value written back to the PCI configuration register.
781 S3PciSegmentBitFieldAndThenOr16 (
789 return InternalSavePciSegmentWrite16ValueToBootScript (Address
, PciSegmentBitFieldAndThenOr16 (Address
, StartBit
, EndBit
, AndData
, OrData
));
795 Saves a 32-bit PCI configuration value to the boot script.
797 This internal worker function saves a 32-bit PCI configuration value in the S3 script
798 to be replayed on S3 resume.
800 If the saving process fails, then ASSERT().
802 @param Address Address that encodes the PCI Bus, Device, Function and
804 @param Value The value saved to boot script.
810 InternalSavePciSegmentWrite32ValueToBootScript (
815 InternalSavePciSegmentWriteValueToBootScript (S3BootScriptWidthUint32
, Address
, &Value
);
821 Reads a 32-bit PCI configuration register, and saves the value in the S3 script
822 to be replayed on S3 resume.
824 Reads and returns the 32-bit PCI configuration register specified by Address.
825 This function must guarantee that all PCI read and write operations are serialized.
827 If any reserved bits in Address are set, then ASSERT().
828 If Address is not aligned on a 32-bit boundary, then ASSERT().
830 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
832 @return The 32-bit PCI configuration register specified by Address.
841 return InternalSavePciSegmentWrite32ValueToBootScript (Address
, PciSegmentRead32 (Address
));
845 Writes a 32-bit PCI configuration register, and saves the value in the S3 script to
846 be replayed on S3 resume.
848 Writes the 32-bit PCI configuration register specified by Address with the value specified by Value.
849 Value is returned. This function must guarantee that all PCI read and write operations are serialized.
851 If any reserved bits in Address are set, then ASSERT().
852 If Address is not aligned on a 32-bit boundary, then ASSERT().
854 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
855 @param Value The value to write.
857 @return The parameter of Value.
862 S3PciSegmentWrite32 (
867 return InternalSavePciSegmentWrite32ValueToBootScript (Address
, PciSegmentWrite32 (Address
, Value
));
871 Performs a bitwise OR of a 32-bit PCI configuration register with a 32-bit
872 value, and saves the value in the S3 script to be replayed on S3 resume.
874 Reads the 32-bit PCI configuration register specified by Address, performs a
875 bitwise OR between the read result and the value specified by OrData, and
876 writes the result to the 32-bit PCI configuration register specified by Address.
877 The value written to the PCI configuration register is returned. This function
878 must guarantee that all PCI read and write operations are serialized.
880 If any reserved bits in Address are set, then ASSERT().
881 If Address is not aligned on a 32-bit boundary, then ASSERT().
883 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and
885 @param OrData The value to OR with the PCI configuration register.
887 @return The value written back to the PCI configuration register.
897 return InternalSavePciSegmentWrite32ValueToBootScript (Address
, PciSegmentOr32 (Address
, OrData
));
901 Performs a bitwise AND of a 32-bit PCI configuration register with a 32-bit value, and
902 saves the value in the S3 script to be replayed on S3 resume.
904 Reads the 32-bit PCI configuration register specified by Address,
905 performs a bitwise AND between the read result and the value specified by AndData,
906 and writes the result to the 32-bit PCI configuration register specified by Address.
907 The value written to the PCI configuration register is returned.
908 This function must guarantee that all PCI read and write operations are serialized.
910 If any reserved bits in Address are set, then ASSERT().
911 If Address is not aligned on a 32-bit boundary, then ASSERT().
913 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
914 @param AndData The value to AND with the PCI configuration register.
916 @return The value written to the PCI configuration register.
926 return InternalSavePciSegmentWrite32ValueToBootScript (Address
, PciSegmentAnd32 (Address
, AndData
));
930 Performs a bitwise AND of a 32-bit PCI configuration register with a 32-bit value,
931 followed a bitwise OR with another 32-bit value, and saves the value in the S3 script to
932 be replayed on S3 resume.
934 Reads the 32-bit PCI configuration register specified by Address,
935 performs a bitwise AND between the read result and the value specified by AndData,
936 performs a bitwise OR between the result of the AND operation and the value specified by OrData,
937 and writes the result to the 32-bit PCI configuration register specified by Address.
938 The value written to the PCI configuration register is returned.
939 This function must guarantee that all PCI read and write operations are serialized.
941 If any reserved bits in Address are set, then ASSERT().
942 If Address is not aligned on a 32-bit boundary, then ASSERT().
944 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
945 @param AndData The value to AND with the PCI configuration register.
946 @param OrData The value to OR with the PCI configuration register.
948 @return The value written to the PCI configuration register.
953 S3PciSegmentAndThenOr32 (
959 return InternalSavePciSegmentWrite32ValueToBootScript (Address
, PciSegmentAndThenOr32 (Address
, AndData
, OrData
));
963 Reads a bit field of a PCI configuration register, and saves the value in the
964 S3 script to be replayed on S3 resume.
966 Reads the bit field in a 32-bit PCI configuration register. The bit field is
967 specified by the StartBit and the EndBit. The value of the bit field is
970 If any reserved bits in Address are set, then ASSERT().
971 If Address is not aligned on a 32-bit boundary, then ASSERT().
972 If StartBit is greater than 31, then ASSERT().
973 If EndBit is greater than 31, then ASSERT().
974 If EndBit is less than StartBit, then ASSERT().
976 @param Address PCI configuration register to read.
977 @param StartBit The ordinal of the least significant bit in the bit field.
979 @param EndBit The ordinal of the most significant bit in the bit field.
982 @return The value of the bit field read from the PCI configuration register.
987 S3PciSegmentBitFieldRead32 (
993 return InternalSavePciSegmentWrite32ValueToBootScript (Address
, PciSegmentBitFieldRead32 (Address
, StartBit
, EndBit
));
997 Writes a bit field to a PCI configuration register, and saves the value in
998 the S3 script to be replayed on S3 resume.
1000 Writes Value to the bit field of the PCI configuration register. The bit
1001 field is specified by the StartBit and the EndBit. All other bits in the
1002 destination PCI configuration register are preserved. The new value of the
1003 32-bit register is returned.
1005 If any reserved bits in Address are set, then ASSERT().
1006 If Address is not aligned on a 32-bit boundary, then ASSERT().
1007 If StartBit is greater than 31, then ASSERT().
1008 If EndBit is greater than 31, then ASSERT().
1009 If EndBit is less than StartBit, then ASSERT().
1010 If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
1012 @param Address PCI configuration register to write.
1013 @param StartBit The ordinal of the least significant bit in the bit field.
1015 @param EndBit The ordinal of the most significant bit in the bit field.
1017 @param Value New value of the bit field.
1019 @return The value written back to the PCI configuration register.
1024 S3PciSegmentBitFieldWrite32 (
1031 return InternalSavePciSegmentWrite32ValueToBootScript (Address
, PciSegmentBitFieldWrite32 (Address
, StartBit
, EndBit
, Value
));
1035 Reads a bit field in a 32-bit PCI configuration, performs a bitwise OR, writes
1036 the result back to the bit field in the 32-bit port, and saves the value in the
1037 S3 script to be replayed on S3 resume.
1039 Reads the 32-bit PCI configuration register specified by Address, performs a
1040 bitwise OR between the read result and the value specified by
1041 OrData, and writes the result to the 32-bit PCI configuration register
1042 specified by Address. The value written to the PCI configuration register is
1043 returned. This function must guarantee that all PCI read and write operations
1044 are serialized. Extra left bits in OrData are stripped.
1046 If any reserved bits in Address are set, then ASSERT().
1047 If Address is not aligned on a 32-bit boundary, then ASSERT().
1048 If StartBit is greater than 31, then ASSERT().
1049 If EndBit is greater than 31, then ASSERT().
1050 If EndBit is less than StartBit, then ASSERT().
1051 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
1053 @param Address PCI configuration register to write.
1054 @param StartBit The ordinal of the least significant bit in the bit field.
1056 @param EndBit The ordinal of the most significant bit in the bit field.
1058 @param OrData The value to OR with the PCI configuration register.
1060 @return The value written back to the PCI configuration register.
1065 S3PciSegmentBitFieldOr32 (
1072 return InternalSavePciSegmentWrite32ValueToBootScript (Address
, PciSegmentBitFieldOr32 (Address
, StartBit
, EndBit
, OrData
));
1076 Reads a bit field in a 32-bit PCI configuration register, performs a bitwise
1077 AND, and writes the result back to the bit field in the 32-bit register, and
1078 saves the value in the S3 script to be replayed on S3 resume.
1080 Reads the 32-bit PCI configuration register specified by Address, performs a
1081 bitwise AND between the read result and the value specified by AndData, and
1082 writes the result to the 32-bit PCI configuration register specified by
1083 Address. The value written to the PCI configuration register is returned.
1084 This function must guarantee that all PCI read and write operations are
1085 serialized. Extra left bits in AndData are stripped.
1087 If any reserved bits in Address are set, then ASSERT().
1088 If Address is not aligned on a 32-bit boundary, then ASSERT().
1089 If StartBit is greater than 31, then ASSERT().
1090 If EndBit is greater than 31, then ASSERT().
1091 If EndBit is less than StartBit, then ASSERT().
1092 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
1094 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
1095 @param StartBit The ordinal of the least significant bit in the bit field.
1097 @param EndBit The ordinal of the most significant bit in the bit field.
1099 @param AndData The value to AND with the PCI configuration register.
1101 @return The value written back to the PCI configuration register.
1106 S3PciSegmentBitFieldAnd32 (
1113 return InternalSavePciSegmentWrite32ValueToBootScript (Address
, PciSegmentBitFieldAnd32 (Address
, StartBit
, EndBit
, AndData
));
1117 Reads a bit field in a 32-bit port, performs a bitwise AND followed by a
1118 bitwise OR, writes the result back to the bit field in the 32-bit port,
1119 and saves the value in the S3 script to be replayed on S3 resume.
1121 Reads the 32-bit PCI configuration register specified by Address, performs a
1122 bitwise AND followed by a bitwise OR between the read result and
1123 the value specified by AndData, and writes the result to the 32-bit PCI
1124 configuration register specified by Address. The value written to the PCI
1125 configuration register is returned. This function must guarantee that all PCI
1126 read and write operations are serialized. Extra left bits in both AndData and
1127 OrData are stripped.
1129 If any reserved bits in Address are set, then ASSERT().
1130 If StartBit is greater than 31, then ASSERT().
1131 If EndBit is greater than 31, then ASSERT().
1132 If EndBit is less than StartBit, then ASSERT().
1133 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
1134 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
1136 @param Address PCI configuration register to write.
1137 @param StartBit The ordinal of the least significant bit in the bit field.
1139 @param EndBit The ordinal of the most significant bit in the bit field.
1141 @param AndData The value to AND with the PCI configuration register.
1142 @param OrData The value to OR with the result of the AND operation.
1144 @return The value written back to the PCI configuration register.
1149 S3PciSegmentBitFieldAndThenOr32 (
1157 return InternalSavePciSegmentWrite32ValueToBootScript (Address
, PciSegmentBitFieldAndThenOr32 (Address
, StartBit
, EndBit
, AndData
, OrData
));
1161 Reads a range of PCI configuration registers into a caller supplied buffer,
1162 and saves the value in the S3 script to be replayed on S3 resume.
1164 Reads the range of PCI configuration registers specified by StartAddress and
1165 Size into the buffer specified by Buffer. This function only allows the PCI
1166 configuration registers from a single PCI function to be read. Size is
1167 returned. When possible 32-bit PCI configuration read cycles are used to read
1168 from StartAdress to StartAddress + Size. Due to alignment restrictions, 8-bit
1169 and 16-bit PCI configuration read cycles may be used at the beginning and the
1172 If any reserved bits in StartAddress are set, then ASSERT().
1173 If ((StartAddress & 0xFFF) + Size) > 0x1000, then ASSERT().
1174 If Size > 0 and Buffer is NULL, then ASSERT().
1176 @param StartAddress Starting address that encodes the PCI Segment, Bus, Device,
1177 Function and Register.
1178 @param Size Size in bytes of the transfer.
1179 @param Buffer Pointer to a buffer receiving the data read.
1186 S3PciSegmentReadBuffer (
1187 IN UINT64 StartAddress
,
1192 RETURN_STATUS Status
;
1194 Status
= S3BootScriptSavePciCfg2Write (
1195 S3BootScriptWidthUint8
,
1196 RShiftU64 (StartAddress
, 32) & 0xffff,
1197 PCI_SEGMENT_LIB_ADDRESS_TO_S3_BOOT_SCRIPT_PCI_ADDRESS (StartAddress
),
1198 PciSegmentReadBuffer (StartAddress
, Size
, Buffer
),
1201 ASSERT_RETURN_ERROR (Status
);
1206 Copies the data in a caller supplied buffer to a specified range of PCI
1207 configuration space, and saves the value in the S3 script to be replayed on S3
1210 Writes the range of PCI configuration registers specified by StartAddress and
1211 Size from the buffer specified by Buffer. This function only allows the PCI
1212 configuration registers from a single PCI function to be written. Size is
1213 returned. When possible 32-bit PCI configuration write cycles are used to
1214 write from StartAdress to StartAddress + Size. Due to alignment restrictions,
1215 8-bit and 16-bit PCI configuration write cycles may be used at the beginning
1216 and the end of the range.
1218 If any reserved bits in StartAddress are set, then ASSERT().
1219 If ((StartAddress & 0xFFF) + Size) > 0x1000, then ASSERT().
1220 If Size > 0 and Buffer is NULL, then ASSERT().
1222 @param StartAddress Starting address that encodes the PCI Segment, Bus, Device,
1223 Function and Register.
1224 @param Size Size in bytes of the transfer.
1225 @param Buffer Pointer to a buffer containing the data to write.
1227 @return The parameter of Size.
1232 S3PciSegmentWriteBuffer (
1233 IN UINT64 StartAddress
,
1238 RETURN_STATUS Status
;
1240 Status
= S3BootScriptSavePciCfg2Write (
1241 S3BootScriptWidthUint8
,
1242 RShiftU64 (StartAddress
, 32) & 0xffff,
1243 PCI_SEGMENT_LIB_ADDRESS_TO_S3_BOOT_SCRIPT_PCI_ADDRESS (StartAddress
),
1244 PciSegmentWriteBuffer (StartAddress
, Size
, Buffer
),
1247 ASSERT_RETURN_ERROR (Status
);