2 I/O APIC Register Definitions from 82093AA I/O Advanced Programmable Interrupt
3 Controller (IOAPIC), 1996.
5 Copyright (c) 2011 - 2018, Intel Corporation. All rights reserved.<BR>
6 SPDX-License-Identifier: BSD-2-Clause-Patent
14 /// I/O APIC Register Offsets
16 #define IOAPIC_INDEX_OFFSET 0x00
17 #define IOAPIC_DATA_OFFSET 0x10
20 /// I/O APIC Indirect Register Indexes
22 #define IO_APIC_IDENTIFICATION_REGISTER_INDEX 0x00
23 #define IO_APIC_VERSION_REGISTER_INDEX 0x01
24 #define IO_APIC_REDIRECTION_TABLE_ENTRY_INDEX 0x10
27 /// I/O APIC Interrupt Deliver Modes
29 #define IO_APIC_DELIVERY_MODE_FIXED 0
30 #define IO_APIC_DELIVERY_MODE_LOWEST_PRIORITY 1
31 #define IO_APIC_DELIVERY_MODE_SMI 2
32 #define IO_APIC_DELIVERY_MODE_NMI 4
33 #define IO_APIC_DELIVERY_MODE_INIT 5
34 #define IO_APIC_DELIVERY_MODE_EXTINT 7
41 UINT32 Identification
:4;
45 } IO_APIC_IDENTIFICATION_REGISTER
;
51 UINT32 MaximumRedirectionEntry
:8;
55 } IO_APIC_VERSION_REGISTER
;
60 UINT32 DeliveryMode
: 3;
61 UINT32 DestinationMode
: 1;
62 UINT32 DeliveryStatus
: 1;
65 UINT32 TriggerMode
: 1;
69 UINT32 DestinationID
: 8;
76 } IO_APIC_REDIRECTION_TABLE_ENTRY
;