5 Most of services in this library instance are suggested to be invoked by BSP only,
6 except for MtrrSetAllMtrrs() which is used to sync BSP's MTRR setting to APs.
8 Copyright (c) 2008 - 2018, Intel Corporation. All rights reserved.<BR>
9 This program and the accompanying materials
10 are licensed and made available under the terms and conditions of the BSD License
11 which accompanies this distribution. The full text of the license may be found at
12 http://opensource.org/licenses/bsd-license.php
14 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
15 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
20 #include <Register/Cpuid.h>
21 #include <Register/Msr.h>
23 #include <Library/MtrrLib.h>
24 #include <Library/BaseLib.h>
25 #include <Library/CpuLib.h>
26 #include <Library/BaseMemoryLib.h>
27 #include <Library/DebugLib.h>
29 #define OR_SEED 0x0101010101010101ull
30 #define CLEAR_SEED 0xFFFFFFFFFFFFFFFFull
31 #define MAX_WEIGHT MAX_UINT8
32 #define SCRATCH_BUFFER_SIZE (4 * SIZE_4KB)
33 #define MTRR_LIB_ASSERT_ALIGNED(B, L) ASSERT ((B & ~(L - 1)) == B);
35 #define M(x,y) ((x) * VertexCount + (y))
36 #define O(x,y) ((y) * VertexCount + (x))
39 // Context to save and restore when MTRRs are programmed
43 BOOLEAN InterruptState
;
50 MTRR_MEMORY_CACHE_TYPE Type
: 7;
53 // Temprary use for calculating the best MTRR settings.
61 // This table defines the offset, base and length of the fixed MTRRs
63 CONST FIXED_MTRR mMtrrLibFixedMtrrTable
[] = {
65 MSR_IA32_MTRR_FIX64K_00000
,
70 MSR_IA32_MTRR_FIX16K_80000
,
75 MSR_IA32_MTRR_FIX16K_A0000
,
80 MSR_IA32_MTRR_FIX4K_C0000
,
85 MSR_IA32_MTRR_FIX4K_C8000
,
90 MSR_IA32_MTRR_FIX4K_D0000
,
95 MSR_IA32_MTRR_FIX4K_D8000
,
100 MSR_IA32_MTRR_FIX4K_E0000
,
105 MSR_IA32_MTRR_FIX4K_E8000
,
110 MSR_IA32_MTRR_FIX4K_F0000
,
115 MSR_IA32_MTRR_FIX4K_F8000
,
122 // Lookup table used to print MTRRs
124 GLOBAL_REMOVE_IF_UNREFERENCED CONST CHAR8
*mMtrrMemoryCacheTypeShortName
[] = {
125 "UC", // CacheUncacheable
126 "WC", // CacheWriteCombining
129 "WT", // CacheWriteThrough
130 "WP", // CacheWriteProtected
131 "WB", // CacheWriteBack
137 Worker function prints all MTRRs for debugging.
139 If MtrrSetting is not NULL, print MTRR settings from input MTRR
141 If MtrrSetting is NULL, print MTRR settings from MTRRs.
143 @param MtrrSetting A buffer holding all MTRRs content.
146 MtrrDebugPrintAllMtrrsWorker (
147 IN MTRR_SETTINGS
*MtrrSetting
151 Worker function returns the variable MTRR count for the CPU.
153 @return Variable MTRR count
157 GetVariableMtrrCountWorker (
161 MSR_IA32_MTRRCAP_REGISTER MtrrCap
;
163 MtrrCap
.Uint64
= AsmReadMsr64 (MSR_IA32_MTRRCAP
);
164 ASSERT (MtrrCap
.Bits
.VCNT
<= ARRAY_SIZE (((MTRR_VARIABLE_SETTINGS
*) 0)->Mtrr
));
165 return MtrrCap
.Bits
.VCNT
;
169 Returns the variable MTRR count for the CPU.
171 @return Variable MTRR count
176 GetVariableMtrrCount (
180 if (!IsMtrrSupported ()) {
183 return GetVariableMtrrCountWorker ();
187 Worker function returns the firmware usable variable MTRR count for the CPU.
189 @return Firmware usable variable MTRR count
193 GetFirmwareVariableMtrrCountWorker (
197 UINT32 VariableMtrrCount
;
198 UINT32 ReservedMtrrNumber
;
200 VariableMtrrCount
= GetVariableMtrrCountWorker ();
201 ReservedMtrrNumber
= PcdGet32 (PcdCpuNumberOfReservedVariableMtrrs
);
202 if (VariableMtrrCount
< ReservedMtrrNumber
) {
206 return VariableMtrrCount
- ReservedMtrrNumber
;
210 Returns the firmware usable variable MTRR count for the CPU.
212 @return Firmware usable variable MTRR count
217 GetFirmwareVariableMtrrCount (
221 if (!IsMtrrSupported ()) {
224 return GetFirmwareVariableMtrrCountWorker ();
228 Worker function returns the default MTRR cache type for the system.
230 If MtrrSetting is not NULL, returns the default MTRR cache type from input
231 MTRR settings buffer.
232 If MtrrSetting is NULL, returns the default MTRR cache type from MSR.
234 @param[in] MtrrSetting A buffer holding all MTRRs content.
236 @return The default MTRR cache type.
239 MTRR_MEMORY_CACHE_TYPE
240 MtrrGetDefaultMemoryTypeWorker (
241 IN MTRR_SETTINGS
*MtrrSetting
244 MSR_IA32_MTRR_DEF_TYPE_REGISTER DefType
;
246 if (MtrrSetting
== NULL
) {
247 DefType
.Uint64
= AsmReadMsr64 (MSR_IA32_MTRR_DEF_TYPE
);
249 DefType
.Uint64
= MtrrSetting
->MtrrDefType
;
252 return (MTRR_MEMORY_CACHE_TYPE
) DefType
.Bits
.Type
;
257 Returns the default MTRR cache type for the system.
259 @return The default MTRR cache type.
262 MTRR_MEMORY_CACHE_TYPE
264 MtrrGetDefaultMemoryType (
268 if (!IsMtrrSupported ()) {
269 return CacheUncacheable
;
271 return MtrrGetDefaultMemoryTypeWorker (NULL
);
275 Preparation before programming MTRR.
277 This function will do some preparation for programming MTRRs:
278 disable cache, invalid cache and disable MTRR caching functionality
280 @param[out] MtrrContext Pointer to context to save
284 MtrrLibPreMtrrChange (
285 OUT MTRR_CONTEXT
*MtrrContext
288 MSR_IA32_MTRR_DEF_TYPE_REGISTER DefType
;
290 // Disable interrupts and save current interrupt state
292 MtrrContext
->InterruptState
= SaveAndDisableInterrupts();
295 // Enter no fill cache mode, CD=1(Bit30), NW=0 (Bit29)
300 // Save original CR4 value and clear PGE flag (Bit 7)
302 MtrrContext
->Cr4
= AsmReadCr4 ();
303 AsmWriteCr4 (MtrrContext
->Cr4
& (~BIT7
));
313 DefType
.Uint64
= AsmReadMsr64 (MSR_IA32_MTRR_DEF_TYPE
);
315 AsmWriteMsr64 (MSR_IA32_MTRR_DEF_TYPE
, DefType
.Uint64
);
319 Cleaning up after programming MTRRs.
321 This function will do some clean up after programming MTRRs:
322 Flush all TLBs, re-enable caching, restore CR4.
324 @param[in] MtrrContext Pointer to context to restore
328 MtrrLibPostMtrrChangeEnableCache (
329 IN MTRR_CONTEXT
*MtrrContext
338 // Enable Normal Mode caching CD=NW=0, CD(Bit30), NW(Bit29)
343 // Restore original CR4 value
345 AsmWriteCr4 (MtrrContext
->Cr4
);
348 // Restore original interrupt state
350 SetInterruptState (MtrrContext
->InterruptState
);
354 Cleaning up after programming MTRRs.
356 This function will do some clean up after programming MTRRs:
357 enable MTRR caching functionality, and enable cache
359 @param[in] MtrrContext Pointer to context to restore
363 MtrrLibPostMtrrChange (
364 IN MTRR_CONTEXT
*MtrrContext
367 MSR_IA32_MTRR_DEF_TYPE_REGISTER DefType
;
371 DefType
.Uint64
= AsmReadMsr64 (MSR_IA32_MTRR_DEF_TYPE
);
374 AsmWriteMsr64 (MSR_IA32_MTRR_DEF_TYPE
, DefType
.Uint64
);
376 MtrrLibPostMtrrChangeEnableCache (MtrrContext
);
380 Worker function gets the content in fixed MTRRs
382 @param[out] FixedSettings A buffer to hold fixed MTRRs content.
384 @retval The pointer of FixedSettings
388 MtrrGetFixedMtrrWorker (
389 OUT MTRR_FIXED_SETTINGS
*FixedSettings
394 for (Index
= 0; Index
< MTRR_NUMBER_OF_FIXED_MTRR
; Index
++) {
395 FixedSettings
->Mtrr
[Index
] =
396 AsmReadMsr64 (mMtrrLibFixedMtrrTable
[Index
].Msr
);
399 return FixedSettings
;
404 This function gets the content in fixed MTRRs
406 @param[out] FixedSettings A buffer to hold fixed MTRRs content.
408 @retval The pointer of FixedSettings
414 OUT MTRR_FIXED_SETTINGS
*FixedSettings
417 if (!IsMtrrSupported ()) {
418 return FixedSettings
;
421 return MtrrGetFixedMtrrWorker (FixedSettings
);
426 Worker function will get the raw value in variable MTRRs
428 If MtrrSetting is not NULL, gets the variable MTRRs raw value from input
429 MTRR settings buffer.
430 If MtrrSetting is NULL, gets the variable MTRRs raw value from MTRRs.
432 @param[in] MtrrSetting A buffer holding all MTRRs content.
433 @param[in] VariableMtrrCount Number of variable MTRRs.
434 @param[out] VariableSettings A buffer to hold variable MTRRs content.
436 @return The VariableSettings input pointer
439 MTRR_VARIABLE_SETTINGS
*
440 MtrrGetVariableMtrrWorker (
441 IN MTRR_SETTINGS
*MtrrSetting
,
442 IN UINT32 VariableMtrrCount
,
443 OUT MTRR_VARIABLE_SETTINGS
*VariableSettings
448 ASSERT (VariableMtrrCount
<= ARRAY_SIZE (VariableSettings
->Mtrr
));
450 for (Index
= 0; Index
< VariableMtrrCount
; Index
++) {
451 if (MtrrSetting
== NULL
) {
452 VariableSettings
->Mtrr
[Index
].Mask
= AsmReadMsr64 (MSR_IA32_MTRR_PHYSMASK0
+ (Index
<< 1));
454 // Skip to read the Base MSR when the Mask.V is not set.
456 if (((MSR_IA32_MTRR_PHYSMASK_REGISTER
*)&VariableSettings
->Mtrr
[Index
].Mask
)->Bits
.V
!= 0) {
457 VariableSettings
->Mtrr
[Index
].Base
= AsmReadMsr64 (MSR_IA32_MTRR_PHYSBASE0
+ (Index
<< 1));
460 VariableSettings
->Mtrr
[Index
].Base
= MtrrSetting
->Variables
.Mtrr
[Index
].Base
;
461 VariableSettings
->Mtrr
[Index
].Mask
= MtrrSetting
->Variables
.Mtrr
[Index
].Mask
;
465 return VariableSettings
;
469 This function will get the raw value in variable MTRRs
471 @param[out] VariableSettings A buffer to hold variable MTRRs content.
473 @return The VariableSettings input pointer
476 MTRR_VARIABLE_SETTINGS
*
478 MtrrGetVariableMtrr (
479 OUT MTRR_VARIABLE_SETTINGS
*VariableSettings
482 if (!IsMtrrSupported ()) {
483 return VariableSettings
;
486 return MtrrGetVariableMtrrWorker (
488 GetVariableMtrrCountWorker (),
494 Programs fixed MTRRs registers.
496 @param[in] Type The memory type to set.
497 @param[in, out] Base The base address of memory range.
498 @param[in, out] Length The length of memory range.
499 @param[in, out] LastMsrIndex On input, the last index of the fixed MTRR MSR to program.
500 On return, the current index of the fixed MTRR MSR to program.
501 @param[out] ClearMask The bits to clear in the fixed MTRR MSR.
502 @param[out] OrMask The bits to set in the fixed MTRR MSR.
504 @retval RETURN_SUCCESS The cache type was updated successfully
505 @retval RETURN_UNSUPPORTED The requested range or cache type was invalid
510 MtrrLibProgramFixedMtrr (
511 IN MTRR_MEMORY_CACHE_TYPE Type
,
513 IN OUT UINT64
*Length
,
514 IN OUT UINT32
*LastMsrIndex
,
515 OUT UINT64
*ClearMask
,
520 UINT32 LeftByteShift
;
521 UINT32 RightByteShift
;
525 // Find the fixed MTRR index to be programmed
527 for (MsrIndex
= *LastMsrIndex
+ 1; MsrIndex
< ARRAY_SIZE (mMtrrLibFixedMtrrTable
); MsrIndex
++) {
528 if ((*Base
>= mMtrrLibFixedMtrrTable
[MsrIndex
].BaseAddress
) &&
531 mMtrrLibFixedMtrrTable
[MsrIndex
].BaseAddress
+
532 (8 * mMtrrLibFixedMtrrTable
[MsrIndex
].Length
)
540 ASSERT (MsrIndex
!= ARRAY_SIZE (mMtrrLibFixedMtrrTable
));
543 // Find the begin offset in fixed MTRR and calculate byte offset of left shift
545 if ((((UINT32
)*Base
- mMtrrLibFixedMtrrTable
[MsrIndex
].BaseAddress
) % mMtrrLibFixedMtrrTable
[MsrIndex
].Length
) != 0) {
547 // Base address should be aligned to the begin of a certain Fixed MTRR range.
549 return RETURN_UNSUPPORTED
;
551 LeftByteShift
= ((UINT32
)*Base
- mMtrrLibFixedMtrrTable
[MsrIndex
].BaseAddress
) / mMtrrLibFixedMtrrTable
[MsrIndex
].Length
;
552 ASSERT (LeftByteShift
< 8);
555 // Find the end offset in fixed MTRR and calculate byte offset of right shift
557 SubLength
= mMtrrLibFixedMtrrTable
[MsrIndex
].Length
* (8 - LeftByteShift
);
558 if (*Length
>= SubLength
) {
561 if (((UINT32
)(*Length
) % mMtrrLibFixedMtrrTable
[MsrIndex
].Length
) != 0) {
563 // Length should be aligned to the end of a certain Fixed MTRR range.
565 return RETURN_UNSUPPORTED
;
567 RightByteShift
= 8 - LeftByteShift
- (UINT32
)(*Length
) / mMtrrLibFixedMtrrTable
[MsrIndex
].Length
;
569 // Update SubLength by actual length
574 *ClearMask
= CLEAR_SEED
;
575 *OrMask
= MultU64x32 (OR_SEED
, (UINT32
) Type
);
577 if (LeftByteShift
!= 0) {
579 // Clear the low bits by LeftByteShift
581 *ClearMask
&= LShiftU64 (*ClearMask
, LeftByteShift
* 8);
582 *OrMask
&= LShiftU64 (*OrMask
, LeftByteShift
* 8);
585 if (RightByteShift
!= 0) {
587 // Clear the high bits by RightByteShift
589 *ClearMask
&= RShiftU64 (*ClearMask
, RightByteShift
* 8);
590 *OrMask
&= RShiftU64 (*OrMask
, RightByteShift
* 8);
593 *Length
-= SubLength
;
596 *LastMsrIndex
= MsrIndex
;
598 return RETURN_SUCCESS
;
603 Worker function gets the attribute of variable MTRRs.
605 This function shadows the content of variable MTRRs into an
606 internal array: VariableMtrr.
608 @param[in] VariableSettings The variable MTRR values to shadow
609 @param[in] VariableMtrrCount The number of variable MTRRs
610 @param[in] MtrrValidBitsMask The mask for the valid bit of the MTRR
611 @param[in] MtrrValidAddressMask The valid address mask for MTRR
612 @param[out] VariableMtrr The array to shadow variable MTRRs content
614 @return Number of MTRRs which has been used.
618 MtrrGetMemoryAttributeInVariableMtrrWorker (
619 IN MTRR_VARIABLE_SETTINGS
*VariableSettings
,
620 IN UINTN VariableMtrrCount
,
621 IN UINT64 MtrrValidBitsMask
,
622 IN UINT64 MtrrValidAddressMask
,
623 OUT VARIABLE_MTRR
*VariableMtrr
629 ZeroMem (VariableMtrr
, sizeof (VARIABLE_MTRR
) * ARRAY_SIZE (VariableSettings
->Mtrr
));
630 for (Index
= 0, UsedMtrr
= 0; Index
< VariableMtrrCount
; Index
++) {
631 if (((MSR_IA32_MTRR_PHYSMASK_REGISTER
*) &VariableSettings
->Mtrr
[Index
].Mask
)->Bits
.V
!= 0) {
632 VariableMtrr
[Index
].Msr
= (UINT32
)Index
;
633 VariableMtrr
[Index
].BaseAddress
= (VariableSettings
->Mtrr
[Index
].Base
& MtrrValidAddressMask
);
634 VariableMtrr
[Index
].Length
=
635 ((~(VariableSettings
->Mtrr
[Index
].Mask
& MtrrValidAddressMask
)) & MtrrValidBitsMask
) + 1;
636 VariableMtrr
[Index
].Type
= (VariableSettings
->Mtrr
[Index
].Base
& 0x0ff);
637 VariableMtrr
[Index
].Valid
= TRUE
;
638 VariableMtrr
[Index
].Used
= TRUE
;
646 Convert variable MTRRs to a RAW MTRR_MEMORY_RANGE array.
647 One MTRR_MEMORY_RANGE element is created for each MTRR setting.
648 The routine doesn't remove the overlap or combine the near-by region.
650 @param[in] VariableSettings The variable MTRR values to shadow
651 @param[in] VariableMtrrCount The number of variable MTRRs
652 @param[in] MtrrValidBitsMask The mask for the valid bit of the MTRR
653 @param[in] MtrrValidAddressMask The valid address mask for MTRR
654 @param[out] VariableMtrr The array to shadow variable MTRRs content
656 @return Number of MTRRs which has been used.
660 MtrrLibGetRawVariableRanges (
661 IN MTRR_VARIABLE_SETTINGS
*VariableSettings
,
662 IN UINTN VariableMtrrCount
,
663 IN UINT64 MtrrValidBitsMask
,
664 IN UINT64 MtrrValidAddressMask
,
665 OUT MTRR_MEMORY_RANGE
*VariableMtrr
671 ZeroMem (VariableMtrr
, sizeof (MTRR_MEMORY_RANGE
) * ARRAY_SIZE (VariableSettings
->Mtrr
));
672 for (Index
= 0, UsedMtrr
= 0; Index
< VariableMtrrCount
; Index
++) {
673 if (((MSR_IA32_MTRR_PHYSMASK_REGISTER
*) &VariableSettings
->Mtrr
[Index
].Mask
)->Bits
.V
!= 0) {
674 VariableMtrr
[Index
].BaseAddress
= (VariableSettings
->Mtrr
[Index
].Base
& MtrrValidAddressMask
);
675 VariableMtrr
[Index
].Length
=
676 ((~(VariableSettings
->Mtrr
[Index
].Mask
& MtrrValidAddressMask
)) & MtrrValidBitsMask
) + 1;
677 VariableMtrr
[Index
].Type
= (MTRR_MEMORY_CACHE_TYPE
)(VariableSettings
->Mtrr
[Index
].Base
& 0x0ff);
685 Gets the attribute of variable MTRRs.
687 This function shadows the content of variable MTRRs into an
688 internal array: VariableMtrr.
690 @param[in] MtrrValidBitsMask The mask for the valid bit of the MTRR
691 @param[in] MtrrValidAddressMask The valid address mask for MTRR
692 @param[out] VariableMtrr The array to shadow variable MTRRs content
694 @return The return value of this parameter indicates the
695 number of MTRRs which has been used.
700 MtrrGetMemoryAttributeInVariableMtrr (
701 IN UINT64 MtrrValidBitsMask
,
702 IN UINT64 MtrrValidAddressMask
,
703 OUT VARIABLE_MTRR
*VariableMtrr
706 MTRR_VARIABLE_SETTINGS VariableSettings
;
708 if (!IsMtrrSupported ()) {
712 MtrrGetVariableMtrrWorker (
714 GetVariableMtrrCountWorker (),
718 return MtrrGetMemoryAttributeInVariableMtrrWorker (
720 GetFirmwareVariableMtrrCountWorker (),
722 MtrrValidAddressMask
,
728 Return the biggest alignment (lowest set bit) of address.
729 The function is equivalent to: 1 << LowBitSet64 (Address).
731 @param Address The address to return the alignment.
732 @param Alignment0 The alignment to return when Address is 0.
734 @return The least alignment of the Address.
737 MtrrLibBiggestAlignment (
746 return Address
& ((~Address
) + 1);
750 Return whether the left MTRR type precedes the right MTRR type.
752 The MTRR type precedence rules are:
753 1. UC precedes any other type
755 For further details, please refer the IA32 Software Developer's Manual,
756 Volume 3, Section "MTRR Precedences".
758 @param Left The left MTRR type.
759 @param Right The right MTRR type.
761 @retval TRUE Left precedes Right.
762 @retval FALSE Left doesn't precede Right.
765 MtrrLibTypeLeftPrecedeRight (
766 IN MTRR_MEMORY_CACHE_TYPE Left
,
767 IN MTRR_MEMORY_CACHE_TYPE Right
770 return (BOOLEAN
) (Left
== CacheUncacheable
|| (Left
== CacheWriteThrough
&& Right
== CacheWriteBack
));
774 Initializes the valid bits mask and valid address mask for MTRRs.
776 This function initializes the valid bits mask and valid address mask for MTRRs.
778 @param[out] MtrrValidBitsMask The mask for the valid bit of the MTRR
779 @param[out] MtrrValidAddressMask The valid address mask for the MTRR
783 MtrrLibInitializeMtrrMask (
784 OUT UINT64
*MtrrValidBitsMask
,
785 OUT UINT64
*MtrrValidAddressMask
788 UINT32 MaxExtendedFunction
;
789 CPUID_VIR_PHY_ADDRESS_SIZE_EAX VirPhyAddressSize
;
792 AsmCpuid (CPUID_EXTENDED_FUNCTION
, &MaxExtendedFunction
, NULL
, NULL
, NULL
);
794 if (MaxExtendedFunction
>= CPUID_VIR_PHY_ADDRESS_SIZE
) {
795 AsmCpuid (CPUID_VIR_PHY_ADDRESS_SIZE
, &VirPhyAddressSize
.Uint32
, NULL
, NULL
, NULL
);
797 VirPhyAddressSize
.Bits
.PhysicalAddressBits
= 36;
800 *MtrrValidBitsMask
= LShiftU64 (1, VirPhyAddressSize
.Bits
.PhysicalAddressBits
) - 1;
801 *MtrrValidAddressMask
= *MtrrValidBitsMask
& 0xfffffffffffff000ULL
;
806 Determines the real attribute of a memory range.
808 This function is to arbitrate the real attribute of the memory when
809 there are 2 MTRRs covers the same memory range. For further details,
810 please refer the IA32 Software Developer's Manual, Volume 3,
811 Section "MTRR Precedences".
813 @param[in] MtrrType1 The first kind of Memory type
814 @param[in] MtrrType2 The second kind of memory type
817 MTRR_MEMORY_CACHE_TYPE
819 IN MTRR_MEMORY_CACHE_TYPE MtrrType1
,
820 IN MTRR_MEMORY_CACHE_TYPE MtrrType2
823 if (MtrrType1
== MtrrType2
) {
828 MtrrLibTypeLeftPrecedeRight (MtrrType1
, MtrrType2
) ||
829 MtrrLibTypeLeftPrecedeRight (MtrrType2
, MtrrType1
)
832 if (MtrrLibTypeLeftPrecedeRight (MtrrType1
, MtrrType2
)) {
840 Worker function will get the memory cache type of the specific address.
842 If MtrrSetting is not NULL, gets the memory cache type from input
843 MTRR settings buffer.
844 If MtrrSetting is NULL, gets the memory cache type from MTRRs.
846 @param[in] MtrrSetting A buffer holding all MTRRs content.
847 @param[in] Address The specific address
849 @return Memory cache type of the specific address
852 MTRR_MEMORY_CACHE_TYPE
853 MtrrGetMemoryAttributeByAddressWorker (
854 IN MTRR_SETTINGS
*MtrrSetting
,
855 IN PHYSICAL_ADDRESS Address
858 MSR_IA32_MTRR_DEF_TYPE_REGISTER DefType
;
862 MTRR_MEMORY_CACHE_TYPE MtrrType
;
863 MTRR_MEMORY_RANGE VariableMtrr
[ARRAY_SIZE (MtrrSetting
->Variables
.Mtrr
)];
864 UINT64 MtrrValidBitsMask
;
865 UINT64 MtrrValidAddressMask
;
866 UINT32 VariableMtrrCount
;
867 MTRR_VARIABLE_SETTINGS VariableSettings
;
870 // Check if MTRR is enabled, if not, return UC as attribute
872 if (MtrrSetting
== NULL
) {
873 DefType
.Uint64
= AsmReadMsr64 (MSR_IA32_MTRR_DEF_TYPE
);
875 DefType
.Uint64
= MtrrSetting
->MtrrDefType
;
878 if (DefType
.Bits
.E
== 0) {
879 return CacheUncacheable
;
883 // If address is less than 1M, then try to go through the fixed MTRR
885 if (Address
< BASE_1MB
) {
886 if (DefType
.Bits
.FE
!= 0) {
888 // Go through the fixed MTRR
890 for (Index
= 0; Index
< MTRR_NUMBER_OF_FIXED_MTRR
; Index
++) {
891 if (Address
>= mMtrrLibFixedMtrrTable
[Index
].BaseAddress
&&
892 Address
< mMtrrLibFixedMtrrTable
[Index
].BaseAddress
+
893 (mMtrrLibFixedMtrrTable
[Index
].Length
* 8)) {
895 ((UINTN
) Address
- mMtrrLibFixedMtrrTable
[Index
].BaseAddress
) /
896 mMtrrLibFixedMtrrTable
[Index
].Length
;
897 if (MtrrSetting
== NULL
) {
898 FixedMtrr
= AsmReadMsr64 (mMtrrLibFixedMtrrTable
[Index
].Msr
);
900 FixedMtrr
= MtrrSetting
->Fixed
.Mtrr
[Index
];
902 return (MTRR_MEMORY_CACHE_TYPE
) (RShiftU64 (FixedMtrr
, SubIndex
* 8) & 0xFF);
908 VariableMtrrCount
= GetVariableMtrrCountWorker ();
909 ASSERT (VariableMtrrCount
<= ARRAY_SIZE (MtrrSetting
->Variables
.Mtrr
));
910 MtrrGetVariableMtrrWorker (MtrrSetting
, VariableMtrrCount
, &VariableSettings
);
912 MtrrLibInitializeMtrrMask (&MtrrValidBitsMask
, &MtrrValidAddressMask
);
913 MtrrLibGetRawVariableRanges (
917 MtrrValidAddressMask
,
922 // Go through the variable MTRR
924 MtrrType
= CacheInvalid
;
925 for (Index
= 0; Index
< VariableMtrrCount
; Index
++) {
926 if (VariableMtrr
[Index
].Length
!= 0) {
927 if (Address
>= VariableMtrr
[Index
].BaseAddress
&&
928 Address
< VariableMtrr
[Index
].BaseAddress
+ VariableMtrr
[Index
].Length
) {
929 if (MtrrType
== CacheInvalid
) {
930 MtrrType
= (MTRR_MEMORY_CACHE_TYPE
) VariableMtrr
[Index
].Type
;
932 MtrrType
= MtrrLibPrecedence (MtrrType
, (MTRR_MEMORY_CACHE_TYPE
) VariableMtrr
[Index
].Type
);
939 // If there is no MTRR which covers the Address, use the default MTRR type.
941 if (MtrrType
== CacheInvalid
) {
942 MtrrType
= (MTRR_MEMORY_CACHE_TYPE
) DefType
.Bits
.Type
;
950 This function will get the memory cache type of the specific address.
952 This function is mainly for debug purpose.
954 @param[in] Address The specific address
956 @return Memory cache type of the specific address
959 MTRR_MEMORY_CACHE_TYPE
961 MtrrGetMemoryAttribute (
962 IN PHYSICAL_ADDRESS Address
965 if (!IsMtrrSupported ()) {
966 return CacheUncacheable
;
969 return MtrrGetMemoryAttributeByAddressWorker (NULL
, Address
);
973 Update the Ranges array to change the specified range identified by
974 BaseAddress and Length to Type.
976 @param Ranges Array holding memory type settings for all memory regions.
977 @param Capacity The maximum count of memory ranges the array can hold.
978 @param Count Return the new memory range count in the array.
979 @param BaseAddress The base address of the memory range to change type.
980 @param Length The length of the memory range to change type.
981 @param Type The new type of the specified memory range.
983 @retval RETURN_SUCCESS The type of the specified memory range is
984 changed successfully.
985 @retval RETURN_ALREADY_STARTED The type of the specified memory range equals
987 @retval RETURN_OUT_OF_RESOURCES The new type set causes the count of memory
988 range exceeds capacity.
991 MtrrLibSetMemoryType (
992 IN MTRR_MEMORY_RANGE
*Ranges
,
995 IN UINT64 BaseAddress
,
997 IN MTRR_MEMORY_CACHE_TYPE Type
1010 Limit
= BaseAddress
+ Length
;
1011 StartIndex
= *Count
;
1013 for (Index
= 0; Index
< *Count
; Index
++) {
1014 if ((StartIndex
== *Count
) &&
1015 (Ranges
[Index
].BaseAddress
<= BaseAddress
) &&
1016 (BaseAddress
< Ranges
[Index
].BaseAddress
+ Ranges
[Index
].Length
)) {
1018 LengthLeft
= BaseAddress
- Ranges
[Index
].BaseAddress
;
1021 if ((EndIndex
== *Count
) &&
1022 (Ranges
[Index
].BaseAddress
< Limit
) &&
1023 (Limit
<= Ranges
[Index
].BaseAddress
+ Ranges
[Index
].Length
)) {
1025 LengthRight
= Ranges
[Index
].BaseAddress
+ Ranges
[Index
].Length
- Limit
;
1030 ASSERT (StartIndex
!= *Count
&& EndIndex
!= *Count
);
1031 if (StartIndex
== EndIndex
&& Ranges
[StartIndex
].Type
== Type
) {
1032 return RETURN_ALREADY_STARTED
;
1036 // The type change may cause merging with previous range or next range.
1037 // Update the StartIndex, EndIndex, BaseAddress, Length so that following
1038 // logic doesn't need to consider merging.
1040 if (StartIndex
!= 0) {
1041 if (LengthLeft
== 0 && Ranges
[StartIndex
- 1].Type
== Type
) {
1043 Length
+= Ranges
[StartIndex
].Length
;
1044 BaseAddress
-= Ranges
[StartIndex
].Length
;
1047 if (EndIndex
!= (*Count
) - 1) {
1048 if (LengthRight
== 0 && Ranges
[EndIndex
+ 1].Type
== Type
) {
1050 Length
+= Ranges
[EndIndex
].Length
;
1055 // |- 0 -|- 1 -|- 2 -|- 3 -| StartIndex EndIndex DeltaCount Count (Count = 4)
1056 // |++++++++++++++++++| 0 3 1=3-0-2 3
1057 // |+++++++| 0 1 -1=1-0-2 5
1058 // |+| 0 0 -2=0-0-2 6
1059 // |+++| 0 0 -1=0-0-2+1 5
1062 DeltaCount
= EndIndex
- StartIndex
- 2;
1063 if (LengthLeft
== 0) {
1066 if (LengthRight
== 0) {
1069 if (*Count
- DeltaCount
> Capacity
) {
1070 return RETURN_OUT_OF_RESOURCES
;
1074 // Reserve (-DeltaCount) space
1076 CopyMem (&Ranges
[EndIndex
+ 1 - DeltaCount
], &Ranges
[EndIndex
+ 1], (*Count
- EndIndex
- 1) * sizeof (Ranges
[0]));
1077 *Count
-= DeltaCount
;
1079 if (LengthLeft
!= 0) {
1080 Ranges
[StartIndex
].Length
= LengthLeft
;
1083 if (LengthRight
!= 0) {
1084 Ranges
[EndIndex
- DeltaCount
].BaseAddress
= BaseAddress
+ Length
;
1085 Ranges
[EndIndex
- DeltaCount
].Length
= LengthRight
;
1086 Ranges
[EndIndex
- DeltaCount
].Type
= Ranges
[EndIndex
].Type
;
1088 Ranges
[StartIndex
].BaseAddress
= BaseAddress
;
1089 Ranges
[StartIndex
].Length
= Length
;
1090 Ranges
[StartIndex
].Type
= Type
;
1091 return RETURN_SUCCESS
;
1095 Return the number of memory types in range [BaseAddress, BaseAddress + Length).
1097 @param Ranges Array holding memory type settings for all memory regions.
1098 @param RangeCount The count of memory ranges the array holds.
1099 @param BaseAddress Base address.
1100 @param Length Length.
1101 @param Types Return bit mask to indicate all memory types in the specified range.
1103 @retval Number of memory types.
1106 MtrrLibGetNumberOfTypes (
1107 IN CONST MTRR_MEMORY_RANGE
*Ranges
,
1108 IN UINTN RangeCount
,
1109 IN UINT64 BaseAddress
,
1111 IN OUT UINT8
*Types OPTIONAL
1120 for (Index
= 0; Index
< RangeCount
; Index
++) {
1121 if ((Ranges
[Index
].BaseAddress
<= BaseAddress
) &&
1122 (BaseAddress
< Ranges
[Index
].BaseAddress
+ Ranges
[Index
].Length
)
1124 if ((LocalTypes
& (1 << Ranges
[Index
].Type
)) == 0) {
1125 LocalTypes
|= (UINT8
)(1 << Ranges
[Index
].Type
);
1129 if (BaseAddress
+ Length
> Ranges
[Index
].BaseAddress
+ Ranges
[Index
].Length
) {
1130 Length
-= Ranges
[Index
].BaseAddress
+ Ranges
[Index
].Length
- BaseAddress
;
1131 BaseAddress
= Ranges
[Index
].BaseAddress
+ Ranges
[Index
].Length
;
1138 if (Types
!= NULL
) {
1139 *Types
= LocalTypes
;
1145 Calculate the least MTRR number from vertex Start to Stop and update
1146 the Previous of all vertices from Start to Stop is updated to reflect
1147 how the memory range is covered by MTRR.
1149 @param VertexCount The count of vertices in the graph.
1150 @param Vertices Array holding all vertices.
1151 @param Weight 2-dimention array holding weights between vertices.
1152 @param Start Start vertex.
1153 @param Stop Stop vertex.
1154 @param IncludeOptional TRUE to count the optional weight.
1157 MtrrLibCalculateLeastMtrrs (
1158 IN UINT16 VertexCount
,
1159 IN MTRR_LIB_ADDRESS
*Vertices
,
1160 IN OUT CONST UINT8
*Weight
,
1163 IN BOOLEAN IncludeOptional
1172 for (Index
= Start
; Index
<= Stop
; Index
++) {
1173 Vertices
[Index
].Visited
= FALSE
;
1174 Mandatory
= Weight
[M(Start
,Index
)];
1175 Vertices
[Index
].Weight
= Mandatory
;
1176 if (Mandatory
!= MAX_WEIGHT
) {
1177 Optional
= IncludeOptional
? Weight
[O(Start
, Index
)] : 0;
1178 Vertices
[Index
].Weight
+= Optional
;
1179 ASSERT (Vertices
[Index
].Weight
>= Optional
);
1185 while (!Vertices
[Stop
].Visited
) {
1187 // Update the weight from the shortest vertex to other unvisited vertices
1189 for (Index
= Start
+ 1; Index
<= Stop
; Index
++) {
1190 if (!Vertices
[Index
].Visited
) {
1191 Mandatory
= Weight
[M(MinI
, Index
)];
1192 if (Mandatory
!= MAX_WEIGHT
) {
1193 Optional
= IncludeOptional
? Weight
[O(MinI
, Index
)] : 0;
1194 if (MinWeight
+ Mandatory
+ Optional
<= Vertices
[Index
].Weight
) {
1195 Vertices
[Index
].Weight
= MinWeight
+ Mandatory
+ Optional
;
1196 Vertices
[Index
].Previous
= MinI
; // Previous is Start based.
1203 // Find the shortest vertex from Start
1206 MinWeight
= MAX_WEIGHT
;
1207 for (Index
= Start
+ 1; Index
<= Stop
; Index
++) {
1208 if (!Vertices
[Index
].Visited
&& MinWeight
> Vertices
[Index
].Weight
) {
1210 MinWeight
= Vertices
[Index
].Weight
;
1215 // Mark the shortest vertex from Start as visited
1217 Vertices
[MinI
].Visited
= TRUE
;
1222 Append the MTRR setting to MTRR setting array.
1224 @param Mtrrs Array holding all MTRR settings.
1225 @param MtrrCapacity Capacity of the MTRR array.
1226 @param MtrrCount The count of MTRR settings in array.
1227 @param BaseAddress Base address.
1228 @param Length Length.
1229 @param Type Memory type.
1231 @retval RETURN_SUCCESS MTRR setting is appended to array.
1232 @retval RETURN_OUT_OF_RESOURCES Array is full.
1235 MtrrLibAppendVariableMtrr (
1236 IN OUT MTRR_MEMORY_RANGE
*Mtrrs
,
1237 IN UINT32 MtrrCapacity
,
1238 IN OUT UINT32
*MtrrCount
,
1239 IN UINT64 BaseAddress
,
1241 IN MTRR_MEMORY_CACHE_TYPE Type
1244 if (*MtrrCount
== MtrrCapacity
) {
1245 return RETURN_OUT_OF_RESOURCES
;
1248 Mtrrs
[*MtrrCount
].BaseAddress
= BaseAddress
;
1249 Mtrrs
[*MtrrCount
].Length
= Length
;
1250 Mtrrs
[*MtrrCount
].Type
= Type
;
1252 return RETURN_SUCCESS
;
1256 Return the memory type that has the least precedence.
1258 @param TypeBits Bit mask of memory type.
1260 @retval Memory type that has the least precedence.
1262 MTRR_MEMORY_CACHE_TYPE
1269 ASSERT (TypeBits
!= 0);
1270 for (Type
= 7; (INT8
)TypeBits
> 0; Type
--, TypeBits
<<= 1);
1271 return (MTRR_MEMORY_CACHE_TYPE
)Type
;
1275 Return TRUE when the Operand is exactly power of 2.
1277 @retval TRUE Operand is exactly power of 2.
1278 @retval FALSE Operand is not power of 2.
1281 MtrrLibIsPowerOfTwo (
1285 ASSERT (Operand
!= 0);
1286 return (BOOLEAN
) ((Operand
& (Operand
- 1)) == 0);
1290 Calculate the subtractive path from vertex Start to Stop.
1292 @param DefaultType Default memory type.
1293 @param A0 Alignment to use when base address is 0.
1294 @param Ranges Array holding memory type settings for all memory regions.
1295 @param RangeCount The count of memory ranges the array holds.
1296 @param VertexCount The count of vertices in the graph.
1297 @param Vertices Array holding all vertices.
1298 @param Weight 2-dimention array holding weights between vertices.
1299 @param Start Start vertex.
1300 @param Stop Stop vertex.
1301 @param Types Type bit mask of memory range from Start to Stop.
1302 @param TypeCount Number of different memory types from Start to Stop.
1303 @param Mtrrs Array holding all MTRR settings.
1304 @param MtrrCapacity Capacity of the MTRR array.
1305 @param MtrrCount The count of MTRR settings in array.
1307 @retval RETURN_SUCCESS The subtractive path is calculated successfully.
1308 @retval RETURN_OUT_OF_RESOURCES The MTRR setting array is full.
1312 MtrrLibCalculateSubtractivePath (
1313 IN MTRR_MEMORY_CACHE_TYPE DefaultType
,
1315 IN CONST MTRR_MEMORY_RANGE
*Ranges
,
1316 IN UINTN RangeCount
,
1317 IN UINT16 VertexCount
,
1318 IN MTRR_LIB_ADDRESS
*Vertices
,
1319 IN OUT UINT8
*Weight
,
1324 IN OUT MTRR_MEMORY_RANGE
*Mtrrs
, OPTIONAL
1325 IN UINT32 MtrrCapacity
, OPTIONAL
1326 IN OUT UINT32
*MtrrCount OPTIONAL
1329 RETURN_STATUS Status
;
1332 UINT8 PrecedentTypes
;
1341 MTRR_MEMORY_CACHE_TYPE LowestType
;
1342 MTRR_MEMORY_CACHE_TYPE LowestPrecedentType
;
1344 Base
= Vertices
[Start
].Address
;
1345 Length
= Vertices
[Stop
].Address
- Base
;
1347 LowestType
= MtrrLibLowestType (Types
);
1350 // Clear the lowest type (highest bit) to get the precedent types
1352 PrecedentTypes
= ~(1 << LowestType
) & Types
;
1353 LowestPrecedentType
= MtrrLibLowestType (PrecedentTypes
);
1355 if (Mtrrs
== NULL
) {
1356 Weight
[M(Start
, Stop
)] = ((LowestType
== DefaultType
) ? 0 : 1);
1357 Weight
[O(Start
, Stop
)] = ((LowestType
== DefaultType
) ? 1 : 0);
1360 // Add all high level ranges
1363 for (Index
= 0; Index
< RangeCount
; Index
++) {
1367 if ((Base
< Ranges
[Index
].BaseAddress
) || (Ranges
[Index
].BaseAddress
+ Ranges
[Index
].Length
<= Base
)) {
1372 // Base is in the Range[Index]
1374 if (Base
+ Length
> Ranges
[Index
].BaseAddress
+ Ranges
[Index
].Length
) {
1375 SubLength
= Ranges
[Index
].BaseAddress
+ Ranges
[Index
].Length
- Base
;
1379 if (((1 << Ranges
[Index
].Type
) & PrecedentTypes
) != 0) {
1381 // Meet a range whose types take precedence.
1382 // Update the [HBase, HBase + HLength) to include the range,
1383 // [HBase, HBase + HLength) may contain sub ranges with 2 different types, and both take precedence.
1385 if (HBase
== MAX_UINT64
) {
1388 HLength
+= SubLength
;
1392 Length
-= SubLength
;
1398 if ((Ranges
[Index
].Type
== LowestType
) || (Length
== 0)) { // meet low type or end
1401 // Add the MTRRs for each high priority type range
1402 // the range[HBase, HBase + HLength) contains only two types.
1403 // We might use positive or subtractive, depending on which way uses less MTRR
1405 for (SubStart
= Start
; SubStart
<= Stop
; SubStart
++) {
1406 if (Vertices
[SubStart
].Address
== HBase
) {
1411 for (SubStop
= SubStart
; SubStop
<= Stop
; SubStop
++) {
1412 if (Vertices
[SubStop
].Address
== HBase
+ HLength
) {
1416 ASSERT (Vertices
[SubStart
].Address
== HBase
);
1417 ASSERT (Vertices
[SubStop
].Address
== HBase
+ HLength
);
1419 if ((TypeCount
== 2) || (SubStart
== SubStop
- 1)) {
1421 // add subtractive MTRRs for [HBase, HBase + HLength)
1422 // [HBase, HBase + HLength) contains only one type.
1423 // while - loop is to split the range to MTRR - compliant aligned range.
1425 if (Mtrrs
== NULL
) {
1426 Weight
[M (Start
, Stop
)] += (UINT8
)(SubStop
- SubStart
);
1428 while (SubStart
!= SubStop
) {
1429 Status
= MtrrLibAppendVariableMtrr (
1430 Mtrrs
, MtrrCapacity
, MtrrCount
,
1431 Vertices
[SubStart
].Address
, Vertices
[SubStart
].Length
, Vertices
[SubStart
].Type
1433 if (RETURN_ERROR (Status
)) {
1440 ASSERT (TypeCount
== 3);
1441 MtrrLibCalculateLeastMtrrs (VertexCount
, Vertices
, Weight
, SubStart
, SubStop
, TRUE
);
1443 if (Mtrrs
== NULL
) {
1444 Weight
[M (Start
, Stop
)] += Vertices
[SubStop
].Weight
;
1446 // When we need to collect the optimal path from SubStart to SubStop
1447 while (SubStop
!= SubStart
) {
1449 Pre
= Vertices
[Cur
].Previous
;
1452 if (Weight
[M (Pre
, Cur
)] + Weight
[O (Pre
, Cur
)] != 0) {
1453 Status
= MtrrLibAppendVariableMtrr (
1454 Mtrrs
, MtrrCapacity
, MtrrCount
,
1455 Vertices
[Pre
].Address
, Vertices
[Cur
].Address
- Vertices
[Pre
].Address
,
1456 (Pre
!= Cur
- 1) ? LowestPrecedentType
: Vertices
[Pre
].Type
1458 if (RETURN_ERROR (Status
)) {
1462 if (Pre
!= Cur
- 1) {
1463 Status
= MtrrLibCalculateSubtractivePath (
1466 VertexCount
, Vertices
, Weight
,
1467 Pre
, Cur
, PrecedentTypes
, 2,
1468 Mtrrs
, MtrrCapacity
, MtrrCount
1470 if (RETURN_ERROR (Status
)) {
1479 // Reset HBase, HLength
1485 return RETURN_SUCCESS
;
1489 Calculate MTRR settings to cover the specified memory ranges.
1491 @param DefaultType Default memory type.
1492 @param A0 Alignment to use when base address is 0.
1493 @param Ranges Memory range array holding the memory type
1494 settings for all memory address.
1495 @param RangeCount Count of memory ranges.
1496 @param Scratch A temporary scratch buffer that is used to perform the calculation.
1497 This is an optional parameter that may be NULL.
1498 @param ScratchSize Pointer to the size in bytes of the scratch buffer.
1499 It may be updated to the actual required size when the calculation
1500 needs more scratch buffer.
1501 @param Mtrrs Array holding all MTRR settings.
1502 @param MtrrCapacity Capacity of the MTRR array.
1503 @param MtrrCount The count of MTRR settings in array.
1505 @retval RETURN_SUCCESS Variable MTRRs are allocated successfully.
1506 @retval RETURN_OUT_OF_RESOURCES Count of variable MTRRs exceeds capacity.
1507 @retval RETURN_BUFFER_TOO_SMALL The scratch buffer is too small for MTRR calculation.
1510 MtrrLibCalculateMtrrs (
1511 IN MTRR_MEMORY_CACHE_TYPE DefaultType
,
1513 IN CONST MTRR_MEMORY_RANGE
*Ranges
,
1514 IN UINTN RangeCount
,
1516 IN OUT UINTN
*ScratchSize
,
1517 IN OUT MTRR_MEMORY_RANGE
*Mtrrs
,
1518 IN UINT32 MtrrCapacity
,
1519 IN OUT UINT32
*MtrrCount
1529 MTRR_LIB_ADDRESS
*Vertices
;
1533 UINTN RequiredScratchSize
;
1538 RETURN_STATUS Status
;
1540 Base0
= Ranges
[0].BaseAddress
;
1541 Base1
= Ranges
[RangeCount
- 1].BaseAddress
+ Ranges
[RangeCount
- 1].Length
;
1542 MTRR_LIB_ASSERT_ALIGNED (Base0
, Base1
- Base0
);
1545 // Count the number of vertices.
1547 Vertices
= (MTRR_LIB_ADDRESS
*)Scratch
;
1548 for (VertexIndex
= 0, Index
= 0; Index
< RangeCount
; Index
++) {
1549 Base
= Ranges
[Index
].BaseAddress
;
1550 Length
= Ranges
[Index
].Length
;
1551 while (Length
!= 0) {
1552 Alignment
= MtrrLibBiggestAlignment (Base
, A0
);
1553 SubLength
= Alignment
;
1554 if (SubLength
> Length
) {
1555 SubLength
= GetPowerOfTwo64 (Length
);
1557 if (VertexIndex
< *ScratchSize
/ sizeof (*Vertices
)) {
1558 Vertices
[VertexIndex
].Address
= Base
;
1559 Vertices
[VertexIndex
].Alignment
= Alignment
;
1560 Vertices
[VertexIndex
].Type
= Ranges
[Index
].Type
;
1561 Vertices
[VertexIndex
].Length
= SubLength
;
1564 Length
-= SubLength
;
1569 // Vertices[VertexIndex] = Base1, so whole vertex count is (VertexIndex + 1).
1571 VertexCount
= VertexIndex
+ 1;
1573 DEBUG_CACHE
, " Count of vertices (%016llx - %016llx) = %d\n",
1574 Ranges
[0].BaseAddress
, Ranges
[RangeCount
- 1].BaseAddress
+ Ranges
[RangeCount
- 1].Length
, VertexCount
1576 ASSERT (VertexCount
< MAX_UINT16
);
1578 RequiredScratchSize
= VertexCount
* sizeof (*Vertices
) + VertexCount
* VertexCount
* sizeof (*Weight
);
1579 if (*ScratchSize
< RequiredScratchSize
) {
1580 *ScratchSize
= RequiredScratchSize
;
1581 return RETURN_BUFFER_TOO_SMALL
;
1583 Vertices
[VertexCount
- 1].Address
= Base1
;
1585 Weight
= (UINT8
*) &Vertices
[VertexCount
];
1586 for (VertexIndex
= 0; VertexIndex
< VertexCount
; VertexIndex
++) {
1588 // Set optional weight between vertices and self->self to 0
1590 SetMem (&Weight
[M(VertexIndex
, 0)], VertexIndex
+ 1, 0);
1592 // Set mandatory weight between vertices to MAX_WEIGHT
1594 SetMem (&Weight
[M (VertexIndex
, VertexIndex
+ 1)], VertexCount
- VertexIndex
- 1, MAX_WEIGHT
);
1596 // Final result looks like:
1604 // Set mandatory weight and optional weight for adjacent vertices
1606 for (VertexIndex
= 0; VertexIndex
< VertexCount
- 1; VertexIndex
++) {
1607 if (Vertices
[VertexIndex
].Type
!= DefaultType
) {
1608 Weight
[M (VertexIndex
, VertexIndex
+ 1)] = 1;
1609 Weight
[O (VertexIndex
, VertexIndex
+ 1)] = 0;
1611 Weight
[M (VertexIndex
, VertexIndex
+ 1)] = 0;
1612 Weight
[O (VertexIndex
, VertexIndex
+ 1)] = 1;
1616 for (TypeCount
= 2; TypeCount
<= 3; TypeCount
++) {
1617 for (Start
= 0; Start
< VertexCount
; Start
++) {
1618 for (Stop
= Start
+ 2; Stop
< VertexCount
; Stop
++) {
1619 ASSERT (Vertices
[Stop
].Address
> Vertices
[Start
].Address
);
1620 Length
= Vertices
[Stop
].Address
- Vertices
[Start
].Address
;
1621 if (Length
> Vertices
[Start
].Alignment
) {
1623 // Pickup a new Start when [Start, Stop) cannot be described by one MTRR.
1627 if ((Weight
[M(Start
, Stop
)] == MAX_WEIGHT
) && MtrrLibIsPowerOfTwo (Length
)) {
1628 if (MtrrLibGetNumberOfTypes (
1629 Ranges
, RangeCount
, Vertices
[Start
].Address
, Vertices
[Stop
].Address
- Vertices
[Start
].Address
, &Type
1632 // Update the Weight[Start, Stop] using subtractive path.
1634 MtrrLibCalculateSubtractivePath (
1637 (UINT16
)VertexCount
, Vertices
, Weight
,
1638 Start
, Stop
, Type
, TypeCount
,
1641 } else if (TypeCount
== 2) {
1643 // Pick up a new Start when we expect 2-type range, but 3-type range is met.
1644 // Because no matter how Stop is increased, we always meet 3-type range.
1653 Status
= RETURN_SUCCESS
;
1654 MtrrLibCalculateLeastMtrrs ((UINT16
) VertexCount
, Vertices
, Weight
, 0, (UINT16
) VertexCount
- 1, FALSE
);
1655 Stop
= (UINT16
) VertexCount
- 1;
1657 Start
= Vertices
[Stop
].Previous
;
1658 TypeCount
= MAX_UINT8
;
1660 if (Weight
[M(Start
, Stop
)] != 0) {
1661 TypeCount
= MtrrLibGetNumberOfTypes (Ranges
, RangeCount
, Vertices
[Start
].Address
, Vertices
[Stop
].Address
- Vertices
[Start
].Address
, &Type
);
1662 Status
= MtrrLibAppendVariableMtrr (
1663 Mtrrs
, MtrrCapacity
, MtrrCount
,
1664 Vertices
[Start
].Address
, Vertices
[Stop
].Address
- Vertices
[Start
].Address
,
1665 MtrrLibLowestType (Type
)
1667 if (RETURN_ERROR (Status
)) {
1672 if (Start
!= Stop
- 1) {
1674 // substractive path
1676 if (TypeCount
== MAX_UINT8
) {
1677 TypeCount
= MtrrLibGetNumberOfTypes (
1678 Ranges
, RangeCount
, Vertices
[Start
].Address
, Vertices
[Stop
].Address
- Vertices
[Start
].Address
, &Type
1681 Status
= MtrrLibCalculateSubtractivePath (
1684 (UINT16
) VertexCount
, Vertices
, Weight
, Start
, Stop
,
1686 Mtrrs
, MtrrCapacity
, MtrrCount
1688 if (RETURN_ERROR (Status
)) {
1699 Apply the fixed MTRR settings to memory range array.
1701 @param Fixed The fixed MTRR settings.
1702 @param Ranges Return the memory range array holding memory type
1703 settings for all memory address.
1704 @param RangeCapacity The capacity of memory range array.
1705 @param RangeCount Return the count of memory range.
1707 @retval RETURN_SUCCESS The memory range array is returned successfully.
1708 @retval RETURN_OUT_OF_RESOURCES The count of memory ranges exceeds capacity.
1711 MtrrLibApplyFixedMtrrs (
1712 IN MTRR_FIXED_SETTINGS
*Fixed
,
1713 IN OUT MTRR_MEMORY_RANGE
*Ranges
,
1714 IN UINTN RangeCapacity
,
1715 IN OUT UINTN
*RangeCount
1718 RETURN_STATUS Status
;
1721 MTRR_MEMORY_CACHE_TYPE MemoryType
;
1725 for (MsrIndex
= 0; MsrIndex
< ARRAY_SIZE (mMtrrLibFixedMtrrTable
); MsrIndex
++) {
1726 ASSERT (Base
== mMtrrLibFixedMtrrTable
[MsrIndex
].BaseAddress
);
1727 for (Index
= 0; Index
< sizeof (UINT64
); Index
++) {
1728 MemoryType
= (MTRR_MEMORY_CACHE_TYPE
)((UINT8
*)(&Fixed
->Mtrr
[MsrIndex
]))[Index
];
1729 Status
= MtrrLibSetMemoryType (
1730 Ranges
, RangeCapacity
, RangeCount
, Base
, mMtrrLibFixedMtrrTable
[MsrIndex
].Length
, MemoryType
1732 if (Status
== RETURN_OUT_OF_RESOURCES
) {
1735 Base
+= mMtrrLibFixedMtrrTable
[MsrIndex
].Length
;
1738 ASSERT (Base
== BASE_1MB
);
1739 return RETURN_SUCCESS
;
1743 Apply the variable MTRR settings to memory range array.
1745 @param VariableMtrr The variable MTRR array.
1746 @param VariableMtrrCount The count of variable MTRRs.
1747 @param Ranges Return the memory range array with new MTRR settings applied.
1748 @param RangeCapacity The capacity of memory range array.
1749 @param RangeCount Return the count of memory range.
1751 @retval RETURN_SUCCESS The memory range array is returned successfully.
1752 @retval RETURN_OUT_OF_RESOURCES The count of memory ranges exceeds capacity.
1755 MtrrLibApplyVariableMtrrs (
1756 IN CONST MTRR_MEMORY_RANGE
*VariableMtrr
,
1757 IN UINT32 VariableMtrrCount
,
1758 IN OUT MTRR_MEMORY_RANGE
*Ranges
,
1759 IN UINTN RangeCapacity
,
1760 IN OUT UINTN
*RangeCount
1763 RETURN_STATUS Status
;
1769 // UC > * (except WB, UC) > WB
1775 for (Index
= 0; Index
< VariableMtrrCount
; Index
++) {
1776 if ((VariableMtrr
[Index
].Length
!= 0) && (VariableMtrr
[Index
].Type
== CacheWriteBack
)) {
1777 Status
= MtrrLibSetMemoryType (
1778 Ranges
, RangeCapacity
, RangeCount
,
1779 VariableMtrr
[Index
].BaseAddress
, VariableMtrr
[Index
].Length
, VariableMtrr
[Index
].Type
1781 if (Status
== RETURN_OUT_OF_RESOURCES
) {
1788 // 2. Set other types than WB or UC
1790 for (Index
= 0; Index
< VariableMtrrCount
; Index
++) {
1791 if ((VariableMtrr
[Index
].Length
!= 0) &&
1792 (VariableMtrr
[Index
].Type
!= CacheWriteBack
) && (VariableMtrr
[Index
].Type
!= CacheUncacheable
)) {
1793 Status
= MtrrLibSetMemoryType (
1794 Ranges
, RangeCapacity
, RangeCount
,
1795 VariableMtrr
[Index
].BaseAddress
, VariableMtrr
[Index
].Length
, VariableMtrr
[Index
].Type
1797 if (Status
== RETURN_OUT_OF_RESOURCES
) {
1806 for (Index
= 0; Index
< VariableMtrrCount
; Index
++) {
1807 if (VariableMtrr
[Index
].Length
!= 0 && VariableMtrr
[Index
].Type
== CacheUncacheable
) {
1808 Status
= MtrrLibSetMemoryType (
1809 Ranges
, RangeCapacity
, RangeCount
,
1810 VariableMtrr
[Index
].BaseAddress
, VariableMtrr
[Index
].Length
, VariableMtrr
[Index
].Type
1812 if (Status
== RETURN_OUT_OF_RESOURCES
) {
1817 return RETURN_SUCCESS
;
1821 Return the memory type bit mask that's compatible to first type in the Ranges.
1823 @param Ranges Memory range array holding the memory type
1824 settings for all memory address.
1825 @param RangeCount Count of memory ranges.
1827 @return Compatible memory type bit mask.
1830 MtrrLibGetCompatibleTypes (
1831 IN CONST MTRR_MEMORY_RANGE
*Ranges
,
1835 ASSERT (RangeCount
!= 0);
1837 switch (Ranges
[0].Type
) {
1838 case CacheWriteBack
:
1839 case CacheWriteThrough
:
1840 return (1 << CacheWriteBack
) | (1 << CacheWriteThrough
) | (1 << CacheUncacheable
);
1843 case CacheWriteCombining
:
1844 case CacheWriteProtected
:
1845 return (1 << Ranges
[0].Type
) | (1 << CacheUncacheable
);
1848 case CacheUncacheable
:
1849 if (RangeCount
== 1) {
1850 return (1 << CacheUncacheable
);
1852 return MtrrLibGetCompatibleTypes (&Ranges
[1], RangeCount
- 1);
1864 Overwrite the destination MTRR settings with the source MTRR settings.
1865 This routine is to make sure the modification to destination MTRR settings
1866 is as small as possible.
1868 @param DstMtrrs Destination MTRR settings.
1869 @param DstMtrrCount Count of destination MTRR settings.
1870 @param SrcMtrrs Source MTRR settings.
1871 @param SrcMtrrCount Count of source MTRR settings.
1872 @param Modified Flag array to indicate which destination MTRR setting is modified.
1875 MtrrLibMergeVariableMtrr (
1876 MTRR_MEMORY_RANGE
*DstMtrrs
,
1877 UINT32 DstMtrrCount
,
1878 MTRR_MEMORY_RANGE
*SrcMtrrs
,
1879 UINT32 SrcMtrrCount
,
1886 ASSERT (SrcMtrrCount
<= DstMtrrCount
);
1888 for (DstIndex
= 0; DstIndex
< DstMtrrCount
; DstIndex
++) {
1889 Modified
[DstIndex
] = FALSE
;
1891 if (DstMtrrs
[DstIndex
].Length
== 0) {
1894 for (SrcIndex
= 0; SrcIndex
< SrcMtrrCount
; SrcIndex
++) {
1895 if (DstMtrrs
[DstIndex
].BaseAddress
== SrcMtrrs
[SrcIndex
].BaseAddress
&&
1896 DstMtrrs
[DstIndex
].Length
== SrcMtrrs
[SrcIndex
].Length
&&
1897 DstMtrrs
[DstIndex
].Type
== SrcMtrrs
[SrcIndex
].Type
) {
1902 if (SrcIndex
== SrcMtrrCount
) {
1904 // Remove the one from DstMtrrs which is not in SrcMtrrs
1906 DstMtrrs
[DstIndex
].Length
= 0;
1907 Modified
[DstIndex
] = TRUE
;
1910 // Remove the one from SrcMtrrs which is also in DstMtrrs
1912 SrcMtrrs
[SrcIndex
].Length
= 0;
1917 // Now valid MTRR only exists in either DstMtrrs or SrcMtrrs.
1918 // Merge MTRRs from SrcMtrrs to DstMtrrs
1921 for (SrcIndex
= 0; SrcIndex
< SrcMtrrCount
; SrcIndex
++) {
1922 if (SrcMtrrs
[SrcIndex
].Length
!= 0) {
1925 // Find the empty slot in DstMtrrs
1927 while (DstIndex
< DstMtrrCount
) {
1928 if (DstMtrrs
[DstIndex
].Length
== 0) {
1933 ASSERT (DstIndex
< DstMtrrCount
);
1934 CopyMem (&DstMtrrs
[DstIndex
], &SrcMtrrs
[SrcIndex
], sizeof (SrcMtrrs
[0]));
1935 Modified
[DstIndex
] = TRUE
;
1941 Calculate the variable MTRR settings for all memory ranges.
1943 @param DefaultType Default memory type.
1944 @param A0 Alignment to use when base address is 0.
1945 @param Ranges Memory range array holding the memory type
1946 settings for all memory address.
1947 @param RangeCount Count of memory ranges.
1948 @param Scratch Scratch buffer to be used in MTRR calculation.
1949 @param ScratchSize Pointer to the size of scratch buffer.
1950 @param VariableMtrr Array holding all MTRR settings.
1951 @param VariableMtrrCapacity Capacity of the MTRR array.
1952 @param VariableMtrrCount The count of MTRR settings in array.
1954 @retval RETURN_SUCCESS Variable MTRRs are allocated successfully.
1955 @retval RETURN_OUT_OF_RESOURCES Count of variable MTRRs exceeds capacity.
1956 @retval RETURN_BUFFER_TOO_SMALL The scratch buffer is too small for MTRR calculation.
1957 The required scratch buffer size is returned through ScratchSize.
1960 MtrrLibSetMemoryRanges (
1961 IN MTRR_MEMORY_CACHE_TYPE DefaultType
,
1963 IN MTRR_MEMORY_RANGE
*Ranges
,
1964 IN UINTN RangeCount
,
1966 IN OUT UINTN
*ScratchSize
,
1967 OUT MTRR_MEMORY_RANGE
*VariableMtrr
,
1968 IN UINT32 VariableMtrrCapacity
,
1969 OUT UINT32
*VariableMtrrCount
1972 RETURN_STATUS Status
;
1977 UINT8 CompatibleTypes
;
1980 UINTN ActualScratchSize
;
1981 UINTN BiggestScratchSize
;
1983 *VariableMtrrCount
= 0;
1986 // Since the whole ranges need multiple calls of MtrrLibCalculateMtrrs().
1987 // Each call needs different scratch buffer size.
1988 // When the provided scratch buffer size is not sufficient in any call,
1989 // set the GetActualScratchSize to TRUE, and following calls will only
1990 // calculate the actual scratch size for the caller.
1992 BiggestScratchSize
= 0;
1994 for (Index
= 0; Index
< RangeCount
;) {
1995 Base0
= Ranges
[Index
].BaseAddress
;
1998 // Full step is optimal
2000 while (Index
< RangeCount
) {
2001 ASSERT (Ranges
[Index
].BaseAddress
== Base0
);
2002 Alignment
= MtrrLibBiggestAlignment (Base0
, A0
);
2003 while (Base0
+ Alignment
<= Ranges
[Index
].BaseAddress
+ Ranges
[Index
].Length
) {
2004 if ((BiggestScratchSize
<= *ScratchSize
) && (Ranges
[Index
].Type
!= DefaultType
)) {
2005 Status
= MtrrLibAppendVariableMtrr (
2006 VariableMtrr
, VariableMtrrCapacity
, VariableMtrrCount
,
2007 Base0
, Alignment
, Ranges
[Index
].Type
2009 if (RETURN_ERROR (Status
)) {
2014 Alignment
= MtrrLibBiggestAlignment (Base0
, A0
);
2018 // Remove the above range from Ranges[Index]
2020 Ranges
[Index
].Length
-= Base0
- Ranges
[Index
].BaseAddress
;
2021 Ranges
[Index
].BaseAddress
= Base0
;
2022 if (Ranges
[Index
].Length
!= 0) {
2029 if (Index
== RangeCount
) {
2034 // Find continous ranges [Base0, Base1) which could be combined by MTRR.
2035 // Per SDM, the compatible types between[B0, B1) are:
2040 CompatibleTypes
= MtrrLibGetCompatibleTypes (&Ranges
[Index
], RangeCount
- Index
);
2042 End
= Index
; // End points to last one that matches the CompatibleTypes.
2043 while (End
+ 1 < RangeCount
) {
2044 if (((1 << Ranges
[End
+ 1].Type
) & CompatibleTypes
) == 0) {
2049 Alignment
= MtrrLibBiggestAlignment (Base0
, A0
);
2050 Length
= GetPowerOfTwo64 (Ranges
[End
].BaseAddress
+ Ranges
[End
].Length
- Base0
);
2051 Base1
= Base0
+ MIN (Alignment
, Length
);
2054 // Base1 may not in Ranges[End]. Update End to the range Base1 belongs to.
2057 while (End
+ 1 < RangeCount
) {
2058 if (Base1
<= Ranges
[End
+ 1].BaseAddress
) {
2064 Length
= Ranges
[End
].Length
;
2065 Ranges
[End
].Length
= Base1
- Ranges
[End
].BaseAddress
;
2066 ActualScratchSize
= *ScratchSize
;
2067 Status
= MtrrLibCalculateMtrrs (
2069 &Ranges
[Index
], End
+ 1 - Index
,
2070 Scratch
, &ActualScratchSize
,
2071 VariableMtrr
, VariableMtrrCapacity
, VariableMtrrCount
2073 if (Status
== RETURN_BUFFER_TOO_SMALL
) {
2074 BiggestScratchSize
= MAX (BiggestScratchSize
, ActualScratchSize
);
2076 // Ignore this error, because we need to calculate the biggest
2077 // scratch buffer size.
2079 Status
= RETURN_SUCCESS
;
2081 if (RETURN_ERROR (Status
)) {
2085 if (Length
!= Ranges
[End
].Length
) {
2086 Ranges
[End
].BaseAddress
= Base1
;
2087 Ranges
[End
].Length
= Length
- Ranges
[End
].Length
;
2094 if (*ScratchSize
< BiggestScratchSize
) {
2095 *ScratchSize
= BiggestScratchSize
;
2096 return RETURN_BUFFER_TOO_SMALL
;
2098 return RETURN_SUCCESS
;
2102 Set the below-1MB memory attribute to fixed MTRR buffer.
2103 Modified flag array indicates which fixed MTRR is modified.
2105 @param [in, out] FixedSettings Fixed MTRR buffer.
2106 @param [out] Modified Flag array indicating which MTRR is modified.
2107 @param [in] BaseAddress Base address.
2108 @param [in] Length Length.
2109 @param [in] Type Memory type.
2111 @retval RETURN_SUCCESS The memory attribute is set successfully.
2112 @retval RETURN_UNSUPPORTED The requested range or cache type was invalid
2113 for the fixed MTRRs.
2116 MtrrLibSetBelow1MBMemoryAttribute (
2117 IN OUT MTRR_FIXED_SETTINGS
*FixedSettings
,
2118 OUT BOOLEAN
*Modified
,
2119 IN PHYSICAL_ADDRESS BaseAddress
,
2121 IN MTRR_MEMORY_CACHE_TYPE Type
2124 RETURN_STATUS Status
;
2128 UINT64 ClearMasks
[ARRAY_SIZE (mMtrrLibFixedMtrrTable
)];
2129 UINT64 OrMasks
[ARRAY_SIZE (mMtrrLibFixedMtrrTable
)];
2130 BOOLEAN LocalModified
[ARRAY_SIZE (mMtrrLibFixedMtrrTable
)];
2132 ASSERT (BaseAddress
< BASE_1MB
);
2134 SetMem (LocalModified
, sizeof (LocalModified
), FALSE
);
2137 // (Value & ~0 | 0) still equals to (Value)
2139 SetMem (ClearMasks
, sizeof (ClearMasks
), 0);
2140 SetMem (OrMasks
, sizeof (OrMasks
), 0);
2142 MsrIndex
= (UINT32
)-1;
2143 while ((BaseAddress
< BASE_1MB
) && (Length
!= 0)) {
2144 Status
= MtrrLibProgramFixedMtrr (Type
, &BaseAddress
, &Length
, &MsrIndex
, &ClearMask
, &OrMask
);
2145 if (RETURN_ERROR (Status
)) {
2148 ClearMasks
[MsrIndex
] = ClearMask
;
2149 OrMasks
[MsrIndex
] = OrMask
;
2150 Modified
[MsrIndex
] = TRUE
;
2151 LocalModified
[MsrIndex
] = TRUE
;
2154 for (MsrIndex
= 0; MsrIndex
< ARRAY_SIZE (mMtrrLibFixedMtrrTable
); MsrIndex
++) {
2155 if (LocalModified
[MsrIndex
]) {
2156 FixedSettings
->Mtrr
[MsrIndex
] = (FixedSettings
->Mtrr
[MsrIndex
] & ~ClearMasks
[MsrIndex
]) | OrMasks
[MsrIndex
];
2159 return RETURN_SUCCESS
;
2163 This function attempts to set the attributes into MTRR setting buffer for multiple memory ranges.
2165 @param[in, out] MtrrSetting MTRR setting buffer to be set.
2166 @param[in] Scratch A temporary scratch buffer that is used to perform the calculation.
2167 @param[in, out] ScratchSize Pointer to the size in bytes of the scratch buffer.
2168 It may be updated to the actual required size when the calculation
2169 needs more scratch buffer.
2170 @param[in] Ranges Pointer to an array of MTRR_MEMORY_RANGE.
2171 When range overlap happens, the last one takes higher priority.
2172 When the function returns, either all the attributes are set successfully,
2173 or none of them is set.
2174 @param[in] RangeCount Count of MTRR_MEMORY_RANGE.
2176 @retval RETURN_SUCCESS The attributes were set for all the memory ranges.
2177 @retval RETURN_INVALID_PARAMETER Length in any range is zero.
2178 @retval RETURN_UNSUPPORTED The processor does not support one or more bytes of the
2179 memory resource range specified by BaseAddress and Length in any range.
2180 @retval RETURN_UNSUPPORTED The bit mask of attributes is not support for the memory resource
2181 range specified by BaseAddress and Length in any range.
2182 @retval RETURN_OUT_OF_RESOURCES There are not enough system resources to modify the attributes of
2183 the memory resource ranges.
2184 @retval RETURN_ACCESS_DENIED The attributes for the memory resource range specified by
2185 BaseAddress and Length cannot be modified.
2186 @retval RETURN_BUFFER_TOO_SMALL The scratch buffer is too small for MTRR calculation.
2190 MtrrSetMemoryAttributesInMtrrSettings (
2191 IN OUT MTRR_SETTINGS
*MtrrSetting
,
2193 IN OUT UINTN
*ScratchSize
,
2194 IN CONST MTRR_MEMORY_RANGE
*Ranges
,
2198 RETURN_STATUS Status
;
2202 BOOLEAN Above1MbExist
;
2204 UINT64 MtrrValidBitsMask
;
2205 UINT64 MtrrValidAddressMask
;
2206 MTRR_MEMORY_CACHE_TYPE DefaultType
;
2207 MTRR_VARIABLE_SETTINGS VariableSettings
;
2208 MTRR_MEMORY_RANGE WorkingRanges
[2 * ARRAY_SIZE (MtrrSetting
->Variables
.Mtrr
) + 2];
2209 UINTN WorkingRangeCount
;
2211 MTRR_VARIABLE_SETTING VariableSetting
;
2212 UINT32 OriginalVariableMtrrCount
;
2213 UINT32 FirmwareVariableMtrrCount
;
2214 UINT32 WorkingVariableMtrrCount
;
2215 MTRR_MEMORY_RANGE OriginalVariableMtrr
[ARRAY_SIZE (MtrrSetting
->Variables
.Mtrr
)];
2216 MTRR_MEMORY_RANGE WorkingVariableMtrr
[ARRAY_SIZE (MtrrSetting
->Variables
.Mtrr
)];
2217 BOOLEAN VariableSettingModified
[ARRAY_SIZE (MtrrSetting
->Variables
.Mtrr
)];
2219 BOOLEAN FixedSettingsModified
[ARRAY_SIZE (mMtrrLibFixedMtrrTable
)];
2220 MTRR_FIXED_SETTINGS WorkingFixedSettings
;
2222 MTRR_CONTEXT MtrrContext
;
2223 BOOLEAN MtrrContextValid
;
2225 Status
= RETURN_SUCCESS
;
2226 MtrrLibInitializeMtrrMask (&MtrrValidBitsMask
, &MtrrValidAddressMask
);
2229 // TRUE indicating the accordingly Variable setting needs modificaiton in OriginalVariableMtrr.
2231 SetMem (VariableSettingModified
, ARRAY_SIZE (VariableSettingModified
), FALSE
);
2233 // TRUE indicating the accordingly Fixed setting needs modification in WorkingFixedSettings.
2235 SetMem (FixedSettingsModified
, ARRAY_SIZE (FixedSettingsModified
), FALSE
);
2238 // TRUE indicating the caller requests to set variable MTRRs.
2240 Above1MbExist
= FALSE
;
2241 OriginalVariableMtrrCount
= 0;
2244 // 0. Dump the requests.
2247 DEBUG ((DEBUG_CACHE
, "Mtrr: Set Mem Attribute to %a, ScratchSize = %x%a",
2248 (MtrrSetting
== NULL
) ? "Hardware" : "Buffer", *ScratchSize
,
2249 (RangeCount
<= 1) ? "," : "\n"
2251 for (Index
= 0; Index
< RangeCount
; Index
++) {
2252 DEBUG ((DEBUG_CACHE
, " %a: [%016lx, %016lx)\n",
2253 mMtrrMemoryCacheTypeShortName
[MIN (Ranges
[Index
].Type
, CacheInvalid
)],
2254 Ranges
[Index
].BaseAddress
, Ranges
[Index
].BaseAddress
+ Ranges
[Index
].Length
2260 // 1. Validate the parameters.
2262 if (!IsMtrrSupported ()) {
2263 Status
= RETURN_UNSUPPORTED
;
2267 for (Index
= 0; Index
< RangeCount
; Index
++) {
2268 if (Ranges
[Index
].Length
== 0) {
2269 Status
= RETURN_INVALID_PARAMETER
;
2272 if (((Ranges
[Index
].BaseAddress
& ~MtrrValidAddressMask
) != 0) ||
2273 ((((Ranges
[Index
].BaseAddress
+ Ranges
[Index
].Length
) & ~MtrrValidAddressMask
) != 0) &&
2274 (Ranges
[Index
].BaseAddress
+ Ranges
[Index
].Length
) != MtrrValidBitsMask
+ 1)
2277 // Either the BaseAddress or the Limit doesn't follow the alignment requirement.
2278 // Note: It's still valid if Limit doesn't follow the alignment requirement but equals to MAX Address.
2280 Status
= RETURN_UNSUPPORTED
;
2283 if ((Ranges
[Index
].Type
!= CacheUncacheable
) &&
2284 (Ranges
[Index
].Type
!= CacheWriteCombining
) &&
2285 (Ranges
[Index
].Type
!= CacheWriteThrough
) &&
2286 (Ranges
[Index
].Type
!= CacheWriteProtected
) &&
2287 (Ranges
[Index
].Type
!= CacheWriteBack
)) {
2288 Status
= RETURN_INVALID_PARAMETER
;
2291 if (Ranges
[Index
].BaseAddress
+ Ranges
[Index
].Length
> BASE_1MB
) {
2292 Above1MbExist
= TRUE
;
2297 // 2. Apply the above-1MB memory attribute settings.
2299 if (Above1MbExist
) {
2301 // 2.1. Read all variable MTRRs and convert to Ranges.
2303 OriginalVariableMtrrCount
= GetVariableMtrrCountWorker ();
2304 MtrrGetVariableMtrrWorker (MtrrSetting
, OriginalVariableMtrrCount
, &VariableSettings
);
2305 MtrrLibGetRawVariableRanges (
2306 &VariableSettings
, OriginalVariableMtrrCount
,
2307 MtrrValidBitsMask
, MtrrValidAddressMask
, OriginalVariableMtrr
2310 DefaultType
= MtrrGetDefaultMemoryTypeWorker (MtrrSetting
);
2311 WorkingRangeCount
= 1;
2312 WorkingRanges
[0].BaseAddress
= 0;
2313 WorkingRanges
[0].Length
= MtrrValidBitsMask
+ 1;
2314 WorkingRanges
[0].Type
= DefaultType
;
2316 Status
= MtrrLibApplyVariableMtrrs (
2317 OriginalVariableMtrr
, OriginalVariableMtrrCount
,
2318 WorkingRanges
, ARRAY_SIZE (WorkingRanges
), &WorkingRangeCount
);
2319 ASSERT_RETURN_ERROR (Status
);
2321 ASSERT (OriginalVariableMtrrCount
>= PcdGet32 (PcdCpuNumberOfReservedVariableMtrrs
));
2322 FirmwareVariableMtrrCount
= OriginalVariableMtrrCount
- PcdGet32 (PcdCpuNumberOfReservedVariableMtrrs
);
2323 ASSERT (WorkingRangeCount
<= 2 * FirmwareVariableMtrrCount
+ 1);
2326 // 2.2. Force [0, 1M) to UC, so that it doesn't impact subtraction algorithm.
2328 Status
= MtrrLibSetMemoryType (
2329 WorkingRanges
, ARRAY_SIZE (WorkingRanges
), &WorkingRangeCount
,
2330 0, SIZE_1MB
, CacheUncacheable
2332 ASSERT (Status
!= RETURN_OUT_OF_RESOURCES
);
2335 // 2.3. Apply the new memory attribute settings to Ranges.
2338 for (Index
= 0; Index
< RangeCount
; Index
++) {
2339 BaseAddress
= Ranges
[Index
].BaseAddress
;
2340 Length
= Ranges
[Index
].Length
;
2341 if (BaseAddress
< BASE_1MB
) {
2342 if (Length
<= BASE_1MB
- BaseAddress
) {
2345 Length
-= BASE_1MB
- BaseAddress
;
2346 BaseAddress
= BASE_1MB
;
2348 Status
= MtrrLibSetMemoryType (
2349 WorkingRanges
, ARRAY_SIZE (WorkingRanges
), &WorkingRangeCount
,
2350 BaseAddress
, Length
, Ranges
[Index
].Type
2352 if (Status
== RETURN_ALREADY_STARTED
) {
2353 Status
= RETURN_SUCCESS
;
2354 } else if (Status
== RETURN_OUT_OF_RESOURCES
) {
2357 ASSERT_RETURN_ERROR (Status
);
2364 // 2.4. Calculate the Variable MTRR settings based on the Ranges.
2365 // Buffer Too Small may be returned if the scratch buffer size is insufficient.
2367 Status
= MtrrLibSetMemoryRanges (
2368 DefaultType
, LShiftU64 (1, (UINTN
)HighBitSet64 (MtrrValidBitsMask
)), WorkingRanges
, WorkingRangeCount
,
2369 Scratch
, ScratchSize
,
2370 WorkingVariableMtrr
, FirmwareVariableMtrrCount
+ 1, &WorkingVariableMtrrCount
2372 if (RETURN_ERROR (Status
)) {
2377 // 2.5. Remove the [0, 1MB) MTRR if it still exists (not merged with other range)
2379 for (Index
= 0; Index
< WorkingVariableMtrrCount
; Index
++) {
2380 if (WorkingVariableMtrr
[Index
].BaseAddress
== 0 && WorkingVariableMtrr
[Index
].Length
== SIZE_1MB
) {
2381 ASSERT (WorkingVariableMtrr
[Index
].Type
== CacheUncacheable
);
2382 WorkingVariableMtrrCount
--;
2384 &WorkingVariableMtrr
[Index
], &WorkingVariableMtrr
[Index
+ 1],
2385 (WorkingVariableMtrrCount
- Index
) * sizeof (WorkingVariableMtrr
[0])
2391 if (WorkingVariableMtrrCount
> FirmwareVariableMtrrCount
) {
2392 Status
= RETURN_OUT_OF_RESOURCES
;
2397 // 2.6. Merge the WorkingVariableMtrr to OriginalVariableMtrr
2398 // Make sure least modification is made to OriginalVariableMtrr.
2400 MtrrLibMergeVariableMtrr (
2401 OriginalVariableMtrr
, OriginalVariableMtrrCount
,
2402 WorkingVariableMtrr
, WorkingVariableMtrrCount
,
2403 VariableSettingModified
2409 // 3. Apply the below-1MB memory attribute settings.
2411 ZeroMem (WorkingFixedSettings
.Mtrr
, sizeof (WorkingFixedSettings
.Mtrr
));
2412 for (Index
= 0; Index
< RangeCount
; Index
++) {
2413 if (Ranges
[Index
].BaseAddress
>= BASE_1MB
) {
2417 Status
= MtrrLibSetBelow1MBMemoryAttribute (
2418 &WorkingFixedSettings
, FixedSettingsModified
,
2419 Ranges
[Index
].BaseAddress
, Ranges
[Index
].Length
, Ranges
[Index
].Type
2421 if (RETURN_ERROR (Status
)) {
2426 MtrrContextValid
= FALSE
;
2428 // 4. Write fixed MTRRs that have been modified
2430 for (Index
= 0; Index
< ARRAY_SIZE (FixedSettingsModified
); Index
++) {
2431 if (FixedSettingsModified
[Index
]) {
2432 if (MtrrSetting
!= NULL
) {
2433 MtrrSetting
->Fixed
.Mtrr
[Index
] = WorkingFixedSettings
.Mtrr
[Index
];
2435 if (!MtrrContextValid
) {
2436 MtrrLibPreMtrrChange (&MtrrContext
);
2437 MtrrContextValid
= TRUE
;
2440 mMtrrLibFixedMtrrTable
[Index
].Msr
,
2441 WorkingFixedSettings
.Mtrr
[Index
]
2448 // 5. Write variable MTRRs that have been modified
2450 for (Index
= 0; Index
< OriginalVariableMtrrCount
; Index
++) {
2451 if (VariableSettingModified
[Index
]) {
2452 if (OriginalVariableMtrr
[Index
].Length
!= 0) {
2453 VariableSetting
.Base
= (OriginalVariableMtrr
[Index
].BaseAddress
& MtrrValidAddressMask
)
2454 | (UINT8
)OriginalVariableMtrr
[Index
].Type
;
2455 VariableSetting
.Mask
= ((~(OriginalVariableMtrr
[Index
].Length
- 1)) & MtrrValidAddressMask
) | BIT11
;
2457 VariableSetting
.Base
= 0;
2458 VariableSetting
.Mask
= 0;
2460 if (MtrrSetting
!= NULL
) {
2461 CopyMem (&MtrrSetting
->Variables
.Mtrr
[Index
], &VariableSetting
, sizeof (VariableSetting
));
2463 if (!MtrrContextValid
) {
2464 MtrrLibPreMtrrChange (&MtrrContext
);
2465 MtrrContextValid
= TRUE
;
2468 MSR_IA32_MTRR_PHYSBASE0
+ (Index
<< 1),
2469 VariableSetting
.Base
2472 MSR_IA32_MTRR_PHYSMASK0
+ (Index
<< 1),
2473 VariableSetting
.Mask
2479 if (MtrrSetting
!= NULL
) {
2480 ((MSR_IA32_MTRR_DEF_TYPE_REGISTER
*)&MtrrSetting
->MtrrDefType
)->Bits
.E
= 1;
2481 ((MSR_IA32_MTRR_DEF_TYPE_REGISTER
*)&MtrrSetting
->MtrrDefType
)->Bits
.FE
= 1;
2483 if (MtrrContextValid
) {
2484 MtrrLibPostMtrrChange (&MtrrContext
);
2489 DEBUG ((DEBUG_CACHE
, " Result = %r\n", Status
));
2490 if (!RETURN_ERROR (Status
)) {
2491 MtrrDebugPrintAllMtrrsWorker (MtrrSetting
);
2497 This function attempts to set the attributes into MTRR setting buffer for a memory range.
2499 @param[in, out] MtrrSetting MTRR setting buffer to be set.
2500 @param[in] BaseAddress The physical address that is the start address
2502 @param[in] Length The size in bytes of the memory range.
2503 @param[in] Attribute The bit mask of attributes to set for the
2506 @retval RETURN_SUCCESS The attributes were set for the memory range.
2507 @retval RETURN_INVALID_PARAMETER Length is zero.
2508 @retval RETURN_UNSUPPORTED The processor does not support one or more bytes of the
2509 memory resource range specified by BaseAddress and Length.
2510 @retval RETURN_UNSUPPORTED The bit mask of attributes is not support for the memory resource
2511 range specified by BaseAddress and Length.
2512 @retval RETURN_ACCESS_DENIED The attributes for the memory resource range specified by
2513 BaseAddress and Length cannot be modified.
2514 @retval RETURN_OUT_OF_RESOURCES There are not enough system resources to modify the attributes of
2515 the memory resource range.
2516 Multiple memory range attributes setting by calling this API multiple
2517 times may fail with status RETURN_OUT_OF_RESOURCES. It may not mean
2518 the number of CPU MTRRs are too small to set such memory attributes.
2519 Pass the multiple memory range attributes to one call of
2520 MtrrSetMemoryAttributesInMtrrSettings() may succeed.
2521 @retval RETURN_BUFFER_TOO_SMALL The fixed internal scratch buffer is too small for MTRR calculation.
2522 Caller should use MtrrSetMemoryAttributesInMtrrSettings() to specify
2523 external scratch buffer.
2527 MtrrSetMemoryAttributeInMtrrSettings (
2528 IN OUT MTRR_SETTINGS
*MtrrSetting
,
2529 IN PHYSICAL_ADDRESS BaseAddress
,
2531 IN MTRR_MEMORY_CACHE_TYPE Attribute
2534 UINT8 Scratch
[SCRATCH_BUFFER_SIZE
];
2536 MTRR_MEMORY_RANGE Range
;
2538 Range
.BaseAddress
= BaseAddress
;
2539 Range
.Length
= Length
;
2540 Range
.Type
= Attribute
;
2541 ScratchSize
= sizeof (Scratch
);
2542 return MtrrSetMemoryAttributesInMtrrSettings (MtrrSetting
, Scratch
, &ScratchSize
, &Range
, 1);
2546 This function attempts to set the attributes for a memory range.
2548 @param[in] BaseAddress The physical address that is the start
2549 address of a memory range.
2550 @param[in] Length The size in bytes of the memory range.
2551 @param[in] Attributes The bit mask of attributes to set for the
2554 @retval RETURN_SUCCESS The attributes were set for the memory
2556 @retval RETURN_INVALID_PARAMETER Length is zero.
2557 @retval RETURN_UNSUPPORTED The processor does not support one or
2558 more bytes of the memory resource range
2559 specified by BaseAddress and Length.
2560 @retval RETURN_UNSUPPORTED The bit mask of attributes is not support
2561 for the memory resource range specified
2562 by BaseAddress and Length.
2563 @retval RETURN_ACCESS_DENIED The attributes for the memory resource
2564 range specified by BaseAddress and Length
2566 @retval RETURN_OUT_OF_RESOURCES There are not enough system resources to
2567 modify the attributes of the memory
2569 Multiple memory range attributes setting by calling this API multiple
2570 times may fail with status RETURN_OUT_OF_RESOURCES. It may not mean
2571 the number of CPU MTRRs are too small to set such memory attributes.
2572 Pass the multiple memory range attributes to one call of
2573 MtrrSetMemoryAttributesInMtrrSettings() may succeed.
2574 @retval RETURN_BUFFER_TOO_SMALL The fixed internal scratch buffer is too small for MTRR calculation.
2575 Caller should use MtrrSetMemoryAttributesInMtrrSettings() to specify
2576 external scratch buffer.
2580 MtrrSetMemoryAttribute (
2581 IN PHYSICAL_ADDRESS BaseAddress
,
2583 IN MTRR_MEMORY_CACHE_TYPE Attribute
2586 return MtrrSetMemoryAttributeInMtrrSettings (NULL
, BaseAddress
, Length
, Attribute
);
2590 Worker function setting variable MTRRs
2592 @param[in] VariableSettings A buffer to hold variable MTRRs content.
2596 MtrrSetVariableMtrrWorker (
2597 IN MTRR_VARIABLE_SETTINGS
*VariableSettings
2601 UINT32 VariableMtrrCount
;
2603 VariableMtrrCount
= GetVariableMtrrCountWorker ();
2604 ASSERT (VariableMtrrCount
<= ARRAY_SIZE (VariableSettings
->Mtrr
));
2606 for (Index
= 0; Index
< VariableMtrrCount
; Index
++) {
2608 // Mask MSR is always updated since caller might need to invalidate the MSR pair.
2609 // Base MSR is skipped when Mask.V is not set.
2611 AsmWriteMsr64 (MSR_IA32_MTRR_PHYSMASK0
+ (Index
<< 1), VariableSettings
->Mtrr
[Index
].Mask
);
2612 if (((MSR_IA32_MTRR_PHYSMASK_REGISTER
*)&VariableSettings
->Mtrr
[Index
].Mask
)->Bits
.V
!= 0) {
2613 AsmWriteMsr64 (MSR_IA32_MTRR_PHYSBASE0
+ (Index
<< 1), VariableSettings
->Mtrr
[Index
].Base
);
2620 This function sets variable MTRRs
2622 @param[in] VariableSettings A buffer to hold variable MTRRs content.
2624 @return The pointer of VariableSettings
2627 MTRR_VARIABLE_SETTINGS
*
2629 MtrrSetVariableMtrr (
2630 IN MTRR_VARIABLE_SETTINGS
*VariableSettings
2633 MTRR_CONTEXT MtrrContext
;
2635 if (!IsMtrrSupported ()) {
2636 return VariableSettings
;
2639 MtrrLibPreMtrrChange (&MtrrContext
);
2640 MtrrSetVariableMtrrWorker (VariableSettings
);
2641 MtrrLibPostMtrrChange (&MtrrContext
);
2642 MtrrDebugPrintAllMtrrs ();
2644 return VariableSettings
;
2648 Worker function setting fixed MTRRs
2650 @param[in] FixedSettings A buffer to hold fixed MTRRs content.
2654 MtrrSetFixedMtrrWorker (
2655 IN MTRR_FIXED_SETTINGS
*FixedSettings
2660 for (Index
= 0; Index
< MTRR_NUMBER_OF_FIXED_MTRR
; Index
++) {
2662 mMtrrLibFixedMtrrTable
[Index
].Msr
,
2663 FixedSettings
->Mtrr
[Index
]
2670 This function sets fixed MTRRs
2672 @param[in] FixedSettings A buffer to hold fixed MTRRs content.
2674 @retval The pointer of FixedSettings
2677 MTRR_FIXED_SETTINGS
*
2680 IN MTRR_FIXED_SETTINGS
*FixedSettings
2683 MTRR_CONTEXT MtrrContext
;
2685 if (!IsMtrrSupported ()) {
2686 return FixedSettings
;
2689 MtrrLibPreMtrrChange (&MtrrContext
);
2690 MtrrSetFixedMtrrWorker (FixedSettings
);
2691 MtrrLibPostMtrrChange (&MtrrContext
);
2692 MtrrDebugPrintAllMtrrs ();
2694 return FixedSettings
;
2699 This function gets the content in all MTRRs (variable and fixed)
2701 @param[out] MtrrSetting A buffer to hold all MTRRs content.
2703 @retval the pointer of MtrrSetting
2709 OUT MTRR_SETTINGS
*MtrrSetting
2712 if (!IsMtrrSupported ()) {
2719 MtrrGetFixedMtrrWorker (&MtrrSetting
->Fixed
);
2722 // Get variable MTRRs
2724 MtrrGetVariableMtrrWorker (
2726 GetVariableMtrrCountWorker (),
2727 &MtrrSetting
->Variables
2731 // Get MTRR_DEF_TYPE value
2733 MtrrSetting
->MtrrDefType
= AsmReadMsr64 (MSR_IA32_MTRR_DEF_TYPE
);
2740 This function sets all MTRRs (variable and fixed)
2742 @param[in] MtrrSetting A buffer holding all MTRRs content.
2744 @retval The pointer of MtrrSetting
2750 IN MTRR_SETTINGS
*MtrrSetting
2753 MTRR_CONTEXT MtrrContext
;
2755 if (!IsMtrrSupported ()) {
2759 MtrrLibPreMtrrChange (&MtrrContext
);
2764 MtrrSetFixedMtrrWorker (&MtrrSetting
->Fixed
);
2767 // Set variable MTRRs
2769 MtrrSetVariableMtrrWorker (&MtrrSetting
->Variables
);
2772 // Set MTRR_DEF_TYPE value
2774 AsmWriteMsr64 (MSR_IA32_MTRR_DEF_TYPE
, MtrrSetting
->MtrrDefType
);
2776 MtrrLibPostMtrrChangeEnableCache (&MtrrContext
);
2783 Checks if MTRR is supported.
2785 @retval TRUE MTRR is supported.
2786 @retval FALSE MTRR is not supported.
2795 CPUID_VERSION_INFO_EDX Edx
;
2796 MSR_IA32_MTRRCAP_REGISTER MtrrCap
;
2799 // Check CPUID(1).EDX[12] for MTRR capability
2801 AsmCpuid (CPUID_VERSION_INFO
, NULL
, NULL
, NULL
, &Edx
.Uint32
);
2802 if (Edx
.Bits
.MTRR
== 0) {
2807 // Check number of variable MTRRs and fixed MTRRs existence.
2808 // If number of variable MTRRs is zero, or fixed MTRRs do not
2809 // exist, return false.
2811 MtrrCap
.Uint64
= AsmReadMsr64 (MSR_IA32_MTRRCAP
);
2812 if ((MtrrCap
.Bits
.VCNT
== 0) || (MtrrCap
.Bits
.FIX
== 0)) {
2820 Worker function prints all MTRRs for debugging.
2822 If MtrrSetting is not NULL, print MTRR settings from input MTRR
2824 If MtrrSetting is NULL, print MTRR settings from MTRRs.
2826 @param MtrrSetting A buffer holding all MTRRs content.
2829 MtrrDebugPrintAllMtrrsWorker (
2830 IN MTRR_SETTINGS
*MtrrSetting
2834 MTRR_SETTINGS LocalMtrrs
;
2835 MTRR_SETTINGS
*Mtrrs
;
2838 UINT64 MtrrValidBitsMask
;
2839 UINT64 MtrrValidAddressMask
;
2840 UINT32 VariableMtrrCount
;
2841 BOOLEAN ContainVariableMtrr
;
2842 MTRR_MEMORY_RANGE Ranges
[
2843 ARRAY_SIZE (mMtrrLibFixedMtrrTable
) * sizeof (UINT64
) + 2 * ARRAY_SIZE (Mtrrs
->Variables
.Mtrr
) + 1
2845 MTRR_MEMORY_RANGE RawVariableRanges
[ARRAY_SIZE (Mtrrs
->Variables
.Mtrr
)];
2847 if (!IsMtrrSupported ()) {
2851 VariableMtrrCount
= GetVariableMtrrCountWorker ();
2853 if (MtrrSetting
!= NULL
) {
2854 Mtrrs
= MtrrSetting
;
2856 MtrrGetAllMtrrs (&LocalMtrrs
);
2857 Mtrrs
= &LocalMtrrs
;
2861 // Dump RAW MTRR contents
2863 DEBUG ((DEBUG_CACHE
, "MTRR Settings:\n"));
2864 DEBUG ((DEBUG_CACHE
, "=============\n"));
2865 DEBUG ((DEBUG_CACHE
, "MTRR Default Type: %016lx\n", Mtrrs
->MtrrDefType
));
2866 for (Index
= 0; Index
< ARRAY_SIZE (mMtrrLibFixedMtrrTable
); Index
++) {
2867 DEBUG ((DEBUG_CACHE
, "Fixed MTRR[%02d] : %016lx\n", Index
, Mtrrs
->Fixed
.Mtrr
[Index
]));
2869 ContainVariableMtrr
= FALSE
;
2870 for (Index
= 0; Index
< VariableMtrrCount
; Index
++) {
2871 if (((MSR_IA32_MTRR_PHYSMASK_REGISTER
*)&Mtrrs
->Variables
.Mtrr
[Index
].Mask
)->Bits
.V
== 0) {
2873 // If mask is not valid, then do not display range
2877 ContainVariableMtrr
= TRUE
;
2878 DEBUG ((DEBUG_CACHE
, "Variable MTRR[%02d]: Base=%016lx Mask=%016lx\n",
2880 Mtrrs
->Variables
.Mtrr
[Index
].Base
,
2881 Mtrrs
->Variables
.Mtrr
[Index
].Mask
2884 if (!ContainVariableMtrr
) {
2885 DEBUG ((DEBUG_CACHE
, "Variable MTRR : None.\n"));
2887 DEBUG((DEBUG_CACHE
, "\n"));
2890 // Dump MTRR setting in ranges
2892 DEBUG((DEBUG_CACHE
, "Memory Ranges:\n"));
2893 DEBUG((DEBUG_CACHE
, "====================================\n"));
2894 MtrrLibInitializeMtrrMask (&MtrrValidBitsMask
, &MtrrValidAddressMask
);
2895 Ranges
[0].BaseAddress
= 0;
2896 Ranges
[0].Length
= MtrrValidBitsMask
+ 1;
2897 Ranges
[0].Type
= MtrrGetDefaultMemoryTypeWorker (Mtrrs
);
2900 MtrrLibGetRawVariableRanges (
2901 &Mtrrs
->Variables
, VariableMtrrCount
,
2902 MtrrValidBitsMask
, MtrrValidAddressMask
, RawVariableRanges
2904 MtrrLibApplyVariableMtrrs (
2905 RawVariableRanges
, VariableMtrrCount
,
2906 Ranges
, ARRAY_SIZE (Ranges
), &RangeCount
2909 MtrrLibApplyFixedMtrrs (&Mtrrs
->Fixed
, Ranges
, ARRAY_SIZE (Ranges
), &RangeCount
);
2911 for (Index
= 0; Index
< RangeCount
; Index
++) {
2912 DEBUG ((DEBUG_CACHE
, "%a:%016lx-%016lx\n",
2913 mMtrrMemoryCacheTypeShortName
[Ranges
[Index
].Type
],
2914 Ranges
[Index
].BaseAddress
, Ranges
[Index
].BaseAddress
+ Ranges
[Index
].Length
- 1
2921 This function prints all MTRRs for debugging.
2925 MtrrDebugPrintAllMtrrs (
2929 MtrrDebugPrintAllMtrrsWorker (NULL
);