3 Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.<BR>
6 This program and the accompanying materials are licensed and made available under
8 the terms and conditions of the BSD License that accompanies this distribution.
10 The full text of the license may be found at
12 http://opensource.org/licenses/bsd-license.php.
16 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
18 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
33 #include "PlatformDxe.h"
34 #include <Protocol/PchPlatformPolicy.h>
35 #include <Protocol/VlvPlatformPolicy.h>
36 #include <Library/PchPlatformLib.h>
38 #include "AzaliaVerbTable.h"
39 #include "Protocol/GlobalNvsArea.h"
40 #include "Protocol/DxePchPolicyUpdateProtocol.h"
42 #define MOBILE_PLATFORM 1
43 #define DESKTOP_PLATFORM 2
45 EFI_GUID gDxePchPolicyUpdateProtocolGuid
= DXE_PCH_POLICY_UPDATE_PROTOCOL_GUID
;
46 DXE_PCH_POLICY_UPDATE_PROTOCOL mDxePchPolicyUpdate
= { 0 };
50 Updates the feature policies according to the setup variable.
56 InitPchPlatformPolicy (
57 IN EFI_PLATFORM_INFO_HOB
*PlatformInfo
60 DXE_PCH_PLATFORM_POLICY_PROTOCOL
*DxePlatformPchPolicy
;
62 EFI_GLOBAL_NVS_AREA_PROTOCOL
*GlobalNvsArea
;
65 PCH_STEPPING SocStepping
= PchA0
;
66 BOOLEAN ModifyVariable
;
68 ModifyVariable
= FALSE
;
69 DEBUG ((EFI_D_INFO
, "InitPchPlatformPolicy() - Start\n"));
71 Status
= gBS
->LocateProtocol (&gDxePchPlatformPolicyProtocolGuid
, NULL
, (VOID
**) &DxePlatformPchPolicy
);
72 ASSERT_EFI_ERROR (Status
);
75 // Locate the Global NVS Protocol.
77 Status
= gBS
->LocateProtocol (
78 &gEfiGlobalNvsAreaProtocolGuid
,
80 (VOID
**) &GlobalNvsArea
82 ASSERT_EFI_ERROR (Status
);
85 // Update system information
87 DxePlatformPchPolicy
->Revision
= DXE_PCH_PLATFORM_POLICY_PROTOCOL_REVISION_12
;
90 // General initialization
92 DxePlatformPchPolicy
->BusNumber
= 0;
95 // VLV BIOS Spec Section 3.6 Flash Security Recommendation,
96 // Intel strongly recommends that BIOS sets the BIOS Interface Lock Down bit. Enabling this bit
97 // will mitigate malicious software attempts to replace the system BIOS option ROM with its own code.
98 // We always enable this as a platform policy.
100 DxePlatformPchPolicy
->LockDownConfig
->BiosInterface
= PCH_DEVICE_ENABLE
;
101 DxePlatformPchPolicy
->LockDownConfig
->BiosLock
= mSystemConfiguration
.SpiRwProtect
;
106 DxePlatformPchPolicy
->DeviceEnabling
->Lan
= mSystemConfiguration
.Lan
;
107 DxePlatformPchPolicy
->DeviceEnabling
->Azalia
= mSystemConfiguration
.PchAzalia
;
108 DxePlatformPchPolicy
->DeviceEnabling
->Sata
= mSystemConfiguration
.Sata
;
109 DxePlatformPchPolicy
->DeviceEnabling
->Smbus
= PCH_DEVICE_ENABLE
;
110 DxePlatformPchPolicy
->DeviceEnabling
->LpeEnabled
= mSystemConfiguration
.Lpe
;
112 DxePlatformPchPolicy
->UsbConfig
->Ehci1Usbr
= PCH_DEVICE_DISABLE
;
114 DxePlatformPchPolicy
->UsbConfig
->UsbXhciLpmSupport
=mSystemConfiguration
.UsbXhciLpmSupport
;
117 // Disable FFRD PR0 USB port2 for power saving since PR0 uses non-POR WWAN (but enable on PR0.3/PR0.5/PR1)
119 if ((PlatformInfo
->BoardId
== BOARD_ID_BL_FFRD
) && (PlatformInfo
->BoardRev
== PR0
))
120 if (mSystemConfiguration
.PchUsbPort
[2] !=0) {
121 mSystemConfiguration
.PchUsbPort
[2]=0;
122 ModifyVariable
= TRUE
;
126 if (ModifyVariable
) {
127 Status
= gRT
->SetVariable (
129 &gEfiNormalSetupGuid
,
130 EFI_VARIABLE_NON_VOLATILE
| EFI_VARIABLE_BOOTSERVICE_ACCESS
,
131 sizeof(SYSTEM_CONFIGURATION
),
132 &mSystemConfiguration
136 SocStepping
= PchStepping();
137 if (mSystemConfiguration
.UsbAutoMode
== 1) { // auto mode is enabled
138 if (PchA0
== SocStepping
) {
140 // For A0, EHCI is enabled as default.
142 mSystemConfiguration
.PchUsb20
= 1;
143 mSystemConfiguration
.PchUsb30Mode
= 0;
144 mSystemConfiguration
.UsbXhciSupport
= 0;
145 DEBUG ((EFI_D_INFO
, "EHCI is enabled as default. SOC 0x%x\n", SocStepping
));
148 // For A1 and later, XHCI is enabled as default.
150 mSystemConfiguration
.PchUsb20
= 0;
151 mSystemConfiguration
.PchUsb30Mode
= 1;
152 mSystemConfiguration
.UsbXhciSupport
= 1;
153 DEBUG ((EFI_D_INFO
, "XHCI is enabled as default. SOC 0x%x\n", SocStepping
));
156 //overwrite the setting
158 Status
= gRT
->SetVariable(
160 &gEfiNormalSetupGuid
,
161 EFI_VARIABLE_NON_VOLATILE
| EFI_VARIABLE_BOOTSERVICE_ACCESS
,
162 sizeof(SYSTEM_CONFIGURATION
),
163 &mSystemConfiguration
168 // USB Device 29 configuration
170 DxePlatformPchPolicy
->UsbConfig
->Usb20Settings
[0].Enable
= mSystemConfiguration
.PchUsb20
;
171 DxePlatformPchPolicy
->UsbConfig
->UsbPerPortCtl
= mSystemConfiguration
.PchUsbPerPortCtl
;
172 if (mSystemConfiguration
.PchUsbPerPortCtl
!= PCH_DEVICE_DISABLE
) {
173 for (PortIndex
= 0; PortIndex
< PCH_USB_MAX_PHYSICAL_PORTS
; PortIndex
++) {
174 DxePlatformPchPolicy
->UsbConfig
->PortSettings
[PortIndex
].Enable
= mSystemConfiguration
.PchUsbPort
[PortIndex
];
178 DxePlatformPchPolicy
->UsbConfig
->EhciDebug
= mSystemConfiguration
.PchEhciDebug
;
181 // xHCI (USB 3.0) related settings from setup variable
183 DxePlatformPchPolicy
->UsbConfig
->Usb30Settings
.XhciStreams
= mSystemConfiguration
.PchUsb30Streams
;
185 DxePlatformPchPolicy
->UsbConfig
->Usb30Settings
.Mode
= mSystemConfiguration
.PchUsb30Mode
;
188 // Remove XHCI Pre-Boot Driver setup option selection from end-user view and automate loading of USB 3.0 BIOS driver based on XhciMode selection
190 switch (mSystemConfiguration
.PchUsb30Mode
) {
192 DxePlatformPchPolicy
->UsbConfig
->Usb30Settings
.PreBootSupport
= 0;
195 DxePlatformPchPolicy
->UsbConfig
->Usb30Settings
.PreBootSupport
= 1;
198 DxePlatformPchPolicy
->UsbConfig
->Usb30Settings
.PreBootSupport
= 0;
200 case 3: // Smart Auto
201 DxePlatformPchPolicy
->UsbConfig
->Usb30Settings
.PreBootSupport
= 1;
204 DxePlatformPchPolicy
->UsbConfig
->Usb30Settings
.PreBootSupport
= mSystemConfiguration
.UsbXhciSupport
;
210 DxePlatformPchPolicy
->UsbConfig
->UsbOtgSettings
.Enable
= mSystemConfiguration
.PchUsbOtg
;
212 DxePlatformPchPolicy
->UsbConfig
->PortSettings
[0].Dock
= PCH_DEVICE_DISABLE
;
213 DxePlatformPchPolicy
->UsbConfig
->PortSettings
[1].Dock
= PCH_DEVICE_DISABLE
;
214 DxePlatformPchPolicy
->UsbConfig
->PortSettings
[2].Dock
= PCH_DEVICE_DISABLE
;
215 DxePlatformPchPolicy
->UsbConfig
->PortSettings
[3].Dock
= PCH_DEVICE_DISABLE
;
217 DxePlatformPchPolicy
->UsbConfig
->PortSettings
[0].Panel
= PCH_USB_FRONT_PANEL
;
218 DxePlatformPchPolicy
->UsbConfig
->PortSettings
[1].Panel
= PCH_USB_FRONT_PANEL
;
219 DxePlatformPchPolicy
->UsbConfig
->PortSettings
[2].Panel
= PCH_USB_BACK_PANEL
;
220 DxePlatformPchPolicy
->UsbConfig
->PortSettings
[3].Panel
= PCH_USB_BACK_PANEL
;
224 // Enable USB Topology control and program the topology setting for every USB port
225 // See Platform Design Guide for description of topologies
228 // Port 0: ~5.3", Port 1: ~4.9", Port 2: ~4.7", Port 3: ~8.0"
230 DxePlatformPchPolicy
->UsbConfig
->Usb20PortLength
[0] = 0x53;
231 DxePlatformPchPolicy
->UsbConfig
->Usb20PortLength
[1] = 0x49;
232 DxePlatformPchPolicy
->UsbConfig
->Usb20PortLength
[2] = 0x47;
233 DxePlatformPchPolicy
->UsbConfig
->Usb20PortLength
[3] = 0x80;
235 DxePlatformPchPolicy
->UsbConfig
->Usb20OverCurrentPins
[0] = PchUsbOverCurrentPin0
;
236 DxePlatformPchPolicy
->UsbConfig
->Usb20OverCurrentPins
[1] = PchUsbOverCurrentPin0
;
237 DxePlatformPchPolicy
->UsbConfig
->Usb20OverCurrentPins
[2] = PchUsbOverCurrentPin1
;
238 DxePlatformPchPolicy
->UsbConfig
->Usb20OverCurrentPins
[3] = PchUsbOverCurrentPin1
;
240 DxePlatformPchPolicy
->UsbConfig
->Usb30OverCurrentPins
[0] = PchUsbOverCurrentPinSkip
;//PchUsbOverCurrentPin0;
242 DxePlatformPchPolicy
->EhciPllCfgEnable
= mSystemConfiguration
.EhciPllCfgEnable
;
243 DEBUG ((EFI_D_INFO
, "InitPchPlatformPolicy() DxePlatformPchPolicy->EhciPllCfgEnable = 0x%x \n",DxePlatformPchPolicy
->EhciPllCfgEnable
));
244 DxePlatformPchPolicy
->PciExpressConfig
->PcieDynamicGating
= mSystemConfiguration
.PcieDynamicGating
;
245 for (PortIndex
= 0; PortIndex
< PCH_PCIE_MAX_ROOT_PORTS
; PortIndex
++) {
246 DxePlatformPchPolicy
->PciExpressConfig
->RootPort
[PortIndex
].Enable
= mSystemConfiguration
.IchPciExp
[PortIndex
];
247 DxePlatformPchPolicy
->PciExpressConfig
->RootPort
[PortIndex
].SlotImplemented
= PCH_DEVICE_ENABLE
;
248 DxePlatformPchPolicy
->PciExpressConfig
->RootPort
[PortIndex
].FunctionNumber
= PortIndex
;
249 DxePlatformPchPolicy
->PciExpressConfig
->RootPort
[PortIndex
].PhysicalSlotNumber
= PortIndex
;
250 DxePlatformPchPolicy
->PciExpressConfig
->RootPort
[PortIndex
].Aspm
= 4;
251 DxePlatformPchPolicy
->PciExpressConfig
->RootPort
[PortIndex
].PmSci
= PCH_DEVICE_DISABLE
;
252 DxePlatformPchPolicy
->PciExpressConfig
->RootPort
[PortIndex
].ExtSync
= PCH_DEVICE_DISABLE
;
253 DxePlatformPchPolicy
->PciExpressConfig
->RootPort
[PortIndex
].HotPlug
= PCH_DEVICE_DISABLE
;
254 DxePlatformPchPolicy
->PciExpressConfig
->RootPort
[PortIndex
].AdvancedErrorReporting
= PCH_DEVICE_DISABLE
;
255 DxePlatformPchPolicy
->PciExpressConfig
->RootPort
[PortIndex
].UnsupportedRequestReport
= PCH_DEVICE_DISABLE
;
256 DxePlatformPchPolicy
->PciExpressConfig
->RootPort
[PortIndex
].FatalErrorReport
= PCH_DEVICE_DISABLE
;
257 DxePlatformPchPolicy
->PciExpressConfig
->RootPort
[PortIndex
].NoFatalErrorReport
= PCH_DEVICE_DISABLE
;
258 DxePlatformPchPolicy
->PciExpressConfig
->RootPort
[PortIndex
].CorrectableErrorReport
= PCH_DEVICE_DISABLE
;
259 DxePlatformPchPolicy
->PciExpressConfig
->RootPort
[PortIndex
].PmeInterrupt
= 0;
260 DxePlatformPchPolicy
->PciExpressConfig
->RootPort
[PortIndex
].SystemErrorOnFatalError
= PCH_DEVICE_DISABLE
;
261 DxePlatformPchPolicy
->PciExpressConfig
->RootPort
[PortIndex
].SystemErrorOnNonFatalError
= PCH_DEVICE_DISABLE
;
262 DxePlatformPchPolicy
->PciExpressConfig
->RootPort
[PortIndex
].SystemErrorOnCorrectableError
= PCH_DEVICE_DISABLE
;
263 DxePlatformPchPolicy
->PciExpressConfig
->RootPort
[PortIndex
].CompletionTimeout
= PchPciECompletionTO_Default
;
267 // SATA configuration
269 for (PortIndex
= 0; PortIndex
< PCH_AHCI_MAX_PORTS
; PortIndex
++) {
270 if (mSystemConfiguration
.SataType
== 0) {
271 DxePlatformPchPolicy
->SataConfig
->PortSettings
[PortIndex
].Enable
= PCH_DEVICE_ENABLE
;
272 DxePlatformPchPolicy
->SataConfig
->LegacyMode
= PCH_DEVICE_ENABLE
;
274 DxePlatformPchPolicy
->SataConfig
->PortSettings
[PortIndex
].Enable
= PCH_DEVICE_ENABLE
;
275 DxePlatformPchPolicy
->SataConfig
->LegacyMode
= PCH_DEVICE_DISABLE
;
277 if(mSystemConfiguration
.Sata
== 1){
278 DxePlatformPchPolicy
->SataConfig
->PortSettings
[PortIndex
].Enable
= PCH_DEVICE_ENABLE
;
280 DxePlatformPchPolicy
->SataConfig
->PortSettings
[PortIndex
].Enable
= PCH_DEVICE_DISABLE
;
283 DxePlatformPchPolicy
->SataConfig
->PortSettings
[PortIndex
].HotPlug
= PCH_DEVICE_DISABLE
;
284 } else if(1 == PortIndex
){
285 DxePlatformPchPolicy
->SataConfig
->PortSettings
[PortIndex
].HotPlug
= PCH_DEVICE_DISABLE
;
288 DxePlatformPchPolicy
->SataConfig
->PortSettings
[PortIndex
].SpinUp
= PCH_DEVICE_DISABLE
;
289 DxePlatformPchPolicy
->SataConfig
->PortSettings
[PortIndex
].MechSw
= PCH_DEVICE_DISABLE
;
291 DxePlatformPchPolicy
->SataConfig
->RaidAlternateId
= PCH_DEVICE_DISABLE
;
292 DxePlatformPchPolicy
->SataConfig
->Raid0
= PCH_DEVICE_ENABLE
;
293 DxePlatformPchPolicy
->SataConfig
->Raid1
= PCH_DEVICE_ENABLE
;
294 DxePlatformPchPolicy
->SataConfig
->Raid10
= PCH_DEVICE_ENABLE
;
295 DxePlatformPchPolicy
->SataConfig
->Raid5
= PCH_DEVICE_ENABLE
;
296 DxePlatformPchPolicy
->SataConfig
->Irrt
= PCH_DEVICE_ENABLE
;
297 DxePlatformPchPolicy
->SataConfig
->OromUiBanner
= PCH_DEVICE_ENABLE
;
298 DxePlatformPchPolicy
->SataConfig
->HddUnlock
= PCH_DEVICE_ENABLE
;
299 DxePlatformPchPolicy
->SataConfig
->LedLocate
= PCH_DEVICE_ENABLE
;
300 DxePlatformPchPolicy
->SataConfig
->IrrtOnly
= PCH_DEVICE_ENABLE
;
301 DxePlatformPchPolicy
->SataConfig
->SalpSupport
= PCH_DEVICE_ENABLE
;
302 DxePlatformPchPolicy
->SataConfig
->TestMode
= mSystemConfiguration
.SataTestMode
;
307 DxePlatformPchPolicy
->AzaliaConfig
->Pme
= mSystemConfiguration
.AzaliaPme
;
308 DxePlatformPchPolicy
->AzaliaConfig
->HdmiCodec
= mSystemConfiguration
.HdmiCodec
;
309 DxePlatformPchPolicy
->AzaliaConfig
->DS
= mSystemConfiguration
.AzaliaDs
;
310 DxePlatformPchPolicy
->AzaliaConfig
->AzaliaVCi
= mSystemConfiguration
.AzaliaVCiEnable
;
313 // Set LPSS configuration according to setup value.
315 DxePlatformPchPolicy
->LpssConfig
->LpssPciModeEnabled
= mSystemConfiguration
.LpssPciModeEnabled
;
317 DxePlatformPchPolicy
->LpssConfig
->Dma1Enabled
= mSystemConfiguration
.LpssDma1Enabled
;
318 DxePlatformPchPolicy
->LpssConfig
->I2C0Enabled
= mSystemConfiguration
.LpssI2C0Enabled
;
319 DxePlatformPchPolicy
->LpssConfig
->I2C1Enabled
= mSystemConfiguration
.LpssI2C1Enabled
;
320 DxePlatformPchPolicy
->LpssConfig
->I2C2Enabled
= mSystemConfiguration
.LpssI2C2Enabled
;
321 DxePlatformPchPolicy
->LpssConfig
->I2C3Enabled
= mSystemConfiguration
.LpssI2C3Enabled
;
322 DxePlatformPchPolicy
->LpssConfig
->I2C4Enabled
= mSystemConfiguration
.LpssI2C4Enabled
;
323 DxePlatformPchPolicy
->LpssConfig
->I2C5Enabled
= mSystemConfiguration
.LpssI2C5Enabled
;
324 DxePlatformPchPolicy
->LpssConfig
->I2C6Enabled
= mSystemConfiguration
.LpssI2C6Enabled
;
326 DxePlatformPchPolicy
->LpssConfig
->Dma0Enabled
= mSystemConfiguration
.LpssDma0Enabled
;;
327 DxePlatformPchPolicy
->LpssConfig
->Pwm0Enabled
= mSystemConfiguration
.LpssPwm0Enabled
;
328 DxePlatformPchPolicy
->LpssConfig
->Pwm1Enabled
= mSystemConfiguration
.LpssPwm1Enabled
;
329 DxePlatformPchPolicy
->LpssConfig
->Hsuart0Enabled
= mSystemConfiguration
.LpssHsuart0Enabled
;
330 DxePlatformPchPolicy
->LpssConfig
->Hsuart1Enabled
= mSystemConfiguration
.LpssHsuart1Enabled
;
331 DxePlatformPchPolicy
->LpssConfig
->SpiEnabled
= mSystemConfiguration
.LpssSpiEnabled
;
334 // Set SCC configuration according to setup value.
336 DxePlatformPchPolicy
->SccConfig
->SdioEnabled
= mSystemConfiguration
.LpssSdioEnabled
;
337 DxePlatformPchPolicy
->SccConfig
->SdcardEnabled
= TRUE
;
338 DxePlatformPchPolicy
->SccConfig
->SdCardSDR25Enabled
= mSystemConfiguration
.LpssSdCardSDR25Enabled
;
339 DxePlatformPchPolicy
->SccConfig
->SdCardDDR50Enabled
= mSystemConfiguration
.LpssSdCardDDR50Enabled
;
340 DxePlatformPchPolicy
->SccConfig
->HsiEnabled
= mSystemConfiguration
.LpssMipiHsi
;
342 if (mSystemConfiguration
.eMMCBootMode
== 1) {// Auto detection mode
346 switch (PchStepping()) {
347 case PchA0
: // A0 and A1
349 DEBUG ((EFI_D_ERROR
, "Auto Detect: SOC A0/A1: SCC eMMC 4.41 Configuration\n"));
350 DxePlatformPchPolicy
->SccConfig
->eMMCEnabled
= 1;
351 DxePlatformPchPolicy
->SccConfig
->eMMC45Enabled
= 0;
352 DxePlatformPchPolicy
->SccConfig
->eMMC45DDR50Enabled
= 0;
353 DxePlatformPchPolicy
->SccConfig
->eMMC45HS200Enabled
= 0;
354 DxePlatformPchPolicy
->SccConfig
->eMMC45RetuneTimerValue
= 0;
356 case PchB0
: // B0 and later
358 DEBUG ((EFI_D_ERROR
, "Auto Detect: SOC B0 and later: SCC eMMC 4.5 Configuration\n"));
359 DxePlatformPchPolicy
->SccConfig
->eMMCEnabled
= 0;
360 DxePlatformPchPolicy
->SccConfig
->eMMC45Enabled
= mSystemConfiguration
.LpsseMMC45Enabled
;
361 DxePlatformPchPolicy
->SccConfig
->eMMC45DDR50Enabled
= mSystemConfiguration
.LpsseMMC45DDR50Enabled
;
362 DxePlatformPchPolicy
->SccConfig
->eMMC45HS200Enabled
= mSystemConfiguration
.LpsseMMC45HS200Enabled
;
363 DxePlatformPchPolicy
->SccConfig
->eMMC45RetuneTimerValue
= mSystemConfiguration
.LpsseMMC45RetuneTimerValue
;
366 } else if (mSystemConfiguration
.eMMCBootMode
== 2) { // eMMC 4.41
367 DEBUG ((EFI_D_ERROR
, "Force to SCC eMMC 4.41 Configuration\n"));
368 DxePlatformPchPolicy
->SccConfig
->eMMCEnabled
= 1;
369 DxePlatformPchPolicy
->SccConfig
->eMMC45Enabled
= 0;
370 DxePlatformPchPolicy
->SccConfig
->eMMC45DDR50Enabled
= 0;
371 DxePlatformPchPolicy
->SccConfig
->eMMC45HS200Enabled
= 0;
372 DxePlatformPchPolicy
->SccConfig
->eMMC45RetuneTimerValue
= 0;
374 } else if (mSystemConfiguration
.eMMCBootMode
== 3) { // eMMC 4.5
375 DEBUG ((EFI_D_ERROR
, "Force to eMMC 4.5 Configuration\n"));
376 DxePlatformPchPolicy
->SccConfig
->eMMCEnabled
= 0;
377 DxePlatformPchPolicy
->SccConfig
->eMMC45Enabled
= mSystemConfiguration
.LpsseMMC45Enabled
;
378 DxePlatformPchPolicy
->SccConfig
->eMMC45DDR50Enabled
= mSystemConfiguration
.LpsseMMC45DDR50Enabled
;
379 DxePlatformPchPolicy
->SccConfig
->eMMC45HS200Enabled
= mSystemConfiguration
.LpsseMMC45HS200Enabled
;
380 DxePlatformPchPolicy
->SccConfig
->eMMC45RetuneTimerValue
= mSystemConfiguration
.LpsseMMC45RetuneTimerValue
;
382 } else { // Disable eMMC controllers
383 DEBUG ((EFI_D_ERROR
, "Disable eMMC controllers\n"));
384 DxePlatformPchPolicy
->SccConfig
->eMMCEnabled
= 0;
385 DxePlatformPchPolicy
->SccConfig
->eMMC45Enabled
= 0;
386 DxePlatformPchPolicy
->SccConfig
->eMMC45DDR50Enabled
= 0;
387 DxePlatformPchPolicy
->SccConfig
->eMMC45HS200Enabled
= 0;
388 DxePlatformPchPolicy
->SccConfig
->eMMC45RetuneTimerValue
= 0;
392 // Reserved SMBus Address
394 DxePlatformPchPolicy
->SmbusConfig
->NumRsvdSmbusAddresses
= 4;
395 DxePlatformPchPolicy
->SmbusConfig
->RsvdSmbusAddressTable
= mSmbusRsvdAddresses
;
398 // MiscPm Configuration
400 DxePlatformPchPolicy
->MiscPmConfig
->WakeConfig
.WolEnableOverride
= mSystemConfiguration
.WakeOnLanS5
;
401 DxePlatformPchPolicy
->MiscPmConfig
->SlpLanLowDc
= mSystemConfiguration
.SlpLanLowDc
;
402 DxePlatformPchPolicy
->MiscPmConfig
->PowerResetStatusClear
.MeWakeSts
= PCH_DEVICE_ENABLE
;
403 DxePlatformPchPolicy
->MiscPmConfig
->PowerResetStatusClear
.MeHrstColdSts
= PCH_DEVICE_ENABLE
;
404 DxePlatformPchPolicy
->MiscPmConfig
->PowerResetStatusClear
.MeHrstWarmSts
= PCH_DEVICE_ENABLE
;
407 // Enable / disable serial IRQ according to setup value.
409 DxePlatformPchPolicy
->SerialIrqConfig
->SirqEnable
= PCH_DEVICE_ENABLE
;
412 // Set Serial IRQ Mode Select according to setup value.
414 DxePlatformPchPolicy
->SerialIrqConfig
->SirqMode
= PchQuietMode
;
417 // Program the default Sub System Vendor Device Id
419 DxePlatformPchPolicy
->DefaultSvidSid
->SubSystemVendorId
= V_PCH_INTEL_VENDOR_ID
;
420 DxePlatformPchPolicy
->DefaultSvidSid
->SubSystemId
= V_PCH_DEFAULT_SID
;
422 mAzaliaVerbTable
[9].VerbTableData
= mAzaliaVerbTableData12
;
424 DxePlatformPchPolicy
->AzaliaConfig
->AzaliaVerbTableNum
= sizeof (mAzaliaVerbTable
) / sizeof (PCH_AZALIA_VERB_TABLE
);
425 DxePlatformPchPolicy
->AzaliaConfig
->AzaliaVerbTable
= mAzaliaVerbTable
;
426 DxePlatformPchPolicy
->AzaliaConfig
->ResetWaitTimer
= 300;
428 DxePlatformPchPolicy
->IdleReserve
= mSystemConfiguration
.IdleReserve
;
429 DxePlatformPchPolicy
->AcpiHWRed
= PCH_DEVICE_DISABLE
;
432 // Install DxePchPolicyUpdateProtocol
436 mDxePchPolicyUpdate
.Revision
= DXE_PCH_POLICY_UPDATE_PROTOCOL_REVISION_1
;
438 Status
= gBS
->InstallMultipleProtocolInterfaces (
440 &gDxePchPolicyUpdateProtocolGuid
,
441 &mDxePchPolicyUpdate
,
444 ASSERT_EFI_ERROR (Status
);
446 DEBUG ((EFI_D_INFO
, "InitPchPlatformPolicy() - End\n"));
450 DXE_VLV_PLATFORM_POLICY_PROTOCOL mDxePlatformVlvPolicy
;
453 InitVlvPlatformPolicy (
456 DXE_VLV_PLATFORM_POLICY_PROTOCOL
*DxePlatformVlvPolicy
;
460 ZeroMem (&mDxePlatformVlvPolicy
, sizeof(DXE_VLV_PLATFORM_POLICY_PROTOCOL
));
462 DxePlatformVlvPolicy
= &mDxePlatformVlvPolicy
;
465 DxePlatformVlvPolicy
->GraphicReserve00
= mSystemConfiguration
.GraphicReserve00
;
466 DxePlatformVlvPolicy
->PavpMode
= mSystemConfiguration
.PavpMode
;
467 DxePlatformVlvPolicy
->GraphicReserve01
= 1;
468 DxePlatformVlvPolicy
->GraphicReserve02
= mSystemConfiguration
.GraphicReserve02
;
469 DxePlatformVlvPolicy
->GraphicReserve03
= 1;
470 DxePlatformVlvPolicy
->GraphicReserve04
= 0;
471 DxePlatformVlvPolicy
->GraphicReserve05
= mSystemConfiguration
.GraphicReserve05
;
472 DxePlatformVlvPolicy
->IgdPanelFeatures
.PFITStatus
= mSystemConfiguration
.PanelScaling
;
474 DxePlatformVlvPolicy
->IgdPanelFeatures
.LidStatus
= 1;
475 DxePlatformVlvPolicy
->IdleReserve
= mSystemConfiguration
.IdleReserve
;
477 DxePlatformVlvPolicy
->GraphicReserve06
= 1;
479 if ( (mSystemConfiguration
.Lpe
== 1) || mSystemConfiguration
.Lpe
== 2) {
480 DxePlatformVlvPolicy
->AudioTypeSupport
= LPE_AUDIO
;
481 } else if ( mSystemConfiguration
.PchAzalia
== 1 ) {
482 DxePlatformVlvPolicy
->AudioTypeSupport
= HD_AUDIO
;
484 DxePlatformVlvPolicy
->AudioTypeSupport
= NO_AUDIO
;
488 Status
= gBS
->InstallProtocolInterface (
490 &gDxeVlvPlatformPolicyGuid
,
491 EFI_NATIVE_INTERFACE
,
494 ASSERT_EFI_ERROR(Status
);