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[mirror_edk2.git] / Vlv2TbltDevicePkg / PlatformDxe / Platform.c
1 /** @file
2
3 Copyright (c) 2004 - 2015, Intel Corporation. All rights reserved.<BR>
4
5
6 SPDX-License-Identifier: BSD-2-Clause-Patent
7
8
9
10
11 Module Name:
12
13
14 Platform.c
15
16 Abstract:
17
18 Platform Initialization Driver.
19
20
21 --*/
22
23 #include "PlatformDxe.h"
24 #include "Platform.h"
25 #include "PchCommonDefinitions.h"
26 #include <Protocol/UsbPolicy.h>
27 #include <Protocol/PchPlatformPolicy.h>
28 #include <Protocol/TpmMp.h>
29 #include <Protocol/CpuIo2.h>
30 #include <Library/S3BootScriptLib.h>
31 #include <Guid/PciLanInfo.h>
32 #include <Guid/ItkData.h>
33 #include <Library/PciLib.h>
34 #include <PlatformBootMode.h>
35 #include <Guid/EventGroup.h>
36 #include <Guid/Vlv2Variable.h>
37 #include <Protocol/GlobalNvsArea.h>
38 #include <Protocol/IgdOpRegion.h>
39 #include <Library/PcdLib.h>
40 #include <Protocol/VariableLock.h>
41
42
43 //
44 // VLV2 GPIO GROUP OFFSET
45 //
46 #define GPIO_SCORE_OFFSET 0x0000
47 #define GPIO_NCORE_OFFSET 0x1000
48 #define GPIO_SSUS_OFFSET 0x2000
49
50 typedef struct {
51 UINT32 offset;
52 UINT32 val;
53 } CFIO_PNP_INIT;
54
55 GPIO_CONF_PAD_INIT mTB_BL_GpioInitData_SC_TRI_Exit_boot_Service[] =
56 {
57 // Pad Name GPIO Number Used As GPO Default Function# INT Capable Interrupt Type PULL H/L MMIO Offset
58 GPIO_INIT_ITEM("LPC_CLKOUT0 GPIOC_47 " ,TRISTS ,NA ,F0 , , ,NONE ,0x47),
59 GPIO_INIT_ITEM("LPC_CLKOUT1 GPIOC_48 " ,TRISTS ,NA ,F0 , , ,NONE ,0x41),
60 };
61
62
63 EFI_GUID mSystemHiiExportDatabase = EFI_HII_EXPORT_DATABASE_GUID;
64 EFI_GUID mPlatformDriverGuid = EFI_PLATFORM_DRIVER_GUID;
65 SYSTEM_CONFIGURATION mSystemConfiguration;
66 SYSTEM_PASSWORDS mSystemPassword;
67 EFI_HANDLE mImageHandle;
68 BOOLEAN mMfgMode = FALSE;
69 VOID *mDxePlatformStringPack;
70 UINT32 mPlatformBootMode = PLATFORM_NORMAL_MODE;
71 extern CHAR16 gItkDataVarName[];
72
73
74 EFI_PLATFORM_INFO_HOB mPlatformInfo;
75 EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *mPciRootBridgeIo;
76 EFI_EVENT mReadyToBootEvent;
77
78 UINT8 mSmbusRsvdAddresses[] = PLATFORM_SMBUS_RSVD_ADDRESSES;
79 UINT8 mNumberSmbusAddress = sizeof( mSmbusRsvdAddresses ) / sizeof( mSmbusRsvdAddresses[0] );
80 UINT32 mSubsystemVidDid;
81 UINT32 mSubsystemAudioVidDid;
82
83 UINTN mPciLanCount = 0;
84 VOID *mPciLanInfo = NULL;
85 UINTN SpiBase;
86
87 static EFI_SPEAKER_IF_PROTOCOL mSpeakerInterface = {
88 ProgramToneFrequency,
89 GenerateBeepTone
90 };
91
92 EFI_USB_POLICY_PROTOCOL mUsbPolicyData = {0};
93
94
95 CFIO_PNP_INIT mTB_BL_GpioInitData_SC_TRI_S0ix_Exit_boot_Service[] =
96 {
97 {0x410 ,0x20038e10}, //vlv.gpio.gpscore.cfio_regs_pad_lpc_clkout1_pconf0
98 {0x470 ,0x20038e10}, //vlv.gpio.gpscore.cfio_regs_pad_lpc_clkout0_pconf0
99 {0x560 ,0x20038e10}, //vlv.gpio.gpscore.cfio_regs_pad_ilb_serirq_pconf0
100 {0x450 ,0x20038e10}, //vlv.gpio.gpscore.cfio_regs_pad_lpc_frameb_pconf0
101 {0x480 ,0x20038e10}, //vlv.gpio.gpscore.cfio_regs_pad_lpc_clkrunb_pconf0
102 {0x420 ,0x20038e10}, //vlv.gpio.gpscore.cfio_regs_pad_lpc_ad3_pconf0
103 {0x430 ,0x20038e10}, //vlv.gpio.gpscore.cfio_regs_pad_lpc_ad2_pconf0
104 {0x440 ,0x20038e10}, //vlv.gpio.gpscore.cfio_regs_pad_lpc_ad1_pconf0
105 {0x460 ,0x20038e10}, //vlv.gpio.gpscore.cfio_regs_pad_lpc_ad0_pconf0
106 {0x418 ,0x00000006}, //vlv.gpio.gpscore.cfio_regs_pad_lpc_clkout1_pad_val
107 {0x478 ,0x00000006}, //vlv.gpio.gpscore.cfio_regs_pad_lpc_clkout0_pad_val
108 {0x568 ,0x00000006}, //vlv.gpio.gpscore.cfio_regs_pad_ilb_serirq_pad_val
109 {0x458 ,0x00000006}, //vlv.gpio.gpscore.cfio_regs_pad_lpc_frameb_pad_val
110 {0x488 ,0x00000006}, //vlv.gpio.gpscore.cfio_regs_pad_lpc_clkrunb_pad_val
111 {0x428 ,0x00000006}, //vlv.gpio.gpscore.cfio_regs_pad_lpc_ad3_pad_val
112 {0x438 ,0x00000006}, //vlv.gpio.gpscore.cfio_regs_pad_lpc_ad2_pad_val
113 {0x448 ,0x00000006}, //vlv.gpio.gpscore.cfio_regs_pad_lpc_ad1_pad_val
114 {0x468 ,0x00000006}, //vlv.gpio.gpscore.cfio_regs_pad_lpc_ad0_pad_val
115 };
116
117 VOID
118 EfiOrMem (
119 IN VOID *Destination,
120 IN VOID *Source,
121 IN UINTN Length
122 );
123
124 #if defined(FIRMWARE_ID_BACKWARD_COMPATIBLE) && (FIRMWARE_ID_BACKWARD_COMPATIBLE != 0)
125 STATIC
126 VOID
127 InitFirmwareId();
128 #endif
129
130
131 VOID
132 InitializeClockRouting(
133 );
134
135 VOID
136 InitializeSlotInfo (
137 );
138
139 #if defined(SENSOR_INFO_VAR_SUPPORT) && SENSOR_INFO_VAR_SUPPORT != 0
140 VOID
141 InitializeSensorInfoVariable (
142 );
143 #endif
144
145 VOID
146 InitTcoReset (
147 );
148
149 VOID
150 InitExI ();
151
152 VOID
153 InitItk();
154
155 VOID
156 InitPlatformBootMode();
157
158 VOID
159 InitMfgAndConfigModeStateVar();
160
161 VOID
162 InitPchPlatformPolicy (
163 IN EFI_PLATFORM_INFO_HOB *PlatformInfo
164 );
165
166 VOID
167 InitVlvPlatformPolicy (
168 );
169
170 VOID
171 InitSioPlatformPolicy(
172 );
173
174 VOID
175 PchInitBeforeBoot(
176 );
177
178 VOID
179 UpdateDVMTSetup(
180 );
181
182 VOID
183 InitPlatformUsbPolicy (
184 VOID
185 );
186
187 VOID
188 InitRC6Policy(
189 VOID
190 );
191
192
193 EFI_STATUS
194 EFIAPI
195 SaveSetupRecoveryVar(
196 VOID
197 )
198 {
199 EFI_STATUS Status = EFI_SUCCESS;
200 UINTN SizeOfNvStore = 0;
201 UINTN SizeOfSetupVar = 0;
202 SYSTEM_CONFIGURATION *SetupData = NULL;
203 SYSTEM_CONFIGURATION *RecoveryNvData = NULL;
204 EDKII_VARIABLE_LOCK_PROTOCOL *VariableLock = NULL;
205
206
207 DEBUG ((EFI_D_INFO, "SaveSetupRecoveryVar() Entry \n"));
208 SizeOfNvStore = sizeof(SYSTEM_CONFIGURATION);
209 RecoveryNvData = AllocateZeroPool (sizeof(SYSTEM_CONFIGURATION));
210 if (NULL == RecoveryNvData) {
211 Status = EFI_OUT_OF_RESOURCES;
212 goto Exit;
213 }
214
215 Status = gRT->GetVariable(
216 L"SetupRecovery",
217 &gEfiNormalSetupGuid,
218 NULL,
219 &SizeOfNvStore,
220 RecoveryNvData
221 );
222
223 if (EFI_ERROR (Status)) {
224 // Don't find the "SetupRecovery" variable.
225 // have to copy "Setup" variable to "SetupRecovery" variable.
226 SetupData = AllocateZeroPool (sizeof(SYSTEM_CONFIGURATION));
227 if (NULL == SetupData) {
228 Status = EFI_OUT_OF_RESOURCES;
229 goto Exit;
230 }
231 SizeOfSetupVar = sizeof(SYSTEM_CONFIGURATION);
232 Status = gRT->GetVariable(
233 NORMAL_SETUP_NAME,
234 &gEfiNormalSetupGuid,
235 NULL,
236 &SizeOfSetupVar,
237 SetupData
238 );
239 ASSERT_EFI_ERROR (Status);
240
241 Status = gRT->SetVariable (
242 L"SetupRecovery",
243 &gEfiNormalSetupGuid,
244 EFI_VARIABLE_NON_VOLATILE | EFI_VARIABLE_BOOTSERVICE_ACCESS,
245 sizeof(SYSTEM_CONFIGURATION),
246 SetupData
247 );
248 ASSERT_EFI_ERROR (Status);
249
250 Status = gBS->LocateProtocol (&gEdkiiVariableLockProtocolGuid, NULL, (VOID **) &VariableLock);
251 if (!EFI_ERROR (Status)) {
252 Status = VariableLock->RequestToLock (VariableLock, L"SetupRecovery", &gEfiNormalSetupGuid);
253 ASSERT_EFI_ERROR (Status);
254 }
255
256 }
257
258 Exit:
259 if (RecoveryNvData)
260 FreePool (RecoveryNvData);
261 if (SetupData)
262 FreePool (SetupData);
263
264 return Status;
265
266 }
267
268
269 VOID
270 TristateLpcGpioConfig (
271 IN UINT32 Gpio_Mmio_Offset,
272 IN UINT32 Gpio_Pin_Num,
273 GPIO_CONF_PAD_INIT* Gpio_Conf_Data
274 )
275
276 {
277 UINT32 index;
278 UINT32 mmio_conf0;
279 UINT32 mmio_padval;
280 PAD_CONF0 conf0_val;
281 PAD_VAL pad_val;
282
283 //
284 // GPIO WELL -- Memory base registers
285 //
286
287 //
288 // A0 BIOS Spec doesn't mention it although X0 does. comment out now.
289 // GPIO write 0x01001002 to IOBASE + Gpio_Mmio_Offset + 0x0900
290 //
291
292 for(index=0; index < Gpio_Pin_Num; index++)
293 {
294 //
295 // Calculate the MMIO Address for specific GPIO pin CONF0 register pointed by index.
296 //
297 mmio_conf0 = IO_BASE_ADDRESS + Gpio_Mmio_Offset + R_PCH_CFIO_PAD_CONF0 + Gpio_Conf_Data[index].offset * 16;
298 mmio_padval= IO_BASE_ADDRESS + Gpio_Mmio_Offset + R_PCH_CFIO_PAD_VAL + Gpio_Conf_Data[index].offset * 16;
299
300 #ifdef EFI_DEBUG
301 DEBUG ((EFI_D_INFO, "%s, ", Gpio_Conf_Data[index].pad_name));
302
303 #endif
304 DEBUG ((EFI_D_INFO, "Usage = %d, Func# = %d, IntType = %d, Pull Up/Down = %d, MMIO Base = 0x%08x, ",
305 Gpio_Conf_Data[index].usage,
306 Gpio_Conf_Data[index].func,
307 Gpio_Conf_Data[index].int_type,
308 Gpio_Conf_Data[index].pull,
309 mmio_conf0));
310
311 //
312 // Step 1: PadVal Programming
313 //
314 pad_val.dw = MmioRead32(mmio_padval);
315
316 //
317 // Config PAD_VAL only for GPIO (Non-Native) Pin
318 //
319 if(Native != Gpio_Conf_Data[index].usage)
320 {
321 pad_val.dw &= ~0x6; // Clear bits 1:2
322 pad_val.dw |= (Gpio_Conf_Data[index].usage & 0x6); // Set bits 1:2 according to PadVal
323
324 //
325 // set GPO default value
326 //
327 if(Gpio_Conf_Data[index].usage == GPO && Gpio_Conf_Data[index].gpod4 != NA)
328 {
329 pad_val.r.pad_val = Gpio_Conf_Data[index].gpod4;
330 }
331 }
332
333
334 DEBUG ((EFI_D_INFO, "Set PAD_VAL = 0x%08x, ", pad_val.dw));
335
336 MmioWrite32(mmio_padval, pad_val.dw);
337
338 //
339 // Step 2: CONF0 Programming
340 // Read GPIO default CONF0 value, which is assumed to be default value after reset.
341 //
342 conf0_val.dw = MmioRead32(mmio_conf0);
343
344 //
345 // Set Function #
346 //
347 conf0_val.r.Func_Pin_Mux = Gpio_Conf_Data[index].func;
348
349 if(GPO == Gpio_Conf_Data[index].usage)
350 {
351 //
352 // If used as GPO, then internal pull need to be disabled
353 //
354 conf0_val.r.Pull_assign = 0; // Non-pull
355 }
356 else
357 {
358 //
359 // Set PullUp / PullDown
360 //
361 if(P_20K_H == Gpio_Conf_Data[index].pull)
362 {
363 conf0_val.r.Pull_assign = 0x1; // PullUp
364 conf0_val.r.Pull_strength = 0x2;// 20K
365 }
366 else if(P_20K_L == Gpio_Conf_Data[index].pull)
367 {
368 conf0_val.r.Pull_assign = 0x2; // PullDown
369 conf0_val.r.Pull_strength = 0x2;// 20K
370 }
371 else if(P_NONE == Gpio_Conf_Data[index].pull)
372 {
373 conf0_val.r.Pull_assign = 0; // Non-pull
374 }
375 else
376 {
377 ASSERT(FALSE); // Invalid value
378 }
379 }
380
381 //
382 // Set INT Trigger Type
383 //
384 conf0_val.dw &= ~0x0f000000; // Clear bits 27:24
385
386 //
387 // Set INT Trigger Type
388 //
389 if(TRIG_ == Gpio_Conf_Data[index].int_type)
390 {
391 //
392 // Interrupt not capable, clear bits 27:24
393 //
394 }
395 else
396 {
397 conf0_val.dw |= (Gpio_Conf_Data[index].int_type & 0x0f)<<24;
398 }
399
400 DEBUG ((EFI_D_INFO, "Set CONF0 = 0x%08x\n", conf0_val.dw));
401
402 //
403 // Write back the targeted GPIO config value according to platform (board) GPIO setting
404 //
405 MmioWrite32 (mmio_conf0, conf0_val.dw);
406 }
407
408 // A0 BIOS Spec doesn't mention it although X0 does. comment out now.
409 // GPIO SCORE write 0x01001002 to IOBASE + 0x0900
410 //
411 }
412
413 VOID
414 EFIAPI
415 SpiBiosProtectionFunction(
416 EFI_EVENT Event,
417 VOID *Context
418 )
419 {
420
421 UINTN mPciD31F0RegBase;
422 UINTN BiosFlaLower0;
423 UINTN BiosFlaLimit0;
424 UINTN BiosFlaLower1;
425 UINTN BiosFlaLimit1;
426
427
428 BiosFlaLower0 = PcdGet32(PcdFlashMicroCodeAddress)-PcdGet32(PcdFlashAreaBaseAddress);
429 BiosFlaLimit0 = PcdGet32(PcdFlashMicroCodeSize)-1;
430 #ifdef MINNOW2_FSP_BUILD
431 BiosFlaLower1 = PcdGet32(PcdFlashFvFspBase)-PcdGet32(PcdFlashAreaBaseAddress);
432 BiosFlaLimit1 = (PcdGet32(PcdFlashFvRecoveryBase)-PcdGet32(PcdFlashFvFspBase)+PcdGet32(PcdFlashFvRecoverySize))-1;
433 #else
434 BiosFlaLower1 = PcdGet32(PcdFlashFvMainBase)-PcdGet32(PcdFlashAreaBaseAddress);
435 BiosFlaLimit1 = (PcdGet32(PcdFlashFvRecoveryBase)-PcdGet32(PcdFlashFvMainBase)+PcdGet32(PcdFlashFvRecoverySize))-1;
436 #endif
437
438
439 mPciD31F0RegBase = MmPciAddress (0,
440 DEFAULT_PCI_BUS_NUMBER_PCH,
441 PCI_DEVICE_NUMBER_PCH_LPC,
442 PCI_FUNCTION_NUMBER_PCH_LPC,
443 0
444 );
445 SpiBase = MmioRead32(mPciD31F0RegBase + R_PCH_LPC_SPI_BASE) & B_PCH_LPC_SPI_BASE_BAR;
446
447 //
448 //Set SMM_BWP, WPD and LE bit
449 //
450 MmioOr32 ((UINTN) (SpiBase + R_PCH_SPI_BCR), (UINT8) B_PCH_SPI_BCR_SMM_BWP);
451 MmioAnd32 ((UINTN) (SpiBase + R_PCH_SPI_BCR), (UINT8)(~B_PCH_SPI_BCR_BIOSWE));
452 MmioOr32 ((UINTN) (SpiBase + R_PCH_SPI_BCR), (UINT8) B_PCH_SPI_BCR_BLE);
453
454 //
455 //First check if FLOCKDN or PR0FLOCKDN is set. No action if either of them set already.
456 //
457 if( (MmioRead16(SpiBase + R_PCH_SPI_HSFS) & B_PCH_SPI_HSFS_FLOCKDN) != 0 ||
458 (MmioRead32(SpiBase + R_PCH_SPI_IND_LOCK)& B_PCH_SPI_IND_LOCK_PR0) != 0) {
459 //
460 //Already locked. we could take no action here
461 //
462 DEBUG((EFI_D_INFO, "PR0 already locked down. Stop configuring PR0.\n"));
463 return;
464 }
465
466 //
467 //Set PR0
468 //
469 MmioOr32((UINTN)(SpiBase + R_PCH_SPI_PR0),
470 B_PCH_SPI_PR0_RPE|B_PCH_SPI_PR0_WPE|\
471 (B_PCH_SPI_PR0_PRB_MASK&(BiosFlaLower0>>12))|(B_PCH_SPI_PR0_PRL_MASK&(BiosFlaLimit0>>12)<<16));
472
473 //
474 //Set PR1
475 //
476
477 MmioOr32((UINTN)(SpiBase + R_PCH_SPI_PR1),
478 B_PCH_SPI_PR1_RPE|B_PCH_SPI_PR1_WPE|\
479 (B_PCH_SPI_PR1_PRB_MASK&(BiosFlaLower1>>12))|(B_PCH_SPI_PR1_PRL_MASK&(BiosFlaLimit1>>12)<<16));
480
481 //
482 //Lock down PRx
483 //
484 MmioOr16 ((UINTN) (SpiBase + R_PCH_SPI_HSFS), (UINT16) (B_PCH_SPI_HSFS_FLOCKDN));
485
486 //
487 // Verify if it's really locked.
488 //
489 if ((MmioRead16 (SpiBase + R_PCH_SPI_HSFS) & B_PCH_SPI_HSFS_FLOCKDN) == 0) {
490 DEBUG((EFI_D_ERROR, "Failed to lock down PRx.\n"));
491 }
492 return;
493
494 }
495
496 VOID
497 EFIAPI
498 InitPciDevPME (
499 EFI_EVENT Event,
500 VOID *Context
501 )
502 {
503 UINTN VarSize;
504
505 VarSize = sizeof(SYSTEM_CONFIGURATION);
506 gRT->GetVariable(
507 NORMAL_SETUP_NAME,
508 &gEfiNormalSetupGuid,
509 NULL,
510 &VarSize,
511 &mSystemConfiguration
512 );
513
514 //
515 //Program HDA PME_EN
516 //
517 PchAzaliaPciCfg32Or (R_PCH_HDA_PCS, B_PCH_HDA_PCS_PMEE);
518
519 //
520 //Program SATA PME_EN
521 //
522 PchSataPciCfg32Or (R_PCH_SATA_PMCS, B_PCH_SATA_PMCS_PMEE);
523
524 DEBUG ((EFI_D_INFO, "InitPciDevPME mSystemConfiguration.EhciPllCfgEnable = 0x%x \n",mSystemConfiguration.EhciPllCfgEnable));
525 if (mSystemConfiguration.EhciPllCfgEnable != 1) {
526 //
527 //Program EHCI PME_EN
528 //
529 PchMmPci32Or (
530 0,
531 0,
532 PCI_DEVICE_NUMBER_PCH_USB,
533 PCI_FUNCTION_NUMBER_PCH_EHCI,
534 R_PCH_EHCI_PWR_CNTL_STS,
535 B_PCH_EHCI_PWR_CNTL_STS_PME_EN
536 );
537 }
538 {
539 UINTN EhciPciMmBase;
540 UINT32 Buffer32 = 0;
541
542 EhciPciMmBase = MmPciAddress (0,
543 0,
544 PCI_DEVICE_NUMBER_PCH_USB,
545 PCI_FUNCTION_NUMBER_PCH_EHCI,
546 0
547 );
548 DEBUG ((EFI_D_INFO, "ConfigureAdditionalPm() EhciPciMmBase = 0x%x \n",EhciPciMmBase));
549 Buffer32 = MmioRead32(EhciPciMmBase + R_PCH_EHCI_PWR_CNTL_STS);
550 DEBUG ((EFI_D_INFO, "ConfigureAdditionalPm() R_PCH_EHCI_PWR_CNTL_STS = 0x%x \n",Buffer32));
551 }
552 }
553
554 VOID
555 EFIAPI
556 InitThermalZone (
557 EFI_EVENT Event,
558 VOID *Context
559 )
560 {
561 UINTN VarSize;
562 EFI_GLOBAL_NVS_AREA_PROTOCOL *GlobalNvsArea;
563 VarSize = sizeof(SYSTEM_CONFIGURATION);
564 gRT->GetVariable(
565 NORMAL_SETUP_NAME,
566 &gEfiNormalSetupGuid,
567 NULL,
568 &VarSize,
569 &mSystemConfiguration
570 );
571 gBS->LocateProtocol (
572 &gEfiGlobalNvsAreaProtocolGuid,
573 NULL,
574 (void **)&GlobalNvsArea
575 );
576 GlobalNvsArea->Area->CriticalThermalTripPoint = mSystemConfiguration.CriticalThermalTripPoint;
577 GlobalNvsArea->Area->PassiveThermalTripPoint = mSystemConfiguration.PassiveThermalTripPoint;
578 }
579 #if defined SUPPORT_LVDS_DISPLAY && SUPPORT_LVDS_DISPLAY
580
581 #endif
582
583
584 EFI_STATUS
585 EFIAPI
586 TristateLpcGpioS0i3Config (
587 UINT32 Gpio_Mmio_Offset,
588 UINT32 Gpio_Pin_Num,
589 CFIO_PNP_INIT* Gpio_Conf_Data
590 )
591 {
592
593 UINT32 index;
594 UINT32 mmio_reg;
595 UINT32 mmio_val;
596
597 DEBUG ((DEBUG_INFO, "TristateLpcGpioS0i3Config\n"));
598
599 for(index=0; index < Gpio_Pin_Num; index++)
600 {
601 mmio_reg = IO_BASE_ADDRESS + Gpio_Mmio_Offset + Gpio_Conf_Data[index].offset;
602
603 MmioWrite32(mmio_reg, Gpio_Conf_Data[index].val);
604 mmio_val = 0;
605 mmio_val = MmioRead32(mmio_reg);
606
607 DEBUG ((EFI_D_INFO, "Set MMIO=0x%08x PAD_VAL = 0x%08x,\n", mmio_reg, mmio_val));
608 }
609
610 return EFI_SUCCESS;
611 }
612
613
614 EFI_BOOT_SCRIPT_SAVE_PROTOCOL *mBootScriptSave;
615
616 /**
617 Event Notification during exit boot service to enabel ACPI mode
618
619 Disable SW SMI Timer, SMI from USB & Intel Specific USB 2
620
621 Clear all ACPI event status and disable all ACPI events
622 Disable PM sources except power button
623 Clear status bits
624
625 Guarantee day-of-month alarm is invalid (ACPI 5.0 Section 4.8.2.4 "Real Time Clock Alarm")
626
627 Update EC to disable SMI and enable SCI
628
629 Enable SCI
630
631 Enable PME_B0_EN in GPE0a_EN
632
633 @param Event - EFI Event Handle
634 @param Context - Pointer to Notify Context
635
636 @retval Nothing
637
638 **/
639 VOID
640 EFIAPI
641 EnableAcpiCallback (
642 IN EFI_EVENT Event,
643 IN VOID *Context
644 )
645 {
646 UINT32 RegData32;
647 UINT16 Pm1Cnt;
648 UINT16 AcpiBase;
649 UINT32 Gpe0aEn;
650
651 AcpiBase = MmioRead16 (
652 PchPciDeviceMmBase (DEFAULT_PCI_BUS_NUMBER_PCH,
653 PCI_DEVICE_NUMBER_PCH_LPC,
654 PCI_FUNCTION_NUMBER_PCH_LPC) + R_PCH_LPC_ACPI_BASE
655 ) & B_PCH_LPC_ACPI_BASE_BAR;
656
657 DEBUG ((EFI_D_INFO, "EnableAcpiCallback: AcpiBase = %x\n", AcpiBase));
658
659 //
660 // Disable SW SMI Timer, SMI from USB & Intel Specific USB 2
661 //
662 RegData32 = IoRead32(AcpiBase + R_PCH_SMI_EN);
663 RegData32 &= ~(B_PCH_SMI_EN_SWSMI_TMR | B_PCH_SMI_EN_LEGACY_USB2 | B_PCH_SMI_EN_INTEL_USB2);
664 IoWrite32(AcpiBase + R_PCH_SMI_EN, RegData32);
665
666 RegData32 = IoRead32(AcpiBase + R_PCH_SMI_STS);
667 RegData32 |= B_PCH_SMI_STS_SWSMI_TMR;
668 IoWrite32(AcpiBase + R_PCH_SMI_STS, RegData32);
669
670 //
671 // Disable PM sources except power button
672 // power button is enabled only for PCAT. Disabled it on Tablet platform
673 //
674
675 IoWrite16(AcpiBase + R_PCH_ACPI_PM1_EN, B_PCH_ACPI_PM1_EN_PWRBTN);
676 IoWrite16(AcpiBase + R_PCH_ACPI_PM1_STS, 0xffff);
677
678 //
679 // Guarantee day-of-month alarm is invalid (ACPI 5.0 Section 4.8.2.4 "Real Time Clock Alarm")
680 // Clear Status D reg VM bit, Date of month Alarm to make Data in CMOS RAM is no longer Valid
681 //
682 IoWrite8 (PCAT_RTC_ADDRESS_REGISTER, RTC_ADDRESS_REGISTER_D);
683 IoWrite8 (PCAT_RTC_DATA_REGISTER, 0x0);
684
685 RegData32 = IoRead32(AcpiBase + R_PCH_ALT_GP_SMI_EN);
686 RegData32 &= ~(BIT7);
687 IoWrite32((AcpiBase + R_PCH_ALT_GP_SMI_EN), RegData32);
688
689 //
690 // Enable SCI
691 //
692 Pm1Cnt = IoRead16(AcpiBase + R_PCH_ACPI_PM1_CNT);
693 Pm1Cnt |= B_PCH_ACPI_PM1_CNT_SCI_EN;
694 IoWrite16(AcpiBase + R_PCH_ACPI_PM1_CNT, Pm1Cnt);
695
696 IoWrite8(0x80, 0xA0); //SW_SMI_ACPI_ENABLE
697
698 //
699 // Enable PME_B0_EN in GPE0a_EN
700 // Caution: Enable PME_B0_EN must be placed after enabling SCI.
701 // Otherwise, USB PME could not be handled as SMI event since no handler is there.
702 //
703 Gpe0aEn = IoRead32 (AcpiBase + R_PCH_ACPI_GPE0a_EN);
704 Gpe0aEn |= B_PCH_ACPI_GPE0a_EN_PME_B0;
705 IoWrite32(AcpiBase + R_PCH_ACPI_GPE0a_EN, Gpe0aEn);
706
707 }
708
709 /**
710
711 Routine Description:
712
713 This is the standard EFI driver point for the Driver. This
714 driver is responsible for setting up any platform specific policy or
715 initialization information.
716
717 @param ImageHandle Handle for the image of this driver.
718 @param SystemTable Pointer to the EFI System Table.
719
720 @retval EFI_SUCCESS Policy decisions set.
721
722 **/
723 EFI_STATUS
724 EFIAPI
725 InitializePlatform (
726 IN EFI_HANDLE ImageHandle,
727 IN EFI_SYSTEM_TABLE *SystemTable
728 )
729 {
730 EFI_STATUS Status;
731 UINTN VarSize;
732 EFI_HANDLE Handle = NULL;
733 EFI_EVENT mEfiExitBootServicesEvent;
734 EFI_EVENT RtcEvent;
735 VOID *RtcCallbackReg = NULL;
736
737 mImageHandle = ImageHandle;
738
739 Status = gBS->InstallProtocolInterface (
740 &Handle,
741 &gEfiSpeakerInterfaceProtocolGuid,
742 EFI_NATIVE_INTERFACE,
743 &mSpeakerInterface
744 );
745
746 Status = gBS->LocateProtocol (
747 &gEfiPciRootBridgeIoProtocolGuid,
748 NULL,
749 (VOID **) &mPciRootBridgeIo
750 );
751 ASSERT_EFI_ERROR (Status);
752
753 VarSize = sizeof(EFI_PLATFORM_INFO_HOB);
754 Status = gRT->GetVariable(
755 L"PlatformInfo",
756 &gEfiVlv2VariableGuid,
757 NULL,
758 &VarSize,
759 &mPlatformInfo
760 );
761
762 //
763 // Initialize Product Board ID variable
764 //
765 InitMfgAndConfigModeStateVar();
766 InitPlatformBootMode();
767
768 //
769 // Install Observable protocol
770 //
771 InitializeObservableProtocol();
772
773 Status = SaveSetupRecoveryVar();
774 if (EFI_ERROR (Status)) {
775 DEBUG ((EFI_D_ERROR, "InitializePlatform() Save SetupRecovery variable failed \n"));
776 }
777
778 VarSize = sizeof(SYSTEM_CONFIGURATION);
779 Status = gRT->GetVariable(
780 NORMAL_SETUP_NAME,
781 &gEfiNormalSetupGuid,
782 NULL,
783 &VarSize,
784 &mSystemConfiguration
785 );
786 if (EFI_ERROR (Status) || VarSize != sizeof(SYSTEM_CONFIGURATION)) {
787 //The setup variable is corrupted
788 VarSize = sizeof(SYSTEM_CONFIGURATION);
789 Status = gRT->GetVariable(
790 L"SetupRecovery",
791 &gEfiNormalSetupGuid,
792 NULL,
793 &VarSize,
794 &mSystemConfiguration
795 );
796 ASSERT_EFI_ERROR (Status);
797 Status = gRT->SetVariable (
798 NORMAL_SETUP_NAME,
799 &gEfiNormalSetupGuid,
800 EFI_VARIABLE_NON_VOLATILE | EFI_VARIABLE_BOOTSERVICE_ACCESS,
801 sizeof(SYSTEM_CONFIGURATION),
802 &mSystemConfiguration
803 );
804 }
805
806 Status = EfiCreateEventReadyToBootEx (
807 TPL_CALLBACK,
808 ReadyToBootFunction,
809 NULL,
810 &mReadyToBootEvent
811 );
812
813 //
814 // Create a ReadyToBoot Event to run the PME init process
815 //
816 Status = EfiCreateEventReadyToBootEx (
817 TPL_CALLBACK,
818 InitPciDevPME,
819 NULL,
820 &mReadyToBootEvent
821 );
822 //
823 // Create a ReadyToBoot Event to run enable PR0/PR1 and lock down,unlock variable region
824 //
825 if(mSystemConfiguration.SpiRwProtect==1) {
826 Status = EfiCreateEventReadyToBootEx (
827 TPL_CALLBACK,
828 SpiBiosProtectionFunction,
829 NULL,
830 &mReadyToBootEvent
831 );
832 }
833 //
834 // Create a ReadyToBoot Event to run the thermalzone init process
835 //
836 Status = EfiCreateEventReadyToBootEx (
837 TPL_CALLBACK,
838 InitThermalZone,
839 NULL,
840 &mReadyToBootEvent
841 );
842
843 ReportStatusCodeEx (
844 EFI_PROGRESS_CODE,
845 EFI_COMPUTING_UNIT_CHIPSET | EFI_CU_PLATFORM_DXE_STEP1,
846 0,
847 &gEfiCallerIdGuid,
848 NULL,
849 NULL,
850 0
851 );
852
853 #if defined(SENSOR_INFO_VAR_SUPPORT) && SENSOR_INFO_VAR_SUPPORT != 0
854 //
855 // Initialize Sensor Info variable
856 //
857 InitializeSensorInfoVariable();
858 #endif
859 InitPchPlatformPolicy(&mPlatformInfo);
860 InitVlvPlatformPolicy();
861
862 //
863 // Add usb policy
864 //
865 InitPlatformUsbPolicy();
866 InitSioPlatformPolicy();
867 InitializeClockRouting();
868 InitializeSlotInfo();
869 InitTcoReset();
870
871 //
872 //Init ExI
873 //
874 InitExI();
875
876 ReportStatusCodeEx (
877 EFI_PROGRESS_CODE,
878 EFI_COMPUTING_UNIT_CHIPSET | EFI_CU_PLATFORM_DXE_STEP2,
879 0,
880 &gEfiCallerIdGuid,
881 NULL,
882 NULL,
883 0
884 );
885
886 //
887 // Install PCI Bus Driver Hook
888 //
889 PciBusDriverHook();
890
891 InitItk();
892
893 ReportStatusCodeEx (
894 EFI_PROGRESS_CODE,
895 EFI_COMPUTING_UNIT_CHIPSET | EFI_CU_PLATFORM_DXE_STEP3,
896 0,
897 &gEfiCallerIdGuid,
898 NULL,
899 NULL,
900 0
901 );
902
903
904 //
905 // Initialize Password States and Callbacks
906 //
907 PchInitBeforeBoot();
908
909 #if defined SUPPORT_LVDS_DISPLAY && SUPPORT_LVDS_DISPLAY
910
911 #endif
912
913 #if defined(FIRMWARE_ID_BACKWARD_COMPATIBLE) && (FIRMWARE_ID_BACKWARD_COMPATIBLE != 0)
914 //
915 // Re-write Firmware ID if it is changed
916 //
917 InitFirmwareId();
918 #endif
919
920 ReportStatusCodeEx (
921 EFI_PROGRESS_CODE,
922 EFI_COMPUTING_UNIT_CHIPSET | EFI_CU_PLATFORM_DXE_STEP4,
923 0,
924 &gEfiCallerIdGuid,
925 NULL,
926 NULL,
927 0
928 );
929
930
931 Status = gBS->CreateEventEx (
932 EVT_NOTIFY_SIGNAL,
933 TPL_NOTIFY,
934 EnableAcpiCallback,
935 NULL,
936 &gEfiEventExitBootServicesGuid,
937 &mEfiExitBootServicesEvent
938 );
939
940 //
941 // Adjust RTC deafult time to be BIOS-built time.
942 //
943 Status = gBS->CreateEvent (
944 EVT_NOTIFY_SIGNAL,
945 TPL_CALLBACK,
946 AdjustDefaultRtcTimeCallback,
947 NULL,
948 &RtcEvent
949 );
950 if (!EFI_ERROR (Status)) {
951 Status = gBS->RegisterProtocolNotify (
952 &gExitPmAuthProtocolGuid,
953 RtcEvent,
954 &RtcCallbackReg
955 );
956
957 }
958
959 return EFI_SUCCESS;
960 }
961
962 /**
963 Source Or Destination with Length bytes.
964
965 @param[in] Destination Target memory
966 @param[in] Source Source memory
967 @param[in] Length Number of bytes
968
969 @retval None
970
971 **/
972 VOID
973 EfiOrMem (
974 IN VOID *Destination,
975 IN VOID *Source,
976 IN UINTN Length
977 )
978 {
979 CHAR8 *Destination8;
980 CHAR8 *Source8;
981
982 if (Source < Destination) {
983 Destination8 = (CHAR8 *) Destination + Length - 1;
984 Source8 = (CHAR8 *) Source + Length - 1;
985 while (Length--) {
986 *(Destination8--) |= *(Source8--);
987 }
988 } else {
989 Destination8 = (CHAR8 *) Destination;
990 Source8 = (CHAR8 *) Source;
991 while (Length--) {
992 *(Destination8++) |= *(Source8++);
993 }
994 }
995 }
996
997 VOID
998 PchInitBeforeBoot()
999 {
1000 //
1001 // Saved SPI Opcode menu to fix EFI variable unable to write after S3 resume.
1002 //
1003 S3BootScriptSaveMemWrite (
1004 EfiBootScriptWidthUint32,
1005 (UINTN)(SPI_BASE_ADDRESS + (R_PCH_SPI_OPMENU0)),
1006 1,
1007 (VOID *)(UINTN)(SPI_BASE_ADDRESS + (R_PCH_SPI_OPMENU0)));
1008
1009 S3BootScriptSaveMemWrite (
1010 EfiBootScriptWidthUint32,
1011 (UINTN)(SPI_BASE_ADDRESS + (R_PCH_SPI_OPMENU1)),
1012 1,
1013 (VOID *)(UINTN)(SPI_BASE_ADDRESS + (R_PCH_SPI_OPMENU1)));
1014
1015 S3BootScriptSaveMemWrite (
1016 EfiBootScriptWidthUint16,
1017 (UINTN)(SPI_BASE_ADDRESS + R_PCH_SPI_OPTYPE),
1018 1,
1019 (VOID *)(UINTN)(SPI_BASE_ADDRESS + R_PCH_SPI_OPTYPE));
1020
1021 S3BootScriptSaveMemWrite (
1022 EfiBootScriptWidthUint16,
1023 (UINTN)(SPI_BASE_ADDRESS + R_PCH_SPI_PREOP),
1024 1,
1025 (VOID *)(UINTN)(SPI_BASE_ADDRESS + R_PCH_SPI_PREOP));
1026
1027 //
1028 // Saved MTPMC_1 for S3 resume.
1029 //
1030 S3BootScriptSaveMemWrite (
1031 EfiBootScriptWidthUint32,
1032 (UINTN)(PMC_BASE_ADDRESS + R_PCH_PMC_MTPMC1),
1033 1,
1034 (VOID *)(UINTN)(PMC_BASE_ADDRESS + R_PCH_PMC_MTPMC1));
1035 return;
1036 }
1037
1038 VOID
1039 EFIAPI
1040 ReadyToBootFunction (
1041 EFI_EVENT Event,
1042 VOID *Context
1043 )
1044 {
1045 EFI_STATUS Status;
1046 EFI_ISA_ACPI_PROTOCOL *IsaAcpi;
1047 EFI_ISA_ACPI_DEVICE_ID IsaDevice;
1048 UINTN Size;
1049 UINT16 State;
1050 EFI_TPM_MP_DRIVER_PROTOCOL *TpmMpDriver;
1051 EFI_CPU_IO_PROTOCOL *CpuIo;
1052 UINT8 Data;
1053 UINT8 ReceiveBuffer [64];
1054 UINT32 ReceiveBufferSize;
1055
1056 UINT8 TpmForceClearCommand [] = {0x00, 0xC1,
1057 0x00, 0x00, 0x00, 0x0A,
1058 0x00, 0x00, 0x00, 0x5D};
1059 UINT8 TpmPhysicalPresenceCommand [] = {0x00, 0xC1,
1060 0x00, 0x00, 0x00, 0x0C,
1061 0x40, 0x00, 0x00, 0x0A,
1062 0x00, 0x00};
1063 UINT8 TpmPhysicalDisableCommand [] = {0x00, 0xC1,
1064 0x00, 0x00, 0x00, 0x0A,
1065 0x00, 0x00, 0x00, 0x70};
1066 UINT8 TpmPhysicalEnableCommand [] = {0x00, 0xC1,
1067 0x00, 0x00, 0x00, 0x0A,
1068 0x00, 0x00, 0x00, 0x6F};
1069 UINT8 TpmPhysicalSetDeactivatedCommand [] = {0x00, 0xC1,
1070 0x00, 0x00, 0x00, 0x0B,
1071 0x00, 0x00, 0x00, 0x72,
1072 0x00};
1073 UINT8 TpmSetOwnerInstallCommand [] = {0x00, 0xC1,
1074 0x00, 0x00, 0x00, 0x0B,
1075 0x00, 0x00, 0x00, 0x71,
1076 0x00};
1077
1078 Size = sizeof(UINT16);
1079 Status = gRT->GetVariable (
1080 VAR_EQ_FLOPPY_MODE_DECIMAL_NAME,
1081 &gEfiNormalSetupGuid,
1082 NULL,
1083 &Size,
1084 &State
1085 );
1086
1087 //
1088 // Disable Floppy Controller if needed
1089 //
1090 Status = gBS->LocateProtocol (&gEfiIsaAcpiProtocolGuid, NULL, (VOID **) &IsaAcpi);
1091 if (!EFI_ERROR(Status) && (State == 0x00)) {
1092 IsaDevice.HID = EISA_PNP_ID(0x604);
1093 IsaDevice.UID = 0;
1094 Status = IsaAcpi->EnableDevice(IsaAcpi, &IsaDevice, FALSE);
1095 }
1096
1097 //
1098 // save LAN info to a variable
1099 //
1100 if (NULL != mPciLanInfo) {
1101 gRT->SetVariable (
1102 L"PciLanInfo",
1103 &gEfiPciLanInfoGuid,
1104 EFI_VARIABLE_NON_VOLATILE | EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_RUNTIME_ACCESS,
1105 mPciLanCount * sizeof(PCI_LAN_INFO),
1106 mPciLanInfo
1107 );
1108 }
1109
1110 if (NULL != mPciLanInfo) {
1111 gBS->FreePool (mPciLanInfo);
1112 mPciLanInfo = NULL;
1113 }
1114
1115
1116 //
1117 // Handle ACPI OS TPM requests here
1118 //
1119 Status = gBS->LocateProtocol (
1120 &gEfiCpuIoProtocolGuid,
1121 NULL,
1122 (VOID **)&CpuIo
1123 );
1124 Status = gBS->LocateProtocol (
1125 &gEfiTpmMpDriverProtocolGuid,
1126 NULL,
1127 (VOID **)&TpmMpDriver
1128 );
1129 if (!EFI_ERROR (Status))
1130 {
1131 Data = ReadCmosBank1Byte (CpuIo, ACPI_TPM_REQUEST);
1132
1133 //
1134 // Clear pending ACPI TPM request indicator
1135 //
1136 WriteCmosBank1Byte (CpuIo, ACPI_TPM_REQUEST, 0x00);
1137 if (Data != 0)
1138 {
1139 WriteCmosBank1Byte (CpuIo, ACPI_TPM_LAST_REQUEST, Data);
1140
1141 //
1142 // Assert Physical Presence for these commands
1143 //
1144 TpmPhysicalPresenceCommand [11] = 0x20;
1145 ReceiveBufferSize = sizeof(ReceiveBuffer);
1146 Status = TpmMpDriver->Transmit (
1147 TpmMpDriver, TpmPhysicalPresenceCommand,
1148 sizeof (TpmPhysicalPresenceCommand),
1149 ReceiveBuffer, &ReceiveBufferSize
1150 );
1151 //
1152 // PF PhysicalPresence = TRUE
1153 //
1154 TpmPhysicalPresenceCommand [11] = 0x08;
1155 ReceiveBufferSize = sizeof(ReceiveBuffer);
1156 Status = TpmMpDriver->Transmit (
1157 TpmMpDriver, TpmPhysicalPresenceCommand,
1158 sizeof (TpmPhysicalPresenceCommand),
1159 ReceiveBuffer,
1160 &ReceiveBufferSize
1161 );
1162 if (Data == 0x01)
1163 {
1164 //
1165 // TPM_PhysicalEnable
1166 //
1167 ReceiveBufferSize = sizeof(ReceiveBuffer);
1168 Status = TpmMpDriver->Transmit (
1169 TpmMpDriver, TpmPhysicalEnableCommand,
1170 sizeof (TpmPhysicalEnableCommand),
1171 ReceiveBuffer, &ReceiveBufferSize
1172 );
1173 }
1174 if (Data == 0x02)
1175 {
1176 //
1177 // TPM_PhysicalDisable
1178 //
1179 ReceiveBufferSize = sizeof(ReceiveBuffer);
1180 Status = TpmMpDriver->Transmit (
1181 TpmMpDriver, TpmPhysicalDisableCommand,
1182 sizeof (TpmPhysicalDisableCommand),
1183 ReceiveBuffer,
1184 &ReceiveBufferSize
1185 );
1186 }
1187 if (Data == 0x03)
1188 {
1189 //
1190 // TPM_PhysicalSetDeactivated=FALSE
1191 //
1192 ReceiveBufferSize = sizeof(ReceiveBuffer);
1193 TpmPhysicalSetDeactivatedCommand [10] = 0x00;
1194 Status = TpmMpDriver->Transmit (
1195 TpmMpDriver,
1196 TpmPhysicalSetDeactivatedCommand,
1197 sizeof (TpmPhysicalSetDeactivatedCommand),
1198 ReceiveBuffer, &ReceiveBufferSize
1199 );
1200 gRT->ResetSystem (EfiResetWarm, EFI_SUCCESS, 0, NULL);
1201 }
1202 if (Data == 0x04)
1203 {
1204 //
1205 // TPM_PhysicalSetDeactivated=TRUE
1206 //
1207 ReceiveBufferSize = sizeof(ReceiveBuffer);
1208 TpmPhysicalSetDeactivatedCommand [10] = 0x01;
1209 Status = TpmMpDriver->Transmit (
1210 TpmMpDriver,
1211 TpmPhysicalSetDeactivatedCommand,
1212 sizeof (TpmPhysicalSetDeactivatedCommand),
1213 ReceiveBuffer,
1214 &ReceiveBufferSize
1215 );
1216 gRT->ResetSystem (
1217 EfiResetWarm,
1218 EFI_SUCCESS,
1219 0,
1220 NULL
1221 );
1222 }
1223 if (Data == 0x05)
1224 {
1225 //
1226 // TPM_ForceClear
1227 //
1228 ReceiveBufferSize = sizeof(ReceiveBuffer);
1229 Status = TpmMpDriver->Transmit (
1230 TpmMpDriver,
1231 TpmForceClearCommand,
1232 sizeof (TpmForceClearCommand),
1233 ReceiveBuffer,
1234 &ReceiveBufferSize
1235 );
1236 gRT->ResetSystem (
1237 EfiResetWarm,
1238 EFI_SUCCESS,
1239 0,
1240 NULL
1241 );
1242 }
1243 if (Data == 0x06)
1244 {
1245 //
1246 // TPM_PhysicalEnable
1247 //
1248 ReceiveBufferSize = sizeof(ReceiveBuffer);
1249 Status = TpmMpDriver->Transmit (
1250 TpmMpDriver,
1251 TpmPhysicalEnableCommand,
1252 sizeof (TpmPhysicalEnableCommand),
1253 ReceiveBuffer,
1254 &ReceiveBufferSize
1255 );
1256 //
1257 // TPM_PhysicalSetDeactivated=FALSE
1258 //
1259 ReceiveBufferSize = sizeof(ReceiveBuffer);
1260 TpmPhysicalSetDeactivatedCommand [10] = 0x00;
1261 Status = TpmMpDriver->Transmit (
1262 TpmMpDriver,
1263 TpmPhysicalSetDeactivatedCommand,
1264 sizeof (TpmPhysicalSetDeactivatedCommand),
1265 ReceiveBuffer,
1266 &ReceiveBufferSize
1267 );
1268 gRT->ResetSystem (
1269 EfiResetWarm,
1270 EFI_SUCCESS,
1271 0,
1272 NULL
1273 );
1274 }
1275 if (Data == 0x07)
1276 {
1277 //
1278 // TPM_PhysicalSetDeactivated=TRUE
1279 //
1280 ReceiveBufferSize = sizeof(ReceiveBuffer);
1281 TpmPhysicalSetDeactivatedCommand [10] = 0x01;
1282 Status = TpmMpDriver->Transmit (
1283 TpmMpDriver,
1284 TpmPhysicalSetDeactivatedCommand,
1285 sizeof (TpmPhysicalSetDeactivatedCommand),
1286 ReceiveBuffer,
1287 &ReceiveBufferSize
1288 );
1289 //
1290 // TPM_PhysicalDisable
1291 //
1292 ReceiveBufferSize = sizeof(ReceiveBuffer);
1293 Status = TpmMpDriver->Transmit (
1294 TpmMpDriver,
1295 TpmPhysicalDisableCommand,
1296 sizeof (TpmPhysicalDisableCommand),
1297 ReceiveBuffer,
1298 &ReceiveBufferSize
1299 );
1300 gRT->ResetSystem (
1301 EfiResetWarm,
1302 EFI_SUCCESS,
1303 0,
1304 NULL
1305 );
1306 }
1307 if (Data == 0x08)
1308 {
1309 //
1310 // TPM_SetOwnerInstall=TRUE
1311 //
1312 ReceiveBufferSize = sizeof(ReceiveBuffer);
1313 TpmSetOwnerInstallCommand [10] = 0x01;
1314 Status = TpmMpDriver->Transmit (
1315 TpmMpDriver,
1316 TpmSetOwnerInstallCommand,
1317 sizeof (TpmSetOwnerInstallCommand),
1318 ReceiveBuffer,
1319 &ReceiveBufferSize
1320 );
1321 }
1322 if (Data == 0x09)
1323 {
1324 //
1325 // TPM_SetOwnerInstall=FALSE
1326 //
1327 ReceiveBufferSize = sizeof(ReceiveBuffer);
1328 TpmSetOwnerInstallCommand [10] = 0x00;
1329 Status = TpmMpDriver->Transmit (
1330 TpmMpDriver,
1331 TpmSetOwnerInstallCommand,
1332 sizeof (TpmSetOwnerInstallCommand),
1333 ReceiveBuffer,
1334 &ReceiveBufferSize
1335 );
1336 }
1337 if (Data == 0x0A)
1338 {
1339 //
1340 // TPM_PhysicalEnable
1341 //
1342 ReceiveBufferSize = sizeof(ReceiveBuffer);
1343 Status = TpmMpDriver->Transmit (
1344 TpmMpDriver,
1345 TpmPhysicalEnableCommand,
1346 sizeof (TpmPhysicalEnableCommand),
1347 ReceiveBuffer,
1348 &ReceiveBufferSize
1349 );
1350 //
1351 // TPM_PhysicalSetDeactivated=FALSE
1352 //
1353 ReceiveBufferSize = sizeof(ReceiveBuffer);
1354 TpmPhysicalSetDeactivatedCommand [10] = 0x00;
1355 Status = TpmMpDriver->Transmit (
1356 TpmMpDriver,
1357 TpmPhysicalSetDeactivatedCommand,
1358 sizeof (TpmPhysicalSetDeactivatedCommand),
1359 ReceiveBuffer,
1360 &ReceiveBufferSize
1361 );
1362 //
1363 // Do TPM_SetOwnerInstall=TRUE on next reboot
1364 //
1365
1366 WriteCmosBank1Byte (CpuIo, ACPI_TPM_REQUEST, 0xF0);
1367
1368 gRT->ResetSystem (
1369 EfiResetWarm,
1370 EFI_SUCCESS,
1371 0,
1372 NULL
1373 );
1374 }
1375 if (Data == 0x0B)
1376 {
1377 //
1378 // TPM_SetOwnerInstall=FALSE
1379 //
1380 ReceiveBufferSize = sizeof(ReceiveBuffer);
1381 TpmSetOwnerInstallCommand [10] = 0x00;
1382 Status = TpmMpDriver->Transmit (
1383 TpmMpDriver,
1384 TpmSetOwnerInstallCommand,
1385 sizeof (TpmSetOwnerInstallCommand),
1386 ReceiveBuffer,
1387 &ReceiveBufferSize
1388 );
1389 //
1390 // TPM_PhysicalSetDeactivated=TRUE
1391 //
1392 ReceiveBufferSize = sizeof(ReceiveBuffer);
1393 TpmPhysicalSetDeactivatedCommand [10] = 0x01;
1394 Status = TpmMpDriver->Transmit (
1395 TpmMpDriver,
1396 TpmPhysicalSetDeactivatedCommand,
1397 sizeof (TpmPhysicalSetDeactivatedCommand),
1398 ReceiveBuffer,
1399 &ReceiveBufferSize
1400 );
1401 //
1402 // TPM_PhysicalDisable
1403 //
1404 ReceiveBufferSize = sizeof(ReceiveBuffer);
1405 Status = TpmMpDriver->Transmit (
1406 TpmMpDriver,
1407 TpmPhysicalDisableCommand,
1408 sizeof (TpmPhysicalDisableCommand),
1409 ReceiveBuffer,
1410 &ReceiveBufferSize
1411 );
1412 gRT->ResetSystem (
1413 EfiResetWarm,
1414 EFI_SUCCESS,
1415 0,
1416 NULL
1417 );
1418 }
1419 if (Data == 0x0E)
1420 {
1421 //
1422 // TPM_ForceClear
1423 //
1424 ReceiveBufferSize = sizeof(ReceiveBuffer);
1425 Status = TpmMpDriver->Transmit (
1426 TpmMpDriver,
1427 TpmForceClearCommand,
1428 sizeof (TpmForceClearCommand),
1429 ReceiveBuffer,
1430 &ReceiveBufferSize
1431 );
1432 //
1433 // TPM_PhysicalEnable
1434 //
1435 ReceiveBufferSize = sizeof(ReceiveBuffer);
1436 Status = TpmMpDriver->Transmit (
1437 TpmMpDriver,
1438 TpmPhysicalEnableCommand,
1439 sizeof (TpmPhysicalEnableCommand),
1440 ReceiveBuffer,
1441 &ReceiveBufferSize
1442 );
1443 //
1444 // TPM_PhysicalSetDeactivated=FALSE
1445 //
1446 ReceiveBufferSize = sizeof(ReceiveBuffer);
1447 TpmPhysicalSetDeactivatedCommand [10] = 0x00;
1448 Status = TpmMpDriver->Transmit (
1449 TpmMpDriver,
1450 TpmPhysicalSetDeactivatedCommand,
1451 sizeof (TpmPhysicalSetDeactivatedCommand),
1452 ReceiveBuffer,
1453 &ReceiveBufferSize
1454 );
1455 gRT->ResetSystem (
1456 EfiResetWarm,
1457 EFI_SUCCESS,
1458 0,
1459 NULL
1460 );
1461 }
1462 if (Data == 0xF0)
1463 {
1464 //
1465 // Second part of ACPI TPM request 0x0A: OEM custom TPM_SetOwnerInstall=TRUE
1466 //
1467 ReceiveBufferSize = sizeof(ReceiveBuffer);
1468 TpmSetOwnerInstallCommand [10] = 0x01;
1469 Status = TpmMpDriver->Transmit (
1470 TpmMpDriver,
1471 TpmSetOwnerInstallCommand,
1472 sizeof (TpmSetOwnerInstallCommand),
1473 ReceiveBuffer,
1474 &ReceiveBufferSize
1475 );
1476 WriteCmosBank1Byte (CpuIo, ACPI_TPM_LAST_REQUEST, 0x0A);
1477 }
1478 //
1479 // Deassert Physical Presence
1480 //
1481 TpmPhysicalPresenceCommand [11] = 0x10;
1482 ReceiveBufferSize = sizeof(ReceiveBuffer);
1483 Status = TpmMpDriver->Transmit (
1484 TpmMpDriver,
1485 TpmPhysicalPresenceCommand,
1486 sizeof (TpmPhysicalPresenceCommand),
1487 ReceiveBuffer,
1488 &ReceiveBufferSize
1489 );
1490 }
1491 }
1492
1493 return;
1494 }
1495
1496 /**
1497
1498 Initializes manufacturing and config mode setting.
1499
1500 **/
1501 VOID
1502 InitMfgAndConfigModeStateVar()
1503 {
1504 EFI_PLATFORM_SETUP_ID *BootModeBuffer;
1505 VOID *HobList;
1506
1507
1508 HobList = GetFirstGuidHob(&gEfiPlatformBootModeGuid);
1509 if (HobList != NULL) {
1510 BootModeBuffer = GET_GUID_HOB_DATA (HobList);
1511
1512 //
1513 // Check if in Manufacturing mode
1514 //
1515 if ( !CompareMem (
1516 &BootModeBuffer->SetupName,
1517 MANUFACTURE_SETUP_NAME,
1518 StrSize (MANUFACTURE_SETUP_NAME)
1519 ) ) {
1520 mMfgMode = TRUE;
1521 }
1522
1523
1524
1525 }
1526
1527 }
1528
1529 /**
1530
1531 Initializes manufacturing and config mode setting.
1532
1533 **/
1534 VOID
1535 InitPlatformBootMode()
1536 {
1537 EFI_PLATFORM_SETUP_ID *BootModeBuffer;
1538 VOID *HobList;
1539
1540 HobList = GetFirstGuidHob(&gEfiPlatformBootModeGuid);
1541 if (HobList != NULL) {
1542 BootModeBuffer = GET_GUID_HOB_DATA (HobList);
1543 mPlatformBootMode = BootModeBuffer->PlatformBootMode;
1544 }
1545 }
1546
1547 /**
1548
1549 Initializes ITK.
1550
1551 **/
1552 VOID
1553 InitItk(
1554 )
1555 {
1556 EFI_STATUS Status;
1557 UINT16 ItkModBiosState;
1558 UINT8 Value;
1559 UINTN DataSize;
1560 UINT32 Attributes;
1561
1562 //
1563 // Setup local variable according to ITK variable
1564 //
1565 //
1566 // Read ItkBiosModVar to determine if BIOS has been modified by ITK
1567 // If ItkBiosModVar = 0 or if variable hasn't been initialized then BIOS has not been modified by ITK modified
1568 // Set local variable VAR_EQ_ITK_BIOS_MOD_DECIMAL_NAME=0 if BIOS has not been modified by ITK
1569 //
1570 DataSize = sizeof (Value);
1571 Status = gRT->GetVariable (
1572 ITK_BIOS_MOD_VAR_NAME,
1573 &gItkDataVarGuid,
1574 &Attributes,
1575 &DataSize,
1576 &Value
1577 );
1578 if (Status == EFI_NOT_FOUND) {
1579 //
1580 // Variable not found, hasn't been initialized, intialize to 0
1581 //
1582 Value=0x00;
1583 //
1584 // Write variable to flash.
1585 //
1586 gRT->SetVariable (
1587 ITK_BIOS_MOD_VAR_NAME,
1588 &gItkDataVarGuid,
1589 EFI_VARIABLE_RUNTIME_ACCESS |
1590 EFI_VARIABLE_NON_VOLATILE |
1591 EFI_VARIABLE_BOOTSERVICE_ACCESS,
1592 sizeof (Value),
1593 &Value
1594 );
1595
1596 }
1597 if ( (!EFI_ERROR (Status)) || (Status == EFI_NOT_FOUND) ) {
1598 if (Value == 0x00) {
1599 ItkModBiosState = 0x00;
1600 } else {
1601 ItkModBiosState = 0x01;
1602 }
1603 gRT->SetVariable (
1604 VAR_EQ_ITK_BIOS_MOD_DECIMAL_NAME,
1605 &gEfiNormalSetupGuid,
1606 EFI_VARIABLE_BOOTSERVICE_ACCESS,
1607 2,
1608 (void *)&ItkModBiosState
1609 );
1610 }
1611 }
1612
1613 #if defined(FIRMWARE_ID_BACKWARD_COMPATIBLE) && (FIRMWARE_ID_BACKWARD_COMPATIBLE != 0)
1614
1615 /**
1616
1617 Initializes the BIOS FIRMWARE ID from the FIRMWARE_ID build variable.
1618
1619 **/
1620 STATIC
1621 VOID
1622 InitFirmwareId(
1623 )
1624 {
1625 EFI_STATUS Status;
1626 CHAR16 FirmwareIdNameWithPassword[] = FIRMWARE_ID_NAME_WITH_PASSWORD;
1627
1628 //
1629 // First try writing the variable without a password in case we are
1630 // upgrading from a BIOS without password protection on the FirmwareId
1631 //
1632 Status = gRT->SetVariable(
1633 (CHAR16 *)&gFirmwareIdName,
1634 &gFirmwareIdGuid,
1635 EFI_VARIABLE_NON_VOLATILE | EFI_VARIABLE_BOOTSERVICE_ACCESS |
1636 EFI_VARIABLE_RUNTIME_ACCESS,
1637 sizeof( FIRMWARE_ID ) - 1,
1638 FIRMWARE_ID
1639 );
1640
1641 if (Status == EFI_INVALID_PARAMETER) {
1642
1643 //
1644 // Since setting the firmware id without the password failed,
1645 // a password must be required.
1646 //
1647 Status = gRT->SetVariable(
1648 (CHAR16 *)&FirmwareIdNameWithPassword,
1649 &gFirmwareIdGuid,
1650 EFI_VARIABLE_NON_VOLATILE | EFI_VARIABLE_BOOTSERVICE_ACCESS |
1651 EFI_VARIABLE_RUNTIME_ACCESS,
1652 sizeof( FIRMWARE_ID ) - 1,
1653 FIRMWARE_ID
1654 );
1655 }
1656 }
1657 #endif
1658
1659 VOID
1660 UpdateDVMTSetup(
1661 )
1662 {
1663 //
1664 // Workaround to support IIA bug.
1665 // IIA request to change option value to 4, 5 and 7 relatively
1666 // instead of 1, 2, and 3 which follow Lakeport Specs.
1667 // Check option value, temporary hardcode GraphicsDriverMemorySize
1668 // Option value to fulfill IIA requirment. So that user no need to
1669 // load default and update setupvariable after update BIOS.
1670 // Option value hardcoded as: 1 to 4, 2 to 5, 3 to 7.
1671 // *This is for broadwater and above product only.
1672 //
1673
1674 SYSTEM_CONFIGURATION SystemConfiguration;
1675 UINTN VarSize;
1676 EFI_STATUS Status;
1677
1678 VarSize = sizeof(SYSTEM_CONFIGURATION);
1679 Status = gRT->GetVariable(
1680 NORMAL_SETUP_NAME,
1681 &gEfiNormalSetupGuid,
1682 NULL,
1683 &VarSize,
1684 &SystemConfiguration
1685 );
1686
1687 if (EFI_ERROR (Status) || VarSize != sizeof(SYSTEM_CONFIGURATION)) {
1688 //The setup variable is corrupted
1689 VarSize = sizeof(SYSTEM_CONFIGURATION);
1690 Status = gRT->GetVariable(
1691 L"SetupRecovery",
1692 &gEfiNormalSetupGuid,
1693 NULL,
1694 &VarSize,
1695 &SystemConfiguration
1696 );
1697 ASSERT_EFI_ERROR (Status);
1698 }
1699
1700 if((SystemConfiguration.GraphicsDriverMemorySize < 4) && !EFI_ERROR(Status) ) {
1701 switch (SystemConfiguration.GraphicsDriverMemorySize){
1702 case 1:
1703 SystemConfiguration.GraphicsDriverMemorySize = 4;
1704 break;
1705 case 2:
1706 SystemConfiguration.GraphicsDriverMemorySize = 5;
1707 break;
1708 case 3:
1709 SystemConfiguration.GraphicsDriverMemorySize = 7;
1710 break;
1711 default:
1712 break;
1713 }
1714
1715 Status = gRT->SetVariable (
1716 NORMAL_SETUP_NAME,
1717 &gEfiNormalSetupGuid,
1718 EFI_VARIABLE_NON_VOLATILE | EFI_VARIABLE_BOOTSERVICE_ACCESS,
1719 sizeof(SYSTEM_CONFIGURATION),
1720 &SystemConfiguration
1721 );
1722 }
1723 }
1724
1725 VOID
1726 InitPlatformUsbPolicy (
1727 VOID
1728 )
1729
1730 {
1731 EFI_HANDLE Handle;
1732 EFI_STATUS Status;
1733
1734 Handle = NULL;
1735
1736 mUsbPolicyData.Version = (UINT8)USB_POLICY_PROTOCOL_REVISION_2;
1737 mUsbPolicyData.UsbMassStorageEmulationType = mSystemConfiguration.UsbBIOSINT13DeviceEmulation;
1738 if(mUsbPolicyData.UsbMassStorageEmulationType == 3) {
1739 mUsbPolicyData.UsbEmulationSize = mSystemConfiguration.UsbBIOSINT13DeviceEmulationSize;
1740 } else {
1741 mUsbPolicyData.UsbEmulationSize = 0;
1742 }
1743 mUsbPolicyData.UsbZipEmulationType = mSystemConfiguration.UsbZipEmulation;
1744 mUsbPolicyData.UsbOperationMode = HIGH_SPEED;
1745
1746 //
1747 // Some chipset need Period smi, 0 = LEGACY_PERIOD_UN_SUPP
1748 //
1749 mUsbPolicyData.USBPeriodSupport = LEGACY_PERIOD_UN_SUPP;
1750
1751 //
1752 // Some platform need legacyfree, 0 = LEGACY_FREE_UN_SUPP
1753 //
1754 mUsbPolicyData.LegacyFreeSupport = LEGACY_FREE_UN_SUPP;
1755
1756 //
1757 // Set Code base , TIANO_CODE_BASE =0x01, ICBD =0x00
1758 //
1759 mUsbPolicyData.CodeBase = (UINT8)ICBD_CODE_BASE;
1760
1761 //
1762 // Some chispet 's LpcAcpibase are diffrent,set by platform or chipset,
1763 // default is Ich acpibase =0x040. acpitimerreg=0x08.
1764 mUsbPolicyData.LpcAcpiBase = 0x40;
1765 mUsbPolicyData.AcpiTimerReg = 0x08;
1766
1767 //
1768 // Set for reduce usb post time
1769 //
1770 mUsbPolicyData.UsbTimeTue = 0x00;
1771 mUsbPolicyData.InternelHubExist = 0x00; //TigerPoint doesn't have RMH
1772 mUsbPolicyData.EnumWaitPortStableStall = 100;
1773
1774
1775 Status = gBS->InstallProtocolInterface (
1776 &Handle,
1777 &gUsbPolicyGuid,
1778 EFI_NATIVE_INTERFACE,
1779 &mUsbPolicyData
1780 );
1781 ASSERT_EFI_ERROR(Status);
1782
1783 }
1784
1785 UINT8
1786 ReadCmosBank1Byte (
1787 IN EFI_CPU_IO_PROTOCOL *CpuIo,
1788 IN UINT8 Index
1789 )
1790 {
1791 UINT8 Data;
1792
1793 CpuIo->Io.Write (CpuIo, EfiCpuIoWidthUint8, 0x72, 1, &Index);
1794 CpuIo->Io.Read (CpuIo, EfiCpuIoWidthUint8, 0x73, 1, &Data);
1795 return Data;
1796 }
1797
1798 VOID
1799 WriteCmosBank1Byte (
1800 IN EFI_CPU_IO_PROTOCOL *CpuIo,
1801 IN UINT8 Index,
1802 IN UINT8 Data
1803 )
1804 {
1805 CpuIo->Io.Write (
1806 CpuIo,
1807 EfiCpuIoWidthUint8,
1808 0x72,
1809 1,
1810 &Index
1811 );
1812 CpuIo->Io.Write (
1813 CpuIo,
1814 EfiCpuIoWidthUint8,
1815 0x73,
1816 1,
1817 &Data
1818 );
1819 }
1820
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