3 Copyright (c) 2004 - 2015, Intel Corporation. All rights reserved.<BR>
6 This program and the accompanying materials are licensed and made available under
8 the terms and conditions of the BSD License that accompanies this distribution.
10 The full text of the license may be found at
12 http://opensource.org/licenses/bsd-license.php.
16 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
18 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
30 Platform Initialization Driver.
35 #include "PlatformDxe.h"
37 #include "PchCommonDefinitions.h"
38 #include <Protocol/UsbPolicy.h>
39 #include <Protocol/PchPlatformPolicy.h>
40 #include <Protocol/TpmMp.h>
41 #include <Protocol/CpuIo2.h>
42 #include <Library/S3BootScriptLib.h>
43 #include <Guid/PciLanInfo.h>
44 #include <Guid/ItkData.h>
45 #include <Library/PciLib.h>
46 #include <PlatformBootMode.h>
47 #include <Guid/EventGroup.h>
48 #include <Guid/Vlv2Variable.h>
49 #include <Protocol/GlobalNvsArea.h>
50 #include <Protocol/IgdOpRegion.h>
51 #include <Library/PcdLib.h>
52 #include <Protocol/VariableLock.h>
56 // VLV2 GPIO GROUP OFFSET
58 #define GPIO_SCORE_OFFSET 0x0000
59 #define GPIO_NCORE_OFFSET 0x1000
60 #define GPIO_SSUS_OFFSET 0x2000
67 GPIO_CONF_PAD_INIT mTB_BL_GpioInitData_SC_TRI_Exit_boot_Service
[] =
69 // Pad Name GPIO Number Used As GPO Default Function# INT Capable Interrupt Type PULL H/L MMIO Offset
70 GPIO_INIT_ITEM("LPC_CLKOUT0 GPIOC_47 " ,TRISTS
,NA
,F0
, , ,NONE
,0x47),
71 GPIO_INIT_ITEM("LPC_CLKOUT1 GPIOC_48 " ,TRISTS
,NA
,F0
, , ,NONE
,0x41),
75 EFI_GUID mSystemHiiExportDatabase
= EFI_HII_EXPORT_DATABASE_GUID
;
76 EFI_GUID mPlatformDriverGuid
= EFI_PLATFORM_DRIVER_GUID
;
77 SYSTEM_CONFIGURATION mSystemConfiguration
;
78 SYSTEM_PASSWORDS mSystemPassword
;
79 EFI_HANDLE mImageHandle
;
80 BOOLEAN mMfgMode
= FALSE
;
81 VOID
*mDxePlatformStringPack
;
82 UINT32 mPlatformBootMode
= PLATFORM_NORMAL_MODE
;
83 extern CHAR16 gItkDataVarName
[];
86 EFI_PLATFORM_INFO_HOB mPlatformInfo
;
87 EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL
*mPciRootBridgeIo
;
88 EFI_EVENT mReadyToBootEvent
;
90 UINT8 mSmbusRsvdAddresses
[] = PLATFORM_SMBUS_RSVD_ADDRESSES
;
91 UINT8 mNumberSmbusAddress
= sizeof( mSmbusRsvdAddresses
) / sizeof( mSmbusRsvdAddresses
[0] );
92 UINT32 mSubsystemVidDid
;
93 UINT32 mSubsystemAudioVidDid
;
95 UINTN mPciLanCount
= 0;
96 VOID
*mPciLanInfo
= NULL
;
99 static EFI_SPEAKER_IF_PROTOCOL mSpeakerInterface
= {
100 ProgramToneFrequency
,
104 EFI_USB_POLICY_PROTOCOL mUsbPolicyData
= {0};
107 CFIO_PNP_INIT mTB_BL_GpioInitData_SC_TRI_S0ix_Exit_boot_Service
[] =
109 {0x410 ,0x20038e10}, //vlv.gpio.gpscore.cfio_regs_pad_lpc_clkout1_pconf0
110 {0x470 ,0x20038e10}, //vlv.gpio.gpscore.cfio_regs_pad_lpc_clkout0_pconf0
111 {0x560 ,0x20038e10}, //vlv.gpio.gpscore.cfio_regs_pad_ilb_serirq_pconf0
112 {0x450 ,0x20038e10}, //vlv.gpio.gpscore.cfio_regs_pad_lpc_frameb_pconf0
113 {0x480 ,0x20038e10}, //vlv.gpio.gpscore.cfio_regs_pad_lpc_clkrunb_pconf0
114 {0x420 ,0x20038e10}, //vlv.gpio.gpscore.cfio_regs_pad_lpc_ad3_pconf0
115 {0x430 ,0x20038e10}, //vlv.gpio.gpscore.cfio_regs_pad_lpc_ad2_pconf0
116 {0x440 ,0x20038e10}, //vlv.gpio.gpscore.cfio_regs_pad_lpc_ad1_pconf0
117 {0x460 ,0x20038e10}, //vlv.gpio.gpscore.cfio_regs_pad_lpc_ad0_pconf0
118 {0x418 ,0x00000006}, //vlv.gpio.gpscore.cfio_regs_pad_lpc_clkout1_pad_val
119 {0x478 ,0x00000006}, //vlv.gpio.gpscore.cfio_regs_pad_lpc_clkout0_pad_val
120 {0x568 ,0x00000006}, //vlv.gpio.gpscore.cfio_regs_pad_ilb_serirq_pad_val
121 {0x458 ,0x00000006}, //vlv.gpio.gpscore.cfio_regs_pad_lpc_frameb_pad_val
122 {0x488 ,0x00000006}, //vlv.gpio.gpscore.cfio_regs_pad_lpc_clkrunb_pad_val
123 {0x428 ,0x00000006}, //vlv.gpio.gpscore.cfio_regs_pad_lpc_ad3_pad_val
124 {0x438 ,0x00000006}, //vlv.gpio.gpscore.cfio_regs_pad_lpc_ad2_pad_val
125 {0x448 ,0x00000006}, //vlv.gpio.gpscore.cfio_regs_pad_lpc_ad1_pad_val
126 {0x468 ,0x00000006}, //vlv.gpio.gpscore.cfio_regs_pad_lpc_ad0_pad_val
131 IN VOID
*Destination
,
136 #if defined(FIRMWARE_ID_BACKWARD_COMPATIBLE) && (FIRMWARE_ID_BACKWARD_COMPATIBLE != 0)
144 InitializeClockRouting(
151 #if defined(SENSOR_INFO_VAR_SUPPORT) && SENSOR_INFO_VAR_SUPPORT != 0
153 InitializeSensorInfoVariable (
168 InitPlatformBootMode();
171 InitMfgAndConfigModeStateVar();
174 InitPchPlatformPolicy (
175 IN EFI_PLATFORM_INFO_HOB
*PlatformInfo
179 InitVlvPlatformPolicy (
183 InitSioPlatformPolicy(
195 InitPlatformUsbPolicy (
207 SaveSetupRecoveryVar(
211 EFI_STATUS Status
= EFI_SUCCESS
;
212 UINTN SizeOfNvStore
= 0;
213 UINTN SizeOfSetupVar
= 0;
214 SYSTEM_CONFIGURATION
*SetupData
= NULL
;
215 SYSTEM_CONFIGURATION
*RecoveryNvData
= NULL
;
216 EDKII_VARIABLE_LOCK_PROTOCOL
*VariableLock
= NULL
;
219 DEBUG ((EFI_D_INFO
, "SaveSetupRecoveryVar() Entry \n"));
220 SizeOfNvStore
= sizeof(SYSTEM_CONFIGURATION
);
221 RecoveryNvData
= AllocateZeroPool (sizeof(SYSTEM_CONFIGURATION
));
222 if (NULL
== RecoveryNvData
) {
223 Status
= EFI_OUT_OF_RESOURCES
;
227 Status
= gRT
->GetVariable(
229 &gEfiNormalSetupGuid
,
235 if (EFI_ERROR (Status
)) {
236 // Don't find the "SetupRecovery" variable.
237 // have to copy "Setup" variable to "SetupRecovery" variable.
238 SetupData
= AllocateZeroPool (sizeof(SYSTEM_CONFIGURATION
));
239 if (NULL
== SetupData
) {
240 Status
= EFI_OUT_OF_RESOURCES
;
243 SizeOfSetupVar
= sizeof(SYSTEM_CONFIGURATION
);
244 Status
= gRT
->GetVariable(
246 &gEfiNormalSetupGuid
,
251 ASSERT_EFI_ERROR (Status
);
253 Status
= gRT
->SetVariable (
255 &gEfiNormalSetupGuid
,
256 EFI_VARIABLE_NON_VOLATILE
| EFI_VARIABLE_BOOTSERVICE_ACCESS
,
257 sizeof(SYSTEM_CONFIGURATION
),
260 ASSERT_EFI_ERROR (Status
);
262 Status
= gBS
->LocateProtocol (&gEdkiiVariableLockProtocolGuid
, NULL
, (VOID
**) &VariableLock
);
263 if (!EFI_ERROR (Status
)) {
264 Status
= VariableLock
->RequestToLock (VariableLock
, L
"SetupRecovery", &gEfiNormalSetupGuid
);
265 ASSERT_EFI_ERROR (Status
);
272 FreePool (RecoveryNvData
);
274 FreePool (SetupData
);
282 TristateLpcGpioConfig (
283 IN UINT32 Gpio_Mmio_Offset
,
284 IN UINT32 Gpio_Pin_Num
,
285 GPIO_CONF_PAD_INIT
* Gpio_Conf_Data
296 // GPIO WELL -- Memory base registers
300 // A0 BIOS Spec doesn't mention it although X0 does. comment out now.
301 // GPIO write 0x01001002 to IOBASE + Gpio_Mmio_Offset + 0x0900
304 for(index
=0; index
< Gpio_Pin_Num
; index
++)
307 // Calculate the MMIO Address for specific GPIO pin CONF0 register pointed by index.
309 mmio_conf0
= IO_BASE_ADDRESS
+ Gpio_Mmio_Offset
+ R_PCH_CFIO_PAD_CONF0
+ Gpio_Conf_Data
[index
].offset
* 16;
310 mmio_padval
= IO_BASE_ADDRESS
+ Gpio_Mmio_Offset
+ R_PCH_CFIO_PAD_VAL
+ Gpio_Conf_Data
[index
].offset
* 16;
313 DEBUG ((EFI_D_INFO
, "%s, ", Gpio_Conf_Data
[index
].pad_name
));
316 DEBUG ((EFI_D_INFO
, "Usage = %d, Func# = %d, IntType = %d, Pull Up/Down = %d, MMIO Base = 0x%08x, ",
317 Gpio_Conf_Data
[index
].usage
,
318 Gpio_Conf_Data
[index
].func
,
319 Gpio_Conf_Data
[index
].int_type
,
320 Gpio_Conf_Data
[index
].pull
,
324 // Step 1: PadVal Programming
326 pad_val
.dw
= MmioRead32(mmio_padval
);
329 // Config PAD_VAL only for GPIO (Non-Native) Pin
331 if(Native
!= Gpio_Conf_Data
[index
].usage
)
333 pad_val
.dw
&= ~0x6; // Clear bits 1:2
334 pad_val
.dw
|= (Gpio_Conf_Data
[index
].usage
& 0x6); // Set bits 1:2 according to PadVal
337 // set GPO default value
339 if(Gpio_Conf_Data
[index
].usage
== GPO
&& Gpio_Conf_Data
[index
].gpod4
!= NA
)
341 pad_val
.r
.pad_val
= Gpio_Conf_Data
[index
].gpod4
;
346 DEBUG ((EFI_D_INFO
, "Set PAD_VAL = 0x%08x, ", pad_val
.dw
));
348 MmioWrite32(mmio_padval
, pad_val
.dw
);
351 // Step 2: CONF0 Programming
352 // Read GPIO default CONF0 value, which is assumed to be default value after reset.
354 conf0_val
.dw
= MmioRead32(mmio_conf0
);
359 conf0_val
.r
.Func_Pin_Mux
= Gpio_Conf_Data
[index
].func
;
361 if(GPO
== Gpio_Conf_Data
[index
].usage
)
364 // If used as GPO, then internal pull need to be disabled
366 conf0_val
.r
.Pull_assign
= 0; // Non-pull
371 // Set PullUp / PullDown
373 if(P_20K_H
== Gpio_Conf_Data
[index
].pull
)
375 conf0_val
.r
.Pull_assign
= 0x1; // PullUp
376 conf0_val
.r
.Pull_strength
= 0x2;// 20K
378 else if(P_20K_L
== Gpio_Conf_Data
[index
].pull
)
380 conf0_val
.r
.Pull_assign
= 0x2; // PullDown
381 conf0_val
.r
.Pull_strength
= 0x2;// 20K
383 else if(P_NONE
== Gpio_Conf_Data
[index
].pull
)
385 conf0_val
.r
.Pull_assign
= 0; // Non-pull
389 ASSERT(FALSE
); // Invalid value
394 // Set INT Trigger Type
396 conf0_val
.dw
&= ~0x0f000000; // Clear bits 27:24
399 // Set INT Trigger Type
401 if(TRIG_
== Gpio_Conf_Data
[index
].int_type
)
404 // Interrupt not capable, clear bits 27:24
409 conf0_val
.dw
|= (Gpio_Conf_Data
[index
].int_type
& 0x0f)<<24;
412 DEBUG ((EFI_D_INFO
, "Set CONF0 = 0x%08x\n", conf0_val
.dw
));
415 // Write back the targeted GPIO config value according to platform (board) GPIO setting
417 MmioWrite32 (mmio_conf0
, conf0_val
.dw
);
420 // A0 BIOS Spec doesn't mention it although X0 does. comment out now.
421 // GPIO SCORE write 0x01001002 to IOBASE + 0x0900
427 SpiBiosProtectionFunction(
433 UINTN mPciD31F0RegBase
;
440 BiosFlaLower0
= PcdGet32(PcdFlashMicroCodeAddress
)-PcdGet32(PcdFlashAreaBaseAddress
);
441 BiosFlaLimit0
= PcdGet32(PcdFlashMicroCodeSize
)-1;
442 #ifdef MINNOW2_FSP_BUILD
443 BiosFlaLower1
= PcdGet32(PcdFlashFvFspBase
)-PcdGet32(PcdFlashAreaBaseAddress
);
444 BiosFlaLimit1
= (PcdGet32(PcdFlashFvRecoveryBase
)-PcdGet32(PcdFlashFvFspBase
)+PcdGet32(PcdFlashFvRecoverySize
))-1;
446 BiosFlaLower1
= PcdGet32(PcdFlashFvMainBase
)-PcdGet32(PcdFlashAreaBaseAddress
);
447 BiosFlaLimit1
= (PcdGet32(PcdFlashFvRecoveryBase
)-PcdGet32(PcdFlashFvMainBase
)+PcdGet32(PcdFlashFvRecoverySize
))-1;
451 mPciD31F0RegBase
= MmPciAddress (0,
452 DEFAULT_PCI_BUS_NUMBER_PCH
,
453 PCI_DEVICE_NUMBER_PCH_LPC
,
454 PCI_FUNCTION_NUMBER_PCH_LPC
,
457 SpiBase
= MmioRead32(mPciD31F0RegBase
+ R_PCH_LPC_SPI_BASE
) & B_PCH_LPC_SPI_BASE_BAR
;
460 //Set SMM_BWP, WPD and LE bit
462 MmioOr32 ((UINTN
) (SpiBase
+ R_PCH_SPI_BCR
), (UINT8
) B_PCH_SPI_BCR_SMM_BWP
);
463 MmioAnd32 ((UINTN
) (SpiBase
+ R_PCH_SPI_BCR
), (UINT8
)(~B_PCH_SPI_BCR_BIOSWE
));
464 MmioOr32 ((UINTN
) (SpiBase
+ R_PCH_SPI_BCR
), (UINT8
) B_PCH_SPI_BCR_BLE
);
467 //First check if FLOCKDN or PR0FLOCKDN is set. No action if either of them set already.
469 if( (MmioRead16(SpiBase
+ R_PCH_SPI_HSFS
) & B_PCH_SPI_HSFS_FLOCKDN
) != 0 ||
470 (MmioRead32(SpiBase
+ R_PCH_SPI_IND_LOCK
)& B_PCH_SPI_IND_LOCK_PR0
) != 0) {
472 //Already locked. we could take no action here
474 DEBUG((EFI_D_INFO
, "PR0 already locked down. Stop configuring PR0.\n"));
481 MmioOr32((UINTN
)(SpiBase
+ R_PCH_SPI_PR0
),
482 B_PCH_SPI_PR0_RPE
|B_PCH_SPI_PR0_WPE
|\
483 (B_PCH_SPI_PR0_PRB_MASK
&(BiosFlaLower0
>>12))|(B_PCH_SPI_PR0_PRL_MASK
&(BiosFlaLimit0
>>12)<<16));
489 MmioOr32((UINTN
)(SpiBase
+ R_PCH_SPI_PR1
),
490 B_PCH_SPI_PR1_RPE
|B_PCH_SPI_PR1_WPE
|\
491 (B_PCH_SPI_PR1_PRB_MASK
&(BiosFlaLower1
>>12))|(B_PCH_SPI_PR1_PRL_MASK
&(BiosFlaLimit1
>>12)<<16));
496 MmioOr16 ((UINTN
) (SpiBase
+ R_PCH_SPI_HSFS
), (UINT16
) (B_PCH_SPI_HSFS_FLOCKDN
));
499 // Verify if it's really locked.
501 if ((MmioRead16 (SpiBase
+ R_PCH_SPI_HSFS
) & B_PCH_SPI_HSFS_FLOCKDN
) == 0) {
502 DEBUG((EFI_D_ERROR
, "Failed to lock down PRx.\n"));
518 VarSize
= sizeof(SYSTEM_CONFIGURATION
);
519 Status
= gRT
->GetVariable(
521 &gEfiNormalSetupGuid
,
524 &mSystemConfiguration
530 PchAzaliaPciCfg32Or (R_PCH_HDA_PCS
, B_PCH_HDA_PCS_PMEE
);
533 //Program SATA PME_EN
535 PchSataPciCfg32Or (R_PCH_SATA_PMCS
, B_PCH_SATA_PMCS_PMEE
);
537 DEBUG ((EFI_D_INFO
, "InitPciDevPME mSystemConfiguration.EhciPllCfgEnable = 0x%x \n",mSystemConfiguration
.EhciPllCfgEnable
));
538 if (mSystemConfiguration
.EhciPllCfgEnable
!= 1) {
540 //Program EHCI PME_EN
545 PCI_DEVICE_NUMBER_PCH_USB
,
546 PCI_FUNCTION_NUMBER_PCH_EHCI
,
547 R_PCH_EHCI_PWR_CNTL_STS
,
548 B_PCH_EHCI_PWR_CNTL_STS_PME_EN
555 EhciPciMmBase
= MmPciAddress (0,
557 PCI_DEVICE_NUMBER_PCH_USB
,
558 PCI_FUNCTION_NUMBER_PCH_EHCI
,
561 DEBUG ((EFI_D_INFO
, "ConfigureAdditionalPm() EhciPciMmBase = 0x%x \n",EhciPciMmBase
));
562 Buffer32
= MmioRead32(EhciPciMmBase
+ R_PCH_EHCI_PWR_CNTL_STS
);
563 DEBUG ((EFI_D_INFO
, "ConfigureAdditionalPm() R_PCH_EHCI_PWR_CNTL_STS = 0x%x \n",Buffer32
));
576 EFI_GLOBAL_NVS_AREA_PROTOCOL
*GlobalNvsArea
;
577 VarSize
= sizeof(SYSTEM_CONFIGURATION
);
578 Status
= gRT
->GetVariable(
580 &gEfiNormalSetupGuid
,
583 &mSystemConfiguration
585 Status
= gBS
->LocateProtocol (
586 &gEfiGlobalNvsAreaProtocolGuid
,
588 (void **)&GlobalNvsArea
590 GlobalNvsArea
->Area
->CriticalThermalTripPoint
= mSystemConfiguration
.CriticalThermalTripPoint
;
591 GlobalNvsArea
->Area
->PassiveThermalTripPoint
= mSystemConfiguration
.PassiveThermalTripPoint
;
593 #if defined SUPPORT_LVDS_DISPLAY && SUPPORT_LVDS_DISPLAY
600 TristateLpcGpioS0i3Config (
601 UINT32 Gpio_Mmio_Offset
,
603 CFIO_PNP_INIT
* Gpio_Conf_Data
611 DEBUG ((DEBUG_INFO
, "TristateLpcGpioS0i3Config\n"));
613 for(index
=0; index
< Gpio_Pin_Num
; index
++)
615 mmio_reg
= IO_BASE_ADDRESS
+ Gpio_Mmio_Offset
+ Gpio_Conf_Data
[index
].offset
;
617 MmioWrite32(mmio_reg
, Gpio_Conf_Data
[index
].val
);
619 mmio_val
= MmioRead32(mmio_reg
);
621 DEBUG ((EFI_D_INFO
, "Set MMIO=0x%08x PAD_VAL = 0x%08x,\n", mmio_reg
, mmio_val
));
628 EFI_BOOT_SCRIPT_SAVE_PROTOCOL
*mBootScriptSave
;
631 Event Notification during exit boot service to enabel ACPI mode
633 Disable SW SMI Timer, SMI from USB & Intel Specific USB 2
635 Clear all ACPI event status and disable all ACPI events
636 Disable PM sources except power button
639 Guarantee day-of-month alarm is invalid (ACPI 5.0 Section 4.8.2.4 "Real Time Clock Alarm")
641 Update EC to disable SMI and enable SCI
645 Enable PME_B0_EN in GPE0a_EN
647 @param Event - EFI Event Handle
648 @param Context - Pointer to Notify Context
665 AcpiBase
= MmioRead16 (
666 PchPciDeviceMmBase (DEFAULT_PCI_BUS_NUMBER_PCH
,
667 PCI_DEVICE_NUMBER_PCH_LPC
,
668 PCI_FUNCTION_NUMBER_PCH_LPC
) + R_PCH_LPC_ACPI_BASE
669 ) & B_PCH_LPC_ACPI_BASE_BAR
;
671 DEBUG ((EFI_D_INFO
, "EnableAcpiCallback: AcpiBase = %x\n", AcpiBase
));
674 // Disable SW SMI Timer, SMI from USB & Intel Specific USB 2
676 RegData32
= IoRead32(AcpiBase
+ R_PCH_SMI_EN
);
677 RegData32
&= ~(B_PCH_SMI_EN_SWSMI_TMR
| B_PCH_SMI_EN_LEGACY_USB2
| B_PCH_SMI_EN_INTEL_USB2
);
678 IoWrite32(AcpiBase
+ R_PCH_SMI_EN
, RegData32
);
680 RegData32
= IoRead32(AcpiBase
+ R_PCH_SMI_STS
);
681 RegData32
|= B_PCH_SMI_STS_SWSMI_TMR
;
682 IoWrite32(AcpiBase
+ R_PCH_SMI_STS
, RegData32
);
685 // Disable PM sources except power button
686 // power button is enabled only for PCAT. Disabled it on Tablet platform
689 IoWrite16(AcpiBase
+ R_PCH_ACPI_PM1_EN
, B_PCH_ACPI_PM1_EN_PWRBTN
);
690 IoWrite16(AcpiBase
+ R_PCH_ACPI_PM1_STS
, 0xffff);
693 // Guarantee day-of-month alarm is invalid (ACPI 5.0 Section 4.8.2.4 "Real Time Clock Alarm")
694 // Clear Status D reg VM bit, Date of month Alarm to make Data in CMOS RAM is no longer Valid
696 IoWrite8 (PCAT_RTC_ADDRESS_REGISTER
, RTC_ADDRESS_REGISTER_D
);
697 IoWrite8 (PCAT_RTC_DATA_REGISTER
, 0x0);
699 RegData32
= IoRead32(AcpiBase
+ R_PCH_ALT_GP_SMI_EN
);
700 RegData32
&= ~(BIT7
);
701 IoWrite32((AcpiBase
+ R_PCH_ALT_GP_SMI_EN
), RegData32
);
706 Pm1Cnt
= IoRead16(AcpiBase
+ R_PCH_ACPI_PM1_CNT
);
707 Pm1Cnt
|= B_PCH_ACPI_PM1_CNT_SCI_EN
;
708 IoWrite16(AcpiBase
+ R_PCH_ACPI_PM1_CNT
, Pm1Cnt
);
710 IoWrite8(0x80, 0xA0); //SW_SMI_ACPI_ENABLE
713 // Enable PME_B0_EN in GPE0a_EN
714 // Caution: Enable PME_B0_EN must be placed after enabling SCI.
715 // Otherwise, USB PME could not be handled as SMI event since no handler is there.
717 Gpe0aEn
= IoRead32 (AcpiBase
+ R_PCH_ACPI_GPE0a_EN
);
718 Gpe0aEn
|= B_PCH_ACPI_GPE0a_EN_PME_B0
;
719 IoWrite32(AcpiBase
+ R_PCH_ACPI_GPE0a_EN
, Gpe0aEn
);
727 This is the standard EFI driver point for the Driver. This
728 driver is responsible for setting up any platform specific policy or
729 initialization information.
731 @param ImageHandle Handle for the image of this driver.
732 @param SystemTable Pointer to the EFI System Table.
734 @retval EFI_SUCCESS Policy decisions set.
740 IN EFI_HANDLE ImageHandle
,
741 IN EFI_SYSTEM_TABLE
*SystemTable
746 EFI_HANDLE Handle
= NULL
;
747 EFI_EVENT mEfiExitBootServicesEvent
;
749 VOID
*RtcCallbackReg
= NULL
;
751 mImageHandle
= ImageHandle
;
753 Status
= gBS
->InstallProtocolInterface (
755 &gEfiSpeakerInterfaceProtocolGuid
,
756 EFI_NATIVE_INTERFACE
,
760 Status
= gBS
->LocateProtocol (
761 &gEfiPciRootBridgeIoProtocolGuid
,
763 (VOID
**) &mPciRootBridgeIo
765 ASSERT_EFI_ERROR (Status
);
767 VarSize
= sizeof(EFI_PLATFORM_INFO_HOB
);
768 Status
= gRT
->GetVariable(
770 &gEfiVlv2VariableGuid
,
777 // Initialize Product Board ID variable
779 InitMfgAndConfigModeStateVar();
780 InitPlatformBootMode();
783 // Install Observable protocol
785 InitializeObservableProtocol();
787 Status
= SaveSetupRecoveryVar();
788 if (EFI_ERROR (Status
)) {
789 DEBUG ((EFI_D_ERROR
, "InitializePlatform() Save SetupRecovery variable failed \n"));
792 VarSize
= sizeof(SYSTEM_CONFIGURATION
);
793 Status
= gRT
->GetVariable(
795 &gEfiNormalSetupGuid
,
798 &mSystemConfiguration
800 if (EFI_ERROR (Status
) || VarSize
!= sizeof(SYSTEM_CONFIGURATION
)) {
801 //The setup variable is corrupted
802 VarSize
= sizeof(SYSTEM_CONFIGURATION
);
803 Status
= gRT
->GetVariable(
805 &gEfiNormalSetupGuid
,
808 &mSystemConfiguration
810 ASSERT_EFI_ERROR (Status
);
811 Status
= gRT
->SetVariable (
813 &gEfiNormalSetupGuid
,
814 EFI_VARIABLE_NON_VOLATILE
| EFI_VARIABLE_BOOTSERVICE_ACCESS
,
815 sizeof(SYSTEM_CONFIGURATION
),
816 &mSystemConfiguration
820 Status
= EfiCreateEventReadyToBootEx (
828 // Create a ReadyToBoot Event to run the PME init process
830 Status
= EfiCreateEventReadyToBootEx (
837 // Create a ReadyToBoot Event to run enable PR0/PR1 and lock down,unlock variable region
839 if(mSystemConfiguration
.SpiRwProtect
==1) {
840 Status
= EfiCreateEventReadyToBootEx (
842 SpiBiosProtectionFunction
,
848 // Create a ReadyToBoot Event to run the thermalzone init process
850 Status
= EfiCreateEventReadyToBootEx (
859 EFI_COMPUTING_UNIT_CHIPSET
| EFI_CU_PLATFORM_DXE_STEP1
,
867 #if defined(SENSOR_INFO_VAR_SUPPORT) && SENSOR_INFO_VAR_SUPPORT != 0
869 // Initialize Sensor Info variable
871 InitializeSensorInfoVariable();
873 InitPchPlatformPolicy(&mPlatformInfo
);
874 InitVlvPlatformPolicy();
879 InitPlatformUsbPolicy();
880 InitSioPlatformPolicy();
881 InitializeClockRouting();
882 InitializeSlotInfo();
892 EFI_COMPUTING_UNIT_CHIPSET
| EFI_CU_PLATFORM_DXE_STEP2
,
901 // Install PCI Bus Driver Hook
909 EFI_COMPUTING_UNIT_CHIPSET
| EFI_CU_PLATFORM_DXE_STEP3
,
919 // Initialize Password States and Callbacks
923 #if defined SUPPORT_LVDS_DISPLAY && SUPPORT_LVDS_DISPLAY
927 #if defined(FIRMWARE_ID_BACKWARD_COMPATIBLE) && (FIRMWARE_ID_BACKWARD_COMPATIBLE != 0)
929 // Re-write Firmware ID if it is changed
936 EFI_COMPUTING_UNIT_CHIPSET
| EFI_CU_PLATFORM_DXE_STEP4
,
945 Status
= gBS
->CreateEventEx (
950 &gEfiEventExitBootServicesGuid
,
951 &mEfiExitBootServicesEvent
955 // Adjust RTC deafult time to be BIOS-built time.
957 Status
= gBS
->CreateEvent (
960 AdjustDefaultRtcTimeCallback
,
964 if (!EFI_ERROR (Status
)) {
965 Status
= gBS
->RegisterProtocolNotify (
966 &gExitPmAuthProtocolGuid
,
977 Source Or Destination with Length bytes.
979 @param[in] Destination Target memory
980 @param[in] Source Source memory
981 @param[in] Length Number of bytes
988 IN VOID
*Destination
,
996 if (Source
< Destination
) {
997 Destination8
= (CHAR8
*) Destination
+ Length
- 1;
998 Source8
= (CHAR8
*) Source
+ Length
- 1;
1000 *(Destination8
--) |= *(Source8
--);
1003 Destination8
= (CHAR8
*) Destination
;
1004 Source8
= (CHAR8
*) Source
;
1006 *(Destination8
++) |= *(Source8
++);
1015 // Saved SPI Opcode menu to fix EFI variable unable to write after S3 resume.
1017 S3BootScriptSaveMemWrite (
1018 EfiBootScriptWidthUint32
,
1019 (UINTN
)(SPI_BASE_ADDRESS
+ (R_PCH_SPI_OPMENU0
)),
1021 (VOID
*)(UINTN
)(SPI_BASE_ADDRESS
+ (R_PCH_SPI_OPMENU0
)));
1023 S3BootScriptSaveMemWrite (
1024 EfiBootScriptWidthUint32
,
1025 (UINTN
)(SPI_BASE_ADDRESS
+ (R_PCH_SPI_OPMENU1
)),
1027 (VOID
*)(UINTN
)(SPI_BASE_ADDRESS
+ (R_PCH_SPI_OPMENU1
)));
1029 S3BootScriptSaveMemWrite (
1030 EfiBootScriptWidthUint16
,
1031 (UINTN
)(SPI_BASE_ADDRESS
+ R_PCH_SPI_OPTYPE
),
1033 (VOID
*)(UINTN
)(SPI_BASE_ADDRESS
+ R_PCH_SPI_OPTYPE
));
1035 S3BootScriptSaveMemWrite (
1036 EfiBootScriptWidthUint16
,
1037 (UINTN
)(SPI_BASE_ADDRESS
+ R_PCH_SPI_PREOP
),
1039 (VOID
*)(UINTN
)(SPI_BASE_ADDRESS
+ R_PCH_SPI_PREOP
));
1042 // Saved MTPMC_1 for S3 resume.
1044 S3BootScriptSaveMemWrite (
1045 EfiBootScriptWidthUint32
,
1046 (UINTN
)(PMC_BASE_ADDRESS
+ R_PCH_PMC_MTPMC1
),
1048 (VOID
*)(UINTN
)(PMC_BASE_ADDRESS
+ R_PCH_PMC_MTPMC1
));
1054 ReadyToBootFunction (
1060 EFI_ISA_ACPI_PROTOCOL
*IsaAcpi
;
1061 EFI_ISA_ACPI_DEVICE_ID IsaDevice
;
1064 EFI_TPM_MP_DRIVER_PROTOCOL
*TpmMpDriver
;
1065 EFI_CPU_IO_PROTOCOL
*CpuIo
;
1067 UINT8 ReceiveBuffer
[64];
1068 UINT32 ReceiveBufferSize
;
1070 UINT8 TpmForceClearCommand
[] = {0x00, 0xC1,
1071 0x00, 0x00, 0x00, 0x0A,
1072 0x00, 0x00, 0x00, 0x5D};
1073 UINT8 TpmPhysicalPresenceCommand
[] = {0x00, 0xC1,
1074 0x00, 0x00, 0x00, 0x0C,
1075 0x40, 0x00, 0x00, 0x0A,
1077 UINT8 TpmPhysicalDisableCommand
[] = {0x00, 0xC1,
1078 0x00, 0x00, 0x00, 0x0A,
1079 0x00, 0x00, 0x00, 0x70};
1080 UINT8 TpmPhysicalEnableCommand
[] = {0x00, 0xC1,
1081 0x00, 0x00, 0x00, 0x0A,
1082 0x00, 0x00, 0x00, 0x6F};
1083 UINT8 TpmPhysicalSetDeactivatedCommand
[] = {0x00, 0xC1,
1084 0x00, 0x00, 0x00, 0x0B,
1085 0x00, 0x00, 0x00, 0x72,
1087 UINT8 TpmSetOwnerInstallCommand
[] = {0x00, 0xC1,
1088 0x00, 0x00, 0x00, 0x0B,
1089 0x00, 0x00, 0x00, 0x71,
1092 Size
= sizeof(UINT16
);
1093 Status
= gRT
->GetVariable (
1094 VAR_EQ_FLOPPY_MODE_DECIMAL_NAME
,
1095 &gEfiNormalSetupGuid
,
1102 // Disable Floppy Controller if needed
1104 Status
= gBS
->LocateProtocol (&gEfiIsaAcpiProtocolGuid
, NULL
, (VOID
**) &IsaAcpi
);
1105 if (!EFI_ERROR(Status
) && (State
== 0x00)) {
1106 IsaDevice
.HID
= EISA_PNP_ID(0x604);
1108 Status
= IsaAcpi
->EnableDevice(IsaAcpi
, &IsaDevice
, FALSE
);
1112 // save LAN info to a variable
1114 if (NULL
!= mPciLanInfo
) {
1117 &gEfiPciLanInfoGuid
,
1118 EFI_VARIABLE_NON_VOLATILE
| EFI_VARIABLE_BOOTSERVICE_ACCESS
| EFI_VARIABLE_RUNTIME_ACCESS
,
1119 mPciLanCount
* sizeof(PCI_LAN_INFO
),
1124 if (NULL
!= mPciLanInfo
) {
1125 gBS
->FreePool (mPciLanInfo
);
1131 // Handle ACPI OS TPM requests here
1133 Status
= gBS
->LocateProtocol (
1134 &gEfiCpuIoProtocolGuid
,
1138 Status
= gBS
->LocateProtocol (
1139 &gEfiTpmMpDriverProtocolGuid
,
1141 (VOID
**)&TpmMpDriver
1143 if (!EFI_ERROR (Status
))
1145 Data
= ReadCmosBank1Byte (CpuIo
, ACPI_TPM_REQUEST
);
1148 // Clear pending ACPI TPM request indicator
1150 WriteCmosBank1Byte (CpuIo
, ACPI_TPM_REQUEST
, 0x00);
1153 WriteCmosBank1Byte (CpuIo
, ACPI_TPM_LAST_REQUEST
, Data
);
1156 // Assert Physical Presence for these commands
1158 TpmPhysicalPresenceCommand
[11] = 0x20;
1159 ReceiveBufferSize
= sizeof(ReceiveBuffer
);
1160 Status
= TpmMpDriver
->Transmit (
1161 TpmMpDriver
, TpmPhysicalPresenceCommand
,
1162 sizeof (TpmPhysicalPresenceCommand
),
1163 ReceiveBuffer
, &ReceiveBufferSize
1166 // PF PhysicalPresence = TRUE
1168 TpmPhysicalPresenceCommand
[11] = 0x08;
1169 ReceiveBufferSize
= sizeof(ReceiveBuffer
);
1170 Status
= TpmMpDriver
->Transmit (
1171 TpmMpDriver
, TpmPhysicalPresenceCommand
,
1172 sizeof (TpmPhysicalPresenceCommand
),
1179 // TPM_PhysicalEnable
1181 ReceiveBufferSize
= sizeof(ReceiveBuffer
);
1182 Status
= TpmMpDriver
->Transmit (
1183 TpmMpDriver
, TpmPhysicalEnableCommand
,
1184 sizeof (TpmPhysicalEnableCommand
),
1185 ReceiveBuffer
, &ReceiveBufferSize
1191 // TPM_PhysicalDisable
1193 ReceiveBufferSize
= sizeof(ReceiveBuffer
);
1194 Status
= TpmMpDriver
->Transmit (
1195 TpmMpDriver
, TpmPhysicalDisableCommand
,
1196 sizeof (TpmPhysicalDisableCommand
),
1204 // TPM_PhysicalSetDeactivated=FALSE
1206 ReceiveBufferSize
= sizeof(ReceiveBuffer
);
1207 TpmPhysicalSetDeactivatedCommand
[10] = 0x00;
1208 Status
= TpmMpDriver
->Transmit (
1210 TpmPhysicalSetDeactivatedCommand
,
1211 sizeof (TpmPhysicalSetDeactivatedCommand
),
1212 ReceiveBuffer
, &ReceiveBufferSize
1214 gRT
->ResetSystem (EfiResetWarm
, EFI_SUCCESS
, 0, NULL
);
1219 // TPM_PhysicalSetDeactivated=TRUE
1221 ReceiveBufferSize
= sizeof(ReceiveBuffer
);
1222 TpmPhysicalSetDeactivatedCommand
[10] = 0x01;
1223 Status
= TpmMpDriver
->Transmit (
1225 TpmPhysicalSetDeactivatedCommand
,
1226 sizeof (TpmPhysicalSetDeactivatedCommand
),
1242 ReceiveBufferSize
= sizeof(ReceiveBuffer
);
1243 Status
= TpmMpDriver
->Transmit (
1245 TpmForceClearCommand
,
1246 sizeof (TpmForceClearCommand
),
1260 // TPM_PhysicalEnable
1262 ReceiveBufferSize
= sizeof(ReceiveBuffer
);
1263 Status
= TpmMpDriver
->Transmit (
1265 TpmPhysicalEnableCommand
,
1266 sizeof (TpmPhysicalEnableCommand
),
1271 // TPM_PhysicalSetDeactivated=FALSE
1273 ReceiveBufferSize
= sizeof(ReceiveBuffer
);
1274 TpmPhysicalSetDeactivatedCommand
[10] = 0x00;
1275 Status
= TpmMpDriver
->Transmit (
1277 TpmPhysicalSetDeactivatedCommand
,
1278 sizeof (TpmPhysicalSetDeactivatedCommand
),
1292 // TPM_PhysicalSetDeactivated=TRUE
1294 ReceiveBufferSize
= sizeof(ReceiveBuffer
);
1295 TpmPhysicalSetDeactivatedCommand
[10] = 0x01;
1296 Status
= TpmMpDriver
->Transmit (
1298 TpmPhysicalSetDeactivatedCommand
,
1299 sizeof (TpmPhysicalSetDeactivatedCommand
),
1304 // TPM_PhysicalDisable
1306 ReceiveBufferSize
= sizeof(ReceiveBuffer
);
1307 Status
= TpmMpDriver
->Transmit (
1309 TpmPhysicalDisableCommand
,
1310 sizeof (TpmPhysicalDisableCommand
),
1324 // TPM_SetOwnerInstall=TRUE
1326 ReceiveBufferSize
= sizeof(ReceiveBuffer
);
1327 TpmSetOwnerInstallCommand
[10] = 0x01;
1328 Status
= TpmMpDriver
->Transmit (
1330 TpmSetOwnerInstallCommand
,
1331 sizeof (TpmSetOwnerInstallCommand
),
1339 // TPM_SetOwnerInstall=FALSE
1341 ReceiveBufferSize
= sizeof(ReceiveBuffer
);
1342 TpmSetOwnerInstallCommand
[10] = 0x00;
1343 Status
= TpmMpDriver
->Transmit (
1345 TpmSetOwnerInstallCommand
,
1346 sizeof (TpmSetOwnerInstallCommand
),
1354 // TPM_PhysicalEnable
1356 ReceiveBufferSize
= sizeof(ReceiveBuffer
);
1357 Status
= TpmMpDriver
->Transmit (
1359 TpmPhysicalEnableCommand
,
1360 sizeof (TpmPhysicalEnableCommand
),
1365 // TPM_PhysicalSetDeactivated=FALSE
1367 ReceiveBufferSize
= sizeof(ReceiveBuffer
);
1368 TpmPhysicalSetDeactivatedCommand
[10] = 0x00;
1369 Status
= TpmMpDriver
->Transmit (
1371 TpmPhysicalSetDeactivatedCommand
,
1372 sizeof (TpmPhysicalSetDeactivatedCommand
),
1377 // Do TPM_SetOwnerInstall=TRUE on next reboot
1380 WriteCmosBank1Byte (CpuIo
, ACPI_TPM_REQUEST
, 0xF0);
1392 // TPM_SetOwnerInstall=FALSE
1394 ReceiveBufferSize
= sizeof(ReceiveBuffer
);
1395 TpmSetOwnerInstallCommand
[10] = 0x00;
1396 Status
= TpmMpDriver
->Transmit (
1398 TpmSetOwnerInstallCommand
,
1399 sizeof (TpmSetOwnerInstallCommand
),
1404 // TPM_PhysicalSetDeactivated=TRUE
1406 ReceiveBufferSize
= sizeof(ReceiveBuffer
);
1407 TpmPhysicalSetDeactivatedCommand
[10] = 0x01;
1408 Status
= TpmMpDriver
->Transmit (
1410 TpmPhysicalSetDeactivatedCommand
,
1411 sizeof (TpmPhysicalSetDeactivatedCommand
),
1416 // TPM_PhysicalDisable
1418 ReceiveBufferSize
= sizeof(ReceiveBuffer
);
1419 Status
= TpmMpDriver
->Transmit (
1421 TpmPhysicalDisableCommand
,
1422 sizeof (TpmPhysicalDisableCommand
),
1438 ReceiveBufferSize
= sizeof(ReceiveBuffer
);
1439 Status
= TpmMpDriver
->Transmit (
1441 TpmForceClearCommand
,
1442 sizeof (TpmForceClearCommand
),
1447 // TPM_PhysicalEnable
1449 ReceiveBufferSize
= sizeof(ReceiveBuffer
);
1450 Status
= TpmMpDriver
->Transmit (
1452 TpmPhysicalEnableCommand
,
1453 sizeof (TpmPhysicalEnableCommand
),
1458 // TPM_PhysicalSetDeactivated=FALSE
1460 ReceiveBufferSize
= sizeof(ReceiveBuffer
);
1461 TpmPhysicalSetDeactivatedCommand
[10] = 0x00;
1462 Status
= TpmMpDriver
->Transmit (
1464 TpmPhysicalSetDeactivatedCommand
,
1465 sizeof (TpmPhysicalSetDeactivatedCommand
),
1479 // Second part of ACPI TPM request 0x0A: OEM custom TPM_SetOwnerInstall=TRUE
1481 ReceiveBufferSize
= sizeof(ReceiveBuffer
);
1482 TpmSetOwnerInstallCommand
[10] = 0x01;
1483 Status
= TpmMpDriver
->Transmit (
1485 TpmSetOwnerInstallCommand
,
1486 sizeof (TpmSetOwnerInstallCommand
),
1490 WriteCmosBank1Byte (CpuIo
, ACPI_TPM_LAST_REQUEST
, 0x0A);
1493 // Deassert Physical Presence
1495 TpmPhysicalPresenceCommand
[11] = 0x10;
1496 ReceiveBufferSize
= sizeof(ReceiveBuffer
);
1497 Status
= TpmMpDriver
->Transmit (
1499 TpmPhysicalPresenceCommand
,
1500 sizeof (TpmPhysicalPresenceCommand
),
1512 Initializes manufacturing and config mode setting.
1516 InitMfgAndConfigModeStateVar()
1518 EFI_PLATFORM_SETUP_ID
*BootModeBuffer
;
1522 HobList
= GetFirstGuidHob(&gEfiPlatformBootModeGuid
);
1523 if (HobList
!= NULL
) {
1524 BootModeBuffer
= GET_GUID_HOB_DATA (HobList
);
1527 // Check if in Manufacturing mode
1530 &BootModeBuffer
->SetupName
,
1531 MANUFACTURE_SETUP_NAME
,
1532 StrSize (MANUFACTURE_SETUP_NAME
)
1545 Initializes manufacturing and config mode setting.
1549 InitPlatformBootMode()
1551 EFI_PLATFORM_SETUP_ID
*BootModeBuffer
;
1554 HobList
= GetFirstGuidHob(&gEfiPlatformBootModeGuid
);
1555 if (HobList
!= NULL
) {
1556 BootModeBuffer
= GET_GUID_HOB_DATA (HobList
);
1557 mPlatformBootMode
= BootModeBuffer
->PlatformBootMode
;
1571 UINT16 ItkModBiosState
;
1577 // Setup local variable according to ITK variable
1580 // Read ItkBiosModVar to determine if BIOS has been modified by ITK
1581 // If ItkBiosModVar = 0 or if variable hasn't been initialized then BIOS has not been modified by ITK modified
1582 // Set local variable VAR_EQ_ITK_BIOS_MOD_DECIMAL_NAME=0 if BIOS has not been modified by ITK
1584 DataSize
= sizeof (Value
);
1585 Status
= gRT
->GetVariable (
1586 ITK_BIOS_MOD_VAR_NAME
,
1592 if (Status
== EFI_NOT_FOUND
) {
1594 // Variable not found, hasn't been initialized, intialize to 0
1598 // Write variable to flash.
1601 ITK_BIOS_MOD_VAR_NAME
,
1603 EFI_VARIABLE_RUNTIME_ACCESS
|
1604 EFI_VARIABLE_NON_VOLATILE
|
1605 EFI_VARIABLE_BOOTSERVICE_ACCESS
,
1611 if ( (!EFI_ERROR (Status
)) || (Status
== EFI_NOT_FOUND
) ) {
1612 if (Value
== 0x00) {
1613 ItkModBiosState
= 0x00;
1615 ItkModBiosState
= 0x01;
1618 VAR_EQ_ITK_BIOS_MOD_DECIMAL_NAME
,
1619 &gEfiNormalSetupGuid
,
1620 EFI_VARIABLE_BOOTSERVICE_ACCESS
,
1622 (void *)&ItkModBiosState
1627 #if defined(FIRMWARE_ID_BACKWARD_COMPATIBLE) && (FIRMWARE_ID_BACKWARD_COMPATIBLE != 0)
1631 Initializes the BIOS FIRMWARE ID from the FIRMWARE_ID build variable.
1640 CHAR16 FirmwareIdNameWithPassword
[] = FIRMWARE_ID_NAME_WITH_PASSWORD
;
1643 // First try writing the variable without a password in case we are
1644 // upgrading from a BIOS without password protection on the FirmwareId
1646 Status
= gRT
->SetVariable(
1647 (CHAR16
*)&gFirmwareIdName
,
1649 EFI_VARIABLE_NON_VOLATILE
| EFI_VARIABLE_BOOTSERVICE_ACCESS
|
1650 EFI_VARIABLE_RUNTIME_ACCESS
,
1651 sizeof( FIRMWARE_ID
) - 1,
1655 if (Status
== EFI_INVALID_PARAMETER
) {
1658 // Since setting the firmware id without the password failed,
1659 // a password must be required.
1661 Status
= gRT
->SetVariable(
1662 (CHAR16
*)&FirmwareIdNameWithPassword
,
1664 EFI_VARIABLE_NON_VOLATILE
| EFI_VARIABLE_BOOTSERVICE_ACCESS
|
1665 EFI_VARIABLE_RUNTIME_ACCESS
,
1666 sizeof( FIRMWARE_ID
) - 1,
1678 // Workaround to support IIA bug.
1679 // IIA request to change option value to 4, 5 and 7 relatively
1680 // instead of 1, 2, and 3 which follow Lakeport Specs.
1681 // Check option value, temporary hardcode GraphicsDriverMemorySize
1682 // Option value to fulfill IIA requirment. So that user no need to
1683 // load default and update setupvariable after update BIOS.
1684 // Option value hardcoded as: 1 to 4, 2 to 5, 3 to 7.
1685 // *This is for broadwater and above product only.
1688 SYSTEM_CONFIGURATION SystemConfiguration
;
1692 VarSize
= sizeof(SYSTEM_CONFIGURATION
);
1693 Status
= gRT
->GetVariable(
1695 &gEfiNormalSetupGuid
,
1698 &SystemConfiguration
1701 if (EFI_ERROR (Status
) || VarSize
!= sizeof(SYSTEM_CONFIGURATION
)) {
1702 //The setup variable is corrupted
1703 VarSize
= sizeof(SYSTEM_CONFIGURATION
);
1704 Status
= gRT
->GetVariable(
1706 &gEfiNormalSetupGuid
,
1709 &SystemConfiguration
1711 ASSERT_EFI_ERROR (Status
);
1714 if((SystemConfiguration
.GraphicsDriverMemorySize
< 4) && !EFI_ERROR(Status
) ) {
1715 switch (SystemConfiguration
.GraphicsDriverMemorySize
){
1717 SystemConfiguration
.GraphicsDriverMemorySize
= 4;
1720 SystemConfiguration
.GraphicsDriverMemorySize
= 5;
1723 SystemConfiguration
.GraphicsDriverMemorySize
= 7;
1729 Status
= gRT
->SetVariable (
1731 &gEfiNormalSetupGuid
,
1732 EFI_VARIABLE_NON_VOLATILE
| EFI_VARIABLE_BOOTSERVICE_ACCESS
,
1733 sizeof(SYSTEM_CONFIGURATION
),
1734 &SystemConfiguration
1740 InitPlatformUsbPolicy (
1750 mUsbPolicyData
.Version
= (UINT8
)USB_POLICY_PROTOCOL_REVISION_2
;
1751 mUsbPolicyData
.UsbMassStorageEmulationType
= mSystemConfiguration
.UsbBIOSINT13DeviceEmulation
;
1752 if(mUsbPolicyData
.UsbMassStorageEmulationType
== 3) {
1753 mUsbPolicyData
.UsbEmulationSize
= mSystemConfiguration
.UsbBIOSINT13DeviceEmulationSize
;
1755 mUsbPolicyData
.UsbEmulationSize
= 0;
1757 mUsbPolicyData
.UsbZipEmulationType
= mSystemConfiguration
.UsbZipEmulation
;
1758 mUsbPolicyData
.UsbOperationMode
= HIGH_SPEED
;
1761 // Some chipset need Period smi, 0 = LEGACY_PERIOD_UN_SUPP
1763 mUsbPolicyData
.USBPeriodSupport
= LEGACY_PERIOD_UN_SUPP
;
1766 // Some platform need legacyfree, 0 = LEGACY_FREE_UN_SUPP
1768 mUsbPolicyData
.LegacyFreeSupport
= LEGACY_FREE_UN_SUPP
;
1771 // Set Code base , TIANO_CODE_BASE =0x01, ICBD =0x00
1773 mUsbPolicyData
.CodeBase
= (UINT8
)ICBD_CODE_BASE
;
1776 // Some chispet 's LpcAcpibase are diffrent,set by platform or chipset,
1777 // default is Ich acpibase =0x040. acpitimerreg=0x08.
1778 mUsbPolicyData
.LpcAcpiBase
= 0x40;
1779 mUsbPolicyData
.AcpiTimerReg
= 0x08;
1782 // Set for reduce usb post time
1784 mUsbPolicyData
.UsbTimeTue
= 0x00;
1785 mUsbPolicyData
.InternelHubExist
= 0x00; //TigerPoint doesn't have RMH
1786 mUsbPolicyData
.EnumWaitPortStableStall
= 100;
1789 Status
= gBS
->InstallProtocolInterface (
1792 EFI_NATIVE_INTERFACE
,
1795 ASSERT_EFI_ERROR(Status
);
1801 IN EFI_CPU_IO_PROTOCOL
*CpuIo
,
1807 CpuIo
->Io
.Write (CpuIo
, EfiCpuIoWidthUint8
, 0x72, 1, &Index
);
1808 CpuIo
->Io
.Read (CpuIo
, EfiCpuIoWidthUint8
, 0x73, 1, &Data
);
1813 WriteCmosBank1Byte (
1814 IN EFI_CPU_IO_PROTOCOL
*CpuIo
,