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git.proxmox.com Git - mirror_ubuntu-artful-kernel.git/blob - arch/arc/include/asm/io.h
2 * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
12 #include <linux/types.h>
13 #include <asm/byteorder.h>
16 extern void __iomem
*ioremap(phys_addr_t paddr
, unsigned long size
);
17 extern void __iomem
*ioremap_prot(phys_addr_t paddr
, unsigned long size
,
19 extern void iounmap(const void __iomem
*addr
);
21 #define ioremap_nocache(phy, sz) ioremap(phy, sz)
22 #define ioremap_wc(phy, sz) ioremap(phy, sz)
23 #define ioremap_wt(phy, sz) ioremap(phy, sz)
25 /* Change struct page to physical address */
26 #define page_to_phys(page) (page_to_pfn(page) << PAGE_SHIFT)
28 #define __raw_readb __raw_readb
29 static inline u8
__raw_readb(const volatile void __iomem
*addr
)
36 : "m" (*(volatile u8 __force
*)addr
)
42 #define __raw_readw __raw_readw
43 static inline u16
__raw_readw(const volatile void __iomem
*addr
)
50 : "m" (*(volatile u16 __force
*)addr
)
56 #define __raw_readl __raw_readl
57 static inline u32
__raw_readl(const volatile void __iomem
*addr
)
64 : "m" (*(volatile u32 __force
*)addr
)
70 #define __raw_writeb __raw_writeb
71 static inline void __raw_writeb(u8 b
, volatile void __iomem
*addr
)
76 : "r" (b
), "m" (*(volatile u8 __force
*)addr
)
80 #define __raw_writew __raw_writew
81 static inline void __raw_writew(u16 s
, volatile void __iomem
*addr
)
86 : "r" (s
), "m" (*(volatile u16 __force
*)addr
)
91 #define __raw_writel __raw_writel
92 static inline void __raw_writel(u32 w
, volatile void __iomem
*addr
)
97 : "r" (w
), "m" (*(volatile u32 __force
*)addr
)
102 #ifdef CONFIG_ISA_ARCV2
103 #include <asm/barrier.h>
104 #define __iormb() rmb()
105 #define __iowmb() wmb()
107 #define __iormb() do { } while (0)
108 #define __iowmb() do { } while (0)
112 * MMIO can also get buffered/optimized in micro-arch, so barriers needed
113 * Based on ARM model for the typical use case
116 * <writel MMIO "go" reg>
118 * <readl MMIO "status" reg>
121 * http://lkml.kernel.org/r/20150622133656.GG1583@arm.com
123 #define readb(c) ({ u8 __v = readb_relaxed(c); __iormb(); __v; })
124 #define readw(c) ({ u16 __v = readw_relaxed(c); __iormb(); __v; })
125 #define readl(c) ({ u32 __v = readl_relaxed(c); __iormb(); __v; })
127 #define writeb(v,c) ({ __iowmb(); writeb_relaxed(v,c); })
128 #define writew(v,c) ({ __iowmb(); writew_relaxed(v,c); })
129 #define writel(v,c) ({ __iowmb(); writel_relaxed(v,c); })
132 * Relaxed API for drivers which can handle barrier ordering themselves
134 * Also these are defined to perform little endian accesses.
135 * To provide the typical device register semantics of fixed endian,
136 * swap the byte order for Big Endian
138 * http://lkml.kernel.org/r/201603100845.30602.arnd@arndb.de
140 #define readb_relaxed(c) __raw_readb(c)
141 #define readw_relaxed(c) ({ u16 __r = le16_to_cpu((__force __le16) \
142 __raw_readw(c)); __r; })
143 #define readl_relaxed(c) ({ u32 __r = le32_to_cpu((__force __le32) \
144 __raw_readl(c)); __r; })
146 #define writeb_relaxed(v,c) __raw_writeb(v,c)
147 #define writew_relaxed(v,c) __raw_writew((__force u16) cpu_to_le16(v),c)
148 #define writel_relaxed(v,c) __raw_writel((__force u32) cpu_to_le32(v),c)
150 #include <asm-generic/io.h>
152 #endif /* _ASM_ARC_IO_H */