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ASoC: wm8994: mark expected switch fall-throughs
[mirror_ubuntu-bionic-kernel.git] / arch / arm / boot / dts / am33xx.dtsi
1 /*
2 * Device Tree Source for AM33XX SoC
3 *
4 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
5 *
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
9 */
10
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/pinctrl/am33xx.h>
13
14 / {
15 compatible = "ti,am33xx";
16 interrupt-parent = <&intc>;
17 #address-cells = <1>;
18 #size-cells = <1>;
19 chosen { };
20
21 aliases {
22 i2c0 = &i2c0;
23 i2c1 = &i2c1;
24 i2c2 = &i2c2;
25 serial0 = &uart0;
26 serial1 = &uart1;
27 serial2 = &uart2;
28 serial3 = &uart3;
29 serial4 = &uart4;
30 serial5 = &uart5;
31 d_can0 = &dcan0;
32 d_can1 = &dcan1;
33 usb0 = &usb0;
34 usb1 = &usb1;
35 phy0 = &usb0_phy;
36 phy1 = &usb1_phy;
37 ethernet0 = &cpsw_emac0;
38 ethernet1 = &cpsw_emac1;
39 };
40
41 cpus {
42 #address-cells = <1>;
43 #size-cells = <0>;
44 cpu@0 {
45 compatible = "arm,cortex-a8";
46 device_type = "cpu";
47 reg = <0>;
48
49 operating-points-v2 = <&cpu0_opp_table>;
50
51 clocks = <&dpll_mpu_ck>;
52 clock-names = "cpu";
53
54 clock-latency = <300000>; /* From omap-cpufreq driver */
55 };
56 };
57
58 cpu0_opp_table: opp-table {
59 compatible = "operating-points-v2-ti-cpu";
60 syscon = <&scm_conf>;
61
62 /*
63 * The three following nodes are marked with opp-suspend
64 * because the can not be enabled simultaneously on a
65 * single SoC.
66 */
67 opp50-300000000 {
68 opp-hz = /bits/ 64 <300000000>;
69 opp-microvolt = <950000 931000 969000>;
70 opp-supported-hw = <0x06 0x0010>;
71 opp-suspend;
72 };
73
74 opp100-275000000 {
75 opp-hz = /bits/ 64 <275000000>;
76 opp-microvolt = <1100000 1078000 1122000>;
77 opp-supported-hw = <0x01 0x00FF>;
78 opp-suspend;
79 };
80
81 opp100-300000000 {
82 opp-hz = /bits/ 64 <300000000>;
83 opp-microvolt = <1100000 1078000 1122000>;
84 opp-supported-hw = <0x06 0x0020>;
85 opp-suspend;
86 };
87
88 opp100-500000000 {
89 opp-hz = /bits/ 64 <500000000>;
90 opp-microvolt = <1100000 1078000 1122000>;
91 opp-supported-hw = <0x01 0xFFFF>;
92 };
93
94 opp100-600000000 {
95 opp-hz = /bits/ 64 <600000000>;
96 opp-microvolt = <1100000 1078000 1122000>;
97 opp-supported-hw = <0x06 0x0040>;
98 };
99
100 opp120-600000000 {
101 opp-hz = /bits/ 64 <600000000>;
102 opp-microvolt = <1200000 1176000 1224000>;
103 opp-supported-hw = <0x01 0xFFFF>;
104 };
105
106 opp120-720000000 {
107 opp-hz = /bits/ 64 <720000000>;
108 opp-microvolt = <1200000 1176000 1224000>;
109 opp-supported-hw = <0x06 0x0080>;
110 };
111
112 oppturbo-720000000 {
113 opp-hz = /bits/ 64 <720000000>;
114 opp-microvolt = <1260000 1234800 1285200>;
115 opp-supported-hw = <0x01 0xFFFF>;
116 };
117
118 oppturbo-800000000 {
119 opp-hz = /bits/ 64 <800000000>;
120 opp-microvolt = <1260000 1234800 1285200>;
121 opp-supported-hw = <0x06 0x0100>;
122 };
123
124 oppnitro-1000000000 {
125 opp-hz = /bits/ 64 <1000000000>;
126 opp-microvolt = <1325000 1298500 1351500>;
127 opp-supported-hw = <0x04 0x0200>;
128 };
129 };
130
131 pmu {
132 compatible = "arm,cortex-a8-pmu";
133 interrupts = <3>;
134 };
135
136 /*
137 * The soc node represents the soc top level view. It is used for IPs
138 * that are not memory mapped in the MPU view or for the MPU itself.
139 */
140 soc {
141 compatible = "ti,omap-infra";
142 mpu {
143 compatible = "ti,omap3-mpu";
144 ti,hwmods = "mpu";
145 };
146 };
147
148 /*
149 * XXX: Use a flat representation of the AM33XX interconnect.
150 * The real AM33XX interconnect network is quite complex. Since
151 * it will not bring real advantage to represent that in DT
152 * for the moment, just use a fake OCP bus entry to represent
153 * the whole bus hierarchy.
154 */
155 ocp {
156 compatible = "simple-bus";
157 #address-cells = <1>;
158 #size-cells = <1>;
159 ranges;
160 ti,hwmods = "l3_main";
161
162 l4_wkup: l4_wkup@44c00000 {
163 compatible = "ti,am3-l4-wkup", "simple-bus";
164 #address-cells = <1>;
165 #size-cells = <1>;
166 ranges = <0 0x44c00000 0x280000>;
167
168 wkup_m3: wkup_m3@100000 {
169 compatible = "ti,am3352-wkup-m3";
170 reg = <0x100000 0x4000>,
171 <0x180000 0x2000>;
172 reg-names = "umem", "dmem";
173 ti,hwmods = "wkup_m3";
174 ti,pm-firmware = "am335x-pm-firmware.elf";
175 };
176
177 prcm: prcm@200000 {
178 compatible = "ti,am3-prcm";
179 reg = <0x200000 0x4000>;
180
181 prcm_clocks: clocks {
182 #address-cells = <1>;
183 #size-cells = <0>;
184 };
185
186 prcm_clockdomains: clockdomains {
187 };
188 };
189
190 scm: scm@210000 {
191 compatible = "ti,am3-scm", "simple-bus";
192 reg = <0x210000 0x2000>;
193 #address-cells = <1>;
194 #size-cells = <1>;
195 #pinctrl-cells = <1>;
196 ranges = <0 0x210000 0x2000>;
197
198 am33xx_pinmux: pinmux@800 {
199 compatible = "pinctrl-single";
200 reg = <0x800 0x238>;
201 #address-cells = <1>;
202 #size-cells = <0>;
203 #pinctrl-cells = <1>;
204 pinctrl-single,register-width = <32>;
205 pinctrl-single,function-mask = <0x7f>;
206 };
207
208 scm_conf: scm_conf@0 {
209 compatible = "syscon", "simple-bus";
210 reg = <0x0 0x800>;
211 #address-cells = <1>;
212 #size-cells = <1>;
213 ranges = <0 0 0x800>;
214
215 scm_clocks: clocks {
216 #address-cells = <1>;
217 #size-cells = <0>;
218 };
219 };
220
221 wkup_m3_ipc: wkup_m3_ipc@1324 {
222 compatible = "ti,am3352-wkup-m3-ipc";
223 reg = <0x1324 0x24>;
224 interrupts = <78>;
225 ti,rproc = <&wkup_m3>;
226 mboxes = <&mailbox &mbox_wkupm3>;
227 };
228
229 edma_xbar: dma-router@f90 {
230 compatible = "ti,am335x-edma-crossbar";
231 reg = <0xf90 0x40>;
232 #dma-cells = <3>;
233 dma-requests = <32>;
234 dma-masters = <&edma>;
235 };
236
237 scm_clockdomains: clockdomains {
238 };
239 };
240 };
241
242 intc: interrupt-controller@48200000 {
243 compatible = "ti,am33xx-intc";
244 interrupt-controller;
245 #interrupt-cells = <1>;
246 reg = <0x48200000 0x1000>;
247 };
248
249 edma: edma@49000000 {
250 compatible = "ti,edma3-tpcc";
251 ti,hwmods = "tpcc";
252 reg = <0x49000000 0x10000>;
253 reg-names = "edma3_cc";
254 interrupts = <12 13 14>;
255 interrupt-names = "edma3_ccint", "edma3_mperr",
256 "edma3_ccerrint";
257 dma-requests = <64>;
258 #dma-cells = <2>;
259
260 ti,tptcs = <&edma_tptc0 7>, <&edma_tptc1 5>,
261 <&edma_tptc2 0>;
262
263 ti,edma-memcpy-channels = <20 21>;
264 };
265
266 edma_tptc0: tptc@49800000 {
267 compatible = "ti,edma3-tptc";
268 ti,hwmods = "tptc0";
269 reg = <0x49800000 0x100000>;
270 interrupts = <112>;
271 interrupt-names = "edma3_tcerrint";
272 };
273
274 edma_tptc1: tptc@49900000 {
275 compatible = "ti,edma3-tptc";
276 ti,hwmods = "tptc1";
277 reg = <0x49900000 0x100000>;
278 interrupts = <113>;
279 interrupt-names = "edma3_tcerrint";
280 };
281
282 edma_tptc2: tptc@49a00000 {
283 compatible = "ti,edma3-tptc";
284 ti,hwmods = "tptc2";
285 reg = <0x49a00000 0x100000>;
286 interrupts = <114>;
287 interrupt-names = "edma3_tcerrint";
288 };
289
290 gpio0: gpio@44e07000 {
291 compatible = "ti,omap4-gpio";
292 ti,hwmods = "gpio1";
293 gpio-controller;
294 #gpio-cells = <2>;
295 interrupt-controller;
296 #interrupt-cells = <2>;
297 reg = <0x44e07000 0x1000>;
298 interrupts = <96>;
299 };
300
301 gpio1: gpio@4804c000 {
302 compatible = "ti,omap4-gpio";
303 ti,hwmods = "gpio2";
304 gpio-controller;
305 #gpio-cells = <2>;
306 interrupt-controller;
307 #interrupt-cells = <2>;
308 reg = <0x4804c000 0x1000>;
309 interrupts = <98>;
310 };
311
312 gpio2: gpio@481ac000 {
313 compatible = "ti,omap4-gpio";
314 ti,hwmods = "gpio3";
315 gpio-controller;
316 #gpio-cells = <2>;
317 interrupt-controller;
318 #interrupt-cells = <2>;
319 reg = <0x481ac000 0x1000>;
320 interrupts = <32>;
321 };
322
323 gpio3: gpio@481ae000 {
324 compatible = "ti,omap4-gpio";
325 ti,hwmods = "gpio4";
326 gpio-controller;
327 #gpio-cells = <2>;
328 interrupt-controller;
329 #interrupt-cells = <2>;
330 reg = <0x481ae000 0x1000>;
331 interrupts = <62>;
332 };
333
334 uart0: serial@44e09000 {
335 compatible = "ti,am3352-uart", "ti,omap3-uart";
336 ti,hwmods = "uart1";
337 clock-frequency = <48000000>;
338 reg = <0x44e09000 0x2000>;
339 interrupts = <72>;
340 status = "disabled";
341 dmas = <&edma 26 0>, <&edma 27 0>;
342 dma-names = "tx", "rx";
343 };
344
345 uart1: serial@48022000 {
346 compatible = "ti,am3352-uart", "ti,omap3-uart";
347 ti,hwmods = "uart2";
348 clock-frequency = <48000000>;
349 reg = <0x48022000 0x2000>;
350 interrupts = <73>;
351 status = "disabled";
352 dmas = <&edma 28 0>, <&edma 29 0>;
353 dma-names = "tx", "rx";
354 };
355
356 uart2: serial@48024000 {
357 compatible = "ti,am3352-uart", "ti,omap3-uart";
358 ti,hwmods = "uart3";
359 clock-frequency = <48000000>;
360 reg = <0x48024000 0x2000>;
361 interrupts = <74>;
362 status = "disabled";
363 dmas = <&edma 30 0>, <&edma 31 0>;
364 dma-names = "tx", "rx";
365 };
366
367 uart3: serial@481a6000 {
368 compatible = "ti,am3352-uart", "ti,omap3-uart";
369 ti,hwmods = "uart4";
370 clock-frequency = <48000000>;
371 reg = <0x481a6000 0x2000>;
372 interrupts = <44>;
373 status = "disabled";
374 };
375
376 uart4: serial@481a8000 {
377 compatible = "ti,am3352-uart", "ti,omap3-uart";
378 ti,hwmods = "uart5";
379 clock-frequency = <48000000>;
380 reg = <0x481a8000 0x2000>;
381 interrupts = <45>;
382 status = "disabled";
383 };
384
385 uart5: serial@481aa000 {
386 compatible = "ti,am3352-uart", "ti,omap3-uart";
387 ti,hwmods = "uart6";
388 clock-frequency = <48000000>;
389 reg = <0x481aa000 0x2000>;
390 interrupts = <46>;
391 status = "disabled";
392 };
393
394 i2c0: i2c@44e0b000 {
395 compatible = "ti,omap4-i2c";
396 #address-cells = <1>;
397 #size-cells = <0>;
398 ti,hwmods = "i2c1";
399 reg = <0x44e0b000 0x1000>;
400 interrupts = <70>;
401 status = "disabled";
402 };
403
404 i2c1: i2c@4802a000 {
405 compatible = "ti,omap4-i2c";
406 #address-cells = <1>;
407 #size-cells = <0>;
408 ti,hwmods = "i2c2";
409 reg = <0x4802a000 0x1000>;
410 interrupts = <71>;
411 status = "disabled";
412 };
413
414 i2c2: i2c@4819c000 {
415 compatible = "ti,omap4-i2c";
416 #address-cells = <1>;
417 #size-cells = <0>;
418 ti,hwmods = "i2c3";
419 reg = <0x4819c000 0x1000>;
420 interrupts = <30>;
421 status = "disabled";
422 };
423
424 mmc1: mmc@48060000 {
425 compatible = "ti,omap4-hsmmc";
426 ti,hwmods = "mmc1";
427 ti,dual-volt;
428 ti,needs-special-reset;
429 ti,needs-special-hs-handling;
430 dmas = <&edma_xbar 24 0 0
431 &edma_xbar 25 0 0>;
432 dma-names = "tx", "rx";
433 interrupts = <64>;
434 reg = <0x48060000 0x1000>;
435 status = "disabled";
436 };
437
438 mmc2: mmc@481d8000 {
439 compatible = "ti,omap4-hsmmc";
440 ti,hwmods = "mmc2";
441 ti,needs-special-reset;
442 dmas = <&edma 2 0
443 &edma 3 0>;
444 dma-names = "tx", "rx";
445 interrupts = <28>;
446 reg = <0x481d8000 0x1000>;
447 status = "disabled";
448 };
449
450 mmc3: mmc@47810000 {
451 compatible = "ti,omap4-hsmmc";
452 ti,hwmods = "mmc3";
453 ti,needs-special-reset;
454 interrupts = <29>;
455 reg = <0x47810000 0x1000>;
456 status = "disabled";
457 };
458
459 hwspinlock: spinlock@480ca000 {
460 compatible = "ti,omap4-hwspinlock";
461 reg = <0x480ca000 0x1000>;
462 ti,hwmods = "spinlock";
463 #hwlock-cells = <1>;
464 };
465
466 wdt2: wdt@44e35000 {
467 compatible = "ti,omap3-wdt";
468 ti,hwmods = "wd_timer2";
469 reg = <0x44e35000 0x1000>;
470 interrupts = <91>;
471 };
472
473 dcan0: can@481cc000 {
474 compatible = "ti,am3352-d_can";
475 ti,hwmods = "d_can0";
476 reg = <0x481cc000 0x2000>;
477 clocks = <&dcan0_fck>;
478 clock-names = "fck";
479 syscon-raminit = <&scm_conf 0x644 0>;
480 interrupts = <52>;
481 status = "disabled";
482 };
483
484 dcan1: can@481d0000 {
485 compatible = "ti,am3352-d_can";
486 ti,hwmods = "d_can1";
487 reg = <0x481d0000 0x2000>;
488 clocks = <&dcan1_fck>;
489 clock-names = "fck";
490 syscon-raminit = <&scm_conf 0x644 1>;
491 interrupts = <55>;
492 status = "disabled";
493 };
494
495 mailbox: mailbox@480C8000 {
496 compatible = "ti,omap4-mailbox";
497 reg = <0x480C8000 0x200>;
498 interrupts = <77>;
499 ti,hwmods = "mailbox";
500 #mbox-cells = <1>;
501 ti,mbox-num-users = <4>;
502 ti,mbox-num-fifos = <8>;
503 mbox_wkupm3: wkup_m3 {
504 ti,mbox-send-noirq;
505 ti,mbox-tx = <0 0 0>;
506 ti,mbox-rx = <0 0 3>;
507 };
508 };
509
510 timer1: timer@44e31000 {
511 compatible = "ti,am335x-timer-1ms";
512 reg = <0x44e31000 0x400>;
513 interrupts = <67>;
514 ti,hwmods = "timer1";
515 ti,timer-alwon;
516 };
517
518 timer2: timer@48040000 {
519 compatible = "ti,am335x-timer";
520 reg = <0x48040000 0x400>;
521 interrupts = <68>;
522 ti,hwmods = "timer2";
523 };
524
525 timer3: timer@48042000 {
526 compatible = "ti,am335x-timer";
527 reg = <0x48042000 0x400>;
528 interrupts = <69>;
529 ti,hwmods = "timer3";
530 };
531
532 timer4: timer@48044000 {
533 compatible = "ti,am335x-timer";
534 reg = <0x48044000 0x400>;
535 interrupts = <92>;
536 ti,hwmods = "timer4";
537 ti,timer-pwm;
538 };
539
540 timer5: timer@48046000 {
541 compatible = "ti,am335x-timer";
542 reg = <0x48046000 0x400>;
543 interrupts = <93>;
544 ti,hwmods = "timer5";
545 ti,timer-pwm;
546 };
547
548 timer6: timer@48048000 {
549 compatible = "ti,am335x-timer";
550 reg = <0x48048000 0x400>;
551 interrupts = <94>;
552 ti,hwmods = "timer6";
553 ti,timer-pwm;
554 };
555
556 timer7: timer@4804a000 {
557 compatible = "ti,am335x-timer";
558 reg = <0x4804a000 0x400>;
559 interrupts = <95>;
560 ti,hwmods = "timer7";
561 ti,timer-pwm;
562 };
563
564 rtc: rtc@44e3e000 {
565 compatible = "ti,am3352-rtc", "ti,da830-rtc";
566 reg = <0x44e3e000 0x1000>;
567 interrupts = <75
568 76>;
569 ti,hwmods = "rtc";
570 clocks = <&clkdiv32k_ick>;
571 clock-names = "int-clk";
572 };
573
574 spi0: spi@48030000 {
575 compatible = "ti,omap4-mcspi";
576 #address-cells = <1>;
577 #size-cells = <0>;
578 reg = <0x48030000 0x400>;
579 interrupts = <65>;
580 ti,spi-num-cs = <2>;
581 ti,hwmods = "spi0";
582 dmas = <&edma 16 0
583 &edma 17 0
584 &edma 18 0
585 &edma 19 0>;
586 dma-names = "tx0", "rx0", "tx1", "rx1";
587 status = "disabled";
588 };
589
590 spi1: spi@481a0000 {
591 compatible = "ti,omap4-mcspi";
592 #address-cells = <1>;
593 #size-cells = <0>;
594 reg = <0x481a0000 0x400>;
595 interrupts = <125>;
596 ti,spi-num-cs = <2>;
597 ti,hwmods = "spi1";
598 dmas = <&edma 42 0
599 &edma 43 0
600 &edma 44 0
601 &edma 45 0>;
602 dma-names = "tx0", "rx0", "tx1", "rx1";
603 status = "disabled";
604 };
605
606 usb: usb@47400000 {
607 compatible = "ti,am33xx-usb";
608 reg = <0x47400000 0x1000>;
609 ranges;
610 #address-cells = <1>;
611 #size-cells = <1>;
612 ti,hwmods = "usb_otg_hs";
613 status = "disabled";
614
615 usb_ctrl_mod: control@44e10620 {
616 compatible = "ti,am335x-usb-ctrl-module";
617 reg = <0x44e10620 0x10
618 0x44e10648 0x4>;
619 reg-names = "phy_ctrl", "wakeup";
620 status = "disabled";
621 };
622
623 usb0_phy: usb-phy@47401300 {
624 compatible = "ti,am335x-usb-phy";
625 reg = <0x47401300 0x100>;
626 reg-names = "phy";
627 status = "disabled";
628 ti,ctrl_mod = <&usb_ctrl_mod>;
629 };
630
631 usb0: usb@47401000 {
632 compatible = "ti,musb-am33xx";
633 status = "disabled";
634 reg = <0x47401400 0x400
635 0x47401000 0x200>;
636 reg-names = "mc", "control";
637
638 interrupts = <18>;
639 interrupt-names = "mc";
640 dr_mode = "otg";
641 mentor,multipoint = <1>;
642 mentor,num-eps = <16>;
643 mentor,ram-bits = <12>;
644 mentor,power = <500>;
645 phys = <&usb0_phy>;
646
647 dmas = <&cppi41dma 0 0 &cppi41dma 1 0
648 &cppi41dma 2 0 &cppi41dma 3 0
649 &cppi41dma 4 0 &cppi41dma 5 0
650 &cppi41dma 6 0 &cppi41dma 7 0
651 &cppi41dma 8 0 &cppi41dma 9 0
652 &cppi41dma 10 0 &cppi41dma 11 0
653 &cppi41dma 12 0 &cppi41dma 13 0
654 &cppi41dma 14 0 &cppi41dma 0 1
655 &cppi41dma 1 1 &cppi41dma 2 1
656 &cppi41dma 3 1 &cppi41dma 4 1
657 &cppi41dma 5 1 &cppi41dma 6 1
658 &cppi41dma 7 1 &cppi41dma 8 1
659 &cppi41dma 9 1 &cppi41dma 10 1
660 &cppi41dma 11 1 &cppi41dma 12 1
661 &cppi41dma 13 1 &cppi41dma 14 1>;
662 dma-names =
663 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
664 "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
665 "rx14", "rx15",
666 "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
667 "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
668 "tx14", "tx15";
669 };
670
671 usb1_phy: usb-phy@47401b00 {
672 compatible = "ti,am335x-usb-phy";
673 reg = <0x47401b00 0x100>;
674 reg-names = "phy";
675 status = "disabled";
676 ti,ctrl_mod = <&usb_ctrl_mod>;
677 };
678
679 usb1: usb@47401800 {
680 compatible = "ti,musb-am33xx";
681 status = "disabled";
682 reg = <0x47401c00 0x400
683 0x47401800 0x200>;
684 reg-names = "mc", "control";
685 interrupts = <19>;
686 interrupt-names = "mc";
687 dr_mode = "otg";
688 mentor,multipoint = <1>;
689 mentor,num-eps = <16>;
690 mentor,ram-bits = <12>;
691 mentor,power = <500>;
692 phys = <&usb1_phy>;
693
694 dmas = <&cppi41dma 15 0 &cppi41dma 16 0
695 &cppi41dma 17 0 &cppi41dma 18 0
696 &cppi41dma 19 0 &cppi41dma 20 0
697 &cppi41dma 21 0 &cppi41dma 22 0
698 &cppi41dma 23 0 &cppi41dma 24 0
699 &cppi41dma 25 0 &cppi41dma 26 0
700 &cppi41dma 27 0 &cppi41dma 28 0
701 &cppi41dma 29 0 &cppi41dma 15 1
702 &cppi41dma 16 1 &cppi41dma 17 1
703 &cppi41dma 18 1 &cppi41dma 19 1
704 &cppi41dma 20 1 &cppi41dma 21 1
705 &cppi41dma 22 1 &cppi41dma 23 1
706 &cppi41dma 24 1 &cppi41dma 25 1
707 &cppi41dma 26 1 &cppi41dma 27 1
708 &cppi41dma 28 1 &cppi41dma 29 1>;
709 dma-names =
710 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
711 "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
712 "rx14", "rx15",
713 "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
714 "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
715 "tx14", "tx15";
716 };
717
718 cppi41dma: dma-controller@47402000 {
719 compatible = "ti,am3359-cppi41";
720 reg = <0x47400000 0x1000
721 0x47402000 0x1000
722 0x47403000 0x1000
723 0x47404000 0x4000>;
724 reg-names = "glue", "controller", "scheduler", "queuemgr";
725 interrupts = <17>;
726 interrupt-names = "glue";
727 #dma-cells = <2>;
728 #dma-channels = <30>;
729 #dma-requests = <256>;
730 status = "disabled";
731 };
732 };
733
734 epwmss0: epwmss@48300000 {
735 compatible = "ti,am33xx-pwmss";
736 reg = <0x48300000 0x10>;
737 ti,hwmods = "epwmss0";
738 #address-cells = <1>;
739 #size-cells = <1>;
740 status = "disabled";
741 ranges = <0x48300100 0x48300100 0x80 /* ECAP */
742 0x48300180 0x48300180 0x80 /* EQEP */
743 0x48300200 0x48300200 0x80>; /* EHRPWM */
744
745 ecap0: ecap@48300100 {
746 compatible = "ti,am3352-ecap",
747 "ti,am33xx-ecap";
748 #pwm-cells = <3>;
749 reg = <0x48300100 0x80>;
750 clocks = <&l4ls_gclk>;
751 clock-names = "fck";
752 interrupts = <31>;
753 interrupt-names = "ecap0";
754 status = "disabled";
755 };
756
757 ehrpwm0: pwm@48300200 {
758 compatible = "ti,am3352-ehrpwm",
759 "ti,am33xx-ehrpwm";
760 #pwm-cells = <3>;
761 reg = <0x48300200 0x80>;
762 clocks = <&ehrpwm0_tbclk>, <&l4ls_gclk>;
763 clock-names = "tbclk", "fck";
764 status = "disabled";
765 };
766 };
767
768 epwmss1: epwmss@48302000 {
769 compatible = "ti,am33xx-pwmss";
770 reg = <0x48302000 0x10>;
771 ti,hwmods = "epwmss1";
772 #address-cells = <1>;
773 #size-cells = <1>;
774 status = "disabled";
775 ranges = <0x48302100 0x48302100 0x80 /* ECAP */
776 0x48302180 0x48302180 0x80 /* EQEP */
777 0x48302200 0x48302200 0x80>; /* EHRPWM */
778
779 ecap1: ecap@48302100 {
780 compatible = "ti,am3352-ecap",
781 "ti,am33xx-ecap";
782 #pwm-cells = <3>;
783 reg = <0x48302100 0x80>;
784 clocks = <&l4ls_gclk>;
785 clock-names = "fck";
786 interrupts = <47>;
787 interrupt-names = "ecap1";
788 status = "disabled";
789 };
790
791 ehrpwm1: pwm@48302200 {
792 compatible = "ti,am3352-ehrpwm",
793 "ti,am33xx-ehrpwm";
794 #pwm-cells = <3>;
795 reg = <0x48302200 0x80>;
796 clocks = <&ehrpwm1_tbclk>, <&l4ls_gclk>;
797 clock-names = "tbclk", "fck";
798 status = "disabled";
799 };
800 };
801
802 epwmss2: epwmss@48304000 {
803 compatible = "ti,am33xx-pwmss";
804 reg = <0x48304000 0x10>;
805 ti,hwmods = "epwmss2";
806 #address-cells = <1>;
807 #size-cells = <1>;
808 status = "disabled";
809 ranges = <0x48304100 0x48304100 0x80 /* ECAP */
810 0x48304180 0x48304180 0x80 /* EQEP */
811 0x48304200 0x48304200 0x80>; /* EHRPWM */
812
813 ecap2: ecap@48304100 {
814 compatible = "ti,am3352-ecap",
815 "ti,am33xx-ecap";
816 #pwm-cells = <3>;
817 reg = <0x48304100 0x80>;
818 clocks = <&l4ls_gclk>;
819 clock-names = "fck";
820 interrupts = <61>;
821 interrupt-names = "ecap2";
822 status = "disabled";
823 };
824
825 ehrpwm2: pwm@48304200 {
826 compatible = "ti,am3352-ehrpwm",
827 "ti,am33xx-ehrpwm";
828 #pwm-cells = <3>;
829 reg = <0x48304200 0x80>;
830 clocks = <&ehrpwm2_tbclk>, <&l4ls_gclk>;
831 clock-names = "tbclk", "fck";
832 status = "disabled";
833 };
834 };
835
836 mac: ethernet@4a100000 {
837 compatible = "ti,am335x-cpsw","ti,cpsw";
838 ti,hwmods = "cpgmac0";
839 clocks = <&cpsw_125mhz_gclk>, <&cpsw_cpts_rft_clk>;
840 clock-names = "fck", "cpts";
841 cpdma_channels = <8>;
842 ale_entries = <1024>;
843 bd_ram_size = <0x2000>;
844 mac_control = <0x20>;
845 slaves = <2>;
846 active_slave = <0>;
847 cpts_clock_mult = <0x80000000>;
848 cpts_clock_shift = <29>;
849 reg = <0x4a100000 0x800
850 0x4a101200 0x100>;
851 #address-cells = <1>;
852 #size-cells = <1>;
853 /*
854 * c0_rx_thresh_pend
855 * c0_rx_pend
856 * c0_tx_pend
857 * c0_misc_pend
858 */
859 interrupts = <40 41 42 43>;
860 ranges;
861 syscon = <&scm_conf>;
862 status = "disabled";
863
864 davinci_mdio: mdio@4a101000 {
865 compatible = "ti,cpsw-mdio","ti,davinci_mdio";
866 #address-cells = <1>;
867 #size-cells = <0>;
868 ti,hwmods = "davinci_mdio";
869 bus_freq = <1000000>;
870 reg = <0x4a101000 0x100>;
871 status = "disabled";
872 };
873
874 cpsw_emac0: slave@4a100200 {
875 /* Filled in by U-Boot */
876 mac-address = [ 00 00 00 00 00 00 ];
877 };
878
879 cpsw_emac1: slave@4a100300 {
880 /* Filled in by U-Boot */
881 mac-address = [ 00 00 00 00 00 00 ];
882 };
883
884 phy_sel: cpsw-phy-sel@44e10650 {
885 compatible = "ti,am3352-cpsw-phy-sel";
886 reg= <0x44e10650 0x4>;
887 reg-names = "gmii-sel";
888 };
889 };
890
891 ocmcram: ocmcram@40300000 {
892 compatible = "mmio-sram";
893 reg = <0x40300000 0x10000>; /* 64k */
894 };
895
896 elm: elm@48080000 {
897 compatible = "ti,am3352-elm";
898 reg = <0x48080000 0x2000>;
899 interrupts = <4>;
900 ti,hwmods = "elm";
901 status = "disabled";
902 };
903
904 lcdc: lcdc@4830e000 {
905 compatible = "ti,am33xx-tilcdc";
906 reg = <0x4830e000 0x1000>;
907 interrupts = <36>;
908 ti,hwmods = "lcdc";
909 status = "disabled";
910 };
911
912 tscadc: tscadc@44e0d000 {
913 compatible = "ti,am3359-tscadc";
914 reg = <0x44e0d000 0x1000>;
915 interrupts = <16>;
916 ti,hwmods = "adc_tsc";
917 status = "disabled";
918 dmas = <&edma 53 0>, <&edma 57 0>;
919 dma-names = "fifo0", "fifo1";
920
921 tsc {
922 compatible = "ti,am3359-tsc";
923 };
924 am335x_adc: adc {
925 #io-channel-cells = <1>;
926 compatible = "ti,am3359-adc";
927 };
928 };
929
930 gpmc: gpmc@50000000 {
931 compatible = "ti,am3352-gpmc";
932 ti,hwmods = "gpmc";
933 ti,no-idle-on-init;
934 reg = <0x50000000 0x2000>;
935 interrupts = <100>;
936 dmas = <&edma 52 0>;
937 dma-names = "rxtx";
938 gpmc,num-cs = <7>;
939 gpmc,num-waitpins = <2>;
940 #address-cells = <2>;
941 #size-cells = <1>;
942 interrupt-controller;
943 #interrupt-cells = <2>;
944 gpio-controller;
945 #gpio-cells = <2>;
946 status = "disabled";
947 };
948
949 sham: sham@53100000 {
950 compatible = "ti,omap4-sham";
951 ti,hwmods = "sham";
952 reg = <0x53100000 0x200>;
953 interrupts = <109>;
954 dmas = <&edma 36 0>;
955 dma-names = "rx";
956 };
957
958 aes: aes@53500000 {
959 compatible = "ti,omap4-aes";
960 ti,hwmods = "aes";
961 reg = <0x53500000 0xa0>;
962 interrupts = <103>;
963 dmas = <&edma 6 0>,
964 <&edma 5 0>;
965 dma-names = "tx", "rx";
966 };
967
968 mcasp0: mcasp@48038000 {
969 compatible = "ti,am33xx-mcasp-audio";
970 ti,hwmods = "mcasp0";
971 reg = <0x48038000 0x2000>,
972 <0x46000000 0x400000>;
973 reg-names = "mpu", "dat";
974 interrupts = <80>, <81>;
975 interrupt-names = "tx", "rx";
976 status = "disabled";
977 dmas = <&edma 8 2>,
978 <&edma 9 2>;
979 dma-names = "tx", "rx";
980 };
981
982 mcasp1: mcasp@4803C000 {
983 compatible = "ti,am33xx-mcasp-audio";
984 ti,hwmods = "mcasp1";
985 reg = <0x4803C000 0x2000>,
986 <0x46400000 0x400000>;
987 reg-names = "mpu", "dat";
988 interrupts = <82>, <83>;
989 interrupt-names = "tx", "rx";
990 status = "disabled";
991 dmas = <&edma 10 2>,
992 <&edma 11 2>;
993 dma-names = "tx", "rx";
994 };
995
996 rng: rng@48310000 {
997 compatible = "ti,omap4-rng";
998 ti,hwmods = "rng";
999 reg = <0x48310000 0x2000>;
1000 interrupts = <111>;
1001 };
1002 };
1003 };
1004
1005 /include/ "am33xx-clocks.dtsi"
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