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1 /*
2 * Device Tree Source for AM33XX SoC
3 *
4 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
5 *
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
9 */
10
11 #include <dt-bindings/bus/ti-sysc.h>
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/pinctrl/am33xx.h>
14 #include <dt-bindings/clock/am3.h>
15
16 / {
17 compatible = "ti,am33xx";
18 interrupt-parent = <&intc>;
19 #address-cells = <1>;
20 #size-cells = <1>;
21 chosen { };
22
23 aliases {
24 i2c0 = &i2c0;
25 i2c1 = &i2c1;
26 i2c2 = &i2c2;
27 serial0 = &uart0;
28 serial1 = &uart1;
29 serial2 = &uart2;
30 serial3 = &uart3;
31 serial4 = &uart4;
32 serial5 = &uart5;
33 d-can0 = &dcan0;
34 d-can1 = &dcan1;
35 usb0 = &usb0;
36 usb1 = &usb1;
37 phy0 = &usb0_phy;
38 phy1 = &usb1_phy;
39 ethernet0 = &cpsw_emac0;
40 ethernet1 = &cpsw_emac1;
41 spi0 = &spi0;
42 spi1 = &spi1;
43 };
44
45 cpus {
46 #address-cells = <1>;
47 #size-cells = <0>;
48 cpu@0 {
49 compatible = "arm,cortex-a8";
50 device_type = "cpu";
51 reg = <0>;
52
53 operating-points-v2 = <&cpu0_opp_table>;
54
55 clocks = <&dpll_mpu_ck>;
56 clock-names = "cpu";
57
58 clock-latency = <300000>; /* From omap-cpufreq driver */
59 };
60 };
61
62 cpu0_opp_table: opp-table {
63 compatible = "operating-points-v2-ti-cpu";
64 syscon = <&scm_conf>;
65
66 /*
67 * The three following nodes are marked with opp-suspend
68 * because the can not be enabled simultaneously on a
69 * single SoC.
70 */
71 opp50-300000000 {
72 opp-hz = /bits/ 64 <300000000>;
73 opp-microvolt = <950000 931000 969000>;
74 opp-supported-hw = <0x06 0x0010>;
75 opp-suspend;
76 };
77
78 opp100-275000000 {
79 opp-hz = /bits/ 64 <275000000>;
80 opp-microvolt = <1100000 1078000 1122000>;
81 opp-supported-hw = <0x01 0x00FF>;
82 opp-suspend;
83 };
84
85 opp100-300000000 {
86 opp-hz = /bits/ 64 <300000000>;
87 opp-microvolt = <1100000 1078000 1122000>;
88 opp-supported-hw = <0x06 0x0020>;
89 opp-suspend;
90 };
91
92 opp100-500000000 {
93 opp-hz = /bits/ 64 <500000000>;
94 opp-microvolt = <1100000 1078000 1122000>;
95 opp-supported-hw = <0x01 0xFFFF>;
96 };
97
98 opp100-600000000 {
99 opp-hz = /bits/ 64 <600000000>;
100 opp-microvolt = <1100000 1078000 1122000>;
101 opp-supported-hw = <0x06 0x0040>;
102 };
103
104 opp120-600000000 {
105 opp-hz = /bits/ 64 <600000000>;
106 opp-microvolt = <1200000 1176000 1224000>;
107 opp-supported-hw = <0x01 0xFFFF>;
108 };
109
110 opp120-720000000 {
111 opp-hz = /bits/ 64 <720000000>;
112 opp-microvolt = <1200000 1176000 1224000>;
113 opp-supported-hw = <0x06 0x0080>;
114 };
115
116 oppturbo-720000000 {
117 opp-hz = /bits/ 64 <720000000>;
118 opp-microvolt = <1260000 1234800 1285200>;
119 opp-supported-hw = <0x01 0xFFFF>;
120 };
121
122 oppturbo-800000000 {
123 opp-hz = /bits/ 64 <800000000>;
124 opp-microvolt = <1260000 1234800 1285200>;
125 opp-supported-hw = <0x06 0x0100>;
126 };
127
128 oppnitro-1000000000 {
129 opp-hz = /bits/ 64 <1000000000>;
130 opp-microvolt = <1325000 1298500 1351500>;
131 opp-supported-hw = <0x04 0x0200>;
132 };
133 };
134
135 pmu@4b000000 {
136 compatible = "arm,cortex-a8-pmu";
137 interrupts = <3>;
138 reg = <0x4b000000 0x1000000>;
139 ti,hwmods = "debugss";
140 };
141
142 /*
143 * The soc node represents the soc top level view. It is used for IPs
144 * that are not memory mapped in the MPU view or for the MPU itself.
145 */
146 soc {
147 compatible = "ti,omap-infra";
148 mpu {
149 compatible = "ti,omap3-mpu";
150 ti,hwmods = "mpu";
151 pm-sram = <&pm_sram_code
152 &pm_sram_data>;
153 };
154 };
155
156 /*
157 * XXX: Use a flat representation of the AM33XX interconnect.
158 * The real AM33XX interconnect network is quite complex. Since
159 * it will not bring real advantage to represent that in DT
160 * for the moment, just use a fake OCP bus entry to represent
161 * the whole bus hierarchy.
162 */
163 ocp {
164 compatible = "simple-bus";
165 #address-cells = <1>;
166 #size-cells = <1>;
167 ranges;
168 ti,hwmods = "l3_main";
169
170 l4_wkup: interconnect@44c00000 {
171 wkup_m3: wkup_m3@100000 {
172 compatible = "ti,am3352-wkup-m3";
173 reg = <0x100000 0x4000>,
174 <0x180000 0x2000>;
175 reg-names = "umem", "dmem";
176 ti,hwmods = "wkup_m3";
177 ti,pm-firmware = "am335x-pm-firmware.elf";
178 };
179 };
180 l4_per: interconnect@48000000 {
181 };
182 l4_fw: interconnect@47c00000 {
183 };
184 l4_fast: interconnect@4a000000 {
185 };
186 l4_mpuss: interconnect@4b140000 {
187 };
188
189 intc: interrupt-controller@48200000 {
190 compatible = "ti,am33xx-intc";
191 interrupt-controller;
192 #interrupt-cells = <1>;
193 reg = <0x48200000 0x1000>;
194 };
195
196 edma: edma@49000000 {
197 compatible = "ti,edma3-tpcc";
198 ti,hwmods = "tpcc";
199 reg = <0x49000000 0x10000>;
200 reg-names = "edma3_cc";
201 interrupts = <12 13 14>;
202 interrupt-names = "edma3_ccint", "edma3_mperr",
203 "edma3_ccerrint";
204 dma-requests = <64>;
205 #dma-cells = <2>;
206
207 ti,tptcs = <&edma_tptc0 7>, <&edma_tptc1 5>,
208 <&edma_tptc2 0>;
209
210 ti,edma-memcpy-channels = <20 21>;
211 };
212
213 edma_tptc0: tptc@49800000 {
214 compatible = "ti,edma3-tptc";
215 ti,hwmods = "tptc0";
216 reg = <0x49800000 0x100000>;
217 interrupts = <112>;
218 interrupt-names = "edma3_tcerrint";
219 };
220
221 edma_tptc1: tptc@49900000 {
222 compatible = "ti,edma3-tptc";
223 ti,hwmods = "tptc1";
224 reg = <0x49900000 0x100000>;
225 interrupts = <113>;
226 interrupt-names = "edma3_tcerrint";
227 };
228
229 edma_tptc2: tptc@49a00000 {
230 compatible = "ti,edma3-tptc";
231 ti,hwmods = "tptc2";
232 reg = <0x49a00000 0x100000>;
233 interrupts = <114>;
234 interrupt-names = "edma3_tcerrint";
235 };
236
237 target-module@47810000 {
238 compatible = "ti,sysc-omap2", "ti,sysc";
239 ti,hwmods = "mmc3";
240 reg = <0x478102fc 0x4>,
241 <0x47810110 0x4>,
242 <0x47810114 0x4>;
243 reg-names = "rev", "sysc", "syss";
244 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
245 SYSC_OMAP2_ENAWAKEUP |
246 SYSC_OMAP2_SOFTRESET |
247 SYSC_OMAP2_AUTOIDLE)>;
248 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
249 <SYSC_IDLE_NO>,
250 <SYSC_IDLE_SMART>;
251 ti,syss-mask = <1>;
252 clocks = <&l3s_clkctrl AM3_L3S_MMC3_CLKCTRL 0>;
253 clock-names = "fck";
254 #address-cells = <1>;
255 #size-cells = <1>;
256 ranges = <0x0 0x47810000 0x1000>;
257
258 mmc3: mmc@0 {
259 compatible = "ti,omap4-hsmmc";
260 ti,needs-special-reset;
261 interrupts = <29>;
262 reg = <0x0 0x1000>;
263 };
264 };
265
266 usb: usb@47400000 {
267 compatible = "ti,am33xx-usb";
268 reg = <0x47400000 0x1000>;
269 ranges;
270 #address-cells = <1>;
271 #size-cells = <1>;
272 ti,hwmods = "usb_otg_hs";
273 status = "disabled";
274
275 usb_ctrl_mod: control@44e10620 {
276 compatible = "ti,am335x-usb-ctrl-module";
277 reg = <0x44e10620 0x10
278 0x44e10648 0x4>;
279 reg-names = "phy_ctrl", "wakeup";
280 status = "disabled";
281 };
282
283 usb0_phy: usb-phy@47401300 {
284 compatible = "ti,am335x-usb-phy";
285 reg = <0x47401300 0x100>;
286 reg-names = "phy";
287 status = "disabled";
288 ti,ctrl_mod = <&usb_ctrl_mod>;
289 #phy-cells = <0>;
290 };
291
292 usb0: usb@47401000 {
293 compatible = "ti,musb-am33xx";
294 status = "disabled";
295 reg = <0x47401400 0x400
296 0x47401000 0x200>;
297 reg-names = "mc", "control";
298
299 interrupts = <18>;
300 interrupt-names = "mc";
301 dr_mode = "otg";
302 mentor,multipoint = <1>;
303 mentor,num-eps = <16>;
304 mentor,ram-bits = <12>;
305 mentor,power = <500>;
306 phys = <&usb0_phy>;
307
308 dmas = <&cppi41dma 0 0 &cppi41dma 1 0
309 &cppi41dma 2 0 &cppi41dma 3 0
310 &cppi41dma 4 0 &cppi41dma 5 0
311 &cppi41dma 6 0 &cppi41dma 7 0
312 &cppi41dma 8 0 &cppi41dma 9 0
313 &cppi41dma 10 0 &cppi41dma 11 0
314 &cppi41dma 12 0 &cppi41dma 13 0
315 &cppi41dma 14 0 &cppi41dma 0 1
316 &cppi41dma 1 1 &cppi41dma 2 1
317 &cppi41dma 3 1 &cppi41dma 4 1
318 &cppi41dma 5 1 &cppi41dma 6 1
319 &cppi41dma 7 1 &cppi41dma 8 1
320 &cppi41dma 9 1 &cppi41dma 10 1
321 &cppi41dma 11 1 &cppi41dma 12 1
322 &cppi41dma 13 1 &cppi41dma 14 1>;
323 dma-names =
324 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
325 "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
326 "rx14", "rx15",
327 "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
328 "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
329 "tx14", "tx15";
330 };
331
332 usb1_phy: usb-phy@47401b00 {
333 compatible = "ti,am335x-usb-phy";
334 reg = <0x47401b00 0x100>;
335 reg-names = "phy";
336 status = "disabled";
337 ti,ctrl_mod = <&usb_ctrl_mod>;
338 #phy-cells = <0>;
339 };
340
341 usb1: usb@47401800 {
342 compatible = "ti,musb-am33xx";
343 status = "disabled";
344 reg = <0x47401c00 0x400
345 0x47401800 0x200>;
346 reg-names = "mc", "control";
347 interrupts = <19>;
348 interrupt-names = "mc";
349 dr_mode = "otg";
350 mentor,multipoint = <1>;
351 mentor,num-eps = <16>;
352 mentor,ram-bits = <12>;
353 mentor,power = <500>;
354 phys = <&usb1_phy>;
355
356 dmas = <&cppi41dma 15 0 &cppi41dma 16 0
357 &cppi41dma 17 0 &cppi41dma 18 0
358 &cppi41dma 19 0 &cppi41dma 20 0
359 &cppi41dma 21 0 &cppi41dma 22 0
360 &cppi41dma 23 0 &cppi41dma 24 0
361 &cppi41dma 25 0 &cppi41dma 26 0
362 &cppi41dma 27 0 &cppi41dma 28 0
363 &cppi41dma 29 0 &cppi41dma 15 1
364 &cppi41dma 16 1 &cppi41dma 17 1
365 &cppi41dma 18 1 &cppi41dma 19 1
366 &cppi41dma 20 1 &cppi41dma 21 1
367 &cppi41dma 22 1 &cppi41dma 23 1
368 &cppi41dma 24 1 &cppi41dma 25 1
369 &cppi41dma 26 1 &cppi41dma 27 1
370 &cppi41dma 28 1 &cppi41dma 29 1>;
371 dma-names =
372 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
373 "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
374 "rx14", "rx15",
375 "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
376 "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
377 "tx14", "tx15";
378 };
379
380 cppi41dma: dma-controller@47402000 {
381 compatible = "ti,am3359-cppi41";
382 reg = <0x47400000 0x1000
383 0x47402000 0x1000
384 0x47403000 0x1000
385 0x47404000 0x4000>;
386 reg-names = "glue", "controller", "scheduler", "queuemgr";
387 interrupts = <17>;
388 interrupt-names = "glue";
389 #dma-cells = <2>;
390 #dma-channels = <30>;
391 #dma-requests = <256>;
392 status = "disabled";
393 };
394 };
395
396 ocmcram: ocmcram@40300000 {
397 compatible = "mmio-sram";
398 reg = <0x40300000 0x10000>; /* 64k */
399 ranges = <0x0 0x40300000 0x10000>;
400 #address-cells = <1>;
401 #size-cells = <1>;
402
403 pm_sram_code: pm-sram-code@0 {
404 compatible = "ti,sram";
405 reg = <0x0 0x1000>;
406 protect-exec;
407 };
408
409 pm_sram_data: pm-sram-data@1000 {
410 compatible = "ti,sram";
411 reg = <0x1000 0x1000>;
412 pool;
413 };
414 };
415
416 emif: emif@4c000000 {
417 compatible = "ti,emif-am3352";
418 reg = <0x4c000000 0x1000000>;
419 ti,hwmods = "emif";
420 interrupts = <101>;
421 sram = <&pm_sram_code
422 &pm_sram_data>;
423 ti,no-idle;
424 };
425
426 gpmc: gpmc@50000000 {
427 compatible = "ti,am3352-gpmc";
428 ti,hwmods = "gpmc";
429 ti,no-idle-on-init;
430 reg = <0x50000000 0x2000>;
431 interrupts = <100>;
432 dmas = <&edma 52 0>;
433 dma-names = "rxtx";
434 gpmc,num-cs = <7>;
435 gpmc,num-waitpins = <2>;
436 #address-cells = <2>;
437 #size-cells = <1>;
438 interrupt-controller;
439 #interrupt-cells = <2>;
440 gpio-controller;
441 #gpio-cells = <2>;
442 status = "disabled";
443 };
444
445 sham: sham@53100000 {
446 compatible = "ti,omap4-sham";
447 ti,hwmods = "sham";
448 reg = <0x53100000 0x200>;
449 interrupts = <109>;
450 dmas = <&edma 36 0>;
451 dma-names = "rx";
452 };
453
454 aes: aes@53500000 {
455 compatible = "ti,omap4-aes";
456 ti,hwmods = "aes";
457 reg = <0x53500000 0xa0>;
458 interrupts = <103>;
459 dmas = <&edma 6 0>,
460 <&edma 5 0>;
461 dma-names = "tx", "rx";
462 };
463 };
464 };
465
466 #include "am33xx-l4.dtsi"
467 #include "am33xx-clocks.dtsi"