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1 /*
2 * This file is licensed under the terms of the GNU General Public License
3 * version 2. This program is licensed "as is" without any warranty of any
4 * kind, whether express or implied.
5 */
6
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/pinctrl/omap.h>
9
10 / {
11 compatible = "ti,dm816";
12 interrupt-parent = <&intc>;
13 #address-cells = <1>;
14 #size-cells = <1>;
15 chosen { };
16
17 aliases {
18 i2c0 = &i2c1;
19 i2c1 = &i2c2;
20 serial0 = &uart1;
21 serial1 = &uart2;
22 serial2 = &uart3;
23 ethernet0 = &eth0;
24 ethernet1 = &eth1;
25 };
26
27 cpus {
28 #address-cells = <1>;
29 #size-cells = <0>;
30 cpu@0 {
31 compatible = "arm,cortex-a8";
32 device_type = "cpu";
33 reg = <0>;
34 };
35 };
36
37 pmu {
38 compatible = "arm,cortex-a8-pmu";
39 interrupts = <3>;
40 };
41
42 /*
43 * The soc node represents the soc top level view. It is used for IPs
44 * that are not memory mapped in the MPU view or for the MPU itself.
45 */
46 soc {
47 compatible = "ti,omap-infra";
48 mpu {
49 compatible = "ti,omap3-mpu";
50 ti,hwmods = "mpu";
51 };
52 };
53
54 /*
55 * XXX: Use a flat representation of the dm816x interconnect.
56 * The real dm816x interconnect network is quite complex. Since
57 * it will not bring real advantage to represent that in DT
58 * for the moment, just use a fake OCP bus entry to represent
59 * the whole bus hierarchy.
60 */
61 ocp {
62 compatible = "simple-bus";
63 reg = <0x44000000 0x10000>;
64 interrupts = <9 10>;
65 #address-cells = <1>;
66 #size-cells = <1>;
67 ranges;
68
69 prcm: prcm@48180000 {
70 compatible = "ti,dm816-prcm", "simple-bus";
71 reg = <0x48180000 0x4000>;
72 #address-cells = <1>;
73 #size-cells = <1>;
74 ranges = <0 0x48180000 0x4000>;
75
76 prcm_clocks: clocks {
77 #address-cells = <1>;
78 #size-cells = <0>;
79 };
80
81 prcm_clockdomains: clockdomains {
82 };
83 };
84
85 scrm: scrm@48140000 {
86 compatible = "ti,dm816-scrm", "simple-bus";
87 reg = <0x48140000 0x21000>;
88 #address-cells = <1>;
89 #size-cells = <1>;
90 #pinctrl-cells = <1>;
91 ranges = <0 0x48140000 0x21000>;
92
93 dm816x_pinmux: pinmux@800 {
94 compatible = "pinctrl-single";
95 reg = <0x800 0x50a>;
96 #address-cells = <1>;
97 #size-cells = <0>;
98 #pinctrl-cells = <1>;
99 pinctrl-single,register-width = <16>;
100 pinctrl-single,function-mask = <0xf>;
101 };
102
103 /* Device Configuration Registers */
104 scm_conf: syscon@600 {
105 compatible = "syscon", "simple-bus";
106 reg = <0x600 0x110>;
107 #address-cells = <1>;
108 #size-cells = <1>;
109 ranges = <0 0x600 0x110>;
110
111 usb_phy0: usb-phy@20 {
112 compatible = "ti,dm8168-usb-phy";
113 reg = <0x20 0x8>;
114 reg-names = "phy";
115 clocks = <&main_fapll 6>;
116 clock-names = "refclk";
117 #phy-cells = <0>;
118 syscon = <&scm_conf>;
119 };
120
121 usb_phy1: usb-phy@28 {
122 compatible = "ti,dm8168-usb-phy";
123 reg = <0x28 0x8>;
124 reg-names = "phy";
125 clocks = <&main_fapll 6>;
126 clock-names = "refclk";
127 #phy-cells = <0>;
128 syscon = <&scm_conf>;
129 };
130 };
131
132 scrm_clocks: clocks {
133 #address-cells = <1>;
134 #size-cells = <0>;
135 };
136
137 scrm_clockdomains: clockdomains {
138 };
139 };
140
141 edma: edma@49000000 {
142 compatible = "ti,edma3";
143 ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2", "tptc3";
144 reg = <0x49000000 0x10000>,
145 <0x44e10f90 0x40>;
146 interrupts = <12 13 14>;
147 #dma-cells = <1>;
148 };
149
150 elm: elm@48080000 {
151 compatible = "ti,am3352-elm";
152 ti,hwmods = "elm";
153 reg = <0x48080000 0x2000>;
154 interrupts = <4>;
155 };
156
157 gpio1: gpio@48032000 {
158 compatible = "ti,omap4-gpio";
159 ti,hwmods = "gpio1";
160 ti,gpio-always-on;
161 reg = <0x48032000 0x1000>;
162 interrupts = <96>;
163 gpio-controller;
164 #gpio-cells = <2>;
165 interrupt-controller;
166 #interrupt-cells = <2>;
167 };
168
169 gpio2: gpio@4804c000 {
170 compatible = "ti,omap4-gpio";
171 ti,hwmods = "gpio2";
172 ti,gpio-always-on;
173 reg = <0x4804c000 0x1000>;
174 interrupts = <98>;
175 gpio-controller;
176 #gpio-cells = <2>;
177 interrupt-controller;
178 #interrupt-cells = <2>;
179 };
180
181 gpmc: gpmc@50000000 {
182 compatible = "ti,am3352-gpmc";
183 ti,hwmods = "gpmc";
184 reg = <0x50000000 0x2000>;
185 #address-cells = <2>;
186 #size-cells = <1>;
187 interrupts = <100>;
188 dmas = <&edma 52>;
189 dma-names = "rxtx";
190 gpmc,num-cs = <6>;
191 gpmc,num-waitpins = <2>;
192 interrupt-controller;
193 #interrupt-cells = <2>;
194 gpio-controller;
195 #gpio-cells = <2>;
196 };
197
198 i2c1: i2c@48028000 {
199 compatible = "ti,omap4-i2c";
200 ti,hwmods = "i2c1";
201 reg = <0x48028000 0x1000>;
202 #address-cells = <1>;
203 #size-cells = <0>;
204 interrupts = <70>;
205 dmas = <&edma 58 &edma 59>;
206 dma-names = "tx", "rx";
207 };
208
209 i2c2: i2c@4802a000 {
210 compatible = "ti,omap4-i2c";
211 ti,hwmods = "i2c2";
212 reg = <0x4802a000 0x1000>;
213 #address-cells = <1>;
214 #size-cells = <0>;
215 interrupts = <71>;
216 dmas = <&edma 60 &edma 61>;
217 dma-names = "tx", "rx";
218 };
219
220 intc: interrupt-controller@48200000 {
221 compatible = "ti,dm816-intc";
222 interrupt-controller;
223 #interrupt-cells = <1>;
224 reg = <0x48200000 0x1000>;
225 };
226
227 rtc: rtc@480c0000 {
228 compatible = "ti,am3352-rtc", "ti,da830-rtc";
229 reg = <0x480c0000 0x1000>;
230 interrupts = <75 76>;
231 ti,hwmods = "rtc";
232 };
233
234 mailbox: mailbox@480c8000 {
235 compatible = "ti,omap4-mailbox";
236 reg = <0x480c8000 0x2000>;
237 interrupts = <77>;
238 ti,hwmods = "mailbox";
239 #mbox-cells = <1>;
240 ti,mbox-num-users = <4>;
241 ti,mbox-num-fifos = <12>;
242 mbox_dsp: mbox_dsp {
243 ti,mbox-tx = <3 0 0>;
244 ti,mbox-rx = <0 0 0>;
245 };
246 };
247
248 spinbox: spinbox@480ca000 {
249 compatible = "ti,omap4-hwspinlock";
250 reg = <0x480ca000 0x2000>;
251 ti,hwmods = "spinbox";
252 #hwlock-cells = <1>;
253 };
254
255 mdio: mdio@4a100800 {
256 compatible = "ti,davinci_mdio";
257 #address-cells = <1>;
258 #size-cells = <0>;
259 reg = <0x4a100800 0x100>;
260 ti,hwmods = "davinci_mdio";
261 bus_freq = <1000000>;
262 phy0: ethernet-phy@0 {
263 reg = <1>;
264 };
265 phy1: ethernet-phy@1 {
266 reg = <2>;
267 };
268 };
269
270 eth0: ethernet@4a100000 {
271 compatible = "ti,dm816-emac";
272 ti,hwmods = "emac0";
273 reg = <0x4a100000 0x800
274 0x4a100900 0x3700>;
275 clocks = <&sysclk24_ck>;
276 syscon = <&scm_conf>;
277 ti,davinci-ctrl-reg-offset = <0>;
278 ti,davinci-ctrl-mod-reg-offset = <0x900>;
279 ti,davinci-ctrl-ram-offset = <0x2000>;
280 ti,davinci-ctrl-ram-size = <0x2000>;
281 interrupts = <40 41 42 43>;
282 phy-handle = <&phy0>;
283 };
284
285 eth1: ethernet@4a120000 {
286 compatible = "ti,dm816-emac";
287 ti,hwmods = "emac1";
288 reg = <0x4a120000 0x4000>;
289 clocks = <&sysclk24_ck>;
290 syscon = <&scm_conf>;
291 ti,davinci-ctrl-reg-offset = <0>;
292 ti,davinci-ctrl-mod-reg-offset = <0x900>;
293 ti,davinci-ctrl-ram-offset = <0x2000>;
294 ti,davinci-ctrl-ram-size = <0x2000>;
295 interrupts = <44 45 46 47>;
296 phy-handle = <&phy1>;
297 };
298
299 sata: sata@4a140000 {
300 compatible = "ti,dm816-ahci";
301 reg = <0x4a140000 0x10000>;
302 interrupts = <16>;
303 ti,hwmods = "sata";
304 };
305
306 mcspi1: spi@48030000 {
307 compatible = "ti,omap4-mcspi";
308 reg = <0x48030000 0x1000>;
309 #address-cells = <1>;
310 #size-cells = <0>;
311 interrupts = <65>;
312 ti,spi-num-cs = <4>;
313 ti,hwmods = "mcspi1";
314 dmas = <&edma 16 &edma 17
315 &edma 18 &edma 19
316 &edma 20 &edma 21
317 &edma 22 &edma 23>;
318 dma-names = "tx0", "rx0", "tx1", "rx1",
319 "tx2", "rx2", "tx3", "rx3";
320 };
321
322 mmc1: mmc@48060000 {
323 compatible = "ti,omap4-hsmmc";
324 reg = <0x48060000 0x11000>;
325 ti,hwmods = "mmc1";
326 interrupts = <64>;
327 dmas = <&edma 24 &edma 25>;
328 dma-names = "tx", "rx";
329 };
330
331 timer1: timer@4802e000 {
332 compatible = "ti,dm816-timer";
333 reg = <0x4802e000 0x2000>;
334 interrupts = <67>;
335 ti,hwmods = "timer1";
336 ti,timer-alwon;
337 clocks = <&timer1_fck>;
338 clock-names = "fck";
339 };
340
341 timer2: timer@48040000 {
342 compatible = "ti,dm816-timer";
343 reg = <0x48040000 0x2000>;
344 interrupts = <68>;
345 ti,hwmods = "timer2";
346 clocks = <&timer2_fck>;
347 clock-names = "fck";
348 };
349
350 timer3: timer@48042000 {
351 compatible = "ti,dm816-timer";
352 reg = <0x48042000 0x2000>;
353 interrupts = <69>;
354 ti,hwmods = "timer3";
355 };
356
357 timer4: timer@48044000 {
358 compatible = "ti,dm816-timer";
359 reg = <0x48044000 0x2000>;
360 interrupts = <92>;
361 ti,hwmods = "timer4";
362 ti,timer-pwm;
363 };
364
365 timer5: timer@48046000 {
366 compatible = "ti,dm816-timer";
367 reg = <0x48046000 0x2000>;
368 interrupts = <93>;
369 ti,hwmods = "timer5";
370 ti,timer-pwm;
371 };
372
373 timer6: timer@48048000 {
374 compatible = "ti,dm816-timer";
375 reg = <0x48048000 0x2000>;
376 interrupts = <94>;
377 ti,hwmods = "timer6";
378 ti,timer-pwm;
379 };
380
381 timer7: timer@4804a000 {
382 compatible = "ti,dm816-timer";
383 reg = <0x4804a000 0x2000>;
384 interrupts = <95>;
385 ti,hwmods = "timer7";
386 ti,timer-pwm;
387 };
388
389 uart1: uart@48020000 {
390 compatible = "ti,am3352-uart", "ti,omap3-uart";
391 ti,hwmods = "uart1";
392 reg = <0x48020000 0x2000>;
393 clock-frequency = <48000000>;
394 interrupts = <72>;
395 dmas = <&edma 26 &edma 27>;
396 dma-names = "tx", "rx";
397 };
398
399 uart2: uart@48022000 {
400 compatible = "ti,am3352-uart", "ti,omap3-uart";
401 ti,hwmods = "uart2";
402 reg = <0x48022000 0x2000>;
403 clock-frequency = <48000000>;
404 interrupts = <73>;
405 dmas = <&edma 28 &edma 29>;
406 dma-names = "tx", "rx";
407 };
408
409 uart3: uart@48024000 {
410 compatible = "ti,am3352-uart", "ti,omap3-uart";
411 ti,hwmods = "uart3";
412 reg = <0x48024000 0x2000>;
413 clock-frequency = <48000000>;
414 interrupts = <74>;
415 dmas = <&edma 30 &edma 31>;
416 dma-names = "tx", "rx";
417 };
418
419 /* NOTE: USB needs a transceiver driver for phys to work */
420 usb: usb_otg_hs@47401000 {
421 compatible = "ti,am33xx-usb";
422 reg = <0x47401000 0x400000>;
423 ranges;
424 #address-cells = <1>;
425 #size-cells = <1>;
426 ti,hwmods = "usb_otg_hs";
427
428 usb0: usb@47401000 {
429 compatible = "ti,musb-dm816";
430 reg = <0x47401400 0x400
431 0x47401000 0x200>;
432 reg-names = "mc", "control";
433 interrupts = <18>;
434 interrupt-names = "mc";
435 dr_mode = "host";
436 interface-type = <0>;
437 phys = <&usb_phy0>;
438 phy-names = "usb2-phy";
439 mentor,multipoint = <1>;
440 mentor,num-eps = <16>;
441 mentor,ram-bits = <12>;
442 mentor,power = <500>;
443
444 dmas = <&cppi41dma 0 0 &cppi41dma 1 0
445 &cppi41dma 2 0 &cppi41dma 3 0
446 &cppi41dma 4 0 &cppi41dma 5 0
447 &cppi41dma 6 0 &cppi41dma 7 0
448 &cppi41dma 8 0 &cppi41dma 9 0
449 &cppi41dma 10 0 &cppi41dma 11 0
450 &cppi41dma 12 0 &cppi41dma 13 0
451 &cppi41dma 14 0 &cppi41dma 0 1
452 &cppi41dma 1 1 &cppi41dma 2 1
453 &cppi41dma 3 1 &cppi41dma 4 1
454 &cppi41dma 5 1 &cppi41dma 6 1
455 &cppi41dma 7 1 &cppi41dma 8 1
456 &cppi41dma 9 1 &cppi41dma 10 1
457 &cppi41dma 11 1 &cppi41dma 12 1
458 &cppi41dma 13 1 &cppi41dma 14 1>;
459 dma-names =
460 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
461 "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
462 "rx14", "rx15",
463 "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
464 "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
465 "tx14", "tx15";
466 };
467
468 usb1: usb@47401800 {
469 compatible = "ti,musb-dm816";
470 reg = <0x47401c00 0x400
471 0x47401800 0x200>;
472 reg-names = "mc", "control";
473 interrupts = <19>;
474 interrupt-names = "mc";
475 dr_mode = "host";
476 interface-type = <0>;
477 phys = <&usb_phy1>;
478 phy-names = "usb2-phy";
479 mentor,multipoint = <1>;
480 mentor,num-eps = <16>;
481 mentor,ram-bits = <12>;
482 mentor,power = <500>;
483
484 dmas = <&cppi41dma 15 0 &cppi41dma 16 0
485 &cppi41dma 17 0 &cppi41dma 18 0
486 &cppi41dma 19 0 &cppi41dma 20 0
487 &cppi41dma 21 0 &cppi41dma 22 0
488 &cppi41dma 23 0 &cppi41dma 24 0
489 &cppi41dma 25 0 &cppi41dma 26 0
490 &cppi41dma 27 0 &cppi41dma 28 0
491 &cppi41dma 29 0 &cppi41dma 15 1
492 &cppi41dma 16 1 &cppi41dma 17 1
493 &cppi41dma 18 1 &cppi41dma 19 1
494 &cppi41dma 20 1 &cppi41dma 21 1
495 &cppi41dma 22 1 &cppi41dma 23 1
496 &cppi41dma 24 1 &cppi41dma 25 1
497 &cppi41dma 26 1 &cppi41dma 27 1
498 &cppi41dma 28 1 &cppi41dma 29 1>;
499 dma-names =
500 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
501 "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
502 "rx14", "rx15",
503 "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
504 "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
505 "tx14", "tx15";
506 };
507
508 cppi41dma: dma-controller@47402000 {
509 compatible = "ti,am3359-cppi41";
510 reg = <0x47400000 0x1000
511 0x47402000 0x1000
512 0x47403000 0x1000
513 0x47404000 0x4000>;
514 reg-names = "glue", "controller", "scheduler", "queuemgr";
515 interrupts = <17>;
516 interrupt-names = "glue";
517 #dma-cells = <2>;
518 #dma-channels = <30>;
519 #dma-requests = <256>;
520 };
521 };
522
523 wd_timer2: wd_timer@480c2000 {
524 compatible = "ti,omap3-wdt";
525 ti,hwmods = "wd_timer";
526 reg = <0x480c2000 0x1000>;
527 interrupts = <0>;
528 };
529 };
530 };
531
532 #include "dm816x-clocks.dtsi"