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[mirror_ubuntu-artful-kernel.git] / arch / arm / boot / dts / imx23.dtsi
1 /*
2 * Copyright 2012 Freescale Semiconductor, Inc.
3 *
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations:
7 *
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
10 */
11
12 #include "imx23-pinfunc.h"
13
14 / {
15 #address-cells = <1>;
16 #size-cells = <1>;
17
18 interrupt-parent = <&icoll>;
19
20 aliases {
21 gpio0 = &gpio0;
22 gpio1 = &gpio1;
23 gpio2 = &gpio2;
24 serial0 = &auart0;
25 serial1 = &auart1;
26 spi0 = &ssp0;
27 spi1 = &ssp1;
28 usbphy0 = &usbphy0;
29 };
30
31 cpus {
32 #address-cells = <0>;
33 #size-cells = <0>;
34
35 cpu {
36 compatible = "arm,arm926ej-s";
37 device_type = "cpu";
38 };
39 };
40
41 apb@80000000 {
42 compatible = "simple-bus";
43 #address-cells = <1>;
44 #size-cells = <1>;
45 reg = <0x80000000 0x80000>;
46 ranges;
47
48 apbh@80000000 {
49 compatible = "simple-bus";
50 #address-cells = <1>;
51 #size-cells = <1>;
52 reg = <0x80000000 0x40000>;
53 ranges;
54
55 icoll: interrupt-controller@80000000 {
56 compatible = "fsl,imx23-icoll", "fsl,icoll";
57 interrupt-controller;
58 #interrupt-cells = <1>;
59 reg = <0x80000000 0x2000>;
60 };
61
62 dma_apbh: dma-apbh@80004000 {
63 compatible = "fsl,imx23-dma-apbh";
64 reg = <0x80004000 0x2000>;
65 interrupts = <0 14 20 0
66 13 13 13 13>;
67 interrupt-names = "empty", "ssp0", "ssp1", "empty",
68 "gpmi0", "gpmi1", "gpmi2", "gpmi3";
69 #dma-cells = <1>;
70 dma-channels = <8>;
71 clocks = <&clks 15>;
72 };
73
74 ecc@80008000 {
75 reg = <0x80008000 0x2000>;
76 status = "disabled";
77 };
78
79 gpmi-nand@8000c000 {
80 compatible = "fsl,imx23-gpmi-nand";
81 #address-cells = <1>;
82 #size-cells = <1>;
83 reg = <0x8000c000 0x2000>, <0x8000a000 0x2000>;
84 reg-names = "gpmi-nand", "bch";
85 interrupts = <56>;
86 interrupt-names = "bch";
87 clocks = <&clks 34>;
88 clock-names = "gpmi_io";
89 dmas = <&dma_apbh 4>;
90 dma-names = "rx-tx";
91 status = "disabled";
92 };
93
94 ssp0: ssp@80010000 {
95 reg = <0x80010000 0x2000>;
96 interrupts = <15>;
97 clocks = <&clks 33>;
98 dmas = <&dma_apbh 1>;
99 dma-names = "rx-tx";
100 status = "disabled";
101 };
102
103 etm@80014000 {
104 reg = <0x80014000 0x2000>;
105 status = "disabled";
106 };
107
108 pinctrl@80018000 {
109 #address-cells = <1>;
110 #size-cells = <0>;
111 compatible = "fsl,imx23-pinctrl", "simple-bus";
112 reg = <0x80018000 0x2000>;
113
114 gpio0: gpio@0 {
115 compatible = "fsl,imx23-gpio", "fsl,mxs-gpio";
116 reg = <0>;
117 interrupts = <16>;
118 gpio-controller;
119 #gpio-cells = <2>;
120 interrupt-controller;
121 #interrupt-cells = <2>;
122 };
123
124 gpio1: gpio@1 {
125 compatible = "fsl,imx23-gpio", "fsl,mxs-gpio";
126 reg = <1>;
127 interrupts = <17>;
128 gpio-controller;
129 #gpio-cells = <2>;
130 interrupt-controller;
131 #interrupt-cells = <2>;
132 };
133
134 gpio2: gpio@2 {
135 compatible = "fsl,imx23-gpio", "fsl,mxs-gpio";
136 reg = <2>;
137 interrupts = <18>;
138 gpio-controller;
139 #gpio-cells = <2>;
140 interrupt-controller;
141 #interrupt-cells = <2>;
142 };
143
144 duart_pins_a: duart@0 {
145 reg = <0>;
146 fsl,pinmux-ids = <
147 MX23_PAD_PWM0__DUART_RX
148 MX23_PAD_PWM1__DUART_TX
149 >;
150 fsl,drive-strength = <MXS_DRIVE_4mA>;
151 fsl,voltage = <MXS_VOLTAGE_HIGH>;
152 fsl,pull-up = <MXS_PULL_DISABLE>;
153 };
154
155 auart0_pins_a: auart0@0 {
156 reg = <0>;
157 fsl,pinmux-ids = <
158 MX23_PAD_AUART1_RX__AUART1_RX
159 MX23_PAD_AUART1_TX__AUART1_TX
160 MX23_PAD_AUART1_CTS__AUART1_CTS
161 MX23_PAD_AUART1_RTS__AUART1_RTS
162 >;
163 fsl,drive-strength = <MXS_DRIVE_4mA>;
164 fsl,voltage = <MXS_VOLTAGE_HIGH>;
165 fsl,pull-up = <MXS_PULL_DISABLE>;
166 };
167
168 auart0_2pins_a: auart0-2pins@0 {
169 reg = <0>;
170 fsl,pinmux-ids = <
171 MX23_PAD_I2C_SCL__AUART1_TX
172 MX23_PAD_I2C_SDA__AUART1_RX
173 >;
174 fsl,drive-strength = <MXS_DRIVE_4mA>;
175 fsl,voltage = <MXS_VOLTAGE_HIGH>;
176 fsl,pull-up = <MXS_PULL_DISABLE>;
177 };
178
179 auart1_2pins_a: auart1-2pins@0 {
180 reg = <0>;
181 fsl,pinmux-ids = <
182 MX23_PAD_GPMI_D14__AUART2_RX
183 MX23_PAD_GPMI_D15__AUART2_TX
184 >;
185 fsl,drive-strength = <MXS_DRIVE_4mA>;
186 fsl,voltage = <MXS_VOLTAGE_HIGH>;
187 fsl,pull-up = <MXS_PULL_DISABLE>;
188 };
189
190 gpmi_pins_a: gpmi-nand@0 {
191 reg = <0>;
192 fsl,pinmux-ids = <
193 MX23_PAD_GPMI_D00__GPMI_D00
194 MX23_PAD_GPMI_D01__GPMI_D01
195 MX23_PAD_GPMI_D02__GPMI_D02
196 MX23_PAD_GPMI_D03__GPMI_D03
197 MX23_PAD_GPMI_D04__GPMI_D04
198 MX23_PAD_GPMI_D05__GPMI_D05
199 MX23_PAD_GPMI_D06__GPMI_D06
200 MX23_PAD_GPMI_D07__GPMI_D07
201 MX23_PAD_GPMI_CLE__GPMI_CLE
202 MX23_PAD_GPMI_ALE__GPMI_ALE
203 MX23_PAD_GPMI_RDY0__GPMI_RDY0
204 MX23_PAD_GPMI_RDY1__GPMI_RDY1
205 MX23_PAD_GPMI_WPN__GPMI_WPN
206 MX23_PAD_GPMI_WRN__GPMI_WRN
207 MX23_PAD_GPMI_RDN__GPMI_RDN
208 MX23_PAD_GPMI_CE1N__GPMI_CE1N
209 MX23_PAD_GPMI_CE0N__GPMI_CE0N
210 >;
211 fsl,drive-strength = <MXS_DRIVE_4mA>;
212 fsl,voltage = <MXS_VOLTAGE_HIGH>;
213 fsl,pull-up = <MXS_PULL_DISABLE>;
214 };
215
216 gpmi_pins_fixup: gpmi-pins-fixup {
217 fsl,pinmux-ids = <
218 MX23_PAD_GPMI_WPN__GPMI_WPN
219 MX23_PAD_GPMI_WRN__GPMI_WRN
220 MX23_PAD_GPMI_RDN__GPMI_RDN
221 >;
222 fsl,drive-strength = <MXS_DRIVE_12mA>;
223 };
224
225 mmc0_4bit_pins_a: mmc0-4bit@0 {
226 reg = <0>;
227 fsl,pinmux-ids = <
228 MX23_PAD_SSP1_DATA0__SSP1_DATA0
229 MX23_PAD_SSP1_DATA1__SSP1_DATA1
230 MX23_PAD_SSP1_DATA2__SSP1_DATA2
231 MX23_PAD_SSP1_DATA3__SSP1_DATA3
232 MX23_PAD_SSP1_CMD__SSP1_CMD
233 MX23_PAD_SSP1_SCK__SSP1_SCK
234 >;
235 fsl,drive-strength = <MXS_DRIVE_8mA>;
236 fsl,voltage = <MXS_VOLTAGE_HIGH>;
237 fsl,pull-up = <MXS_PULL_ENABLE>;
238 };
239
240 mmc0_8bit_pins_a: mmc0-8bit@0 {
241 reg = <0>;
242 fsl,pinmux-ids = <
243 MX23_PAD_SSP1_DATA0__SSP1_DATA0
244 MX23_PAD_SSP1_DATA1__SSP1_DATA1
245 MX23_PAD_SSP1_DATA2__SSP1_DATA2
246 MX23_PAD_SSP1_DATA3__SSP1_DATA3
247 MX23_PAD_GPMI_D08__SSP1_DATA4
248 MX23_PAD_GPMI_D09__SSP1_DATA5
249 MX23_PAD_GPMI_D10__SSP1_DATA6
250 MX23_PAD_GPMI_D11__SSP1_DATA7
251 MX23_PAD_SSP1_CMD__SSP1_CMD
252 MX23_PAD_SSP1_DETECT__SSP1_DETECT
253 MX23_PAD_SSP1_SCK__SSP1_SCK
254 >;
255 fsl,drive-strength = <MXS_DRIVE_8mA>;
256 fsl,voltage = <MXS_VOLTAGE_HIGH>;
257 fsl,pull-up = <MXS_PULL_ENABLE>;
258 };
259
260 mmc0_pins_fixup: mmc0-pins-fixup {
261 fsl,pinmux-ids = <
262 MX23_PAD_SSP1_DETECT__SSP1_DETECT
263 MX23_PAD_SSP1_SCK__SSP1_SCK
264 >;
265 fsl,pull-up = <MXS_PULL_DISABLE>;
266 };
267
268 mmc1_4bit_pins_a: mmc1-4bit@0 {
269 reg = <0>;
270 fsl,pinmux-ids = <
271 MX23_PAD_GPMI_D00__SSP2_DATA0
272 MX23_PAD_GPMI_D01__SSP2_DATA1
273 MX23_PAD_GPMI_D02__SSP2_DATA2
274 MX23_PAD_GPMI_D03__SSP2_DATA3
275 MX23_PAD_GPMI_RDY1__SSP2_CMD
276 MX23_PAD_GPMI_WRN__SSP2_SCK
277 >;
278 fsl,drive-strength = <MXS_DRIVE_8mA>;
279 fsl,voltage = <MXS_VOLTAGE_HIGH>;
280 fsl,pull-up = <MXS_PULL_ENABLE>;
281 };
282
283 mmc1_8bit_pins_a: mmc1-8bit@0 {
284 reg = <0>;
285 fsl,pinmux-ids = <
286 MX23_PAD_GPMI_D00__SSP2_DATA0
287 MX23_PAD_GPMI_D01__SSP2_DATA1
288 MX23_PAD_GPMI_D02__SSP2_DATA2
289 MX23_PAD_GPMI_D03__SSP2_DATA3
290 MX23_PAD_GPMI_D04__SSP2_DATA4
291 MX23_PAD_GPMI_D05__SSP2_DATA5
292 MX23_PAD_GPMI_D06__SSP2_DATA6
293 MX23_PAD_GPMI_D07__SSP2_DATA7
294 MX23_PAD_GPMI_RDY1__SSP2_CMD
295 MX23_PAD_GPMI_WRN__SSP2_SCK
296 >;
297 fsl,drive-strength = <MXS_DRIVE_8mA>;
298 fsl,voltage = <MXS_VOLTAGE_HIGH>;
299 fsl,pull-up = <MXS_PULL_ENABLE>;
300 };
301
302 pwm2_pins_a: pwm2@0 {
303 reg = <0>;
304 fsl,pinmux-ids = <
305 MX23_PAD_PWM2__PWM2
306 >;
307 fsl,drive-strength = <MXS_DRIVE_4mA>;
308 fsl,voltage = <MXS_VOLTAGE_HIGH>;
309 fsl,pull-up = <MXS_PULL_DISABLE>;
310 };
311
312 lcdif_24bit_pins_a: lcdif-24bit@0 {
313 reg = <0>;
314 fsl,pinmux-ids = <
315 MX23_PAD_LCD_D00__LCD_D00
316 MX23_PAD_LCD_D01__LCD_D01
317 MX23_PAD_LCD_D02__LCD_D02
318 MX23_PAD_LCD_D03__LCD_D03
319 MX23_PAD_LCD_D04__LCD_D04
320 MX23_PAD_LCD_D05__LCD_D05
321 MX23_PAD_LCD_D06__LCD_D06
322 MX23_PAD_LCD_D07__LCD_D07
323 MX23_PAD_LCD_D08__LCD_D08
324 MX23_PAD_LCD_D09__LCD_D09
325 MX23_PAD_LCD_D10__LCD_D10
326 MX23_PAD_LCD_D11__LCD_D11
327 MX23_PAD_LCD_D12__LCD_D12
328 MX23_PAD_LCD_D13__LCD_D13
329 MX23_PAD_LCD_D14__LCD_D14
330 MX23_PAD_LCD_D15__LCD_D15
331 MX23_PAD_LCD_D16__LCD_D16
332 MX23_PAD_LCD_D17__LCD_D17
333 MX23_PAD_GPMI_D08__LCD_D18
334 MX23_PAD_GPMI_D09__LCD_D19
335 MX23_PAD_GPMI_D10__LCD_D20
336 MX23_PAD_GPMI_D11__LCD_D21
337 MX23_PAD_GPMI_D12__LCD_D22
338 MX23_PAD_GPMI_D13__LCD_D23
339 MX23_PAD_LCD_DOTCK__LCD_DOTCK
340 MX23_PAD_LCD_ENABLE__LCD_ENABLE
341 MX23_PAD_LCD_HSYNC__LCD_HSYNC
342 MX23_PAD_LCD_VSYNC__LCD_VSYNC
343 >;
344 fsl,drive-strength = <MXS_DRIVE_4mA>;
345 fsl,voltage = <MXS_VOLTAGE_HIGH>;
346 fsl,pull-up = <MXS_PULL_DISABLE>;
347 };
348
349 spi2_pins_a: spi2@0 {
350 reg = <0>;
351 fsl,pinmux-ids = <
352 MX23_PAD_GPMI_WRN__SSP2_SCK
353 MX23_PAD_GPMI_RDY1__SSP2_CMD
354 MX23_PAD_GPMI_D00__SSP2_DATA0
355 MX23_PAD_GPMI_D03__SSP2_DATA3
356 >;
357 fsl,drive-strength = <MXS_DRIVE_8mA>;
358 fsl,voltage = <MXS_VOLTAGE_HIGH>;
359 fsl,pull-up = <MXS_PULL_ENABLE>;
360 };
361
362 i2c_pins_a: i2c@0 {
363 reg = <0>;
364 fsl,pinmux-ids = <
365 MX23_PAD_I2C_SCL__I2C_SCL
366 MX23_PAD_I2C_SDA__I2C_SDA
367 >;
368 fsl,drive-strength = <MXS_DRIVE_8mA>;
369 fsl,voltage = <MXS_VOLTAGE_HIGH>;
370 fsl,pull-up = <MXS_PULL_ENABLE>;
371 };
372
373 i2c_pins_b: i2c@1 {
374 reg = <1>;
375 fsl,pinmux-ids = <
376 MX23_PAD_LCD_ENABLE__I2C_SCL
377 MX23_PAD_LCD_HSYNC__I2C_SDA
378 >;
379 fsl,drive-strength = <MXS_DRIVE_8mA>;
380 fsl,voltage = <MXS_VOLTAGE_HIGH>;
381 fsl,pull-up = <MXS_PULL_ENABLE>;
382 };
383
384 i2c_pins_c: i2c@2 {
385 reg = <2>;
386 fsl,pinmux-ids = <
387 MX23_PAD_SSP1_DATA1__I2C_SCL
388 MX23_PAD_SSP1_DATA2__I2C_SDA
389 >;
390 fsl,drive-strength = <MXS_DRIVE_8mA>;
391 fsl,voltage = <MXS_VOLTAGE_HIGH>;
392 fsl,pull-up = <MXS_PULL_ENABLE>;
393 };
394 };
395
396 digctl@8001c000 {
397 compatible = "fsl,imx23-digctl";
398 reg = <0x8001c000 2000>;
399 status = "disabled";
400 };
401
402 emi@80020000 {
403 reg = <0x80020000 0x2000>;
404 status = "disabled";
405 };
406
407 dma_apbx: dma-apbx@80024000 {
408 compatible = "fsl,imx23-dma-apbx";
409 reg = <0x80024000 0x2000>;
410 interrupts = <7 5 9 26
411 19 0 25 23
412 60 58 9 0
413 0 0 0 0>;
414 interrupt-names = "audio-adc", "audio-dac", "spdif-tx", "i2c",
415 "saif0", "empty", "auart0-rx", "auart0-tx",
416 "auart1-rx", "auart1-tx", "saif1", "empty",
417 "empty", "empty", "empty", "empty";
418 #dma-cells = <1>;
419 dma-channels = <16>;
420 clocks = <&clks 16>;
421 };
422
423 dcp@80028000 {
424 compatible = "fsl,imx23-dcp";
425 reg = <0x80028000 0x2000>;
426 interrupts = <53 54>;
427 status = "okay";
428 };
429
430 pxp@8002a000 {
431 reg = <0x8002a000 0x2000>;
432 status = "disabled";
433 };
434
435 ocotp@8002c000 {
436 compatible = "fsl,imx23-ocotp", "fsl,ocotp";
437 #address-cells = <1>;
438 #size-cells = <1>;
439 reg = <0x8002c000 0x2000>;
440 clocks = <&clks 15>;
441 };
442
443 axi-ahb@8002e000 {
444 reg = <0x8002e000 0x2000>;
445 status = "disabled";
446 };
447
448 lcdif@80030000 {
449 compatible = "fsl,imx23-lcdif";
450 reg = <0x80030000 2000>;
451 interrupts = <46 45>;
452 clocks = <&clks 38>;
453 status = "disabled";
454 };
455
456 ssp1: ssp@80034000 {
457 reg = <0x80034000 0x2000>;
458 interrupts = <2>;
459 clocks = <&clks 33>;
460 dmas = <&dma_apbh 2>;
461 dma-names = "rx-tx";
462 status = "disabled";
463 };
464
465 tvenc@80038000 {
466 reg = <0x80038000 0x2000>;
467 status = "disabled";
468 };
469 };
470
471 apbx@80040000 {
472 compatible = "simple-bus";
473 #address-cells = <1>;
474 #size-cells = <1>;
475 reg = <0x80040000 0x40000>;
476 ranges;
477
478 clks: clkctrl@80040000 {
479 compatible = "fsl,imx23-clkctrl", "fsl,clkctrl";
480 reg = <0x80040000 0x2000>;
481 #clock-cells = <1>;
482 };
483
484 saif0: saif@80042000 {
485 reg = <0x80042000 0x2000>;
486 dmas = <&dma_apbx 4>;
487 dma-names = "rx-tx";
488 status = "disabled";
489 };
490
491 power@80044000 {
492 reg = <0x80044000 0x2000>;
493 status = "disabled";
494 };
495
496 saif1: saif@80046000 {
497 reg = <0x80046000 0x2000>;
498 dmas = <&dma_apbx 10>;
499 dma-names = "rx-tx";
500 status = "disabled";
501 };
502
503 audio-out@80048000 {
504 reg = <0x80048000 0x2000>;
505 dmas = <&dma_apbx 1>;
506 dma-names = "tx";
507 status = "disabled";
508 };
509
510 audio-in@8004c000 {
511 reg = <0x8004c000 0x2000>;
512 dmas = <&dma_apbx 0>;
513 dma-names = "rx";
514 status = "disabled";
515 };
516
517 lradc: lradc@80050000 {
518 compatible = "fsl,imx23-lradc";
519 reg = <0x80050000 0x2000>;
520 interrupts = <36 37 38 39 40 41 42 43 44>;
521 status = "disabled";
522 clocks = <&clks 26>;
523 #io-channel-cells = <1>;
524 };
525
526 spdif@80054000 {
527 reg = <0x80054000 2000>;
528 dmas = <&dma_apbx 2>;
529 dma-names = "tx";
530 status = "disabled";
531 };
532
533 i2c: i2c@80058000 {
534 #address-cells = <1>;
535 #size-cells = <0>;
536 compatible = "fsl,imx23-i2c";
537 reg = <0x80058000 0x2000>;
538 interrupts = <27>;
539 clock-frequency = <100000>;
540 dmas = <&dma_apbx 3>;
541 dma-names = "rx-tx";
542 status = "disabled";
543 };
544
545 rtc@8005c000 {
546 compatible = "fsl,imx23-rtc", "fsl,stmp3xxx-rtc";
547 reg = <0x8005c000 0x2000>;
548 interrupts = <22>;
549 };
550
551 pwm: pwm@80064000 {
552 compatible = "fsl,imx23-pwm";
553 reg = <0x80064000 0x2000>;
554 clocks = <&clks 30>;
555 #pwm-cells = <2>;
556 fsl,pwm-number = <5>;
557 status = "disabled";
558 };
559
560 timrot@80068000 {
561 compatible = "fsl,imx23-timrot", "fsl,timrot";
562 reg = <0x80068000 0x2000>;
563 interrupts = <28 29 30 31>;
564 clocks = <&clks 28>;
565 };
566
567 auart0: serial@8006c000 {
568 compatible = "fsl,imx23-auart";
569 reg = <0x8006c000 0x2000>;
570 interrupts = <24>;
571 clocks = <&clks 32>;
572 dmas = <&dma_apbx 6>, <&dma_apbx 7>;
573 dma-names = "rx", "tx";
574 status = "disabled";
575 };
576
577 auart1: serial@8006e000 {
578 compatible = "fsl,imx23-auart";
579 reg = <0x8006e000 0x2000>;
580 interrupts = <59>;
581 clocks = <&clks 32>;
582 dmas = <&dma_apbx 8>, <&dma_apbx 9>;
583 dma-names = "rx", "tx";
584 status = "disabled";
585 };
586
587 duart: serial@80070000 {
588 compatible = "arm,pl011", "arm,primecell";
589 reg = <0x80070000 0x2000>;
590 interrupts = <0>;
591 clocks = <&clks 32>, <&clks 16>;
592 clock-names = "uart", "apb_pclk";
593 status = "disabled";
594 };
595
596 usbphy0: usbphy@8007c000 {
597 compatible = "fsl,imx23-usbphy";
598 reg = <0x8007c000 0x2000>;
599 clocks = <&clks 41>;
600 status = "disabled";
601 };
602 };
603 };
604
605 ahb@80080000 {
606 compatible = "simple-bus";
607 #address-cells = <1>;
608 #size-cells = <1>;
609 reg = <0x80080000 0x80000>;
610 ranges;
611
612 usb0: usb@80080000 {
613 compatible = "fsl,imx23-usb", "fsl,imx27-usb";
614 reg = <0x80080000 0x40000>;
615 interrupts = <11>;
616 fsl,usbphy = <&usbphy0>;
617 clocks = <&clks 40>;
618 status = "disabled";
619 };
620 };
621
622 iio-hwmon {
623 compatible = "iio-hwmon";
624 io-channels = <&lradc 8>;
625 };
626 };