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[mirror_ubuntu-artful-kernel.git] / arch / arm / boot / dts / ste-nomadik-stn8815.dtsi
1 /*
2 * Device Tree for the ST-Ericsson Nomadik 8815 STn8815 SoC
3 */
4
5 #include <dt-bindings/gpio/gpio.h>
6 #include "skeleton.dtsi"
7
8 / {
9 #address-cells = <1>;
10 #size-cells = <1>;
11
12 memory {
13 reg = <0x00000000 0x04000000>,
14 <0x08000000 0x04000000>;
15 };
16
17 L2: l2-cache {
18 compatible = "arm,l210-cache";
19 reg = <0x10210000 0x1000>;
20 interrupt-parent = <&vica>;
21 interrupts = <30>;
22 cache-unified;
23 cache-level = <2>;
24 cache-size = <131072>;
25 cache-sets = <512>;
26 cache-line-size = <32>;
27 /* At full speed latency must be >=2 */
28 arm,tag-latency = <2>;
29 arm,data-latency = <2 2>;
30 arm,dirty-latency = <2>;
31 };
32
33 mtu0: mtu@101e2000 {
34 /* Nomadik system timer */
35 compatible = "st,nomadik-mtu";
36 reg = <0x101e2000 0x1000>;
37 interrupt-parent = <&vica>;
38 interrupts = <4>;
39 clocks = <&timclk>, <&pclk>;
40 clock-names = "timclk", "apb_pclk";
41 };
42
43 mtu1: mtu@101e3000 {
44 /* Secondary timer */
45 reg = <0x101e3000 0x1000>;
46 interrupt-parent = <&vica>;
47 interrupts = <5>;
48 clocks = <&timclk>, <&pclk>;
49 clock-names = "timclk", "apb_pclk";
50 };
51
52 gpio0: gpio@101e4000 {
53 compatible = "st,nomadik-gpio";
54 reg = <0x101e4000 0x80>;
55 interrupt-parent = <&vica>;
56 interrupts = <6>;
57 interrupt-controller;
58 #interrupt-cells = <2>;
59 gpio-controller;
60 #gpio-cells = <2>;
61 gpio-bank = <0>;
62 clocks = <&pclk>;
63 };
64
65 gpio1: gpio@101e5000 {
66 compatible = "st,nomadik-gpio";
67 reg = <0x101e5000 0x80>;
68 interrupt-parent = <&vica>;
69 interrupts = <7>;
70 interrupt-controller;
71 #interrupt-cells = <2>;
72 gpio-controller;
73 #gpio-cells = <2>;
74 gpio-bank = <1>;
75 clocks = <&pclk>;
76 };
77
78 gpio2: gpio@101e6000 {
79 compatible = "st,nomadik-gpio";
80 reg = <0x101e6000 0x80>;
81 interrupt-parent = <&vica>;
82 interrupts = <8>;
83 interrupt-controller;
84 #interrupt-cells = <2>;
85 gpio-controller;
86 #gpio-cells = <2>;
87 gpio-bank = <2>;
88 clocks = <&pclk>;
89 };
90
91 gpio3: gpio@101e7000 {
92 compatible = "st,nomadik-gpio";
93 reg = <0x101e7000 0x80>;
94 interrupt-parent = <&vica>;
95 interrupts = <9>;
96 interrupt-controller;
97 #interrupt-cells = <2>;
98 gpio-controller;
99 #gpio-cells = <2>;
100 gpio-bank = <3>;
101 clocks = <&pclk>;
102 };
103
104 pinctrl {
105 compatible = "stericsson,stn8815-pinctrl";
106 /* Pin configurations */
107 uart1 {
108 uart1_default_mux: uart1_mux {
109 u1_default_mux {
110 function = "u1";
111 groups = "u1_a_1";
112 };
113 };
114 };
115 mmcsd {
116 mmcsd_default_mux: mmcsd_mux {
117 mmcsd_default_mux {
118 function = "mmcsd";
119 groups = "mmcsd_a_1", "mmcsd_b_1";
120 };
121 };
122 mmcsd_default_mode: mmcsd_default {
123 mmcsd_default_cfg1 {
124 /* MCCLK */
125 pins = "GPIO8_B10";
126 ste,output = <0>;
127 };
128 mmcsd_default_cfg2 {
129 /* MCCMDDIR, MCDAT0DIR, MCDAT31DIR, MCDATDIR2 */
130 pins = "GPIO10_C11", "GPIO15_A12",
131 "GPIO16_C13", "GPIO23_D15";
132 ste,output = <1>;
133 };
134 mmcsd_default_cfg3 {
135 /* MCCMD, MCDAT3-0, MCMSFBCLK */
136 pins = "GPIO9_A10", "GPIO11_B11",
137 "GPIO12_A11", "GPIO13_C12",
138 "GPIO14_B12", "GPIO24_C15";
139 ste,input = <1>;
140 };
141 };
142 };
143 i2c0 {
144 i2c0_default_mux: i2c0_mux {
145 i2c0_default_mux {
146 function = "i2c0";
147 groups = "i2c0_a_1";
148 };
149 };
150 i2c0_default_mode: i2c0_default {
151 i2c0_default_cfg {
152 pins = "GPIO62_D3", "GPIO63_D2";
153 ste,input = <0>;
154 };
155 };
156 };
157 i2c1 {
158 i2c1_default_mux: i2c1_mux {
159 i2c1_default_mux {
160 function = "i2c1";
161 groups = "i2c1_a_1";
162 };
163 };
164 i2c1_default_mode: i2c1_default {
165 i2c1_default_cfg {
166 pins = "GPIO53_L4", "GPIO54_L3";
167 ste,input = <0>;
168 };
169 };
170 };
171 };
172
173 src: src@101e0000 {
174 compatible = "stericsson,nomadik-src";
175 reg = <0x101e0000 0x1000>;
176
177 /*
178 * MXTAL "Main Chrystal" is a chrystal oscillator @19.2 MHz
179 * that is parent of TIMCLK, PLL1 and PLL2
180 */
181 mxtal: mxtal@19.2M {
182 #clock-cells = <0>;
183 compatible = "fixed-clock";
184 clock-frequency = <19200000>;
185 };
186
187 /*
188 * The 2.4 MHz TIMCLK reference clock is active at
189 * boot time, this is actually the MXTALCLK @19.2 MHz
190 * divided by 8. This clock is used by the timers and
191 * watchdog. See page 105 ff.
192 */
193 timclk: timclk@2.4M {
194 #clock-cells = <0>;
195 compatible = "fixed-factor-clock";
196 clock-div = <8>;
197 clock-mult = <1>;
198 clocks = <&mxtal>;
199 };
200
201 /* PLL1 is locked to MXTALI and variable from 20.4 to 334 MHz */
202 pll1: pll1@0 {
203 #clock-cells = <0>;
204 compatible = "st,nomadik-pll-clock";
205 pll-id = <1>;
206 clocks = <&mxtal>;
207 };
208
209 /* HCLK divides the PLL1 with 1,2,3 or 4 */
210 hclk: hclk@0 {
211 #clock-cells = <0>;
212 compatible = "st,nomadik-hclk-clock";
213 clocks = <&pll1>;
214 };
215 /* The PCLK domain uses HCLK right off */
216 pclk: pclk@0 {
217 #clock-cells = <0>;
218 compatible = "fixed-factor-clock";
219 clock-div = <1>;
220 clock-mult = <1>;
221 clocks = <&hclk>;
222 };
223
224 /* PLL2 is usually 864 MHz and divided into a few fixed rates */
225 pll2: pll2@0 {
226 #clock-cells = <0>;
227 compatible = "st,nomadik-pll-clock";
228 pll-id = <2>;
229 clocks = <&mxtal>;
230 };
231 clk216: clk216@216M {
232 #clock-cells = <0>;
233 compatible = "fixed-factor-clock";
234 clock-div = <4>;
235 clock-mult = <1>;
236 clocks = <&pll2>;
237 };
238 clk108: clk108@108M {
239 #clock-cells = <0>;
240 compatible = "fixed-factor-clock";
241 clock-div = <2>;
242 clock-mult = <1>;
243 clocks = <&clk216>;
244 };
245 clk72: clk72@72M {
246 #clock-cells = <0>;
247 compatible = "fixed-factor-clock";
248 /* The data sheet does not say how this is derived */
249 clock-div = <12>;
250 clock-mult = <1>;
251 clocks = <&pll2>;
252 };
253 clk48: clk48@48M {
254 #clock-cells = <0>;
255 compatible = "fixed-factor-clock";
256 /* The data sheet does not say how this is derived */
257 clock-div = <18>;
258 clock-mult = <1>;
259 clocks = <&pll2>;
260 };
261 clk27: clk27@27M {
262 #clock-cells = <0>;
263 compatible = "fixed-factor-clock";
264 clock-div = <4>;
265 clock-mult = <1>;
266 clocks = <&clk108>;
267 };
268
269 /* This apparently exists as well */
270 ulpiclk: ulpiclk@60M {
271 #clock-cells = <0>;
272 compatible = "fixed-clock";
273 clock-frequency = <60000000>;
274 };
275
276 /*
277 * IP AMBA bus clocks, driving the bus side of the
278 * peripheral clocking, clock gates.
279 */
280
281 hclkdma0: hclkdma0@48M {
282 #clock-cells = <0>;
283 compatible = "st,nomadik-src-clock";
284 clock-id = <0>;
285 clocks = <&hclk>;
286 };
287 hclksmc: hclksmc@48M {
288 #clock-cells = <0>;
289 compatible = "st,nomadik-src-clock";
290 clock-id = <1>;
291 clocks = <&hclk>;
292 };
293 hclksdram: hclksdram@48M {
294 #clock-cells = <0>;
295 compatible = "st,nomadik-src-clock";
296 clock-id = <2>;
297 clocks = <&hclk>;
298 };
299 hclkdma1: hclkdma1@48M {
300 #clock-cells = <0>;
301 compatible = "st,nomadik-src-clock";
302 clock-id = <3>;
303 clocks = <&hclk>;
304 };
305 hclkclcd: hclkclcd@48M {
306 #clock-cells = <0>;
307 compatible = "st,nomadik-src-clock";
308 clock-id = <4>;
309 clocks = <&hclk>;
310 };
311 pclkirda: pclkirda@48M {
312 #clock-cells = <0>;
313 compatible = "st,nomadik-src-clock";
314 clock-id = <5>;
315 clocks = <&pclk>;
316 };
317 pclkssp: pclkssp@48M {
318 #clock-cells = <0>;
319 compatible = "st,nomadik-src-clock";
320 clock-id = <6>;
321 clocks = <&pclk>;
322 };
323 pclkuart0: pclkuart0@48M {
324 #clock-cells = <0>;
325 compatible = "st,nomadik-src-clock";
326 clock-id = <7>;
327 clocks = <&pclk>;
328 };
329 pclksdi: pclksdi@48M {
330 #clock-cells = <0>;
331 compatible = "st,nomadik-src-clock";
332 clock-id = <8>;
333 clocks = <&pclk>;
334 };
335 pclki2c0: pclki2c0@48M {
336 #clock-cells = <0>;
337 compatible = "st,nomadik-src-clock";
338 clock-id = <9>;
339 clocks = <&pclk>;
340 };
341 pclki2c1: pclki2c1@48M {
342 #clock-cells = <0>;
343 compatible = "st,nomadik-src-clock";
344 clock-id = <10>;
345 clocks = <&pclk>;
346 };
347 pclkuart1: pclkuart1@48M {
348 #clock-cells = <0>;
349 compatible = "st,nomadik-src-clock";
350 clock-id = <11>;
351 clocks = <&pclk>;
352 };
353 pclkmsp0: pclkmsp0@48M {
354 #clock-cells = <0>;
355 compatible = "st,nomadik-src-clock";
356 clock-id = <12>;
357 clocks = <&pclk>;
358 };
359 hclkusb: hclkusb@48M {
360 #clock-cells = <0>;
361 compatible = "st,nomadik-src-clock";
362 clock-id = <13>;
363 clocks = <&hclk>;
364 };
365 hclkdif: hclkdif@48M {
366 #clock-cells = <0>;
367 compatible = "st,nomadik-src-clock";
368 clock-id = <14>;
369 clocks = <&hclk>;
370 };
371 hclksaa: hclksaa@48M {
372 #clock-cells = <0>;
373 compatible = "st,nomadik-src-clock";
374 clock-id = <15>;
375 clocks = <&hclk>;
376 };
377 hclksva: hclksva@48M {
378 #clock-cells = <0>;
379 compatible = "st,nomadik-src-clock";
380 clock-id = <16>;
381 clocks = <&hclk>;
382 };
383 pclkhsi: pclkhsi@48M {
384 #clock-cells = <0>;
385 compatible = "st,nomadik-src-clock";
386 clock-id = <17>;
387 clocks = <&pclk>;
388 };
389 pclkxti: pclkxti@48M {
390 #clock-cells = <0>;
391 compatible = "st,nomadik-src-clock";
392 clock-id = <18>;
393 clocks = <&pclk>;
394 };
395 pclkuart2: pclkuart2@48M {
396 #clock-cells = <0>;
397 compatible = "st,nomadik-src-clock";
398 clock-id = <19>;
399 clocks = <&pclk>;
400 };
401 pclkmsp1: pclkmsp1@48M {
402 #clock-cells = <0>;
403 compatible = "st,nomadik-src-clock";
404 clock-id = <20>;
405 clocks = <&pclk>;
406 };
407 pclkmsp2: pclkmsp2@48M {
408 #clock-cells = <0>;
409 compatible = "st,nomadik-src-clock";
410 clock-id = <21>;
411 clocks = <&pclk>;
412 };
413 pclkowm: pclkowm@48M {
414 #clock-cells = <0>;
415 compatible = "st,nomadik-src-clock";
416 clock-id = <22>;
417 clocks = <&pclk>;
418 };
419 hclkhpi: hclkhpi@48M {
420 #clock-cells = <0>;
421 compatible = "st,nomadik-src-clock";
422 clock-id = <23>;
423 clocks = <&hclk>;
424 };
425 pclkske: pclkske@48M {
426 #clock-cells = <0>;
427 compatible = "st,nomadik-src-clock";
428 clock-id = <24>;
429 clocks = <&pclk>;
430 };
431 pclkhsem: pclkhsem@48M {
432 #clock-cells = <0>;
433 compatible = "st,nomadik-src-clock";
434 clock-id = <25>;
435 clocks = <&pclk>;
436 };
437 hclk3d: hclk3d@48M {
438 #clock-cells = <0>;
439 compatible = "st,nomadik-src-clock";
440 clock-id = <26>;
441 clocks = <&hclk>;
442 };
443 hclkhash: hclkhash@48M {
444 #clock-cells = <0>;
445 compatible = "st,nomadik-src-clock";
446 clock-id = <27>;
447 clocks = <&hclk>;
448 };
449 hclkcryp: hclkcryp@48M {
450 #clock-cells = <0>;
451 compatible = "st,nomadik-src-clock";
452 clock-id = <28>;
453 clocks = <&hclk>;
454 };
455 pclkmshc: pclkmshc@48M {
456 #clock-cells = <0>;
457 compatible = "st,nomadik-src-clock";
458 clock-id = <29>;
459 clocks = <&pclk>;
460 };
461 hclkusbm: hclkusbm@48M {
462 #clock-cells = <0>;
463 compatible = "st,nomadik-src-clock";
464 clock-id = <30>;
465 clocks = <&hclk>;
466 };
467 hclkrng: hclkrng@48M {
468 #clock-cells = <0>;
469 compatible = "st,nomadik-src-clock";
470 clock-id = <31>;
471 clocks = <&hclk>;
472 };
473
474 /* IP kernel clocks */
475 clcdclk: clcdclk@0 {
476 #clock-cells = <0>;
477 compatible = "st,nomadik-src-clock";
478 clock-id = <36>;
479 clocks = <&clk72 &clk48>;
480 };
481 irdaclk: irdaclk@48M {
482 #clock-cells = <0>;
483 compatible = "st,nomadik-src-clock";
484 clock-id = <37>;
485 clocks = <&clk48>;
486 };
487 sspiclk: sspiclk@48M {
488 #clock-cells = <0>;
489 compatible = "st,nomadik-src-clock";
490 clock-id = <38>;
491 clocks = <&clk48>;
492 };
493 uart0clk: uart0clk@48M {
494 #clock-cells = <0>;
495 compatible = "st,nomadik-src-clock";
496 clock-id = <39>;
497 clocks = <&clk48>;
498 };
499 sdiclk: sdiclk@48M {
500 /* Also called MCCLK in some documents */
501 #clock-cells = <0>;
502 compatible = "st,nomadik-src-clock";
503 clock-id = <40>;
504 clocks = <&clk48>;
505 };
506 i2c0clk: i2c0clk@48M {
507 #clock-cells = <0>;
508 compatible = "st,nomadik-src-clock";
509 clock-id = <41>;
510 clocks = <&clk48>;
511 };
512 i2c1clk: i2c1clk@48M {
513 #clock-cells = <0>;
514 compatible = "st,nomadik-src-clock";
515 clock-id = <42>;
516 clocks = <&clk48>;
517 };
518 uart1clk: uart1clk@48M {
519 #clock-cells = <0>;
520 compatible = "st,nomadik-src-clock";
521 clock-id = <43>;
522 clocks = <&clk48>;
523 };
524 mspclk0: mspclk0@48M {
525 #clock-cells = <0>;
526 compatible = "st,nomadik-src-clock";
527 clock-id = <44>;
528 clocks = <&clk48>;
529 };
530 usbclk: usbclk@48M {
531 #clock-cells = <0>;
532 compatible = "st,nomadik-src-clock";
533 clock-id = <45>;
534 clocks = <&clk48>; /* 48 MHz not ULPI */
535 };
536 difclk: difclk@72M {
537 #clock-cells = <0>;
538 compatible = "st,nomadik-src-clock";
539 clock-id = <46>;
540 clocks = <&clk72>;
541 };
542 ipi2cclk: ipi2cclk@48M {
543 #clock-cells = <0>;
544 compatible = "st,nomadik-src-clock";
545 clock-id = <47>;
546 clocks = <&clk48>; /* Guess */
547 };
548 ipbmcclk: ipbmcclk@48M {
549 #clock-cells = <0>;
550 compatible = "st,nomadik-src-clock";
551 clock-id = <48>;
552 clocks = <&clk48>; /* Guess */
553 };
554 hsiclkrx: hsiclkrx@216M {
555 #clock-cells = <0>;
556 compatible = "st,nomadik-src-clock";
557 clock-id = <49>;
558 clocks = <&clk216>;
559 };
560 hsiclktx: hsiclktx@108M {
561 #clock-cells = <0>;
562 compatible = "st,nomadik-src-clock";
563 clock-id = <50>;
564 clocks = <&clk108>;
565 };
566 uart2clk: uart2clk@48M {
567 #clock-cells = <0>;
568 compatible = "st,nomadik-src-clock";
569 clock-id = <51>;
570 clocks = <&clk48>;
571 };
572 mspclk1: mspclk1@48M {
573 #clock-cells = <0>;
574 compatible = "st,nomadik-src-clock";
575 clock-id = <52>;
576 clocks = <&clk48>;
577 };
578 mspclk2: mspclk2@48M {
579 #clock-cells = <0>;
580 compatible = "st,nomadik-src-clock";
581 clock-id = <53>;
582 clocks = <&clk48>;
583 };
584 owmclk: owmclk@48M {
585 #clock-cells = <0>;
586 compatible = "st,nomadik-src-clock";
587 clock-id = <54>;
588 clocks = <&clk48>; /* Guess */
589 };
590 skeclk: skeclk@48M {
591 #clock-cells = <0>;
592 compatible = "st,nomadik-src-clock";
593 clock-id = <56>;
594 clocks = <&clk48>; /* Guess */
595 };
596 x3dclk: x3dclk@48M {
597 #clock-cells = <0>;
598 compatible = "st,nomadik-src-clock";
599 clock-id = <58>;
600 clocks = <&clk48>; /* Guess */
601 };
602 pclkmsp3: pclkmsp3@48M {
603 #clock-cells = <0>;
604 compatible = "st,nomadik-src-clock";
605 clock-id = <59>;
606 clocks = <&pclk>;
607 };
608 mspclk3: mspclk3@48M {
609 #clock-cells = <0>;
610 compatible = "st,nomadik-src-clock";
611 clock-id = <60>;
612 clocks = <&clk48>;
613 };
614 mshcclk: mshcclk@48M {
615 #clock-cells = <0>;
616 compatible = "st,nomadik-src-clock";
617 clock-id = <61>;
618 clocks = <&clk48>; /* Guess */
619 };
620 usbmclk: usbmclk@48M {
621 #clock-cells = <0>;
622 compatible = "st,nomadik-src-clock";
623 clock-id = <62>;
624 /* Stated as "48 MHz not ULPI clock" */
625 clocks = <&clk48>;
626 };
627 rngcclk: rngcclk@48M {
628 #clock-cells = <0>;
629 compatible = "st,nomadik-src-clock";
630 clock-id = <63>;
631 clocks = <&clk48>; /* Guess */
632 };
633 };
634
635 /* A NAND flash of 128 MiB */
636 fsmc: flash@40000000 {
637 compatible = "stericsson,fsmc-nand";
638 #address-cells = <1>;
639 #size-cells = <1>;
640 reg = <0x10100000 0x1000>, /* FSMC Register*/
641 <0x40000000 0x2000>, /* NAND Base DATA */
642 <0x41000000 0x2000>, /* NAND Base ADDR */
643 <0x40800000 0x2000>; /* NAND Base CMD */
644 reg-names = "fsmc_regs", "nand_data", "nand_addr", "nand_cmd";
645 clocks = <&hclksmc>;
646 status = "okay";
647 timings = /bits/ 8 <0 0 0 0x10 0x0a 0>;
648
649 partition@0 {
650 label = "X-Loader(NAND)";
651 reg = <0x0 0x40000>;
652 };
653 partition@40000 {
654 label = "MemInit(NAND)";
655 reg = <0x40000 0x40000>;
656 };
657 partition@80000 {
658 label = "BootLoader(NAND)";
659 reg = <0x80000 0x200000>;
660 };
661 partition@280000 {
662 label = "Kernel zImage(NAND)";
663 reg = <0x280000 0x300000>;
664 };
665 partition@580000 {
666 label = "Root Filesystem(NAND)";
667 reg = <0x580000 0x1600000>;
668 };
669 partition@1b80000 {
670 label = "User Filesystem(NAND)";
671 reg = <0x1b80000 0x6480000>;
672 };
673 };
674
675 /* I2C0 connected to the STw4811 power management chip */
676 i2c0 {
677 compatible = "st,nomadik-i2c", "arm,primecell";
678 reg = <0x101f8000 0x1000>;
679 interrupt-parent = <&vica>;
680 interrupts = <20>;
681 clock-frequency = <100000>;
682 #address-cells = <1>;
683 #size-cells = <0>;
684 clocks = <&i2c0clk>, <&pclki2c0>;
685 clock-names = "mclk", "apb_pclk";
686 pinctrl-names = "default";
687 pinctrl-0 = <&i2c0_default_mux>, <&i2c0_default_mode>;
688
689 stw4811@2d {
690 compatible = "st,stw4811";
691 reg = <0x2d>;
692 vmmc_regulator: vmmc {
693 compatible = "st,stw481x-vmmc";
694 regulator-name = "VMMC";
695 regulator-min-microvolt = <1800000>;
696 regulator-max-microvolt = <3300000>;
697 };
698 };
699 };
700
701 /* I2C1 connected to various sensors */
702 i2c1 {
703 compatible = "st,nomadik-i2c", "arm,primecell";
704 reg = <0x101f7000 0x1000>;
705 interrupt-parent = <&vica>;
706 interrupts = <21>;
707 clock-frequency = <100000>;
708 #address-cells = <1>;
709 #size-cells = <0>;
710 clocks = <&i2c1clk>, <&pclki2c1>;
711 clock-names = "mclk", "apb_pclk";
712 pinctrl-names = "default";
713 pinctrl-0 = <&i2c1_default_mux>, <&i2c1_default_mode>;
714
715 camera@2d {
716 compatible = "st,camera";
717 reg = <0x10>;
718 };
719 stw5095@1a {
720 compatible = "st,stw5095";
721 reg = <0x1a>;
722 };
723 };
724
725 amba {
726 compatible = "arm,amba-bus";
727 #address-cells = <1>;
728 #size-cells = <1>;
729 ranges;
730
731 vica: intc@10140000 {
732 compatible = "arm,versatile-vic";
733 interrupt-controller;
734 #interrupt-cells = <1>;
735 reg = <0x10140000 0x20>;
736 };
737
738 vicb: intc@10140020 {
739 compatible = "arm,versatile-vic";
740 interrupt-controller;
741 #interrupt-cells = <1>;
742 reg = <0x10140020 0x20>;
743 };
744
745 uart0: uart@101fd000 {
746 compatible = "arm,pl011", "arm,primecell";
747 reg = <0x101fd000 0x1000>;
748 interrupt-parent = <&vica>;
749 interrupts = <12>;
750 clocks = <&uart0clk>, <&pclkuart0>;
751 clock-names = "uartclk", "apb_pclk";
752 status = "disabled";
753 };
754
755 uart1: uart@101fb000 {
756 compatible = "arm,pl011", "arm,primecell";
757 reg = <0x101fb000 0x1000>;
758 interrupt-parent = <&vica>;
759 interrupts = <17>;
760 clocks = <&uart1clk>, <&pclkuart1>;
761 clock-names = "uartclk", "apb_pclk";
762 pinctrl-names = "default";
763 pinctrl-0 = <&uart1_default_mux>;
764 };
765
766 uart2: uart@101f2000 {
767 compatible = "arm,pl011", "arm,primecell";
768 reg = <0x101f2000 0x1000>;
769 interrupt-parent = <&vica>;
770 interrupts = <28>;
771 clocks = <&uart2clk>, <&pclkuart2>;
772 clock-names = "uartclk", "apb_pclk";
773 status = "disabled";
774 };
775
776 rng: rng@101b0000 {
777 compatible = "arm,primecell";
778 reg = <0x101b0000 0x1000>;
779 clocks = <&rngcclk>, <&hclkrng>;
780 clock-names = "rng", "apb_pclk";
781 };
782
783 rtc: rtc@101e8000 {
784 compatible = "arm,pl031", "arm,primecell";
785 reg = <0x101e8000 0x1000>;
786 clocks = <&pclk>;
787 clock-names = "apb_pclk";
788 interrupt-parent = <&vica>;
789 interrupts = <10>;
790 };
791
792 mmcsd: sdi@101f6000 {
793 compatible = "arm,pl18x", "arm,primecell";
794 reg = <0x101f6000 0x1000>;
795 clocks = <&sdiclk>, <&pclksdi>;
796 clock-names = "mclk", "apb_pclk";
797 interrupt-parent = <&vica>;
798 interrupts = <22>;
799 max-frequency = <48000000>;
800 bus-width = <4>;
801 cap-mmc-highspeed;
802 cap-sd-highspeed;
803 pinctrl-names = "default";
804 pinctrl-0 = <&mmcsd_default_mux>, <&mmcsd_default_mode>;
805 vmmc-supply = <&vmmc_regulator>;
806 };
807 };
808 };
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