arch/arm/mach-ixp23xx/ixdp2351.c

   1 /*
   2  * arch/arm/mach-ixp23xx/ixdp2351.c
   3  *
   4  * IXDP2351 board-specific routines
   5  *
   6  * Author: Deepak Saxena <dsaxena@plexity.net>
   7  *
   8  * Copyright 2005 (c) MontaVista Software, Inc.
   9  *
  10  * Based on 2.4 code Copyright 2004 (c) Intel Corporation
  11  *
  12  * This file is licensed under the terms of the GNU General Public
  13  * License version 2. This program is licensed "as is" without any
  14  * warranty of any kind, whether express or implied.
  15  */
  16
  17 #include <linux/kernel.h>
  18 #include <linux/init.h>
  19 #include <linux/spinlock.h>
  20 #include <linux/sched.h>
  21 #include <linux/interrupt.h>
  22 #include <linux/irq.h>
  23 #include <linux/serial.h>
  24 #include <linux/tty.h>
  25 #include <linux/bitops.h>
  26 #include <linux/ioport.h>
  27 #include <linux/serial_8250.h>
  28 #include <linux/serial_core.h>
  29 #include <linux/device.h>
  30 #include <linux/mm.h>
  31 #include <linux/pci.h>
  32 #include <linux/mtd/physmap.h>
  33
  34 #include <asm/types.h>
  35 #include <asm/setup.h>
  36 #include <asm/memory.h>
  37 #include <mach/hardware.h>
  38 #include <asm/mach-types.h>
  39 #include <asm/system.h>
  40 #include <asm/tlbflush.h>
  41 #include <asm/pgtable.h>
  42
  43 #include <asm/mach/map.h>
  44 #include <asm/mach/irq.h>
  45 #include <asm/mach/arch.h>
  46 #include <asm/mach/pci.h>
  47
  48 /*
  49  * IXDP2351 Interrupt Handling
  50  */
  51 static void ixdp2351_inta_mask(unsigned int irq)
  52 {
  53         *IXDP2351_CPLD_INTA_MASK_SET_REG = IXDP2351_INTA_IRQ_MASK(irq);
  54 }
  55
  56 static void ixdp2351_inta_unmask(unsigned int irq)
  57 {
  58         *IXDP2351_CPLD_INTA_MASK_CLR_REG = IXDP2351_INTA_IRQ_MASK(irq);
  59 }
  60
  61 static void ixdp2351_inta_handler(unsigned int irq, struct irq_desc *desc)
  62 {
  63         u16 ex_interrupt =
  64                 *IXDP2351_CPLD_INTA_STAT_REG & IXDP2351_INTA_IRQ_VALID;
  65         int i;
  66
  67         desc->chip->mask(irq);
  68
  69         for (i = 0; i < IXDP2351_INTA_IRQ_NUM; i++) {
  70                 if (ex_interrupt & (1 << i)) {
  71                         struct irq_desc *cpld_desc;
  72                         int cpld_irq =
  73                                 IXP23XX_MACH_IRQ(IXDP2351_INTA_IRQ_BASE + i);
  74                         cpld_desc = irq_desc + cpld_irq;
  75                         desc_handle_irq(cpld_irq, cpld_desc);
  76                 }
  77         }
  78
  79         desc->chip->unmask(irq);
  80 }
  81
  82 static struct irq_chip ixdp2351_inta_chip = {
  83         .ack    = ixdp2351_inta_mask,
  84         .mask   = ixdp2351_inta_mask,
  85         .unmask = ixdp2351_inta_unmask
  86 };
  87
  88 static void ixdp2351_intb_mask(unsigned int irq)
  89 {
  90         *IXDP2351_CPLD_INTB_MASK_SET_REG = IXDP2351_INTB_IRQ_MASK(irq);
  91 }
  92
  93 static void ixdp2351_intb_unmask(unsigned int irq)
  94 {
  95         *IXDP2351_CPLD_INTB_MASK_CLR_REG = IXDP2351_INTB_IRQ_MASK(irq);
  96 }
  97
  98 static void ixdp2351_intb_handler(unsigned int irq, struct irq_desc *desc)
  99 {
 100         u16 ex_interrupt =
 101                 *IXDP2351_CPLD_INTB_STAT_REG & IXDP2351_INTB_IRQ_VALID;
 102         int i;
 103
 104         desc->chip->ack(irq);
 105
 106         for (i = 0; i < IXDP2351_INTB_IRQ_NUM; i++) {
 107                 if (ex_interrupt & (1 << i)) {
 108                         struct irq_desc *cpld_desc;
 109                         int cpld_irq =
 110                                 IXP23XX_MACH_IRQ(IXDP2351_INTB_IRQ_BASE + i);
 111                         cpld_desc = irq_desc + cpld_irq;
 112                         desc_handle_irq(cpld_irq, cpld_desc);
 113                 }
 114         }
 115
 116         desc->chip->unmask(irq);
 117 }
 118
 119 static struct irq_chip ixdp2351_intb_chip = {
 120         .ack    = ixdp2351_intb_mask,
 121         .mask   = ixdp2351_intb_mask,
 122         .unmask = ixdp2351_intb_unmask
 123 };
 124
 125 void __init ixdp2351_init_irq(void)
 126 {
 127         int irq;
 128
 129         /* Mask all interrupts from CPLD, disable simulation */
 130         *IXDP2351_CPLD_INTA_MASK_SET_REG = (u16) -1;
 131         *IXDP2351_CPLD_INTB_MASK_SET_REG = (u16) -1;
 132         *IXDP2351_CPLD_INTA_SIM_REG = 0;
 133         *IXDP2351_CPLD_INTB_SIM_REG = 0;
 134
 135         ixp23xx_init_irq();
 136
 137         for (irq = IXP23XX_MACH_IRQ(IXDP2351_INTA_IRQ_BASE);
 138              irq <
 139              IXP23XX_MACH_IRQ(IXDP2351_INTA_IRQ_BASE + IXDP2351_INTA_IRQ_NUM);
 140              irq++) {
 141                 if (IXDP2351_INTA_IRQ_MASK(irq) & IXDP2351_INTA_IRQ_VALID) {
 142                         set_irq_flags(irq, IRQF_VALID);
 143                         set_irq_handler(irq, handle_level_irq);
 144                         set_irq_chip(irq, &ixdp2351_inta_chip);
 145                 }
 146         }
 147
 148         for (irq = IXP23XX_MACH_IRQ(IXDP2351_INTB_IRQ_BASE);
 149              irq <
 150              IXP23XX_MACH_IRQ(IXDP2351_INTB_IRQ_BASE + IXDP2351_INTB_IRQ_NUM);
 151              irq++) {
 152                 if (IXDP2351_INTB_IRQ_MASK(irq) & IXDP2351_INTB_IRQ_VALID) {
 153                         set_irq_flags(irq, IRQF_VALID);
 154                         set_irq_handler(irq, handle_level_irq);
 155                         set_irq_chip(irq, &ixdp2351_intb_chip);
 156                 }
 157         }
 158
 159         set_irq_chained_handler(IRQ_IXP23XX_INTA, ixdp2351_inta_handler);
 160         set_irq_chained_handler(IRQ_IXP23XX_INTB, ixdp2351_intb_handler);
 161 }
 162
 163 /*
 164  * IXDP2351 PCI
 165  */
 166
 167 /*
 168  * This board does not do normal PCI IRQ routing, or any
 169  * sort of swizzling, so we just need to check where on the
 170  * bus the device is and figure out what CPLD pin it is
 171  * being routed to.
 172  */
 173 #define DEVPIN(dev, pin) ((pin) | ((dev) << 3))
 174
 175 static int __init ixdp2351_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
 176 {
 177         u8 bus = dev->bus->number;
 178         u32 devpin = DEVPIN(PCI_SLOT(dev->devfn), pin);
 179         struct pci_bus *tmp_bus = dev->bus;
 180
 181         /* Primary bus, no interrupts here */
 182         if (!bus)
 183                 return -1;
 184
 185         /* Lookup first leaf in bus tree */
 186         while ((tmp_bus->parent != NULL) && (tmp_bus->parent->parent != NULL))
 187                 tmp_bus = tmp_bus->parent;
 188
 189         /* Select between known bridges */
 190         switch (tmp_bus->self->devfn | (tmp_bus->self->bus->number << 8)) {
 191                 /* Device is located after first bridge */
 192         case 0x0008:
 193                 if (tmp_bus == dev->bus) {
 194                         /* Device is located directy after first bridge */
 195                         switch (devpin) {
 196                                 /* Onboard 82546 */
 197                         case DEVPIN(1, 1):      /* Onboard 82546 ch 0 */
 198                                 return IRQ_IXDP2351_INTA_82546;
 199                         case DEVPIN(1, 2):      /* Onboard 82546 ch 1 */
 200                                 return IRQ_IXDP2351_INTB_82546;
 201                                 /* PMC SLOT */
 202                         case DEVPIN(0, 1):      /* PMCP INTA# */
 203                         case DEVPIN(2, 4):      /* PMCS INTD# */
 204                                 return IRQ_IXDP2351_SPCI_PMC_INTA;
 205                         case DEVPIN(0, 2):      /* PMCP INTB# */
 206                         case DEVPIN(2, 1):      /* PMCS INTA# */
 207                                 return IRQ_IXDP2351_SPCI_PMC_INTB;
 208                         case DEVPIN(0, 3):      /* PMCP INTC# */
 209                         case DEVPIN(2, 2):      /* PMCS INTB# */
 210                                 return IRQ_IXDP2351_SPCI_PMC_INTC;
 211                         case DEVPIN(0, 4):      /* PMCP INTD# */
 212                         case DEVPIN(2, 3):      /* PMCS INTC# */
 213                                 return IRQ_IXDP2351_SPCI_PMC_INTD;
 214                         }
 215                 } else {
 216                         /* Device is located indirectly after first bridge */
 217                         /* Not supported now */
 218                         return -1;
 219                 }
 220                 break;
 221         case 0x0010:
 222                 if (tmp_bus == dev->bus) {
 223                         /* Device is located directy after second bridge */
 224                         /* Secondary bus of second bridge */
 225                         switch (devpin) {
 226                         case DEVPIN(0, 1):      /* DB#0 */
 227                         case DEVPIN(0, 2):
 228                         case DEVPIN(0, 3):
 229                         case DEVPIN(0, 4):
 230                                 return IRQ_IXDP2351_SPCI_DB_0;
 231                         case DEVPIN(1, 1):      /* DB#1 */
 232                         case DEVPIN(1, 2):
 233                         case DEVPIN(1, 3):
 234                         case DEVPIN(1, 4):
 235                                 return IRQ_IXDP2351_SPCI_DB_1;
 236                         case DEVPIN(2, 1):      /* FIC1 */
 237                         case DEVPIN(2, 2):
 238                         case DEVPIN(2, 3):
 239                         case DEVPIN(2, 4):
 240                         case DEVPIN(3, 1):      /* FIC2 */
 241                         case DEVPIN(3, 2):
 242                         case DEVPIN(3, 3):
 243                         case DEVPIN(3, 4):
 244                                 return IRQ_IXDP2351_SPCI_FIC;
 245                         }
 246                 } else {
 247                         /* Device is located indirectly after second bridge */
 248                         /* Not supported now */
 249                         return -1;
 250                 }
 251                 break;
 252         }
 253
 254         return -1;
 255 }
 256
 257 struct hw_pci ixdp2351_pci __initdata = {
 258         .nr_controllers = 1,
 259         .preinit        = ixp23xx_pci_preinit,
 260         .setup          = ixp23xx_pci_setup,
 261         .scan           = ixp23xx_pci_scan_bus,
 262         .map_irq        = ixdp2351_map_irq,
 263 };
 264
 265 int __init ixdp2351_pci_init(void)
 266 {
 267         if (machine_is_ixdp2351())
 268                 pci_common_init(&ixdp2351_pci);
 269
 270         return 0;
 271 }
 272
 273 subsys_initcall(ixdp2351_pci_init);
 274
 275 /*
 276  * IXDP2351 Static Mapped I/O
 277  */
 278 static struct map_desc ixdp2351_io_desc[] __initdata = {
 279         {
 280                 .virtual        = IXDP2351_NP_VIRT_BASE,
 281                 .pfn            = __phys_to_pfn((u64)IXDP2351_NP_PHYS_BASE),
 282                 .length         = IXDP2351_NP_PHYS_SIZE,
 283                 .type           = MT_DEVICE
 284         }, {
 285                 .virtual        = IXDP2351_BB_BASE_VIRT,
 286                 .pfn            = __phys_to_pfn((u64)IXDP2351_BB_BASE_PHYS),
 287                 .length         = IXDP2351_BB_SIZE,
 288                 .type           = MT_DEVICE
 289         }
 290 };
 291
 292 static void __init ixdp2351_map_io(void)
 293 {
 294         ixp23xx_map_io();
 295         iotable_init(ixdp2351_io_desc, ARRAY_SIZE(ixdp2351_io_desc));
 296 }
 297
 298 static struct physmap_flash_data ixdp2351_flash_data = {
 299         .width          = 1,
 300 };
 301
 302 static struct resource ixdp2351_flash_resource = {
 303         .start          = 0x90000000,
 304         .end            = 0x93ffffff,
 305         .flags          = IORESOURCE_MEM,
 306 };
 307
 308 static struct platform_device ixdp2351_flash = {
 309         .name           = "physmap-flash",
 310         .id             = 0,
 311         .dev            = {
 312                 .platform_data  = &ixdp2351_flash_data,
 313         },
 314         .num_resources  = 1,
 315         .resource       = &ixdp2351_flash_resource,
 316 };
 317
 318 static void __init ixdp2351_init(void)
 319 {
 320         platform_device_register(&ixdp2351_flash);
 321
 322         /*
 323          * Mark flash as writeable
 324          */
 325         IXP23XX_EXP_CS0[0] |= IXP23XX_FLASH_WRITABLE;
 326         IXP23XX_EXP_CS0[1] |= IXP23XX_FLASH_WRITABLE;
 327         IXP23XX_EXP_CS0[2] |= IXP23XX_FLASH_WRITABLE;
 328         IXP23XX_EXP_CS0[3] |= IXP23XX_FLASH_WRITABLE;
 329
 330         ixp23xx_sys_init();
 331 }
 332
 333 MACHINE_START(IXDP2351, "Intel IXDP2351 Development Platform")
 334         /* Maintainer: MontaVista Software, Inc. */
 335         .phys_io        = IXP23XX_PERIPHERAL_PHYS,
 336         .io_pg_offst    = ((IXP23XX_PERIPHERAL_VIRT >> 18)) & 0xfffc,
 337         .map_io         = ixdp2351_map_io,
 338         .init_irq       = ixdp2351_init_irq,
 339         .timer          = &ixp23xx_timer,
 340         .boot_params    = 0x00000100,
 341         .init_machine   = ixdp2351_init,
 342 MACHINE_END