arch/arm/mach-mmp/cputype.h

   1 /* SPDX-License-Identifier: GPL-2.0 */
   2 #ifndef __ASM_MACH_CPUTYPE_H
   3 #define __ASM_MACH_CPUTYPE_H
   4
   5 #include <asm/cputype.h>
   6
   7 /*
   8  *  CPU   Stepping   CPU_ID      CHIP_ID
   9  *
  10  * PXA168    S0    0x56158400   0x0000C910
  11  * PXA168    A0    0x56158400   0x00A0A168
  12  * PXA910    Y1    0x56158400   0x00F2C920
  13  * PXA910    A0    0x56158400   0x00F2C910
  14  * PXA910    A1    0x56158400   0x00A0C910
  15  * PXA920    Y0    0x56158400   0x00F2C920
  16  * PXA920    A0    0x56158400   0x00A0C920
  17  * PXA920    A1    0x56158400   0x00A1C920
  18  * MMP2      Z0    0x560f5811   0x00F00410
  19  * MMP2      Z1    0x560f5811   0x00E00410
  20  * MMP2      A0    0x560f5811   0x00A0A610
  21  */
  22
  23 extern unsigned int mmp_chip_id;
  24
  25 #ifdef CONFIG_CPU_PXA168
  26 static inline int cpu_is_pxa168(void)
  27 {
  28         return (((read_cpuid_id() >> 8) & 0xff) == 0x84) &&
  29                 ((mmp_chip_id & 0xfff) == 0x168);
  30 }
  31 #else
  32 #define cpu_is_pxa168() (0)
  33 #endif
  34
  35 /* cpu_is_pxa910() is shared on both pxa910 and pxa920 */
  36 #ifdef CONFIG_CPU_PXA910
  37 static inline int cpu_is_pxa910(void)
  38 {
  39         return (((read_cpuid_id() >> 8) & 0xff) == 0x84) &&
  40                 (((mmp_chip_id & 0xfff) == 0x910) ||
  41                  ((mmp_chip_id & 0xfff) == 0x920));
  42 }
  43 #else
  44 #define cpu_is_pxa910() (0)
  45 #endif
  46
  47 #ifdef CONFIG_CPU_MMP2
  48 static inline int cpu_is_mmp2(void)
  49 {
  50         return (((read_cpuid_id() >> 8) & 0xff) == 0x58);
  51 }
  52 #else
  53 #define cpu_is_mmp2()   (0)
  54 #endif
  55
  56 #endif /* __ASM_MACH_CPUTYPE_H */