arch/arm/mach-tegra/board-trimslice.c

   1 /*
   2  * arch/arm/mach-tegra/board-trimslice.c
   3  *
   4  * Copyright (C) 2011 CompuLab, Ltd.
   5  * Author: Mike Rapoport <mike@compulab.co.il>
   6  *
   7  * Based on board-harmony.c
   8  * Copyright (C) 2010 Google, Inc.
   9  *
  10  * This software is licensed under the terms of the GNU General Public
  11  * License version 2, as published by the Free Software Foundation, and
  12  * may be copied, distributed, and modified under those terms.
  13  *
  14  * This program is distributed in the hope that it will be useful,
  15  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  * GNU General Public License for more details.
  18  *
  19  */
  20
  21 #include <linux/kernel.h>
  22 #include <linux/init.h>
  23 #include <linux/platform_device.h>
  24 #include <linux/serial_8250.h>
  25 #include <linux/io.h>
  26 #include <linux/i2c.h>
  27 #include <linux/gpio.h>
  28 #include <linux/platform_data/tegra_usb.h>
  29
  30 #include <asm/hardware/gic.h>
  31 #include <asm/mach-types.h>
  32 #include <asm/mach/arch.h>
  33 #include <asm/setup.h>
  34
  35 #include <mach/iomap.h>
  36 #include <mach/sdhci.h>
  37
  38 #include "board.h"
  39 #include "clock.h"
  40 #include "devices.h"
  41 #include "gpio-names.h"
  42
  43 #include "board-trimslice.h"
  44
  45 static struct plat_serial8250_port debug_uart_platform_data[] = {
  46         {
  47                 .membase        = IO_ADDRESS(TEGRA_UARTA_BASE),
  48                 .mapbase        = TEGRA_UARTA_BASE,
  49                 .irq            = INT_UARTA,
  50                 .flags          = UPF_BOOT_AUTOCONF | UPF_FIXED_TYPE,
  51                 .type           = PORT_TEGRA,
  52                 .iotype         = UPIO_MEM,
  53                 .regshift       = 2,
  54                 .uartclk        = 216000000,
  55         }, {
  56                 .flags          = 0
  57         }
  58 };
  59
  60 static struct platform_device debug_uart = {
  61         .name   = "serial8250",
  62         .id     = PLAT8250_DEV_PLATFORM,
  63         .dev    = {
  64                 .platform_data  = debug_uart_platform_data,
  65         },
  66 };
  67 static struct tegra_sdhci_platform_data sdhci_pdata1 = {
  68         .cd_gpio        = -1,
  69         .wp_gpio        = -1,
  70         .power_gpio     = -1,
  71 };
  72
  73 static struct tegra_sdhci_platform_data sdhci_pdata4 = {
  74         .cd_gpio        = TRIMSLICE_GPIO_SD4_CD,
  75         .wp_gpio        = TRIMSLICE_GPIO_SD4_WP,
  76         .power_gpio     = -1,
  77 };
  78
  79 static struct platform_device trimslice_audio_device = {
  80         .name   = "tegra-snd-trimslice",
  81         .id     = 0,
  82 };
  83
  84 static struct platform_device *trimslice_devices[] __initdata = {
  85         &debug_uart,
  86         &tegra_sdhci_device1,
  87         &tegra_sdhci_device4,
  88         &tegra_i2s_device1,
  89         &tegra_das_device,
  90         &tegra_pcm_device,
  91         &trimslice_audio_device,
  92 };
  93
  94 static struct i2c_board_info trimslice_i2c3_board_info[] = {
  95         {
  96                 I2C_BOARD_INFO("tlv320aic23", 0x1a),
  97         },
  98         {
  99                 I2C_BOARD_INFO("em3027", 0x56),
 100         },
 101 };
 102
 103 static void trimslice_i2c_init(void)
 104 {
 105         platform_device_register(&tegra_i2c_device1);
 106         platform_device_register(&tegra_i2c_device2);
 107         platform_device_register(&tegra_i2c_device3);
 108
 109         i2c_register_board_info(2, trimslice_i2c3_board_info,
 110                                 ARRAY_SIZE(trimslice_i2c3_board_info));
 111 }
 112
 113 static void trimslice_usb_init(void)
 114 {
 115         struct tegra_ehci_platform_data *pdata;
 116
 117         pdata = tegra_ehci1_device.dev.platform_data;
 118         pdata->vbus_gpio = TRIMSLICE_GPIO_USB1_MODE;
 119
 120         tegra_ehci2_ulpi_phy_config.reset_gpio = TEGRA_GPIO_PV0;
 121
 122         platform_device_register(&tegra_ehci3_device);
 123         platform_device_register(&tegra_ehci2_device);
 124         platform_device_register(&tegra_ehci1_device);
 125 }
 126
 127 static void __init tegra_trimslice_fixup(struct tag *tags, char **cmdline,
 128         struct meminfo *mi)
 129 {
 130         mi->nr_banks = 2;
 131         mi->bank[0].start = PHYS_OFFSET;
 132         mi->bank[0].size = 448 * SZ_1M;
 133         mi->bank[1].start = SZ_512M;
 134         mi->bank[1].size = SZ_512M;
 135 }
 136
 137 static __initdata struct tegra_clk_init_table trimslice_clk_init_table[] = {
 138         /* name         parent          rate            enabled */
 139         { "uarta",      "pll_p",        216000000,      true },
 140         { "pll_a",      "pll_p_out1",   56448000,       true },
 141         { "pll_a_out0", "pll_a",        11289600,       true },
 142         { "cdev1",      NULL,           0,              true },
 143         { "i2s1",       "pll_a_out0",   11289600,       false},
 144         { NULL,         NULL,           0,              0},
 145 };
 146
 147 static int __init tegra_trimslice_pci_init(void)
 148 {
 149         if (!machine_is_trimslice())
 150                 return 0;
 151
 152         return tegra_pcie_init(true, true);
 153 }
 154 subsys_initcall(tegra_trimslice_pci_init);
 155
 156 static void __init tegra_trimslice_init(void)
 157 {
 158         tegra_clk_init_from_table(trimslice_clk_init_table);
 159
 160         trimslice_pinmux_init();
 161
 162         tegra_sdhci_device1.dev.platform_data = &sdhci_pdata1;
 163         tegra_sdhci_device4.dev.platform_data = &sdhci_pdata4;
 164
 165         platform_add_devices(trimslice_devices, ARRAY_SIZE(trimslice_devices));
 166
 167         trimslice_i2c_init();
 168         trimslice_usb_init();
 169 }
 170
 171 MACHINE_START(TRIMSLICE, "trimslice")
 172         .atag_offset    = 0x100,
 173         .fixup          = tegra_trimslice_fixup,
 174         .map_io         = tegra_map_common_io,
 175         .init_early     = tegra20_init_early,
 176         .init_irq       = tegra_init_irq,
 177         .handle_irq     = gic_handle_irq,
 178         .timer          = &tegra_timer,
 179         .init_machine   = tegra_trimslice_init,
 180         .restart        = tegra_assert_system_reset,
 181 MACHINE_END