arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi

   1 /*
   2  * Copyright (c) 2016 Andreas Färber
   3  *
   4  * This file is dual-licensed: you can use it either under the terms
   5  * of the GPL or the X11 license, at your option. Note that this dual
   6  * licensing only applies to this file, and not this project as a
   7  * whole.
   8  *
   9  *  a) This library is free software; you can redistribute it and/or
  10  *     modify it under the terms of the GNU General Public License as
  11  *     published by the Free Software Foundation; either version 2 of the
  12  *     License, or (at your option) any later version.
  13  *
  14  *     This library is distributed in the hope that it will be useful,
  15  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  *     GNU General Public License for more details.
  18  *
  19  * Or, alternatively,
  20  *
  21  *  b) Permission is hereby granted, free of charge, to any person
  22  *     obtaining a copy of this software and associated documentation
  23  *     files (the "Software"), to deal in the Software without
  24  *     restriction, including without limitation the rights to use,
  25  *     copy, modify, merge, publish, distribute, sublicense, and/or
  26  *     sell copies of the Software, and to permit persons to whom the
  27  *     Software is furnished to do so, subject to the following
  28  *     conditions:
  29  *
  30  *     The above copyright notice and this permission notice shall be
  31  *     included in all copies or substantial portions of the Software.
  32  *
  33  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  34  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  35  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  36  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
  37  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  38  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  39  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  40  *     OTHER DEALINGS IN THE SOFTWARE.
  41  */
  42
  43 #include "meson-gx.dtsi"
  44 #include <dt-bindings/gpio/meson-gxbb-gpio.h>
  45 #include <dt-bindings/reset/amlogic,meson-gxbb-reset.h>
  46 #include <dt-bindings/clock/gxbb-clkc.h>
  47 #include <dt-bindings/clock/gxbb-aoclkc.h>
  48 #include <dt-bindings/reset/gxbb-aoclkc.h>
  49
  50 / {
  51         compatible = "amlogic,meson-gxbb";
  52
  53         firmware {
  54                 sm: secure-monitor {
  55                         compatible = "amlogic,meson-gxbb-sm";
  56                 };
  57         };
  58
  59         efuse: efuse {
  60                 compatible = "amlogic,meson-gxbb-efuse";
  61                 #address-cells = <1>;
  62                 #size-cells = <1>;
  63
  64                 sn: sn@14 {
  65                         reg = <0x14 0x10>;
  66                 };
  67
  68                 eth_mac: eth_mac@34 {
  69                         reg = <0x34 0x10>;
  70                 };
  71
  72                 bid: bid@46 {
  73                         reg = <0x46 0x30>;
  74                 };
  75         };
  76
  77         soc {
  78                 usb0_phy: phy@c0000000 {
  79                         compatible = "amlogic,meson-gxbb-usb2-phy";
  80                         #phy-cells = <0>;
  81                         reg = <0x0 0xc0000000 0x0 0x20>;
  82                         resets = <&reset RESET_USB_OTG>;
  83                         clocks = <&clkc CLKID_USB>, <&clkc CLKID_USB0>;
  84                         clock-names = "usb_general", "usb";
  85                         status = "disabled";
  86                 };
  87
  88                 usb1_phy: phy@c0000020 {
  89                         compatible = "amlogic,meson-gxbb-usb2-phy";
  90                         #phy-cells = <0>;
  91                         reg = <0x0 0xc0000020 0x0 0x20>;
  92                         clocks = <&clkc CLKID_USB>, <&clkc CLKID_USB1>;
  93                         clock-names = "usb_general", "usb";
  94                         status = "disabled";
  95                 };
  96
  97                 usb0: usb@c9000000 {
  98                         compatible = "amlogic,meson-gxbb-usb", "snps,dwc2";
  99                         reg = <0x0 0xc9000000 0x0 0x40000>;
 100                         interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
 101                         clocks = <&clkc CLKID_USB0_DDR_BRIDGE>;
 102                         clock-names = "otg";
 103                         phys = <&usb0_phy>;
 104                         phy-names = "usb2-phy";
 105                         dr_mode = "host";
 106                         status = "disabled";
 107                 };
 108
 109                 usb1: usb@c9100000 {
 110                         compatible = "amlogic,meson-gxbb-usb", "snps,dwc2";
 111                         reg = <0x0 0xc9100000 0x0 0x40000>;
 112                         interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
 113                         clocks = <&clkc CLKID_USB1_DDR_BRIDGE>;
 114                         clock-names = "otg";
 115                         phys = <&usb1_phy>;
 116                         phy-names = "usb2-phy";
 117                         dr_mode = "host";
 118                         status = "disabled";
 119                 };
 120
 121                 ethmac: ethernet@c9410000 {
 122                         compatible = "amlogic,meson-gxbb-dwmac", "snps,dwmac";
 123                         reg = <0x0 0xc9410000 0x0 0x10000
 124                                0x0 0xc8834540 0x0 0x4>;
 125                         interrupts = <0 8 1>;
 126                         interrupt-names = "macirq";
 127                         clocks = <&clkc CLKID_ETH>,
 128                                  <&clkc CLKID_FCLK_DIV2>,
 129                                  <&clkc CLKID_MPLL2>;
 130                         clock-names = "stmmaceth", "clkin0", "clkin1";
 131                         phy-mode = "rgmii";
 132                         status = "disabled";
 133                 };
 134         };
 135 };
 136
 137 &cbus {
 138         reset: reset-controller@4404 {
 139                 compatible = "amlogic,meson-gxbb-reset";
 140                 reg = <0x0 0x04404 0x0 0x20>;
 141                 #reset-cells = <1>;
 142         };
 143
 144         uart_B: serial@84dc {
 145                 compatible = "amlogic,meson-uart";
 146                 reg = <0x0 0x84dc 0x0 0x14>;
 147                 interrupts = <GIC_SPI 75 IRQ_TYPE_EDGE_RISING>;
 148                 clocks = <&xtal>;
 149                 status = "disabled";
 150         };
 151
 152         pwm_ab: pwm@8550 {
 153                 compatible = "amlogic,meson-gxbb-pwm";
 154                 reg = <0x0 0x08550 0x0 0x10>;
 155                 #pwm-cells = <3>;
 156                 status = "disabled";
 157         };
 158
 159         pwm_cd: pwm@8650 {
 160                 compatible = "amlogic,meson-gxbb-pwm";
 161                 reg = <0x0 0x08650 0x0 0x10>;
 162                 #pwm-cells = <3>;
 163                 status = "disabled";
 164         };
 165
 166         pwm_ef: pwm@86c0 {
 167                 compatible = "amlogic,meson-gxbb-pwm";
 168                 reg = <0x0 0x086c0 0x0 0x10>;
 169                 #pwm-cells = <3>;
 170                 status = "disabled";
 171         };
 172
 173         uart_C: serial@8700 {
 174                 compatible = "amlogic,meson-uart";
 175                 reg = <0x0 0x8700 0x0 0x14>;
 176                 interrupts = <GIC_SPI 93 IRQ_TYPE_EDGE_RISING>;
 177                 clocks = <&xtal>;
 178                 status = "disabled";
 179         };
 180
 181         watchdog@98d0 {
 182                 compatible = "amlogic,meson-gxbb-wdt";
 183                 reg = <0x0 0x098d0 0x0 0x10>;
 184                 clocks = <&xtal>;
 185         };
 186
 187         spifc: spi@8c80 {
 188                 compatible = "amlogic,meson-gxbb-spifc";
 189                 reg = <0x0 0x08c80 0x0 0x80>;
 190                 #address-cells = <1>;
 191                 #size-cells = <0>;
 192                 clocks = <&clkc CLKID_SPI>;
 193                 status = "disabled";
 194         };
 195
 196         i2c_A: i2c@8500 {
 197                 compatible = "amlogic,meson-gxbb-i2c";
 198                 reg = <0x0 0x08500 0x0 0x20>;
 199                 interrupts = <GIC_SPI 21 IRQ_TYPE_EDGE_RISING>;
 200                 clocks = <&clkc CLKID_I2C>;
 201                 #address-cells = <1>;
 202                 #size-cells = <0>;
 203                 status = "disabled";
 204         };
 205
 206         i2c_B: i2c@87c0 {
 207                 compatible = "amlogic,meson-gxbb-i2c";
 208                 reg = <0x0 0x087c0 0x0 0x20>;
 209                 interrupts = <GIC_SPI 214 IRQ_TYPE_EDGE_RISING>;
 210                 clocks = <&clkc CLKID_I2C>;
 211                 #address-cells = <1>;
 212                 #size-cells = <0>;
 213                 status = "disabled";
 214         };
 215
 216         i2c_C: i2c@87e0 {
 217                 compatible = "amlogic,meson-gxbb-i2c";
 218                 reg = <0x0 0x087e0 0x0 0x20>;
 219                 interrupts = <GIC_SPI 215 IRQ_TYPE_EDGE_RISING>;
 220                 clocks = <&clkc CLKID_I2C>;
 221                 #address-cells = <1>;
 222                 #size-cells = <0>;
 223                 status = "disabled";
 224         };
 225 };
 226
 227 &aobus {
 228         pinctrl_aobus: pinctrl@14 {
 229                 compatible = "amlogic,meson-gxbb-aobus-pinctrl";
 230                 #address-cells = <2>;
 231                 #size-cells = <2>;
 232                 ranges;
 233
 234                 gpio_ao: bank@14 {
 235                         reg = <0x0 0x00014 0x0 0x8>,
 236                               <0x0 0x0002c 0x0 0x4>,
 237                               <0x0 0x00024 0x0 0x8>;
 238                         reg-names = "mux", "pull", "gpio";
 239                         gpio-controller;
 240                         #gpio-cells = <2>;
 241                 };
 242
 243                 uart_ao_a_pins: uart_ao_a {
 244                         mux {
 245                                 groups = "uart_tx_ao_a", "uart_rx_ao_a";
 246                                 function = "uart_ao";
 247                         };
 248                 };
 249
 250                 remote_input_ao_pins: remote_input_ao {
 251                         mux {
 252                                 groups = "remote_input_ao";
 253                                 function = "remote_input_ao";
 254                         };
 255                 };
 256
 257                 i2c_ao_pins: i2c_ao {
 258                         mux {
 259                                 groups = "i2c_sck_ao",
 260                                        "i2c_sda_ao";
 261                                 function = "i2c_ao";
 262                         };
 263                 };
 264
 265                 pwm_ao_a_3_pins: pwm_ao_a_3 {
 266                         mux {
 267                                 groups = "pwm_ao_a_3";
 268                                 function = "pwm_ao_a_3";
 269                         };
 270                 };
 271
 272                 pwm_ao_a_6_pins: pwm_ao_a_6 {
 273                         mux {
 274                                 groups = "pwm_ao_a_6";
 275                                 function = "pwm_ao_a_6";
 276                         };
 277                 };
 278
 279                 pwm_ao_a_12_pins: pwm_ao_a_12 {
 280                         mux {
 281                                 groups = "pwm_ao_a_12";
 282                                 function = "pwm_ao_a_12";
 283                         };
 284                 };
 285
 286                 pwm_ao_b_pins: pwm_ao_b {
 287                         mux {
 288                                 groups = "pwm_ao_b";
 289                                 function = "pwm_ao_b";
 290                         };
 291                 };
 292         };
 293
 294         clkc_AO: clock-controller@040 {
 295                 compatible = "amlogic,gxbb-aoclkc";
 296                 reg = <0x0 0x00040 0x0 0x4>;
 297                 #clock-cells = <1>;
 298                 #reset-cells = <1>;
 299         };
 300
 301         ir: ir@580 {
 302                 compatible = "amlogic,meson-gxbb-ir";
 303                 reg = <0x0 0x00580 0x0 0x40>;
 304                 interrupts = <GIC_SPI 196 IRQ_TYPE_EDGE_RISING>;
 305                 status = "disabled";
 306         };
 307
 308         pwm_ab_AO: pwm@550 {
 309                 compatible = "amlogic,meson-gxbb-pwm";
 310                 reg = <0x0 0x0550 0x0 0x10>;
 311                 #pwm-cells = <3>;
 312                 status = "disabled";
 313         };
 314
 315         i2c_AO: i2c@500 {
 316                 compatible = "amlogic,meson-gxbb-i2c";
 317                 reg = <0x0 0x500 0x0 0x20>;
 318                 interrupts = <GIC_SPI 195 IRQ_TYPE_EDGE_RISING>;
 319                 clocks = <&clkc CLKID_AO_I2C>;
 320                 #address-cells = <1>;
 321                 #size-cells = <0>;
 322                 status = "disabled";
 323         };
 324 };
 325
 326 &periphs {
 327         rng {
 328                 compatible = "amlogic,meson-rng";
 329                 reg = <0x0 0x0 0x0 0x4>;
 330         };
 331
 332         pinctrl_periphs: pinctrl@4b0 {
 333                 compatible = "amlogic,meson-gxbb-periphs-pinctrl";
 334                 #address-cells = <2>;
 335                 #size-cells = <2>;
 336                 ranges;
 337
 338                 gpio: bank@4b0 {
 339                         reg = <0x0 0x004b0 0x0 0x28>,
 340                               <0x0 0x004e8 0x0 0x14>,
 341                               <0x0 0x00120 0x0 0x14>,
 342                               <0x0 0x00430 0x0 0x40>;
 343                         reg-names = "mux", "pull", "pull-enable", "gpio";
 344                         gpio-controller;
 345                         #gpio-cells = <2>;
 346                 };
 347
 348                 emmc_pins: emmc {
 349                         mux {
 350                                 groups = "emmc_nand_d07",
 351                                        "emmc_cmd",
 352                                        "emmc_clk";
 353                                 function = "emmc";
 354                         };
 355                 };
 356
 357                 nor_pins: nor {
 358                         mux {
 359                                 groups = "nor_d",
 360                                        "nor_q",
 361                                        "nor_c",
 362                                        "nor_cs";
 363                                 function = "nor";
 364                         };
 365                 };
 366
 367                 sdcard_pins: sdcard {
 368                         mux {
 369                                 groups = "sdcard_d0",
 370                                        "sdcard_d1",
 371                                        "sdcard_d2",
 372                                        "sdcard_d3",
 373                                        "sdcard_cmd",
 374                                        "sdcard_clk";
 375                                 function = "sdcard";
 376                         };
 377                 };
 378
 379                 sdio_pins: sdio {
 380                         mux {
 381                                 groups = "sdio_d0",
 382                                        "sdio_d1",
 383                                        "sdio_d2",
 384                                        "sdio_d3",
 385                                        "sdio_cmd",
 386                                        "sdio_clk";
 387                                 function = "sdio";
 388                         };
 389                 };
 390
 391                 sdio_irq_pins: sdio_irq {
 392                         mux {
 393                                 groups = "sdio_irq";
 394                                 function = "sdio";
 395                         };
 396                 };
 397
 398                 uart_a_pins: uart_a {
 399                         mux {
 400                                 groups = "uart_tx_a",
 401                                        "uart_rx_a";
 402                                 function = "uart_a";
 403                         };
 404                 };
 405
 406                 uart_b_pins: uart_b {
 407                         mux {
 408                                 groups = "uart_tx_b",
 409                                        "uart_rx_b";
 410                                 function = "uart_b";
 411                         };
 412                 };
 413
 414                 uart_c_pins: uart_c {
 415                         mux {
 416                                 groups = "uart_tx_c",
 417                                        "uart_rx_c";
 418                                 function = "uart_c";
 419                         };
 420                 };
 421
 422                 i2c_a_pins: i2c_a {
 423                         mux {
 424                                 groups = "i2c_sck_a",
 425                                        "i2c_sda_a";
 426                                 function = "i2c_a";
 427                         };
 428                 };
 429
 430                 i2c_b_pins: i2c_b {
 431                         mux {
 432                                 groups = "i2c_sck_b",
 433                                        "i2c_sda_b";
 434                                 function = "i2c_b";
 435                         };
 436                 };
 437
 438                 i2c_c_pins: i2c_c {
 439                         mux {
 440                                 groups = "i2c_sck_c",
 441                                        "i2c_sda_c";
 442                                 function = "i2c_c";
 443                         };
 444                 };
 445
 446                 eth_pins: eth_c {
 447                         mux {
 448                                 groups = "eth_mdio",
 449                                        "eth_mdc",
 450                                        "eth_clk_rx_clk",
 451                                        "eth_rx_dv",
 452                                        "eth_rxd0",
 453                                        "eth_rxd1",
 454                                        "eth_rxd2",
 455                                        "eth_rxd3",
 456                                        "eth_rgmii_tx_clk",
 457                                        "eth_tx_en",
 458                                        "eth_txd0",
 459                                        "eth_txd1",
 460                                        "eth_txd2",
 461                                        "eth_txd3";
 462                                 function = "eth";
 463                         };
 464                 };
 465
 466                 pwm_a_x_pins: pwm_a_x {
 467                         mux {
 468                                 groups = "pwm_a_x";
 469                                 function = "pwm_a_x";
 470                         };
 471                 };
 472
 473                 pwm_a_y_pins: pwm_a_y {
 474                         mux {
 475                                 groups = "pwm_a_y";
 476                                 function = "pwm_a_y";
 477                         };
 478                 };
 479
 480                 pwm_b_pins: pwm_b {
 481                         mux {
 482                                 groups = "pwm_b";
 483                                 function = "pwm_b";
 484                         };
 485                 };
 486
 487                 pwm_d_pins: pwm_d {
 488                         mux {
 489                                 groups = "pwm_d";
 490                                 function = "pwm_d";
 491                         };
 492                 };
 493
 494                 pwm_e_pins: pwm_e {
 495                         mux {
 496                                 groups = "pwm_e";
 497                                 function = "pwm_e";
 498                         };
 499                 };
 500
 501                 pwm_f_x_pins: pwm_f_x {
 502                         mux {
 503                                 groups = "pwm_f_x";
 504                                 function = "pwm_f_x";
 505                         };
 506                 };
 507
 508                 pwm_f_y_pins: pwm_f_y {
 509                         mux {
 510                                 groups = "pwm_f_y";
 511                                 function = "pwm_f_y";
 512                         };
 513                 };
 514         };
 515 };
 516
 517 &hiubus {
 518         clkc: clock-controller@0 {
 519                 compatible = "amlogic,gxbb-clkc";
 520                 #clock-cells = <1>;
 521                 reg = <0x0 0x0 0x0 0x3db>;
 522         };
 523
 524         mailbox: mailbox@404 {
 525                 compatible = "amlogic,meson-gxbb-mhu";
 526                 reg = <0 0x404 0 0x4c>;
 527                 interrupts = <0 208 IRQ_TYPE_EDGE_RISING>,
 528                              <0 209 IRQ_TYPE_EDGE_RISING>,
 529                              <0 210 IRQ_TYPE_EDGE_RISING>;
 530                 #mbox-cells = <1>;
 531         };
 532 };