2 * ARM Ltd. Juno Platform
4 * Copyright (c) 2015 ARM Ltd.
6 * This file is licensed under a dual GPLv2 or BSD license.
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
14 model = "ARM Juno development board (r1)";
15 compatible = "arm,juno-r1", "arm,juno", "arm,vexpress";
16 interrupt-parent = <&gic>;
25 stdout-path = "serial0:115200n8";
29 compatible = "arm,psci-0.2";
38 compatible = "arm,cortex-a57","arm,armv8";
41 enable-method = "psci";
42 next-level-cache = <&A57_L2>;
46 compatible = "arm,cortex-a57","arm,armv8";
49 enable-method = "psci";
50 next-level-cache = <&A57_L2>;
54 compatible = "arm,cortex-a53","arm,armv8";
57 enable-method = "psci";
58 next-level-cache = <&A53_L2>;
62 compatible = "arm,cortex-a53","arm,armv8";
65 enable-method = "psci";
66 next-level-cache = <&A53_L2>;
70 compatible = "arm,cortex-a53","arm,armv8";
73 enable-method = "psci";
74 next-level-cache = <&A53_L2>;
78 compatible = "arm,cortex-a53","arm,armv8";
81 enable-method = "psci";
82 next-level-cache = <&A53_L2>;
95 compatible = "arm,armv8-pmuv3";
96 interrupts = <GIC_SPI 02 IRQ_TYPE_LEVEL_HIGH>,
97 <GIC_SPI 06 IRQ_TYPE_LEVEL_HIGH>,
98 <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
99 <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>,
100 <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>,
101 <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
102 interrupt-affinity = <&A57_0>,
110 #include "juno-base.dtsi"