2 * Device Tree Source for the r8a77995 SoC
4 * Copyright (C) 2016 Renesas Electronics Corp.
5 * Copyright (C) 2017 Glider bvba
7 * This file is licensed under the terms of the GNU General Public License
8 * version 2. This program is licensed "as is" without any warranty of any
9 * kind, whether express or implied.
12 #include <dt-bindings/clock/r8a77995-cpg-mssr.h>
13 #include <dt-bindings/interrupt-controller/arm-gic.h>
14 #include <dt-bindings/power/r8a77995-sysc.h>
17 compatible = "renesas,r8a77995";
22 compatible = "arm,psci-1.0", "arm,psci-0.2";
31 compatible = "arm,cortex-a53", "arm,armv8";
34 power-domains = <&sysc R8A77995_PD_CA53_CPU0>;
35 next-level-cache = <&L2_CA53>;
36 enable-method = "psci";
39 L2_CA53: cache-controller-1 {
41 power-domains = <&sysc R8A77995_PD_CA53_SCU>;
48 compatible = "fixed-clock";
50 /* This value must be overridden by the board */
51 clock-frequency = <0>;
55 compatible = "fixed-clock";
57 clock-frequency = <0>;
61 compatible = "simple-bus";
62 interrupt-parent = <&gic>;
67 gic: interrupt-controller@f1010000 {
68 compatible = "arm,gic-400";
69 #interrupt-cells = <3>;
72 reg = <0x0 0xf1010000 0 0x1000>,
73 <0x0 0xf1020000 0 0x20000>,
74 <0x0 0xf1040000 0 0x20000>,
75 <0x0 0xf1060000 0 0x20000>;
76 interrupts = <GIC_PPI 9
77 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_HIGH)>;
78 clocks = <&cpg CPG_MOD 408>;
80 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
85 compatible = "arm,armv8-timer";
86 interrupts = <GIC_PPI 13
87 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,
89 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,
91 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,
93 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>;
96 rwdt: watchdog@e6020000 {
97 compatible = "renesas,r8a77995-wdt",
98 "renesas,rcar-gen3-wdt";
99 reg = <0 0xe6020000 0 0x0c>;
100 clocks = <&cpg CPG_MOD 402>;
101 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
107 compatible = "arm,cortex-a53-pmu";
108 interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
111 cpg: clock-controller@e6150000 {
112 compatible = "renesas,r8a77995-cpg-mssr";
113 reg = <0 0xe6150000 0 0x1000>;
114 clocks = <&extal_clk>;
115 clock-names = "extal";
117 #power-domain-cells = <0>;
121 rst: reset-controller@e6160000 {
122 compatible = "renesas,r8a77995-rst";
123 reg = <0 0xe6160000 0 0x0200>;
126 pfc: pin-controller@e6060000 {
127 compatible = "renesas,pfc-r8a77995";
128 reg = <0 0xe6060000 0 0x508>;
131 prr: chipid@fff00044 {
132 compatible = "renesas,prr";
133 reg = <0 0xfff00044 0 4>;
136 sysc: system-controller@e6180000 {
137 compatible = "renesas,r8a77995-sysc";
138 reg = <0 0xe6180000 0 0x0400>;
139 #power-domain-cells = <1>;
142 intc_ex: interrupt-controller@e61c0000 {
143 compatible = "renesas,intc-ex-r8a77995", "renesas,irqc";
144 #interrupt-cells = <2>;
145 interrupt-controller;
146 reg = <0 0xe61c0000 0 0x200>;
147 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH
148 GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH
149 GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH
150 GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH
151 GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH
152 GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
153 clocks = <&cpg CPG_MOD 407>;
154 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
158 gpio0: gpio@e6050000 {
159 compatible = "renesas,gpio-r8a77995",
160 "renesas,rcar-gen3-gpio",
162 reg = <0 0xe6050000 0 0x50>;
163 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
166 gpio-ranges = <&pfc 0 0 9>;
167 #interrupt-cells = <2>;
168 interrupt-controller;
169 clocks = <&cpg CPG_MOD 912>;
170 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
174 gpio1: gpio@e6051000 {
175 compatible = "renesas,gpio-r8a77995",
176 "renesas,rcar-gen3-gpio",
178 reg = <0 0xe6051000 0 0x50>;
179 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
182 gpio-ranges = <&pfc 0 32 32>;
183 #interrupt-cells = <2>;
184 interrupt-controller;
185 clocks = <&cpg CPG_MOD 911>;
186 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
190 gpio2: gpio@e6052000 {
191 compatible = "renesas,gpio-r8a77995",
192 "renesas,rcar-gen3-gpio",
194 reg = <0 0xe6052000 0 0x50>;
195 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
198 gpio-ranges = <&pfc 0 64 32>;
199 #interrupt-cells = <2>;
200 interrupt-controller;
201 clocks = <&cpg CPG_MOD 910>;
202 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
206 gpio3: gpio@e6053000 {
207 compatible = "renesas,gpio-r8a77995",
208 "renesas,rcar-gen3-gpio",
210 reg = <0 0xe6053000 0 0x50>;
211 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
214 gpio-ranges = <&pfc 0 96 10>;
215 #interrupt-cells = <2>;
216 interrupt-controller;
217 clocks = <&cpg CPG_MOD 909>;
218 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
222 gpio4: gpio@e6054000 {
223 compatible = "renesas,gpio-r8a77995",
224 "renesas,rcar-gen3-gpio",
226 reg = <0 0xe6054000 0 0x50>;
227 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
230 gpio-ranges = <&pfc 0 128 32>;
231 #interrupt-cells = <2>;
232 interrupt-controller;
233 clocks = <&cpg CPG_MOD 908>;
234 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
238 gpio5: gpio@e6055000 {
239 compatible = "renesas,gpio-r8a77995",
240 "renesas,rcar-gen3-gpio",
242 reg = <0 0xe6055000 0 0x50>;
243 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
246 gpio-ranges = <&pfc 0 160 21>;
247 #interrupt-cells = <2>;
248 interrupt-controller;
249 clocks = <&cpg CPG_MOD 907>;
250 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
254 gpio6: gpio@e6055400 {
255 compatible = "renesas,gpio-r8a77995",
256 "renesas,rcar-gen3-gpio",
258 reg = <0 0xe6055400 0 0x50>;
259 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
262 gpio-ranges = <&pfc 0 192 14>;
263 #interrupt-cells = <2>;
264 interrupt-controller;
265 clocks = <&cpg CPG_MOD 906>;
266 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
270 avb: ethernet@e6800000 {
271 compatible = "renesas,etheravb-r8a77995",
272 "renesas,etheravb-rcar-gen3";
273 reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>;
274 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
275 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
276 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
277 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
278 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
279 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
280 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
281 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
282 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
283 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
284 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
285 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
286 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
287 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
288 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
289 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
290 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
291 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
292 <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
293 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
294 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
295 <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
296 <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
297 <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
298 <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
299 interrupt-names = "ch0", "ch1", "ch2", "ch3",
300 "ch4", "ch5", "ch6", "ch7",
301 "ch8", "ch9", "ch10", "ch11",
302 "ch12", "ch13", "ch14", "ch15",
303 "ch16", "ch17", "ch18", "ch19",
304 "ch20", "ch21", "ch22", "ch23",
306 clocks = <&cpg CPG_MOD 812>;
307 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
309 phy-mode = "rgmii-txid";
310 #address-cells = <1>;
315 scif2: serial@e6e88000 {
316 compatible = "renesas,scif-r8a77995",
317 "renesas,rcar-gen3-scif", "renesas,scif";
318 reg = <0 0xe6e88000 0 64>;
319 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
320 clocks = <&cpg CPG_MOD 310>,
321 <&cpg CPG_CORE R8A77995_CLK_S3D1C>,
323 clock-names = "fck", "brg_int", "scif_clk";
324 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
330 compatible = "renesas,pwm-r8a77995", "renesas,pwm-rcar";
331 reg = <0 0xe6e30000 0 0x8>;
333 clocks = <&cpg CPG_MOD 523>;
334 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
340 compatible = "renesas,pwm-r8a77995", "renesas,pwm-rcar";
341 reg = <0 0xe6e31000 0 0x8>;
343 clocks = <&cpg CPG_MOD 523>;
344 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
350 compatible = "renesas,pwm-r8a77995", "renesas,pwm-rcar";
351 reg = <0 0xe6e32000 0 0x8>;
353 clocks = <&cpg CPG_MOD 523>;
354 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
360 compatible = "renesas,pwm-r8a77995", "renesas,pwm-rcar";
361 reg = <0 0xe6e33000 0 0x8>;
363 clocks = <&cpg CPG_MOD 523>;
364 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
369 ehci0: usb@ee080100 {
370 compatible = "generic-ehci";
371 reg = <0 0xee080100 0 0x100>;
372 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
373 clocks = <&cpg CPG_MOD 703>;
376 companion = <&ohci0>;
377 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
382 ohci0: usb@ee080000 {
383 compatible = "generic-ohci";
384 reg = <0 0xee080000 0 0x100>;
385 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
386 clocks = <&cpg CPG_MOD 703>;
389 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
394 usb2_phy0: usb-phy@ee080200 {
395 compatible = "renesas,usb2-phy-r8a77995",
396 "renesas,rcar-gen3-usb2-phy";
397 reg = <0 0xee080200 0 0x700>;
398 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
399 clocks = <&cpg CPG_MOD 703>;
400 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;