1 #ifndef __ASM_ALTERNATIVE_H
2 #define __ASM_ALTERNATIVE_H
4 #include <asm/cpufeature.h>
8 #include <linux/init.h>
9 #include <linux/kconfig.h>
10 #include <linux/types.h>
11 #include <linux/stddef.h>
12 #include <linux/stringify.h>
15 s32 orig_offset
; /* offset to original instruction */
16 s32 alt_offset
; /* offset to replacement instruction */
17 u16 cpufeature
; /* cpufeature bit set for replacement */
18 u8 orig_len
; /* size of original instruction(s) */
19 u8 alt_len
; /* size of new instruction(s), <= orig_len */
22 void __init
apply_alternatives_all(void);
23 void apply_alternatives(void *start
, size_t length
);
25 #define ALTINSTR_ENTRY(feature) \
26 " .word 661b - .\n" /* label */ \
27 " .word 663f - .\n" /* new instruction */ \
28 " .hword " __stringify(feature) "\n" /* feature bit */ \
29 " .byte 662b-661b\n" /* source len */ \
30 " .byte 664f-663f\n" /* replacement len */
33 * alternative assembly primitive:
35 * If any of these .org directive fail, it means that insn1 and insn2
36 * don't have the same length. This used to be written as
38 * .if ((664b-663b) != (662b-661b))
39 * .error "Alternatives instruction length mismatch"
42 * but most assemblers die if insn1 or insn2 have a .inst. This should
43 * be fixed in a binutils release posterior to 2.25.51.0.2 (anything
44 * containing commit 4e4d08cf7399b606 or c1baaddf8861).
46 #define __ALTERNATIVE_CFG(oldinstr, newinstr, feature, cfg_enabled) \
47 ".if "__stringify(cfg_enabled)" == 1\n" \
51 ".pushsection .altinstructions,\"a\"\n" \
52 ALTINSTR_ENTRY(feature) \
54 ".pushsection .altinstr_replacement, \"a\"\n" \
59 ".org . - (664b-663b) + (662b-661b)\n\t" \
60 ".org . - (662b-661b) + (664b-663b)\n" \
63 #define _ALTERNATIVE_CFG(oldinstr, newinstr, feature, cfg, ...) \
64 __ALTERNATIVE_CFG(oldinstr, newinstr, feature, IS_ENABLED(cfg))
68 #include <asm/assembler.h>
70 .macro altinstruction_entry orig_offset alt_offset feature orig_len alt_len
71 .word \orig_offset
- .
78 .macro alternative_insn insn1
, insn2
, cap
, enable
= 1
81 662: .pushsection
.altinstructions
, "a"
82 altinstruction_entry
661b
, 663f
, \cap
, 662b
-661b
, 664f
-663f
84 .pushsection
.altinstr_replacement
, "ax"
87 .org
. - (664b
-663b
) + (662b
-661b
)
88 .org
. - (662b
-661b
) + (664b
-663b
)
93 * Begin an alternative code sequence.
95 * The code that follows this macro will be assembled and linked as
96 * normal. There are no restrictions on this code.
98 .macro alternative_if_not cap
, enable
= 1
100 .pushsection
.altinstructions
, "a"
101 altinstruction_entry
661f
, 663f
, \cap
, 662f
-661f
, 664f
-663f
108 * Provide the alternative code sequence.
110 * The code that follows this macro is assembled into a special
111 * section to be used for dynamic patching. Code that follows this
114 * 1. Be exactly the same length (in bytes) as the default code
117 * 2. Not contain a branch target that is used outside of the
118 * alternative sequence it is defined in (branches into an
119 * alternative sequence are not fixed up).
121 .macro alternative_else
, enable
= 1
123 662: .pushsection
.altinstr_replacement
, "ax"
129 * Complete an alternative code sequence.
131 .macro alternative_endif
, enable
= 1
134 .org
. - (664b
-663b
) + (662b
-661b
)
135 .org
. - (662b
-661b
) + (664b
-663b
)
139 #define _ALTERNATIVE_CFG(insn1, insn2, cap, cfg, ...) \
140 alternative_insn insn1, insn2, cap, IS_ENABLED(cfg)
144 * Generate the assembly for UAO alternatives with exception table entries.
145 * This is complicated as there is no post-increment or pair versions of the
146 * unprivileged instructions, and USER() only works for single instructions.
148 #ifdef CONFIG_ARM64_UAO
149 .macro uao_ldp l
, reg1
, reg2
, addr
, post_inc
150 alternative_if_not ARM64_HAS_UAO
151 8888: ldp
\reg
1, \reg
2, [\addr
], \post_inc
;
156 ldtr
\reg
2, [\addr
, #8];
157 add
\addr
, \addr
, \post_inc
;
160 _asm_extable
8888b
,\l
;
161 _asm_extable
8889b
,\l
;
164 .macro uao_stp l
, reg1
, reg2
, addr
, post_inc
165 alternative_if_not ARM64_HAS_UAO
166 8888: stp
\reg
1, \reg
2, [\addr
], \post_inc
;
171 sttr
\reg
2, [\addr
, #8];
172 add
\addr
, \addr
, \post_inc
;
175 _asm_extable
8888b
,\l
;
176 _asm_extable
8889b
,\l
;
179 .macro uao_user_alternative l
, inst
, alt_inst
, reg
, addr
, post_inc
180 alternative_if_not ARM64_HAS_UAO
181 8888: \inst
\reg
, [\addr
], \post_inc
;
184 \alt_inst
\reg
, [\addr
];
185 add
\addr
, \addr
, \post_inc
;
188 _asm_extable
8888b
,\l
;
191 .macro uao_ldp l
, reg1
, reg2
, addr
, post_inc
192 USER(\l
, ldp
\reg
1, \reg
2, [\addr
], \post_inc
)
194 .macro uao_stp l
, reg1
, reg2
, addr
, post_inc
195 USER(\l
, stp
\reg
1, \reg
2, [\addr
], \post_inc
)
197 .macro uao_user_alternative l
, inst
, alt_inst
, reg
, addr
, post_inc
198 USER(\l
, \inst
\reg
, [\addr
], \post_inc
)
202 #endif /* __ASSEMBLY__ */
205 * Usage: asm(ALTERNATIVE(oldinstr, newinstr, feature));
207 * Usage: asm(ALTERNATIVE(oldinstr, newinstr, feature, CONFIG_FOO));
208 * N.B. If CONFIG_FOO is specified, but not selected, the whole block
209 * will be omitted, including oldinstr.
211 #define ALTERNATIVE(oldinstr, newinstr, ...) \
212 _ALTERNATIVE_CFG(oldinstr, newinstr, __VA_ARGS__, 1)
214 #endif /* __ASM_ALTERNATIVE_H */