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2 * Copyright (C) 2012 ARM Ltd.
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
13 * You should have received a copy of the GNU General Public License
14 * along with this program. If not, see <http://www.gnu.org/licenses/>.
16 #ifndef __ASM_PGTABLE_H
17 #define __ASM_PGTABLE_H
20 #include <asm/proc-fns.h>
22 #include <asm/memory.h>
23 #include <asm/pgtable-hwdef.h>
24 #include <asm/pgtable-prot.h>
29 * VMALLOC_START: beginning of the kernel vmalloc space
30 * VMALLOC_END: extends to the available space below vmmemmap, PCI I/O space
33 #define VMALLOC_START (MODULES_END)
34 #define VMALLOC_END (PAGE_OFFSET - PUD_SIZE - VMEMMAP_SIZE - SZ_64K)
36 #define vmemmap ((struct page *)VMEMMAP_START - (memstart_addr >> PAGE_SHIFT))
38 #define FIRST_USER_ADDRESS 0UL
42 #include <asm/cmpxchg.h>
43 #include <asm/fixmap.h>
44 #include <linux/mmdebug.h>
46 extern void __pte_error(const char *file
, int line
, unsigned long val
);
47 extern void __pmd_error(const char *file
, int line
, unsigned long val
);
48 extern void __pud_error(const char *file
, int line
, unsigned long val
);
49 extern void __pgd_error(const char *file
, int line
, unsigned long val
);
52 * ZERO_PAGE is a global shared page that is always zero: used
53 * for zero-mapped memory areas etc..
55 extern unsigned long empty_zero_page
[PAGE_SIZE
/ sizeof(unsigned long)];
56 #define ZERO_PAGE(vaddr) phys_to_page(__pa_symbol(empty_zero_page))
58 #define pte_ERROR(pte) __pte_error(__FILE__, __LINE__, pte_val(pte))
60 #define pte_pfn(pte) ((pte_val(pte) & PHYS_MASK) >> PAGE_SHIFT)
62 #define pfn_pte(pfn,prot) (__pte(((phys_addr_t)(pfn) << PAGE_SHIFT) | pgprot_val(prot)))
64 #define pte_none(pte) (!pte_val(pte))
65 #define pte_clear(mm,addr,ptep) set_pte(ptep, __pte(0))
66 #define pte_page(pte) (pfn_to_page(pte_pfn(pte)))
69 * The following only work if pte_present(). Undefined behaviour otherwise.
71 #define pte_present(pte) (!!(pte_val(pte) & (PTE_VALID | PTE_PROT_NONE)))
72 #define pte_young(pte) (!!(pte_val(pte) & PTE_AF))
73 #define pte_special(pte) (!!(pte_val(pte) & PTE_SPECIAL))
74 #define pte_write(pte) (!!(pte_val(pte) & PTE_WRITE))
75 #define pte_user_exec(pte) (!(pte_val(pte) & PTE_UXN))
76 #define pte_cont(pte) (!!(pte_val(pte) & PTE_CONT))
78 #define pte_cont_addr_end(addr, end) \
79 ({ unsigned long __boundary = ((addr) + CONT_PTE_SIZE) & CONT_PTE_MASK; \
80 (__boundary - 1 < (end) - 1) ? __boundary : (end); \
83 #define pmd_cont_addr_end(addr, end) \
84 ({ unsigned long __boundary = ((addr) + CONT_PMD_SIZE) & CONT_PMD_MASK; \
85 (__boundary - 1 < (end) - 1) ? __boundary : (end); \
88 #define pte_hw_dirty(pte) (pte_write(pte) && !(pte_val(pte) & PTE_RDONLY))
89 #define pte_sw_dirty(pte) (!!(pte_val(pte) & PTE_DIRTY))
90 #define pte_dirty(pte) (pte_sw_dirty(pte) || pte_hw_dirty(pte))
92 #define pte_valid(pte) (!!(pte_val(pte) & PTE_VALID))
94 * Execute-only user mappings do not have the PTE_USER bit set. All valid
95 * kernel mappings have the PTE_UXN bit set.
97 #define pte_valid_not_user(pte) \
98 ((pte_val(pte) & (PTE_VALID | PTE_USER | PTE_UXN)) == (PTE_VALID | PTE_UXN))
99 #define pte_valid_young(pte) \
100 ((pte_val(pte) & (PTE_VALID | PTE_AF)) == (PTE_VALID | PTE_AF))
101 #define pte_valid_user(pte) \
102 ((pte_val(pte) & (PTE_VALID | PTE_USER)) == (PTE_VALID | PTE_USER))
105 * Could the pte be present in the TLB? We must check mm_tlb_flush_pending
106 * so that we don't erroneously return false for pages that have been
107 * remapped as PROT_NONE but are yet to be flushed from the TLB.
109 #define pte_accessible(mm, pte) \
110 (mm_tlb_flush_pending(mm) ? pte_present(pte) : pte_valid_young(pte))
113 * p??_access_permitted() is true for valid user mappings (subject to the
114 * write permission check) other than user execute-only which do not have the
115 * PTE_USER bit set. PROT_NONE mappings do not have the PTE_VALID bit set.
117 #define pte_access_permitted(pte, write) \
118 (pte_valid_user(pte) && (!(write) || pte_write(pte)))
119 #define pmd_access_permitted(pmd, write) \
120 (pte_access_permitted(pmd_pte(pmd), (write)))
121 #define pud_access_permitted(pud, write) \
122 (pte_access_permitted(pud_pte(pud), (write)))
124 static inline pte_t
clear_pte_bit(pte_t pte
, pgprot_t prot
)
126 pte_val(pte
) &= ~pgprot_val(prot
);
130 static inline pte_t
set_pte_bit(pte_t pte
, pgprot_t prot
)
132 pte_val(pte
) |= pgprot_val(prot
);
136 static inline pte_t
pte_wrprotect(pte_t pte
)
138 pte
= clear_pte_bit(pte
, __pgprot(PTE_WRITE
));
139 pte
= set_pte_bit(pte
, __pgprot(PTE_RDONLY
));
143 static inline pte_t
pte_mkwrite(pte_t pte
)
145 pte
= set_pte_bit(pte
, __pgprot(PTE_WRITE
));
146 pte
= clear_pte_bit(pte
, __pgprot(PTE_RDONLY
));
150 static inline pte_t
pte_mkclean(pte_t pte
)
152 return clear_pte_bit(pte
, __pgprot(PTE_DIRTY
));
155 static inline pte_t
pte_mkdirty(pte_t pte
)
157 return set_pte_bit(pte
, __pgprot(PTE_DIRTY
));
160 static inline pte_t
pte_mkold(pte_t pte
)
162 return clear_pte_bit(pte
, __pgprot(PTE_AF
));
165 static inline pte_t
pte_mkyoung(pte_t pte
)
167 return set_pte_bit(pte
, __pgprot(PTE_AF
));
170 static inline pte_t
pte_mkspecial(pte_t pte
)
172 return set_pte_bit(pte
, __pgprot(PTE_SPECIAL
));
175 static inline pte_t
pte_mkcont(pte_t pte
)
177 pte
= set_pte_bit(pte
, __pgprot(PTE_CONT
));
178 return set_pte_bit(pte
, __pgprot(PTE_TYPE_PAGE
));
181 static inline pte_t
pte_mknoncont(pte_t pte
)
183 return clear_pte_bit(pte
, __pgprot(PTE_CONT
));
186 static inline pte_t
pte_mkpresent(pte_t pte
)
188 return set_pte_bit(pte
, __pgprot(PTE_VALID
));
191 static inline pmd_t
pmd_mkcont(pmd_t pmd
)
193 return __pmd(pmd_val(pmd
) | PMD_SECT_CONT
);
196 static inline void set_pte(pte_t
*ptep
, pte_t pte
)
201 * Only if the new pte is valid and kernel, otherwise TLB maintenance
202 * or update_mmu_cache() have the necessary barriers.
204 if (pte_valid_not_user(pte
)) {
211 struct vm_area_struct
;
213 extern void __sync_icache_dcache(pte_t pteval
, unsigned long addr
);
216 * PTE bits configuration in the presence of hardware Dirty Bit Management
217 * (PTE_WRITE == PTE_DBM):
219 * Dirty Writable | PTE_RDONLY PTE_WRITE PTE_DIRTY (sw)
225 * When hardware DBM is not present, the sofware PTE_DIRTY bit is updated via
226 * the page fault mechanism. Checking the dirty status of a pte becomes:
228 * PTE_DIRTY || (PTE_WRITE && !PTE_RDONLY)
230 static inline void set_pte_at(struct mm_struct
*mm
, unsigned long addr
,
231 pte_t
*ptep
, pte_t pte
)
233 if (pte_present(pte
) && pte_user_exec(pte
) && !pte_special(pte
))
234 __sync_icache_dcache(pte
, addr
);
237 * If the existing pte is valid, check for potential race with
238 * hardware updates of the pte (ptep_set_access_flags safely changes
239 * valid ptes without going through an invalid entry).
241 if (pte_valid(*ptep
) && pte_valid(pte
)) {
242 VM_WARN_ONCE(!pte_young(pte
),
243 "%s: racy access flag clearing: 0x%016llx -> 0x%016llx",
244 __func__
, pte_val(*ptep
), pte_val(pte
));
245 VM_WARN_ONCE(pte_write(*ptep
) && !pte_dirty(pte
),
246 "%s: racy dirty state clearing: 0x%016llx -> 0x%016llx",
247 __func__
, pte_val(*ptep
), pte_val(pte
));
253 #define __HAVE_ARCH_PTE_SAME
254 static inline int pte_same(pte_t pte_a
, pte_t pte_b
)
258 lhs
= pte_val(pte_a
);
259 rhs
= pte_val(pte_b
);
261 if (pte_present(pte_a
))
264 if (pte_present(pte_b
))
271 * Huge pte definitions.
273 #define pte_huge(pte) (!(pte_val(pte) & PTE_TABLE_BIT))
274 #define pte_mkhuge(pte) (__pte(pte_val(pte) & ~PTE_TABLE_BIT))
277 * Hugetlb definitions.
279 #define HUGE_MAX_HSTATE 4
280 #define HPAGE_SHIFT PMD_SHIFT
281 #define HPAGE_SIZE (_AC(1, UL) << HPAGE_SHIFT)
282 #define HPAGE_MASK (~(HPAGE_SIZE - 1))
283 #define HUGETLB_PAGE_ORDER (HPAGE_SHIFT - PAGE_SHIFT)
285 #define __HAVE_ARCH_PTE_SPECIAL
287 static inline pte_t
pud_pte(pud_t pud
)
289 return __pte(pud_val(pud
));
292 static inline pmd_t
pud_pmd(pud_t pud
)
294 return __pmd(pud_val(pud
));
297 static inline pte_t
pmd_pte(pmd_t pmd
)
299 return __pte(pmd_val(pmd
));
302 static inline pmd_t
pte_pmd(pte_t pte
)
304 return __pmd(pte_val(pte
));
307 static inline pgprot_t
mk_sect_prot(pgprot_t prot
)
309 return __pgprot(pgprot_val(prot
) & ~PTE_TABLE_BIT
);
312 #ifdef CONFIG_NUMA_BALANCING
314 * See the comment in include/asm-generic/pgtable.h
316 static inline int pte_protnone(pte_t pte
)
318 return (pte_val(pte
) & (PTE_VALID
| PTE_PROT_NONE
)) == PTE_PROT_NONE
;
321 static inline int pmd_protnone(pmd_t pmd
)
323 return pte_protnone(pmd_pte(pmd
));
331 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
332 #define pmd_trans_huge(pmd) (pmd_val(pmd) && !(pmd_val(pmd) & PMD_TABLE_BIT))
333 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
335 #define pmd_present(pmd) pte_present(pmd_pte(pmd))
336 #define pmd_dirty(pmd) pte_dirty(pmd_pte(pmd))
337 #define pmd_young(pmd) pte_young(pmd_pte(pmd))
338 #define pmd_wrprotect(pmd) pte_pmd(pte_wrprotect(pmd_pte(pmd)))
339 #define pmd_mkold(pmd) pte_pmd(pte_mkold(pmd_pte(pmd)))
340 #define pmd_mkwrite(pmd) pte_pmd(pte_mkwrite(pmd_pte(pmd)))
341 #define pmd_mkclean(pmd) pte_pmd(pte_mkclean(pmd_pte(pmd)))
342 #define pmd_mkdirty(pmd) pte_pmd(pte_mkdirty(pmd_pte(pmd)))
343 #define pmd_mkyoung(pmd) pte_pmd(pte_mkyoung(pmd_pte(pmd)))
344 #define pmd_mknotpresent(pmd) (__pmd(pmd_val(pmd) & ~PMD_SECT_VALID))
346 #define pmd_thp_or_huge(pmd) (pmd_huge(pmd) || pmd_trans_huge(pmd))
348 #define __HAVE_ARCH_PMD_WRITE
349 #define pmd_write(pmd) pte_write(pmd_pte(pmd))
351 #define pmd_mkhuge(pmd) (__pmd(pmd_val(pmd) & ~PMD_TABLE_BIT))
353 #define pmd_pfn(pmd) (((pmd_val(pmd) & PMD_MASK) & PHYS_MASK) >> PAGE_SHIFT)
354 #define pfn_pmd(pfn,prot) (__pmd(((phys_addr_t)(pfn) << PAGE_SHIFT) | pgprot_val(prot)))
355 #define mk_pmd(page,prot) pfn_pmd(page_to_pfn(page),prot)
357 #define pud_write(pud) pte_write(pud_pte(pud))
358 #define pud_pfn(pud) (((pud_val(pud) & PUD_MASK) & PHYS_MASK) >> PAGE_SHIFT)
360 #define set_pmd_at(mm, addr, pmdp, pmd) set_pte_at(mm, addr, (pte_t *)pmdp, pmd_pte(pmd))
362 #define __pgprot_modify(prot,mask,bits) \
363 __pgprot((pgprot_val(prot) & ~(mask)) | (bits))
366 * Mark the prot value as uncacheable and unbufferable.
368 #define pgprot_noncached(prot) \
369 __pgprot_modify(prot, PTE_ATTRINDX_MASK, PTE_ATTRINDX(MT_DEVICE_nGnRnE) | PTE_PXN | PTE_UXN)
370 #define pgprot_writecombine(prot) \
371 __pgprot_modify(prot, PTE_ATTRINDX_MASK, PTE_ATTRINDX(MT_NORMAL_NC) | PTE_PXN | PTE_UXN)
372 #define pgprot_device(prot) \
373 __pgprot_modify(prot, PTE_ATTRINDX_MASK, PTE_ATTRINDX(MT_DEVICE_nGnRE) | PTE_PXN | PTE_UXN)
374 #define __HAVE_PHYS_MEM_ACCESS_PROT
376 extern pgprot_t
phys_mem_access_prot(struct file
*file
, unsigned long pfn
,
377 unsigned long size
, pgprot_t vma_prot
);
379 #define pmd_none(pmd) (!pmd_val(pmd))
381 #define pmd_bad(pmd) (!(pmd_val(pmd) & PMD_TABLE_BIT))
383 #define pmd_table(pmd) ((pmd_val(pmd) & PMD_TYPE_MASK) == \
385 #define pmd_sect(pmd) ((pmd_val(pmd) & PMD_TYPE_MASK) == \
388 #if defined(CONFIG_ARM64_64K_PAGES) || CONFIG_PGTABLE_LEVELS < 3
389 #define pud_sect(pud) (0)
390 #define pud_table(pud) (1)
392 #define pud_sect(pud) ((pud_val(pud) & PUD_TYPE_MASK) == \
394 #define pud_table(pud) ((pud_val(pud) & PUD_TYPE_MASK) == \
398 static inline void set_pmd(pmd_t
*pmdp
, pmd_t pmd
)
405 static inline void pmd_clear(pmd_t
*pmdp
)
407 set_pmd(pmdp
, __pmd(0));
410 static inline phys_addr_t
pmd_page_paddr(pmd_t pmd
)
412 return pmd_val(pmd
) & PHYS_MASK
& (s32
)PAGE_MASK
;
415 /* Find an entry in the third-level page table. */
416 #define pte_index(addr) (((addr) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
418 #define pte_offset_phys(dir,addr) (pmd_page_paddr(READ_ONCE(*(dir))) + pte_index(addr) * sizeof(pte_t))
419 #define pte_offset_kernel(dir,addr) ((pte_t *)__va(pte_offset_phys((dir), (addr))))
421 #define pte_offset_map(dir,addr) pte_offset_kernel((dir), (addr))
422 #define pte_offset_map_nested(dir,addr) pte_offset_kernel((dir), (addr))
423 #define pte_unmap(pte) do { } while (0)
424 #define pte_unmap_nested(pte) do { } while (0)
426 #define pte_set_fixmap(addr) ((pte_t *)set_fixmap_offset(FIX_PTE, addr))
427 #define pte_set_fixmap_offset(pmd, addr) pte_set_fixmap(pte_offset_phys(pmd, addr))
428 #define pte_clear_fixmap() clear_fixmap(FIX_PTE)
430 #define pmd_page(pmd) pfn_to_page(__phys_to_pfn(pmd_val(pmd) & PHYS_MASK))
432 /* use ONLY for statically allocated translation tables */
433 #define pte_offset_kimg(dir,addr) ((pte_t *)__phys_to_kimg(pte_offset_phys((dir), (addr))))
436 * Conversion functions: convert a page and protection to a page entry,
437 * and a page entry and page directory to the page they refer to.
439 #define mk_pte(page,prot) pfn_pte(page_to_pfn(page),prot)
441 #if CONFIG_PGTABLE_LEVELS > 2
443 #define pmd_ERROR(pmd) __pmd_error(__FILE__, __LINE__, pmd_val(pmd))
445 #define pud_none(pud) (!pud_val(pud))
446 #define pud_bad(pud) (!(pud_val(pud) & PUD_TABLE_BIT))
447 #define pud_present(pud) pte_present(pud_pte(pud))
449 static inline void set_pud(pud_t
*pudp
, pud_t pud
)
456 static inline void pud_clear(pud_t
*pudp
)
458 set_pud(pudp
, __pud(0));
461 static inline phys_addr_t
pud_page_paddr(pud_t pud
)
463 return pud_val(pud
) & PHYS_MASK
& (s32
)PAGE_MASK
;
466 /* Find an entry in the second-level page table. */
467 #define pmd_index(addr) (((addr) >> PMD_SHIFT) & (PTRS_PER_PMD - 1))
469 #define pmd_offset_phys(dir, addr) (pud_page_paddr(*(dir)) + pmd_index(addr) * sizeof(pmd_t))
470 #define pmd_offset(dir, addr) ((pmd_t *)__va(pmd_offset_phys((dir), (addr))))
472 #define pmd_set_fixmap(addr) ((pmd_t *)set_fixmap_offset(FIX_PMD, addr))
473 #define pmd_set_fixmap_offset(pud, addr) pmd_set_fixmap(pmd_offset_phys(pud, addr))
474 #define pmd_clear_fixmap() clear_fixmap(FIX_PMD)
476 #define pud_page(pud) pfn_to_page(__phys_to_pfn(pud_val(pud) & PHYS_MASK))
478 /* use ONLY for statically allocated translation tables */
479 #define pmd_offset_kimg(dir,addr) ((pmd_t *)__phys_to_kimg(pmd_offset_phys((dir), (addr))))
483 #define pud_page_paddr(pud) ({ BUILD_BUG(); 0; })
485 /* Match pmd_offset folding in <asm/generic/pgtable-nopmd.h> */
486 #define pmd_set_fixmap(addr) NULL
487 #define pmd_set_fixmap_offset(pudp, addr) ((pmd_t *)pudp)
488 #define pmd_clear_fixmap()
490 #define pmd_offset_kimg(dir,addr) ((pmd_t *)dir)
492 #endif /* CONFIG_PGTABLE_LEVELS > 2 */
494 #if CONFIG_PGTABLE_LEVELS > 3
496 #define pud_ERROR(pud) __pud_error(__FILE__, __LINE__, pud_val(pud))
498 #define pgd_none(pgd) (!pgd_val(pgd))
499 #define pgd_bad(pgd) (!(pgd_val(pgd) & 2))
500 #define pgd_present(pgd) (pgd_val(pgd))
502 static inline void set_pgd(pgd_t
*pgdp
, pgd_t pgd
)
508 static inline void pgd_clear(pgd_t
*pgdp
)
510 set_pgd(pgdp
, __pgd(0));
513 static inline phys_addr_t
pgd_page_paddr(pgd_t pgd
)
515 return pgd_val(pgd
) & PHYS_MASK
& (s32
)PAGE_MASK
;
518 /* Find an entry in the frst-level page table. */
519 #define pud_index(addr) (((addr) >> PUD_SHIFT) & (PTRS_PER_PUD - 1))
521 #define pud_offset_phys(dir, addr) (pgd_page_paddr(*(dir)) + pud_index(addr) * sizeof(pud_t))
522 #define pud_offset(dir, addr) ((pud_t *)__va(pud_offset_phys((dir), (addr))))
524 #define pud_set_fixmap(addr) ((pud_t *)set_fixmap_offset(FIX_PUD, addr))
525 #define pud_set_fixmap_offset(pgd, addr) pud_set_fixmap(pud_offset_phys(pgd, addr))
526 #define pud_clear_fixmap() clear_fixmap(FIX_PUD)
528 #define pgd_page(pgd) pfn_to_page(__phys_to_pfn(pgd_val(pgd) & PHYS_MASK))
530 /* use ONLY for statically allocated translation tables */
531 #define pud_offset_kimg(dir,addr) ((pud_t *)__phys_to_kimg(pud_offset_phys((dir), (addr))))
535 #define pgd_page_paddr(pgd) ({ BUILD_BUG(); 0;})
537 /* Match pud_offset folding in <asm/generic/pgtable-nopud.h> */
538 #define pud_set_fixmap(addr) NULL
539 #define pud_set_fixmap_offset(pgdp, addr) ((pud_t *)pgdp)
540 #define pud_clear_fixmap()
542 #define pud_offset_kimg(dir,addr) ((pud_t *)dir)
544 #endif /* CONFIG_PGTABLE_LEVELS > 3 */
546 #define pgd_ERROR(pgd) __pgd_error(__FILE__, __LINE__, pgd_val(pgd))
548 /* to find an entry in a page-table-directory */
549 #define pgd_index(addr) (((addr) >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1))
551 #define pgd_offset_raw(pgd, addr) ((pgd) + pgd_index(addr))
553 #define pgd_offset(mm, addr) (pgd_offset_raw((mm)->pgd, (addr)))
555 /* to find an entry in a kernel page-table-directory */
556 #define pgd_offset_k(addr) pgd_offset(&init_mm, addr)
558 #define pgd_set_fixmap(addr) ((pgd_t *)set_fixmap_offset(FIX_PGD, addr))
559 #define pgd_clear_fixmap() clear_fixmap(FIX_PGD)
561 static inline pte_t
pte_modify(pte_t pte
, pgprot_t newprot
)
563 const pteval_t mask
= PTE_USER
| PTE_PXN
| PTE_UXN
| PTE_RDONLY
|
564 PTE_PROT_NONE
| PTE_VALID
| PTE_WRITE
;
565 /* preserve the hardware dirty information */
566 if (pte_hw_dirty(pte
))
567 pte
= pte_mkdirty(pte
);
568 pte_val(pte
) = (pte_val(pte
) & ~mask
) | (pgprot_val(newprot
) & mask
);
572 static inline pmd_t
pmd_modify(pmd_t pmd
, pgprot_t newprot
)
574 return pte_pmd(pte_modify(pmd_pte(pmd
), newprot
));
577 #define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
578 extern int ptep_set_access_flags(struct vm_area_struct
*vma
,
579 unsigned long address
, pte_t
*ptep
,
580 pte_t entry
, int dirty
);
582 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
583 #define __HAVE_ARCH_PMDP_SET_ACCESS_FLAGS
584 static inline int pmdp_set_access_flags(struct vm_area_struct
*vma
,
585 unsigned long address
, pmd_t
*pmdp
,
586 pmd_t entry
, int dirty
)
588 return ptep_set_access_flags(vma
, address
, (pte_t
*)pmdp
, pmd_pte(entry
), dirty
);
593 * Atomic pte/pmd modifications.
595 #define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
596 static inline int __ptep_test_and_clear_young(pte_t
*ptep
)
600 pte
= READ_ONCE(*ptep
);
603 pte
= pte_mkold(pte
);
604 pte_val(pte
) = cmpxchg_relaxed(&pte_val(*ptep
),
605 pte_val(old_pte
), pte_val(pte
));
606 } while (pte_val(pte
) != pte_val(old_pte
));
608 return pte_young(pte
);
611 static inline int ptep_test_and_clear_young(struct vm_area_struct
*vma
,
612 unsigned long address
,
615 return __ptep_test_and_clear_young(ptep
);
618 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
619 #define __HAVE_ARCH_PMDP_TEST_AND_CLEAR_YOUNG
620 static inline int pmdp_test_and_clear_young(struct vm_area_struct
*vma
,
621 unsigned long address
,
624 return ptep_test_and_clear_young(vma
, address
, (pte_t
*)pmdp
);
626 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
628 #define __HAVE_ARCH_PTEP_GET_AND_CLEAR
629 static inline pte_t
ptep_get_and_clear(struct mm_struct
*mm
,
630 unsigned long address
, pte_t
*ptep
)
632 return __pte(xchg_relaxed(&pte_val(*ptep
), 0));
635 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
636 #define __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR
637 static inline pmd_t
pmdp_huge_get_and_clear(struct mm_struct
*mm
,
638 unsigned long address
, pmd_t
*pmdp
)
640 return pte_pmd(ptep_get_and_clear(mm
, address
, (pte_t
*)pmdp
));
642 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
645 * ptep_set_wrprotect - mark read-only while preserving the hardware update of
648 #define __HAVE_ARCH_PTEP_SET_WRPROTECT
649 static inline void ptep_set_wrprotect(struct mm_struct
*mm
, unsigned long address
, pte_t
*ptep
)
654 * ptep_set_wrprotect() is only called on CoW mappings which are
655 * private (!VM_SHARED) with the pte either read-only (!PTE_WRITE &&
656 * PTE_RDONLY) or writable and software-dirty (PTE_WRITE &&
657 * !PTE_RDONLY && PTE_DIRTY); see is_cow_mapping() and
658 * protection_map[]. There is no race with the hardware update of the
659 * dirty state: clearing of PTE_RDONLY when PTE_WRITE (a.k.a. PTE_DBM)
662 VM_WARN_ONCE(pte_write(*ptep
) && !pte_dirty(*ptep
),
663 "%s: potential race with hardware DBM", __func__
);
664 pte
= READ_ONCE(*ptep
);
667 pte
= pte_wrprotect(pte
);
668 pte_val(pte
) = cmpxchg_relaxed(&pte_val(*ptep
),
669 pte_val(old_pte
), pte_val(pte
));
670 } while (pte_val(pte
) != pte_val(old_pte
));
673 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
674 #define __HAVE_ARCH_PMDP_SET_WRPROTECT
675 static inline void pmdp_set_wrprotect(struct mm_struct
*mm
,
676 unsigned long address
, pmd_t
*pmdp
)
678 ptep_set_wrprotect(mm
, address
, (pte_t
*)pmdp
);
682 extern pgd_t swapper_pg_dir
[PTRS_PER_PGD
];
683 extern pgd_t idmap_pg_dir
[PTRS_PER_PGD
];
686 * Encode and decode a swap entry:
687 * bits 0-1: present (must be zero)
688 * bits 2-7: swap type
689 * bits 8-57: swap offset
690 * bit 58: PTE_PROT_NONE (must be zero)
692 #define __SWP_TYPE_SHIFT 2
693 #define __SWP_TYPE_BITS 6
694 #define __SWP_OFFSET_BITS 50
695 #define __SWP_TYPE_MASK ((1 << __SWP_TYPE_BITS) - 1)
696 #define __SWP_OFFSET_SHIFT (__SWP_TYPE_BITS + __SWP_TYPE_SHIFT)
697 #define __SWP_OFFSET_MASK ((1UL << __SWP_OFFSET_BITS) - 1)
699 #define __swp_type(x) (((x).val >> __SWP_TYPE_SHIFT) & __SWP_TYPE_MASK)
700 #define __swp_offset(x) (((x).val >> __SWP_OFFSET_SHIFT) & __SWP_OFFSET_MASK)
701 #define __swp_entry(type,offset) ((swp_entry_t) { ((type) << __SWP_TYPE_SHIFT) | ((offset) << __SWP_OFFSET_SHIFT) })
703 #define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
704 #define __swp_entry_to_pte(swp) ((pte_t) { (swp).val })
707 * Ensure that there are not more swap files than can be encoded in the kernel
710 #define MAX_SWAPFILES_CHECK() BUILD_BUG_ON(MAX_SWAPFILES_SHIFT > __SWP_TYPE_BITS)
712 extern int kern_addr_valid(unsigned long addr
);
714 #include <asm-generic/pgtable.h>
716 void pgd_cache_init(void);
717 #define pgtable_cache_init pgd_cache_init
720 * On AArch64, the cache coherency is handled via the set_pte_at() function.
722 static inline void update_mmu_cache(struct vm_area_struct
*vma
,
723 unsigned long addr
, pte_t
*ptep
)
726 * We don't do anything here, so there's a very small chance of
727 * us retaking a user fault which we just fixed up. The alternative
728 * is doing a dsb(ishst), but that penalises the fastpath.
732 #define update_mmu_cache_pmd(vma, address, pmd) do { } while (0)
734 #define kc_vaddr_to_offset(v) ((v) & ~VA_START)
735 #define kc_offset_to_vaddr(o) ((o) | VA_START)
737 #endif /* !__ASSEMBLY__ */
739 #endif /* __ASM_PGTABLE_H */