2 * Copyright (C) 2015 - ARM Ltd
3 * Author: Marc Zyngier <marc.zyngier@arm.com>
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
14 * You should have received a copy of the GNU General Public License
15 * along with this program. If not, see <http://www.gnu.org/licenses/>.
20 static void __hyp_text
__activate_traps(struct kvm_vcpu
*vcpu
)
25 * We are about to set CPTR_EL2.TFP to trap all floating point
26 * register accesses to EL2, however, the ARM ARM clearly states that
27 * traps are only taken to EL2 if the operation would not otherwise
28 * trap to EL1. Therefore, always make sure that for 32-bit guests,
29 * we set FPEXC.EN to prevent traps to EL1, when setting the TFP bit.
31 val
= vcpu
->arch
.hcr_el2
;
32 if (!(val
& HCR_RW
)) {
33 write_sysreg(1 << 30, fpexc32_el2
);
36 write_sysreg(val
, hcr_el2
);
37 /* Trap on AArch32 cp15 c15 accesses (EL1 or EL0) */
38 write_sysreg(1 << 15, hstr_el2
);
39 write_sysreg(CPTR_EL2_TTA
| CPTR_EL2_TFP
, cptr_el2
);
40 write_sysreg(vcpu
->arch
.mdcr_el2
, mdcr_el2
);
43 static void __hyp_text
__deactivate_traps(struct kvm_vcpu
*vcpu
)
45 write_sysreg(HCR_RW
, hcr_el2
);
46 write_sysreg(0, hstr_el2
);
47 write_sysreg(read_sysreg(mdcr_el2
) & MDCR_EL2_HPMN_MASK
, mdcr_el2
);
48 write_sysreg(0, cptr_el2
);
51 static void __hyp_text
__activate_vm(struct kvm_vcpu
*vcpu
)
53 struct kvm
*kvm
= kern_hyp_va(vcpu
->kvm
);
54 write_sysreg(kvm
->arch
.vttbr
, vttbr_el2
);
57 static void __hyp_text
__deactivate_vm(struct kvm_vcpu
*vcpu
)
59 write_sysreg(0, vttbr_el2
);
62 static hyp_alternate_select(__vgic_call_save_state
,
63 __vgic_v2_save_state
, __vgic_v3_save_state
,
64 ARM64_HAS_SYSREG_GIC_CPUIF
);
66 static hyp_alternate_select(__vgic_call_restore_state
,
67 __vgic_v2_restore_state
, __vgic_v3_restore_state
,
68 ARM64_HAS_SYSREG_GIC_CPUIF
);
70 static void __hyp_text
__vgic_save_state(struct kvm_vcpu
*vcpu
)
72 __vgic_call_save_state()(vcpu
);
73 write_sysreg(read_sysreg(hcr_el2
) & ~HCR_INT_OVERRIDE
, hcr_el2
);
76 static void __hyp_text
__vgic_restore_state(struct kvm_vcpu
*vcpu
)
80 val
= read_sysreg(hcr_el2
);
81 val
|= HCR_INT_OVERRIDE
;
82 val
|= vcpu
->arch
.irq_lines
;
83 write_sysreg(val
, hcr_el2
);
85 __vgic_call_restore_state()(vcpu
);
88 static int __hyp_text
__guest_run(struct kvm_vcpu
*vcpu
)
90 struct kvm_cpu_context
*host_ctxt
;
91 struct kvm_cpu_context
*guest_ctxt
;
95 vcpu
= kern_hyp_va(vcpu
);
96 write_sysreg(vcpu
, tpidr_el2
);
98 host_ctxt
= kern_hyp_va(vcpu
->arch
.host_cpu_context
);
99 guest_ctxt
= &vcpu
->arch
.ctxt
;
101 __sysreg_save_state(host_ctxt
);
102 __debug_cond_save_host_state(vcpu
);
104 __activate_traps(vcpu
);
107 __vgic_restore_state(vcpu
);
108 __timer_restore_state(vcpu
);
111 * We must restore the 32-bit state before the sysregs, thanks
112 * to Cortex-A57 erratum #852523.
114 __sysreg32_restore_state(vcpu
);
115 __sysreg_restore_state(guest_ctxt
);
116 __debug_restore_state(vcpu
, kern_hyp_va(vcpu
->arch
.debug_ptr
), guest_ctxt
);
118 /* Jump in the fire! */
119 exit_code
= __guest_enter(vcpu
, host_ctxt
);
120 /* And we're baaack! */
122 fp_enabled
= __fpsimd_enabled();
124 __sysreg_save_state(guest_ctxt
);
125 __sysreg32_save_state(vcpu
);
126 __timer_save_state(vcpu
);
127 __vgic_save_state(vcpu
);
129 __deactivate_traps(vcpu
);
130 __deactivate_vm(vcpu
);
132 __sysreg_restore_state(host_ctxt
);
135 __fpsimd_save_state(&guest_ctxt
->gp_regs
.fp_regs
);
136 __fpsimd_restore_state(&host_ctxt
->gp_regs
.fp_regs
);
139 __debug_save_state(vcpu
, kern_hyp_va(vcpu
->arch
.debug_ptr
), guest_ctxt
);
140 __debug_cond_restore_host_state(vcpu
);
145 __alias(__guest_run
) int __kvm_vcpu_run(struct kvm_vcpu
*vcpu
);
147 static const char __hyp_panic_string
[] = "HYP panic:\nPS:%08llx PC:%016llx ESR:%08llx\nFAR:%016llx HPFAR:%016llx PAR:%016llx\nVCPU:%p\n";
149 void __hyp_text __noreturn
__hyp_panic(void)
151 unsigned long str_va
= (unsigned long)__hyp_panic_string
;
152 u64 spsr
= read_sysreg(spsr_el2
);
153 u64 elr
= read_sysreg(elr_el2
);
154 u64 par
= read_sysreg(par_el1
);
156 if (read_sysreg(vttbr_el2
)) {
157 struct kvm_vcpu
*vcpu
;
158 struct kvm_cpu_context
*host_ctxt
;
160 vcpu
= (struct kvm_vcpu
*)read_sysreg(tpidr_el2
);
161 host_ctxt
= kern_hyp_va(vcpu
->arch
.host_cpu_context
);
162 __deactivate_traps(vcpu
);
163 __deactivate_vm(vcpu
);
164 __sysreg_restore_state(host_ctxt
);
167 /* Call panic for real */
168 __hyp_do_panic(hyp_kern_va(str_va
),
170 read_sysreg(esr_el2
), read_sysreg(far_el2
),
171 read_sysreg(hpfar_el2
), par
,
172 (void *)read_sysreg(tpidr_el2
));