1 # SPDX-License-Identifier: GPL-2.0
5 select ARCH_32BIT_OFF_T if !64BIT
6 select ARCH_BINFMT_ELF_STATE if MIPS_FP_SUPPORT
7 select ARCH_HAS_FORTIFY_SOURCE
9 select ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE if !EVA
10 select ARCH_HAS_PTE_SPECIAL if !(32BIT && CPU_HAS_RIXI)
11 select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
12 select ARCH_HAS_UBSAN_SANITIZE_ALL
13 select ARCH_HAS_GCOV_PROFILE_ALL
14 select ARCH_KEEP_MEMBLOCK if DEBUG_KERNEL
15 select ARCH_SUPPORTS_UPROBES
16 select ARCH_USE_BUILTIN_BSWAP
17 select ARCH_USE_CMPXCHG_LOCKREF if 64BIT
18 select ARCH_USE_QUEUED_RWLOCKS
19 select ARCH_USE_QUEUED_SPINLOCKS
20 select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT if MMU
21 select ARCH_WANT_IPC_PARSE_VERSION
22 select BUILDTIME_TABLE_SORT
23 select CLONE_BACKWARDS
24 select CPU_NO_EFFICIENT_FFS if (TARGET_ISA_REV < 1)
25 select CPU_PM if CPU_IDLE
26 select GENERIC_ATOMIC64 if !64BIT
27 select GENERIC_CMOS_UPDATE
28 select GENERIC_CPU_AUTOPROBE
29 select GENERIC_GETTIMEOFDAY
31 select GENERIC_IRQ_PROBE
32 select GENERIC_IRQ_SHOW
33 select GENERIC_ISA_DMA if EISA
34 select GENERIC_LIB_ASHLDI3
35 select GENERIC_LIB_ASHRDI3
36 select GENERIC_LIB_CMPDI2
37 select GENERIC_LIB_LSHRDI3
38 select GENERIC_LIB_UCMPDI2
39 select GENERIC_SCHED_CLOCK if !CAVIUM_OCTEON_SOC
40 select GENERIC_SMP_IDLE_THREAD
41 select GENERIC_TIME_VSYSCALL
42 select GUP_GET_PTE_LOW_HIGH if CPU_MIPS32 && PHYS_ADDR_T_64BIT
43 select HANDLE_DOMAIN_IRQ
44 select HAVE_ARCH_COMPILER_H
45 select HAVE_ARCH_JUMP_LABEL
47 select HAVE_ARCH_MMAP_RND_BITS if MMU
48 select HAVE_ARCH_MMAP_RND_COMPAT_BITS if MMU && COMPAT
49 select HAVE_ARCH_SECCOMP_FILTER
50 select HAVE_ARCH_TRACEHOOK
51 select HAVE_ARCH_TRANSPARENT_HUGEPAGE if CPU_SUPPORTS_HUGEPAGES
52 select HAVE_ASM_MODVERSIONS
53 select HAVE_CBPF_JIT if !64BIT && !CPU_MICROMIPS
54 select HAVE_CONTEXT_TRACKING
56 select HAVE_C_RECORDMCOUNT
57 select HAVE_DEBUG_KMEMLEAK
58 select HAVE_DEBUG_STACKOVERFLOW
59 select HAVE_DMA_CONTIGUOUS
60 select HAVE_DYNAMIC_FTRACE
61 select HAVE_EBPF_JIT if 64BIT && !CPU_MICROMIPS && TARGET_ISA_REV >= 2
62 select HAVE_EXIT_THREAD
64 select HAVE_FTRACE_MCOUNT_RECORD
65 select HAVE_FUNCTION_GRAPH_TRACER
66 select HAVE_FUNCTION_TRACER
67 select HAVE_GCC_PLUGINS
68 select HAVE_GENERIC_VDSO
70 select HAVE_IOREMAP_PROT
71 select HAVE_IRQ_EXIT_ON_IRQ_STACK
72 select HAVE_IRQ_TIME_ACCOUNTING
74 select HAVE_KRETPROBES
75 select HAVE_LD_DEAD_CODE_DATA_ELIMINATION
76 select HAVE_MOD_ARCH_SPECIFIC
79 select HAVE_PERF_EVENTS
80 select HAVE_REGS_AND_STACK_ACCESS_API
82 select HAVE_SPARSE_SYSCALL_NR
83 select HAVE_STACKPROTECTOR
84 select HAVE_SYSCALL_TRACEPOINTS
85 select HAVE_VIRT_CPU_ACCOUNTING_GEN if 64BIT || !SMP
86 select IRQ_FORCED_THREADING
88 select MODULES_USE_ELF_REL if MODULES
89 select MODULES_USE_ELF_RELA if MODULES && 64BIT
90 select PERF_USE_VMALLOC
91 select PCI_MSI_ARCH_FALLBACKS if PCI_MSI
94 select SYSCTL_EXCEPTION_TRACE
97 config MIPS_FIXUP_BIGPHYS_ADDR
105 select SYS_SUPPORTS_32BIT_KERNEL
106 select SYS_SUPPORTS_LITTLE_ENDIAN
107 select SYS_SUPPORTS_ZBOOT
108 select DMA_NONCOHERENT
113 select GENERIC_IRQ_CHIP
114 select BUILTIN_DTB if MIPS_NO_APPENDED_DTB
116 select CPU_SUPPORTS_CPUFREQ
117 select MIPS_EXTERNAL_TIMER
119 menu "Machine selection"
123 default MIPS_GENERIC_KERNEL
125 config MIPS_GENERIC_KERNEL
126 bool "Generic board-agnostic MIPS kernel"
131 select CLKSRC_MIPS_GIC
133 select CPU_MIPSR2_IRQ_EI
134 select CPU_MIPSR2_IRQ_VI
136 select DMA_PERDEV_COHERENT
139 select MIPS_AUTO_PFN_OFFSET
140 select MIPS_CPU_SCACHE
142 select MIPS_L1_CACHE_SHIFT_7
143 select NO_EXCEPT_FILL
144 select PCI_DRIVERS_GENERIC
147 select SYS_HAS_CPU_MIPS32_R1
148 select SYS_HAS_CPU_MIPS32_R2
149 select SYS_HAS_CPU_MIPS32_R6
150 select SYS_HAS_CPU_MIPS64_R1
151 select SYS_HAS_CPU_MIPS64_R2
152 select SYS_HAS_CPU_MIPS64_R6
153 select SYS_SUPPORTS_32BIT_KERNEL
154 select SYS_SUPPORTS_64BIT_KERNEL
155 select SYS_SUPPORTS_BIG_ENDIAN
156 select SYS_SUPPORTS_HIGHMEM
157 select SYS_SUPPORTS_LITTLE_ENDIAN
158 select SYS_SUPPORTS_MICROMIPS
159 select SYS_SUPPORTS_MIPS16
160 select SYS_SUPPORTS_MIPS_CPS
161 select SYS_SUPPORTS_MULTITHREADING
162 select SYS_SUPPORTS_RELOCATABLE
163 select SYS_SUPPORTS_SMARTMIPS
164 select SYS_SUPPORTS_ZBOOT
166 select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
167 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
168 select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
169 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
170 select USB_UHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
171 select USB_UHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
174 Select this to build a kernel which aims to support multiple boards,
175 generally using a flattened device tree passed from the bootloader
176 using the boot protocol defined in the UHI (Unified Hosting
177 Interface) specification.
180 bool "Alchemy processor based machines"
181 select PHYS_ADDR_T_64BIT
185 select DMA_MAYBE_COHERENT # Au1000,1500,1100 aren't, rest is
186 select MIPS_FIXUP_BIGPHYS_ADDR if PCI
187 select SYS_HAS_CPU_MIPS32_R1
188 select SYS_SUPPORTS_32BIT_KERNEL
189 select SYS_SUPPORTS_APM_EMULATION
191 select SYS_SUPPORTS_ZBOOT
195 bool "Texas Instruments AR7"
197 select DMA_NONCOHERENT
201 select NO_EXCEPT_FILL
203 select SYS_HAS_CPU_MIPS32_R1
204 select SYS_HAS_EARLY_PRINTK
205 select SYS_SUPPORTS_32BIT_KERNEL
206 select SYS_SUPPORTS_LITTLE_ENDIAN
207 select SYS_SUPPORTS_MIPS16
208 select SYS_SUPPORTS_ZBOOT_UART16550
211 select HAVE_LEGACY_CLK
213 Support for the Texas Instruments AR7 System-on-a-Chip
214 family: TNETD7100, 7200 and 7300.
217 bool "Atheros AR231x/AR531x SoC support"
220 select DMA_NONCOHERENT
223 select SYS_HAS_CPU_MIPS32_R1
224 select SYS_SUPPORTS_BIG_ENDIAN
225 select SYS_SUPPORTS_32BIT_KERNEL
226 select SYS_HAS_EARLY_PRINTK
228 Support for Atheros AR231x and Atheros AR531x based boards
231 bool "Atheros AR71XX/AR724X/AR913X based boards"
232 select ARCH_HAS_RESET_CONTROLLER
236 select DMA_NONCOHERENT
241 select SYS_HAS_CPU_MIPS32_R2
242 select SYS_HAS_EARLY_PRINTK
243 select SYS_SUPPORTS_32BIT_KERNEL
244 select SYS_SUPPORTS_BIG_ENDIAN
245 select SYS_SUPPORTS_MIPS16
246 select SYS_SUPPORTS_ZBOOT_UART_PROM
248 select USB_EHCI_ROOT_HUB_TT if USB_EHCI_HCD_PLATFORM
250 Support for the Atheros AR71XX/AR724X/AR913X SoCs.
253 bool "Broadcom Generic BMIPS kernel"
254 select ARCH_HAS_RESET_CONTROLLER
255 select ARCH_HAS_SYNC_DMA_FOR_CPU_ALL
256 select ARCH_HAS_PHYS_TO_DMA
258 select NO_EXCEPT_FILL
264 select BCM6345_L1_IRQ
265 select BCM7038_L1_IRQ
266 select BCM7120_L2_IRQ
267 select BRCMSTB_L2_IRQ
269 select DMA_NONCOHERENT
270 select SYS_SUPPORTS_32BIT_KERNEL
271 select SYS_SUPPORTS_LITTLE_ENDIAN
272 select SYS_SUPPORTS_BIG_ENDIAN
273 select SYS_SUPPORTS_HIGHMEM
274 select SYS_HAS_CPU_BMIPS32_3300
275 select SYS_HAS_CPU_BMIPS4350
276 select SYS_HAS_CPU_BMIPS4380
277 select SYS_HAS_CPU_BMIPS5000
279 select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
280 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
281 select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
282 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
283 select HARDIRQS_SW_RESEND
285 Build a generic DT-based kernel image that boots on select
286 BCM33xx cable modem chips, BCM63xx DSL chips, and BCM7xxx set-top
287 box chips. Note that CONFIG_CPU_BIG_ENDIAN/CONFIG_CPU_LITTLE_ENDIAN
288 must be set appropriately for your board.
291 bool "Broadcom BCM47XX based boards"
295 select DMA_NONCOHERENT
298 select SYS_HAS_CPU_MIPS32_R1
299 select NO_EXCEPT_FILL
300 select SYS_SUPPORTS_32BIT_KERNEL
301 select SYS_SUPPORTS_LITTLE_ENDIAN
302 select SYS_SUPPORTS_MIPS16
303 select SYS_SUPPORTS_ZBOOT
304 select SYS_HAS_EARLY_PRINTK
305 select USE_GENERIC_EARLY_PRINTK_8250
307 select LEDS_GPIO_REGISTER
310 select BCM47XX_SSB if !BCM47XX_BCMA
312 Support for BCM47XX based boards
315 bool "Broadcom BCM63XX based boards"
320 select DMA_NONCOHERENT
322 select SYS_SUPPORTS_32BIT_KERNEL
323 select SYS_SUPPORTS_BIG_ENDIAN
324 select SYS_HAS_EARLY_PRINTK
327 select MIPS_L1_CACHE_SHIFT_4
329 select HAVE_LEGACY_CLK
331 Support for BCM63XX based boards
338 select DMA_NONCOHERENT
344 select PCI_GT64XXX_PCI0
345 select SYS_HAS_CPU_NEVADA
346 select SYS_HAS_EARLY_PRINTK
347 select SYS_SUPPORTS_32BIT_KERNEL
348 select SYS_SUPPORTS_64BIT_KERNEL
349 select SYS_SUPPORTS_LITTLE_ENDIAN
350 select USE_GENERIC_EARLY_PRINTK_8250
352 config MACH_DECSTATION
356 select CEVT_R4K if CPU_R4X00
358 select CSRC_R4K if CPU_R4X00
359 select CPU_DADDI_WORKAROUNDS if 64BIT
360 select CPU_R4000_WORKAROUNDS if 64BIT
361 select CPU_R4400_WORKAROUNDS if 64BIT
362 select DMA_NONCOHERENT
365 select SYS_HAS_CPU_R3000
366 select SYS_HAS_CPU_R4X00
367 select SYS_SUPPORTS_32BIT_KERNEL
368 select SYS_SUPPORTS_64BIT_KERNEL
369 select SYS_SUPPORTS_LITTLE_ENDIAN
370 select SYS_SUPPORTS_128HZ
371 select SYS_SUPPORTS_256HZ
372 select SYS_SUPPORTS_1024HZ
373 select MIPS_L1_CACHE_SHIFT_4
375 This enables support for DEC's MIPS based workstations. For details
376 see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the
377 DECstation porting pages on <http://decstation.unix-ag.org/>.
379 If you have one of the following DECstation Models you definitely
380 want to choose R4xx0 for the CPU Type:
387 otherwise choose R3000.
390 bool "Jazz family of machines"
393 select ARCH_MIGHT_HAVE_PC_PARPORT
394 select ARCH_MIGHT_HAVE_PC_SERIO
398 select ARCH_MAY_HAVE_PC_FDC
401 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
402 select GENERIC_ISA_DMA
403 select HAVE_PCSPKR_PLATFORM
408 select SYS_HAS_CPU_R4X00
409 select SYS_SUPPORTS_32BIT_KERNEL
410 select SYS_SUPPORTS_64BIT_KERNEL
411 select SYS_SUPPORTS_100HZ
413 This a family of machines based on the MIPS R4030 chipset which was
414 used by several vendors to build RISC/os and Windows NT workstations.
415 Members include the Acer PICA, MIPS Magnum 4000, MIPS Millennium and
416 Olivetti M700-10 workstations.
418 config MACH_INGENIC_SOC
419 bool "Ingenic SoC based machines"
422 select SYS_SUPPORTS_ZBOOT_UART16550
425 bool "Lantiq based platforms"
426 select DMA_NONCOHERENT
430 select SYS_HAS_CPU_MIPS32_R1
431 select SYS_HAS_CPU_MIPS32_R2
432 select SYS_SUPPORTS_BIG_ENDIAN
433 select SYS_SUPPORTS_32BIT_KERNEL
434 select SYS_SUPPORTS_MIPS16
435 select SYS_SUPPORTS_MULTITHREADING
436 select SYS_SUPPORTS_VPE_LOADER
437 select SYS_HAS_EARLY_PRINTK
442 select HAVE_LEGACY_CLK
445 select PINCTRL_LANTIQ
446 select ARCH_HAS_RESET_CONTROLLER
447 select RESET_CONTROLLER
449 config MACH_LOONGSON32
450 bool "Loongson 32-bit family of machines"
451 select SYS_SUPPORTS_ZBOOT
453 This enables support for the Loongson-1 family of machines.
455 Loongson-1 is a family of 32-bit MIPS-compatible SoCs developed by
456 the Institute of Computing Technology (ICT), Chinese Academy of
459 config MACH_LOONGSON2EF
460 bool "Loongson-2E/F family of machines"
461 select SYS_SUPPORTS_ZBOOT
463 This enables the support of early Loongson-2E/F family of machines.
465 config MACH_LOONGSON64
466 bool "Loongson 64-bit family of machines"
467 select ARCH_SPARSEMEM_ENABLE
468 select ARCH_MIGHT_HAVE_PC_PARPORT
469 select ARCH_MIGHT_HAVE_PC_SERIO
470 select GENERIC_ISA_DMA_SUPPORT_BROKEN
480 select NO_EXCEPT_FILL
481 select NR_CPUS_DEFAULT_64
482 select USE_GENERIC_EARLY_PRINTK_8250
483 select PCI_DRIVERS_GENERIC
484 select SYS_HAS_CPU_LOONGSON64
485 select SYS_HAS_EARLY_PRINTK
486 select SYS_SUPPORTS_SMP
487 select SYS_SUPPORTS_HOTPLUG_CPU
488 select SYS_SUPPORTS_NUMA
489 select SYS_SUPPORTS_64BIT_KERNEL
490 select SYS_SUPPORTS_HIGHMEM
491 select SYS_SUPPORTS_LITTLE_ENDIAN
492 select SYS_SUPPORTS_ZBOOT
493 select SYS_SUPPORTS_RELOCATABLE
500 select PCI_HOST_GENERIC
502 This enables the support of Loongson-2/3 family of machines.
504 Loongson-2 and Loongson-3 are 64-bit general-purpose processors with
505 GS264/GS464/GS464E/GS464V microarchitecture (except old Loongson-2E
506 and Loongson-2F which will be removed), developed by the Institute
507 of Computing Technology (ICT), Chinese Academy of Sciences (CAS).
509 config MACH_PISTACHIO
510 bool "IMG Pistachio SoC based boards"
514 select CLKSRC_MIPS_GIC
517 select DMA_NONCOHERENT
521 select MIPS_CPU_SCACHE
525 select SYS_HAS_CPU_MIPS32_R2
526 select SYS_SUPPORTS_32BIT_KERNEL
527 select SYS_SUPPORTS_LITTLE_ENDIAN
528 select SYS_SUPPORTS_MIPS_CPS
529 select SYS_SUPPORTS_MULTITHREADING
530 select SYS_SUPPORTS_RELOCATABLE
531 select SYS_SUPPORTS_ZBOOT
532 select SYS_HAS_EARLY_PRINTK
533 select USE_GENERIC_EARLY_PRINTK_8250
536 This enables support for the IMG Pistachio SoC platform.
539 bool "MIPS Malta board"
540 select ARCH_MAY_HAVE_PC_FDC
541 select ARCH_MIGHT_HAVE_PC_PARPORT
542 select ARCH_MIGHT_HAVE_PC_SERIO
547 select CLKSRC_MIPS_GIC
550 select DMA_MAYBE_COHERENT
551 select GENERIC_ISA_DMA
552 select HAVE_PCSPKR_PLATFORM
558 select MIPS_CPU_SCACHE
560 select MIPS_L1_CACHE_SHIFT_6
562 select PCI_GT64XXX_PCI0
565 select SYS_HAS_CPU_MIPS32_R1
566 select SYS_HAS_CPU_MIPS32_R2
567 select SYS_HAS_CPU_MIPS32_R3_5
568 select SYS_HAS_CPU_MIPS32_R5
569 select SYS_HAS_CPU_MIPS32_R6
570 select SYS_HAS_CPU_MIPS64_R1
571 select SYS_HAS_CPU_MIPS64_R2
572 select SYS_HAS_CPU_MIPS64_R6
573 select SYS_HAS_CPU_NEVADA
574 select SYS_HAS_CPU_RM7000
575 select SYS_SUPPORTS_32BIT_KERNEL
576 select SYS_SUPPORTS_64BIT_KERNEL
577 select SYS_SUPPORTS_BIG_ENDIAN
578 select SYS_SUPPORTS_HIGHMEM
579 select SYS_SUPPORTS_LITTLE_ENDIAN
580 select SYS_SUPPORTS_MICROMIPS
581 select SYS_SUPPORTS_MIPS16
582 select SYS_SUPPORTS_MIPS_CMP
583 select SYS_SUPPORTS_MIPS_CPS
584 select SYS_SUPPORTS_MULTITHREADING
585 select SYS_SUPPORTS_RELOCATABLE
586 select SYS_SUPPORTS_SMARTMIPS
587 select SYS_SUPPORTS_VPE_LOADER
588 select SYS_SUPPORTS_ZBOOT
590 select WAR_ICACHE_REFILLS
591 select ZONE_DMA32 if 64BIT
593 This enables support for the MIPS Technologies Malta evaluation
597 bool "Microchip PIC32 Family"
599 This enables support for the Microchip PIC32 family of platforms.
601 Microchip PIC32 is a family of general-purpose 32 bit MIPS core
605 bool "NEC VR4100 series based machines"
608 select SYS_HAS_CPU_VR41XX
609 select SYS_SUPPORTS_MIPS16
613 bool "Ralink based machines"
617 select DMA_NONCOHERENT
620 select SYS_HAS_CPU_MIPS32_R1
621 select SYS_HAS_CPU_MIPS32_R2
622 select SYS_SUPPORTS_32BIT_KERNEL
623 select SYS_SUPPORTS_LITTLE_ENDIAN
624 select SYS_SUPPORTS_MIPS16
625 select SYS_SUPPORTS_ZBOOT
626 select SYS_HAS_EARLY_PRINTK
628 select ARCH_HAS_RESET_CONTROLLER
629 select RESET_CONTROLLER
632 bool "SGI IP22 (Indy/Indigo2)"
637 select ARCH_MIGHT_HAVE_PC_SERIO
641 select DEFAULT_SGI_PARTITION
642 select DMA_NONCOHERENT
646 select IP22_CPU_SCACHE
648 select GENERIC_ISA_DMA_SUPPORT_BROKEN
650 select SGI_HAS_INDYDOG
656 select SYS_HAS_CPU_R4X00
657 select SYS_HAS_CPU_R5000
658 select SYS_HAS_EARLY_PRINTK
659 select SYS_SUPPORTS_32BIT_KERNEL
660 select SYS_SUPPORTS_64BIT_KERNEL
661 select SYS_SUPPORTS_BIG_ENDIAN
662 select WAR_R4600_V1_INDEX_ICACHEOP
663 select WAR_R4600_V1_HIT_CACHEOP
664 select WAR_R4600_V2_HIT_CACHEOP
665 select MIPS_L1_CACHE_SHIFT_7
667 This are the SGI Indy, Challenge S and Indigo2, as well as certain
668 OEM variants like the Tandem CMN B006S. To compile a Linux kernel
669 that runs on these, say Y here.
672 bool "SGI IP27 (Origin200/2000)"
673 select ARCH_HAS_PHYS_TO_DMA
674 select ARCH_SPARSEMEM_ENABLE
677 select ARC_CMDLINE_ONLY
679 select DEFAULT_SGI_PARTITION
680 select SYS_HAS_EARLY_PRINTK
683 select IRQ_DOMAIN_HIERARCHY
684 select NR_CPUS_DEFAULT_64
685 select PCI_DRIVERS_GENERIC
686 select PCI_XTALK_BRIDGE
687 select SYS_HAS_CPU_R10000
688 select SYS_SUPPORTS_64BIT_KERNEL
689 select SYS_SUPPORTS_BIG_ENDIAN
690 select SYS_SUPPORTS_NUMA
691 select SYS_SUPPORTS_SMP
692 select WAR_R10000_LLSC
693 select MIPS_L1_CACHE_SHIFT_7
696 This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics
697 workstations. To compile a Linux kernel that runs on these, say Y
701 bool "SGI IP28 (Indigo2 R10k)"
706 select ARCH_MIGHT_HAVE_PC_SERIO
710 select DEFAULT_SGI_PARTITION
711 select DMA_NONCOHERENT
712 select GENERIC_ISA_DMA_SUPPORT_BROKEN
718 select SGI_HAS_INDYDOG
724 select SYS_HAS_CPU_R10000
725 select SYS_HAS_EARLY_PRINTK
726 select SYS_SUPPORTS_64BIT_KERNEL
727 select SYS_SUPPORTS_BIG_ENDIAN
728 select WAR_R10000_LLSC
729 select MIPS_L1_CACHE_SHIFT_7
731 This is the SGI Indigo2 with R10000 processor. To compile a Linux
732 kernel that runs on these, say Y here.
735 bool "SGI IP30 (Octane/Octane2)"
736 select ARCH_HAS_PHYS_TO_DMA
742 select SYNC_R4K if SMP
746 select IRQ_DOMAIN_HIERARCHY
747 select NR_CPUS_DEFAULT_2
748 select PCI_DRIVERS_GENERIC
749 select PCI_XTALK_BRIDGE
750 select SYS_HAS_EARLY_PRINTK
751 select SYS_HAS_CPU_R10000
752 select SYS_SUPPORTS_64BIT_KERNEL
753 select SYS_SUPPORTS_BIG_ENDIAN
754 select SYS_SUPPORTS_SMP
755 select WAR_R10000_LLSC
756 select MIPS_L1_CACHE_SHIFT_7
759 These are the SGI Octane and Octane2 graphics workstations. To
760 compile a Linux kernel that runs on these, say Y here.
766 select ARCH_HAS_PHYS_TO_DMA
772 select DMA_NONCOHERENT
775 select R5000_CPU_SCACHE
776 select RM7000_CPU_SCACHE
777 select SYS_HAS_CPU_R5000
778 select SYS_HAS_CPU_R10000 if BROKEN
779 select SYS_HAS_CPU_RM7000
780 select SYS_HAS_CPU_NEVADA
781 select SYS_SUPPORTS_64BIT_KERNEL
782 select SYS_SUPPORTS_BIG_ENDIAN
783 select WAR_ICACHE_REFILLS
785 If you want this kernel to run on SGI O2 workstation, say Y here.
788 bool "Sibyte BCM91120C-CRhine"
790 select SIBYTE_BCM1120
792 select SYS_HAS_CPU_SB1
793 select SYS_SUPPORTS_BIG_ENDIAN
794 select SYS_SUPPORTS_LITTLE_ENDIAN
797 bool "Sibyte BCM91120x-Carmel"
799 select SIBYTE_BCM1120
801 select SYS_HAS_CPU_SB1
802 select SYS_SUPPORTS_BIG_ENDIAN
803 select SYS_SUPPORTS_LITTLE_ENDIAN
806 bool "Sibyte BCM91125C-CRhone"
808 select SIBYTE_BCM1125
810 select SYS_HAS_CPU_SB1
811 select SYS_SUPPORTS_BIG_ENDIAN
812 select SYS_SUPPORTS_HIGHMEM
813 select SYS_SUPPORTS_LITTLE_ENDIAN
816 bool "Sibyte BCM91125E-Rhone"
818 select SIBYTE_BCM1125H
820 select SYS_HAS_CPU_SB1
821 select SYS_SUPPORTS_BIG_ENDIAN
822 select SYS_SUPPORTS_LITTLE_ENDIAN
825 bool "Sibyte BCM91250A-SWARM"
827 select HAVE_PATA_PLATFORM
830 select SYS_HAS_CPU_SB1
831 select SYS_SUPPORTS_BIG_ENDIAN
832 select SYS_SUPPORTS_HIGHMEM
833 select SYS_SUPPORTS_LITTLE_ENDIAN
834 select ZONE_DMA32 if 64BIT
835 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
837 config SIBYTE_LITTLESUR
838 bool "Sibyte BCM91250C2-LittleSur"
840 select HAVE_PATA_PLATFORM
843 select SYS_HAS_CPU_SB1
844 select SYS_SUPPORTS_BIG_ENDIAN
845 select SYS_SUPPORTS_HIGHMEM
846 select SYS_SUPPORTS_LITTLE_ENDIAN
847 select ZONE_DMA32 if 64BIT
849 config SIBYTE_SENTOSA
850 bool "Sibyte BCM91250E-Sentosa"
854 select SYS_HAS_CPU_SB1
855 select SYS_SUPPORTS_BIG_ENDIAN
856 select SYS_SUPPORTS_LITTLE_ENDIAN
857 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
860 bool "Sibyte BCM91480B-BigSur"
862 select NR_CPUS_DEFAULT_4
863 select SIBYTE_BCM1x80
865 select SYS_HAS_CPU_SB1
866 select SYS_SUPPORTS_BIG_ENDIAN
867 select SYS_SUPPORTS_HIGHMEM
868 select SYS_SUPPORTS_LITTLE_ENDIAN
869 select ZONE_DMA32 if 64BIT
870 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
873 bool "SNI RM200/300/400"
876 select FW_ARC if CPU_LITTLE_ENDIAN
877 select FW_ARC32 if CPU_LITTLE_ENDIAN
878 select FW_SNIPROM if CPU_BIG_ENDIAN
879 select ARCH_MAY_HAVE_PC_FDC
880 select ARCH_MIGHT_HAVE_PC_PARPORT
881 select ARCH_MIGHT_HAVE_PC_SERIO
885 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
886 select DMA_NONCOHERENT
887 select GENERIC_ISA_DMA
889 select HAVE_PCSPKR_PLATFORM
895 select MIPS_L1_CACHE_SHIFT_6
896 select SWAP_IO_SPACE if CPU_BIG_ENDIAN
897 select SYS_HAS_CPU_R4X00
898 select SYS_HAS_CPU_R5000
899 select SYS_HAS_CPU_R10000
900 select R5000_CPU_SCACHE
901 select SYS_HAS_EARLY_PRINTK
902 select SYS_SUPPORTS_32BIT_KERNEL
903 select SYS_SUPPORTS_64BIT_KERNEL
904 select SYS_SUPPORTS_BIG_ENDIAN
905 select SYS_SUPPORTS_HIGHMEM
906 select SYS_SUPPORTS_LITTLE_ENDIAN
907 select WAR_R4600_V2_HIT_CACHEOP
909 The SNI RM200/300/400 are MIPS-based machines manufactured by
910 Siemens Nixdorf Informationssysteme (SNI), parent company of Pyramid
911 Technology and now in turn merged with Fujitsu. Say Y here to
912 support this machine type.
915 bool "Toshiba TX39 series based machines"
918 bool "Toshiba TX49 series based machines"
919 select WAR_TX49XX_ICACHE_INDEX_INV
921 config MIKROTIK_RB532
922 bool "Mikrotik RB532 boards"
925 select DMA_NONCOHERENT
928 select SYS_HAS_CPU_MIPS32_R1
929 select SYS_SUPPORTS_32BIT_KERNEL
930 select SYS_SUPPORTS_LITTLE_ENDIAN
934 select MIPS_L1_CACHE_SHIFT_4
936 Support the Mikrotik(tm) RouterBoard 532 series,
937 based on the IDT RC32434 SoC.
939 config CAVIUM_OCTEON_SOC
940 bool "Cavium Networks Octeon SoC based boards"
942 select ARCH_HAS_PHYS_TO_DMA
944 select PHYS_ADDR_T_64BIT
945 select SYS_SUPPORTS_64BIT_KERNEL
946 select SYS_SUPPORTS_BIG_ENDIAN
948 select EDAC_ATOMIC_SCRUB
949 select SYS_SUPPORTS_LITTLE_ENDIAN
950 select SYS_SUPPORTS_HOTPLUG_CPU if CPU_BIG_ENDIAN
951 select SYS_HAS_EARLY_PRINTK
952 select SYS_HAS_CPU_CAVIUM_OCTEON
954 select HAVE_PLAT_DELAY
955 select HAVE_PLAT_FW_INIT_CMDLINE
956 select HAVE_PLAT_MEMCPY
961 select ARCH_SPARSEMEM_ENABLE
962 select SYS_SUPPORTS_SMP
963 select NR_CPUS_DEFAULT_64
964 select MIPS_NR_CPU_NR_MAP_1024
966 select MTD_COMPLEX_MAPPINGS
968 select SYS_SUPPORTS_RELOCATABLE
970 This option supports all of the Octeon reference boards from Cavium
971 Networks. It builds a kernel that dynamically determines the Octeon
972 CPU type and supports all known board reference implementations.
973 Some of the supported boards are:
980 Say Y here for most Octeon reference boards.
983 bool "Netlogic XLR/XLS based systems"
986 select SYS_HAS_CPU_XLR
987 select SYS_SUPPORTS_SMP
990 select SYS_SUPPORTS_32BIT_KERNEL
991 select SYS_SUPPORTS_64BIT_KERNEL
992 select PHYS_ADDR_T_64BIT
993 select SYS_SUPPORTS_BIG_ENDIAN
994 select SYS_SUPPORTS_HIGHMEM
995 select NR_CPUS_DEFAULT_32
999 select ZONE_DMA32 if 64BIT
1001 select SYS_HAS_EARLY_PRINTK
1002 select SYS_SUPPORTS_ZBOOT
1003 select SYS_SUPPORTS_ZBOOT_UART16550
1005 Support for systems based on Netlogic XLR and XLS processors.
1006 Say Y here if you have a XLR or XLS based board.
1008 config NLM_XLP_BOARD
1009 bool "Netlogic XLP based systems"
1012 select SYS_HAS_CPU_XLP
1013 select SYS_SUPPORTS_SMP
1015 select SYS_SUPPORTS_32BIT_KERNEL
1016 select SYS_SUPPORTS_64BIT_KERNEL
1017 select PHYS_ADDR_T_64BIT
1019 select SYS_SUPPORTS_BIG_ENDIAN
1020 select SYS_SUPPORTS_LITTLE_ENDIAN
1021 select SYS_SUPPORTS_HIGHMEM
1022 select NR_CPUS_DEFAULT_32
1026 select ZONE_DMA32 if 64BIT
1028 select SYS_HAS_EARLY_PRINTK
1030 select SYS_SUPPORTS_ZBOOT
1031 select SYS_SUPPORTS_ZBOOT_UART16550
1033 This board is based on Netlogic XLP Processor.
1034 Say Y here if you have a XLP based board.
1038 source "arch/mips/alchemy/Kconfig"
1039 source "arch/mips/ath25/Kconfig"
1040 source "arch/mips/ath79/Kconfig"
1041 source "arch/mips/bcm47xx/Kconfig"
1042 source "arch/mips/bcm63xx/Kconfig"
1043 source "arch/mips/bmips/Kconfig"
1044 source "arch/mips/generic/Kconfig"
1045 source "arch/mips/ingenic/Kconfig"
1046 source "arch/mips/jazz/Kconfig"
1047 source "arch/mips/lantiq/Kconfig"
1048 source "arch/mips/pic32/Kconfig"
1049 source "arch/mips/pistachio/Kconfig"
1050 source "arch/mips/ralink/Kconfig"
1051 source "arch/mips/sgi-ip27/Kconfig"
1052 source "arch/mips/sibyte/Kconfig"
1053 source "arch/mips/txx9/Kconfig"
1054 source "arch/mips/vr41xx/Kconfig"
1055 source "arch/mips/cavium-octeon/Kconfig"
1056 source "arch/mips/loongson2ef/Kconfig"
1057 source "arch/mips/loongson32/Kconfig"
1058 source "arch/mips/loongson64/Kconfig"
1059 source "arch/mips/netlogic/Kconfig"
1063 config GENERIC_HWEIGHT
1067 config GENERIC_CALIBRATE_DELAY
1071 config SCHED_OMIT_FRAME_POINTER
1076 # Select some configuration options automatically based on user selections.
1081 config ARCH_MAY_HAVE_PC_FDC
1112 select CLOCKSOURCE_WATCHDOG if CPU_FREQ
1118 config MIPS_CLOCK_VSYSCALL
1119 def_bool CSRC_R4K || CLKSRC_MIPS_GIC
1128 config ARCH_SUPPORTS_UPROBES
1131 config DMA_MAYBE_COHERENT
1132 select ARCH_HAS_DMA_COHERENCE_H
1133 select DMA_NONCOHERENT
1136 config DMA_PERDEV_COHERENT
1138 select ARCH_HAS_SETUP_DMA_OPS
1139 select DMA_NONCOHERENT
1141 config DMA_NONCOHERENT
1144 # MIPS allows mixing "slightly different" Cacheability and Coherency
1145 # Attribute bits. It is believed that the uncached access through
1146 # KSEG1 and the implementation specific "uncached accelerated" used
1147 # by pgprot_writcombine can be mixed, and the latter sometimes provides
1148 # significant advantages.
1150 select ARCH_HAS_DMA_WRITE_COMBINE
1151 select ARCH_HAS_DMA_PREP_COHERENT
1152 select ARCH_HAS_SYNC_DMA_FOR_DEVICE
1153 select ARCH_HAS_DMA_SET_UNCACHED
1154 select DMA_NONCOHERENT_MMAP
1155 select NEED_DMA_MAP_STATE
1157 config SYS_HAS_EARLY_PRINTK
1160 config SYS_SUPPORTS_HOTPLUG_CPU
1163 config MIPS_BONITO64
1172 config NO_IOPORT_MAP
1176 def_bool CPU_NO_LOAD_STORE_LR
1178 config GENERIC_ISA_DMA
1180 select ZONE_DMA if GENERIC_ISA_DMA_SUPPORT_BROKEN=n
1183 config GENERIC_ISA_DMA_SUPPORT_BROKEN
1185 select GENERIC_ISA_DMA
1187 config HAVE_PLAT_DELAY
1190 config HAVE_PLAT_FW_INIT_CMDLINE
1193 config HAVE_PLAT_MEMCPY
1199 config HOLES_IN_ZONE
1202 config SYS_SUPPORTS_RELOCATABLE
1205 Selected if the platform supports relocating the kernel.
1206 The platform must provide plat_get_fdt() if it selects CONFIG_USE_OF
1207 to allow access to command line and entropy sources.
1209 config MIPS_CBPF_JIT
1211 depends on BPF_JIT && HAVE_CBPF_JIT
1213 config MIPS_EBPF_JIT
1215 depends on BPF_JIT && HAVE_EBPF_JIT
1219 # Endianness selection. Sufficiently obscure so many users don't know what to
1220 # answer,so we try hard to limit the available choices. Also the use of a
1221 # choice statement should be more obvious to the user.
1224 prompt "Endianness selection"
1226 Some MIPS machines can be configured for either little or big endian
1227 byte order. These modes require different kernels and a different
1228 Linux distribution. In general there is one preferred byteorder for a
1229 particular system but some systems are just as commonly used in the
1230 one or the other endianness.
1232 config CPU_BIG_ENDIAN
1234 depends on SYS_SUPPORTS_BIG_ENDIAN
1236 config CPU_LITTLE_ENDIAN
1237 bool "Little endian"
1238 depends on SYS_SUPPORTS_LITTLE_ENDIAN
1245 config SYS_SUPPORTS_APM_EMULATION
1248 config SYS_SUPPORTS_BIG_ENDIAN
1251 config SYS_SUPPORTS_LITTLE_ENDIAN
1254 config SYS_SUPPORTS_HUGETLBFS
1256 depends on CPU_SUPPORTS_HUGEPAGES
1259 config MIPS_HUGE_TLB_SUPPORT
1260 def_bool HUGETLB_PAGE || TRANSPARENT_HUGEPAGE
1277 config PCI_GT64XXX_PCI0
1280 config PCI_XTALK_BRIDGE
1283 config NO_EXCEPT_FILL
1289 config SWAP_IO_SPACE
1292 config SGI_HAS_INDYDOG
1304 config SGI_HAS_ZILOG
1307 config SGI_HAS_I8042
1310 config DEFAULT_SGI_PARTITION
1322 config MIPS_L1_CACHE_SHIFT_4
1325 config MIPS_L1_CACHE_SHIFT_5
1328 config MIPS_L1_CACHE_SHIFT_6
1331 config MIPS_L1_CACHE_SHIFT_7
1334 config MIPS_L1_CACHE_SHIFT
1336 default "7" if MIPS_L1_CACHE_SHIFT_7
1337 default "6" if MIPS_L1_CACHE_SHIFT_6
1338 default "5" if MIPS_L1_CACHE_SHIFT_5
1339 default "4" if MIPS_L1_CACHE_SHIFT_4
1342 config ARC_CMDLINE_ONLY
1346 bool "ARC console support"
1347 depends on SGI_IP22 || SGI_IP28 || (SNI_RM && CPU_LITTLE_ENDIAN)
1361 menu "CPU selection"
1367 config CPU_LOONGSON64
1368 bool "Loongson 64-bit CPU"
1369 depends on SYS_HAS_CPU_LOONGSON64
1370 select ARCH_HAS_PHYS_TO_DMA
1372 select CPU_HAS_PREFETCH
1373 select CPU_SUPPORTS_64BIT_KERNEL
1374 select CPU_SUPPORTS_HIGHMEM
1375 select CPU_SUPPORTS_HUGEPAGES
1376 select CPU_SUPPORTS_MSA
1377 select CPU_DIEI_BROKEN if !LOONGSON3_ENHANCEMENT
1378 select CPU_MIPSR2_IRQ_VI
1379 select WEAK_ORDERING
1380 select WEAK_REORDERING_BEYOND_LLSC
1381 select MIPS_ASID_BITS_VARIABLE
1382 select MIPS_PGD_C0_CONTEXT
1383 select MIPS_L1_CACHE_SHIFT_6
1388 The Loongson GSx64(GS264/GS464/GS464E/GS464V) series of processor
1389 cores implements the MIPS64R2 instruction set with many extensions,
1390 including most 64-bit Loongson-2 (2H, 2K) and Loongson-3 (3A1000,
1391 3B1000, 3B1500, 3A2000, 3A3000 and 3A4000) processors. However, old
1392 Loongson-2E/2F is not covered here and will be removed in future.
1394 config LOONGSON3_ENHANCEMENT
1395 bool "New Loongson-3 CPU Enhancements"
1397 depends on CPU_LOONGSON64
1399 New Loongson-3 cores (since Loongson-3A R2, as opposed to Loongson-3A
1400 R1, Loongson-3B R1 and Loongson-3B R2) has many enhancements, such as
1401 FTLB, L1-VCache, EI/DI/Wait/Prefetch instruction, DSP/DSPr2 ASE, User
1402 Local register, Read-Inhibit/Execute-Inhibit, SFB (Store Fill Buffer),
1403 Fast TLB refill support, etc.
1405 This option enable those enhancements which are not probed at run
1406 time. If you want a generic kernel to run on all Loongson 3 machines,
1407 please say 'N' here. If you want a high-performance kernel to run on
1408 new Loongson-3 machines only, please say 'Y' here.
1410 config CPU_LOONGSON3_WORKAROUNDS
1411 bool "Old Loongson-3 LLSC Workarounds"
1413 depends on CPU_LOONGSON64
1415 Loongson-3 processors have the llsc issues which require workarounds.
1416 Without workarounds the system may hang unexpectedly.
1418 Newer Loongson-3 will fix these issues and no workarounds are needed.
1419 The workarounds have no significant side effect on them but may
1420 decrease the performance of the system so this option should be
1421 disabled unless the kernel is intended to be run on old systems.
1423 If unsure, please say Y.
1425 config CPU_LOONGSON3_CPUCFG_EMULATION
1426 bool "Emulate the CPUCFG instruction on older Loongson cores"
1428 depends on CPU_LOONGSON64
1430 Loongson-3A R4 and newer have the CPUCFG instruction available for
1431 userland to query CPU capabilities, much like CPUID on x86. This
1432 option provides emulation of the instruction on older Loongson
1433 cores, back to Loongson-3A1000.
1435 If unsure, please say Y.
1437 config CPU_LOONGSON2E
1439 depends on SYS_HAS_CPU_LOONGSON2E
1440 select CPU_LOONGSON2EF
1442 The Loongson 2E processor implements the MIPS III instruction set
1443 with many extensions.
1445 It has an internal FPGA northbridge, which is compatible to
1448 config CPU_LOONGSON2F
1450 depends on SYS_HAS_CPU_LOONGSON2F
1451 select CPU_LOONGSON2EF
1454 The Loongson 2F processor implements the MIPS III instruction set
1455 with many extensions.
1457 Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller
1458 have a similar programming interface with FPGA northbridge used in
1461 config CPU_LOONGSON1B
1463 depends on SYS_HAS_CPU_LOONGSON1B
1464 select CPU_LOONGSON32
1465 select LEDS_GPIO_REGISTER
1467 The Loongson 1B is a 32-bit SoC, which implements the MIPS32
1468 Release 1 instruction set and part of the MIPS32 Release 2
1471 config CPU_LOONGSON1C
1473 depends on SYS_HAS_CPU_LOONGSON1C
1474 select CPU_LOONGSON32
1475 select LEDS_GPIO_REGISTER
1477 The Loongson 1C is a 32-bit SoC, which implements the MIPS32
1478 Release 1 instruction set and part of the MIPS32 Release 2
1481 config CPU_MIPS32_R1
1482 bool "MIPS32 Release 1"
1483 depends on SYS_HAS_CPU_MIPS32_R1
1484 select CPU_HAS_PREFETCH
1485 select CPU_SUPPORTS_32BIT_KERNEL
1486 select CPU_SUPPORTS_HIGHMEM
1488 Choose this option to build a kernel for release 1 or later of the
1489 MIPS32 architecture. Most modern embedded systems with a 32-bit
1490 MIPS processor are based on a MIPS32 processor. If you know the
1491 specific type of processor in your system, choose those that one
1492 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
1493 Release 2 of the MIPS32 architecture is available since several
1494 years so chances are you even have a MIPS32 Release 2 processor
1495 in which case you should choose CPU_MIPS32_R2 instead for better
1498 config CPU_MIPS32_R2
1499 bool "MIPS32 Release 2"
1500 depends on SYS_HAS_CPU_MIPS32_R2
1501 select CPU_HAS_PREFETCH
1502 select CPU_SUPPORTS_32BIT_KERNEL
1503 select CPU_SUPPORTS_HIGHMEM
1504 select CPU_SUPPORTS_MSA
1507 Choose this option to build a kernel for release 2 or later of the
1508 MIPS32 architecture. Most modern embedded systems with a 32-bit
1509 MIPS processor are based on a MIPS32 processor. If you know the
1510 specific type of processor in your system, choose those that one
1511 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
1513 config CPU_MIPS32_R5
1514 bool "MIPS32 Release 5"
1515 depends on SYS_HAS_CPU_MIPS32_R5
1516 select CPU_HAS_PREFETCH
1517 select CPU_SUPPORTS_32BIT_KERNEL
1518 select CPU_SUPPORTS_HIGHMEM
1519 select CPU_SUPPORTS_MSA
1521 select MIPS_O32_FP64_SUPPORT
1523 Choose this option to build a kernel for release 5 or later of the
1524 MIPS32 architecture. New MIPS processors, starting with the Warrior
1525 family, are based on a MIPS32r5 processor. If you own an older
1526 processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
1528 config CPU_MIPS32_R6
1529 bool "MIPS32 Release 6"
1530 depends on SYS_HAS_CPU_MIPS32_R6
1531 select CPU_HAS_PREFETCH
1532 select CPU_NO_LOAD_STORE_LR
1533 select CPU_SUPPORTS_32BIT_KERNEL
1534 select CPU_SUPPORTS_HIGHMEM
1535 select CPU_SUPPORTS_MSA
1537 select MIPS_O32_FP64_SUPPORT
1539 Choose this option to build a kernel for release 6 or later of the
1540 MIPS32 architecture. New MIPS processors, starting with the Warrior
1541 family, are based on a MIPS32r6 processor. If you own an older
1542 processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
1544 config CPU_MIPS64_R1
1545 bool "MIPS64 Release 1"
1546 depends on SYS_HAS_CPU_MIPS64_R1
1547 select CPU_HAS_PREFETCH
1548 select CPU_SUPPORTS_32BIT_KERNEL
1549 select CPU_SUPPORTS_64BIT_KERNEL
1550 select CPU_SUPPORTS_HIGHMEM
1551 select CPU_SUPPORTS_HUGEPAGES
1553 Choose this option to build a kernel for release 1 or later of the
1554 MIPS64 architecture. Many modern embedded systems with a 64-bit
1555 MIPS processor are based on a MIPS64 processor. If you know the
1556 specific type of processor in your system, choose those that one
1557 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
1558 Release 2 of the MIPS64 architecture is available since several
1559 years so chances are you even have a MIPS64 Release 2 processor
1560 in which case you should choose CPU_MIPS64_R2 instead for better
1563 config CPU_MIPS64_R2
1564 bool "MIPS64 Release 2"
1565 depends on SYS_HAS_CPU_MIPS64_R2
1566 select CPU_HAS_PREFETCH
1567 select CPU_SUPPORTS_32BIT_KERNEL
1568 select CPU_SUPPORTS_64BIT_KERNEL
1569 select CPU_SUPPORTS_HIGHMEM
1570 select CPU_SUPPORTS_HUGEPAGES
1571 select CPU_SUPPORTS_MSA
1574 Choose this option to build a kernel for release 2 or later of the
1575 MIPS64 architecture. Many modern embedded systems with a 64-bit
1576 MIPS processor are based on a MIPS64 processor. If you know the
1577 specific type of processor in your system, choose those that one
1578 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
1580 config CPU_MIPS64_R5
1581 bool "MIPS64 Release 5"
1582 depends on SYS_HAS_CPU_MIPS64_R5
1583 select CPU_HAS_PREFETCH
1584 select CPU_SUPPORTS_32BIT_KERNEL
1585 select CPU_SUPPORTS_64BIT_KERNEL
1586 select CPU_SUPPORTS_HIGHMEM
1587 select CPU_SUPPORTS_HUGEPAGES
1588 select CPU_SUPPORTS_MSA
1589 select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32
1592 Choose this option to build a kernel for release 5 or later of the
1593 MIPS64 architecture. This is a intermediate MIPS architecture
1594 release partly implementing release 6 features. Though there is no
1595 any hardware known to be based on this release.
1597 config CPU_MIPS64_R6
1598 bool "MIPS64 Release 6"
1599 depends on SYS_HAS_CPU_MIPS64_R6
1600 select CPU_HAS_PREFETCH
1601 select CPU_NO_LOAD_STORE_LR
1602 select CPU_SUPPORTS_32BIT_KERNEL
1603 select CPU_SUPPORTS_64BIT_KERNEL
1604 select CPU_SUPPORTS_HIGHMEM
1605 select CPU_SUPPORTS_HUGEPAGES
1606 select CPU_SUPPORTS_MSA
1607 select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32
1610 Choose this option to build a kernel for release 6 or later of the
1611 MIPS64 architecture. New MIPS processors, starting with the Warrior
1612 family, are based on a MIPS64r6 processor. If you own an older
1613 processor, you probably need to select MIPS64r1 or MIPS64r2 instead.
1616 bool "MIPS Warrior P5600"
1617 depends on SYS_HAS_CPU_P5600
1618 select CPU_HAS_PREFETCH
1619 select CPU_SUPPORTS_32BIT_KERNEL
1620 select CPU_SUPPORTS_HIGHMEM
1621 select CPU_SUPPORTS_MSA
1622 select CPU_SUPPORTS_CPUFREQ
1623 select CPU_MIPSR2_IRQ_VI
1624 select CPU_MIPSR2_IRQ_EI
1626 select MIPS_O32_FP64_SUPPORT
1628 Choose this option to build a kernel for MIPS Warrior P5600 CPU.
1629 It's based on MIPS32r5 ISA with XPA, EVA, dual/quad issue exec pipes,
1630 MMU with two-levels TLB, UCA, MSA, MDU core level features and system
1631 level features like up to six P5600 calculation cores, CM2 with L2
1632 cache, IOCU/IOMMU (though might be unused depending on the system-
1633 specific IP core configuration), GIC, CPC, virtualisation module,
1638 depends on SYS_HAS_CPU_R3000
1641 select CPU_SUPPORTS_32BIT_KERNEL
1642 select CPU_SUPPORTS_HIGHMEM
1644 Please make sure to pick the right CPU type. Linux/MIPS is not
1645 designed to be generic, i.e. Kernels compiled for R3000 CPUs will
1646 *not* work on R4000 machines and vice versa. However, since most
1647 of the supported machines have an R4000 (or similar) CPU, R4x00
1648 might be a safe bet. If the resulting kernel does not work,
1649 try to recompile with R3000.
1653 depends on SYS_HAS_CPU_TX39XX
1654 select CPU_SUPPORTS_32BIT_KERNEL
1659 depends on SYS_HAS_CPU_VR41XX
1660 select CPU_SUPPORTS_32BIT_KERNEL
1661 select CPU_SUPPORTS_64BIT_KERNEL
1663 The options selects support for the NEC VR4100 series of processors.
1664 Only choose this option if you have one of these processors as a
1665 kernel built with this option will not run on any other type of
1666 processor or vice versa.
1670 depends on SYS_HAS_CPU_R4X00
1671 select CPU_SUPPORTS_32BIT_KERNEL
1672 select CPU_SUPPORTS_64BIT_KERNEL
1673 select CPU_SUPPORTS_HUGEPAGES
1675 MIPS Technologies R4000-series processors other than 4300, including
1676 the R4000, R4400, R4600, and 4700.
1680 depends on SYS_HAS_CPU_TX49XX
1681 select CPU_HAS_PREFETCH
1682 select CPU_SUPPORTS_32BIT_KERNEL
1683 select CPU_SUPPORTS_64BIT_KERNEL
1684 select CPU_SUPPORTS_HUGEPAGES
1688 depends on SYS_HAS_CPU_R5000
1689 select CPU_SUPPORTS_32BIT_KERNEL
1690 select CPU_SUPPORTS_64BIT_KERNEL
1691 select CPU_SUPPORTS_HUGEPAGES
1693 MIPS Technologies R5000-series processors other than the Nevada.
1697 depends on SYS_HAS_CPU_R5500
1698 select CPU_SUPPORTS_32BIT_KERNEL
1699 select CPU_SUPPORTS_64BIT_KERNEL
1700 select CPU_SUPPORTS_HUGEPAGES
1702 NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV
1707 depends on SYS_HAS_CPU_NEVADA
1708 select CPU_SUPPORTS_32BIT_KERNEL
1709 select CPU_SUPPORTS_64BIT_KERNEL
1710 select CPU_SUPPORTS_HUGEPAGES
1712 QED / PMC-Sierra RM52xx-series ("Nevada") processors.
1716 depends on SYS_HAS_CPU_R10000
1717 select CPU_HAS_PREFETCH
1718 select CPU_SUPPORTS_32BIT_KERNEL
1719 select CPU_SUPPORTS_64BIT_KERNEL
1720 select CPU_SUPPORTS_HIGHMEM
1721 select CPU_SUPPORTS_HUGEPAGES
1723 MIPS Technologies R10000-series processors.
1727 depends on SYS_HAS_CPU_RM7000
1728 select CPU_HAS_PREFETCH
1729 select CPU_SUPPORTS_32BIT_KERNEL
1730 select CPU_SUPPORTS_64BIT_KERNEL
1731 select CPU_SUPPORTS_HIGHMEM
1732 select CPU_SUPPORTS_HUGEPAGES
1736 depends on SYS_HAS_CPU_SB1
1737 select CPU_SUPPORTS_32BIT_KERNEL
1738 select CPU_SUPPORTS_64BIT_KERNEL
1739 select CPU_SUPPORTS_HIGHMEM
1740 select CPU_SUPPORTS_HUGEPAGES
1741 select WEAK_ORDERING
1743 config CPU_CAVIUM_OCTEON
1744 bool "Cavium Octeon processor"
1745 depends on SYS_HAS_CPU_CAVIUM_OCTEON
1746 select CPU_HAS_PREFETCH
1747 select CPU_SUPPORTS_64BIT_KERNEL
1748 select WEAK_ORDERING
1749 select CPU_SUPPORTS_HIGHMEM
1750 select CPU_SUPPORTS_HUGEPAGES
1751 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
1752 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
1753 select MIPS_L1_CACHE_SHIFT_7
1756 The Cavium Octeon processor is a highly integrated chip containing
1757 many ethernet hardware widgets for networking tasks. The processor
1758 can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets.
1759 Full details can be found at http://www.caviumnetworks.com.
1762 bool "Broadcom BMIPS"
1763 depends on SYS_HAS_CPU_BMIPS
1765 select CPU_BMIPS32_3300 if SYS_HAS_CPU_BMIPS32_3300
1766 select CPU_BMIPS4350 if SYS_HAS_CPU_BMIPS4350
1767 select CPU_BMIPS4380 if SYS_HAS_CPU_BMIPS4380
1768 select CPU_BMIPS5000 if SYS_HAS_CPU_BMIPS5000
1769 select CPU_SUPPORTS_32BIT_KERNEL
1770 select DMA_NONCOHERENT
1772 select SWAP_IO_SPACE
1773 select WEAK_ORDERING
1774 select CPU_SUPPORTS_HIGHMEM
1775 select CPU_HAS_PREFETCH
1776 select CPU_SUPPORTS_CPUFREQ
1777 select MIPS_EXTERNAL_TIMER
1779 Support for BMIPS32/3300/4350/4380 and BMIPS5000 processors.
1782 bool "Netlogic XLR SoC"
1783 depends on SYS_HAS_CPU_XLR
1784 select CPU_SUPPORTS_32BIT_KERNEL
1785 select CPU_SUPPORTS_64BIT_KERNEL
1786 select CPU_SUPPORTS_HIGHMEM
1787 select CPU_SUPPORTS_HUGEPAGES
1788 select WEAK_ORDERING
1789 select WEAK_REORDERING_BEYOND_LLSC
1791 Netlogic Microsystems XLR/XLS processors.
1794 bool "Netlogic XLP SoC"
1795 depends on SYS_HAS_CPU_XLP
1796 select CPU_SUPPORTS_32BIT_KERNEL
1797 select CPU_SUPPORTS_64BIT_KERNEL
1798 select CPU_SUPPORTS_HIGHMEM
1799 select WEAK_ORDERING
1800 select WEAK_REORDERING_BEYOND_LLSC
1801 select CPU_HAS_PREFETCH
1803 select CPU_SUPPORTS_HUGEPAGES
1804 select MIPS_ASID_BITS_VARIABLE
1806 Netlogic Microsystems XLP processors.
1809 config CPU_MIPS32_3_5_FEATURES
1810 bool "MIPS32 Release 3.5 Features"
1811 depends on SYS_HAS_CPU_MIPS32_R3_5
1812 depends on CPU_MIPS32_R2 || CPU_MIPS32_R5 || CPU_MIPS32_R6 || \
1815 Choose this option to build a kernel for release 2 or later of the
1816 MIPS32 architecture including features from the 3.5 release such as
1817 support for Enhanced Virtual Addressing (EVA).
1819 config CPU_MIPS32_3_5_EVA
1820 bool "Enhanced Virtual Addressing (EVA)"
1821 depends on CPU_MIPS32_3_5_FEATURES
1825 Choose this option if you want to enable the Enhanced Virtual
1826 Addressing (EVA) on your MIPS32 core (such as proAptiv).
1827 One of its primary benefits is an increase in the maximum size
1828 of lowmem (up to 3GB). If unsure, say 'N' here.
1830 config CPU_MIPS32_R5_FEATURES
1831 bool "MIPS32 Release 5 Features"
1832 depends on SYS_HAS_CPU_MIPS32_R5
1833 depends on CPU_MIPS32_R2 || CPU_MIPS32_R5 || CPU_P5600
1835 Choose this option to build a kernel for release 2 or later of the
1836 MIPS32 architecture including features from release 5 such as
1837 support for Extended Physical Addressing (XPA).
1839 config CPU_MIPS32_R5_XPA
1840 bool "Extended Physical Addressing (XPA)"
1841 depends on CPU_MIPS32_R5_FEATURES
1843 depends on !PAGE_SIZE_4KB
1844 depends on SYS_SUPPORTS_HIGHMEM
1847 select PHYS_ADDR_T_64BIT
1850 Choose this option if you want to enable the Extended Physical
1851 Addressing (XPA) on your MIPS32 core (such as P5600 series). The
1852 benefit is to increase physical addressing equal to or greater
1853 than 40 bits. Note that this has the side effect of turning on
1854 64-bit addressing which in turn makes the PTEs 64-bit in size.
1855 If unsure, say 'N' here.
1858 config CPU_NOP_WORKAROUNDS
1861 config CPU_JUMP_WORKAROUNDS
1864 config CPU_LOONGSON2F_WORKAROUNDS
1865 bool "Loongson 2F Workarounds"
1867 select CPU_NOP_WORKAROUNDS
1868 select CPU_JUMP_WORKAROUNDS
1870 Loongson 2F01 / 2F02 processors have the NOP & JUMP issues which
1871 require workarounds. Without workarounds the system may hang
1872 unexpectedly. For more information please refer to the gas
1873 -mfix-loongson2f-nop and -mfix-loongson2f-jump options.
1875 Loongson 2F03 and later have fixed these issues and no workarounds
1876 are needed. The workarounds have no significant side effect on them
1877 but may decrease the performance of the system so this option should
1878 be disabled unless the kernel is intended to be run on 2F01 or 2F02
1881 If unsure, please say Y.
1882 endif # CPU_LOONGSON2F
1884 config SYS_SUPPORTS_ZBOOT
1886 select HAVE_KERNEL_GZIP
1887 select HAVE_KERNEL_BZIP2
1888 select HAVE_KERNEL_LZ4
1889 select HAVE_KERNEL_LZMA
1890 select HAVE_KERNEL_LZO
1891 select HAVE_KERNEL_XZ
1892 select HAVE_KERNEL_ZSTD
1894 config SYS_SUPPORTS_ZBOOT_UART16550
1896 select SYS_SUPPORTS_ZBOOT
1898 config SYS_SUPPORTS_ZBOOT_UART_PROM
1900 select SYS_SUPPORTS_ZBOOT
1902 config CPU_LOONGSON2EF
1904 select CPU_SUPPORTS_32BIT_KERNEL
1905 select CPU_SUPPORTS_64BIT_KERNEL
1906 select CPU_SUPPORTS_HIGHMEM
1907 select CPU_SUPPORTS_HUGEPAGES
1908 select ARCH_HAS_PHYS_TO_DMA
1910 config CPU_LOONGSON32
1914 select CPU_HAS_PREFETCH
1915 select CPU_SUPPORTS_32BIT_KERNEL
1916 select CPU_SUPPORTS_HIGHMEM
1917 select CPU_SUPPORTS_CPUFREQ
1919 config CPU_BMIPS32_3300
1920 select SMP_UP if SMP
1923 config CPU_BMIPS4350
1925 select SYS_SUPPORTS_SMP
1926 select SYS_SUPPORTS_HOTPLUG_CPU
1928 config CPU_BMIPS4380
1930 select MIPS_L1_CACHE_SHIFT_6
1931 select SYS_SUPPORTS_SMP
1932 select SYS_SUPPORTS_HOTPLUG_CPU
1935 config CPU_BMIPS5000
1937 select MIPS_CPU_SCACHE
1938 select MIPS_L1_CACHE_SHIFT_7
1939 select SYS_SUPPORTS_SMP
1940 select SYS_SUPPORTS_HOTPLUG_CPU
1943 config SYS_HAS_CPU_LOONGSON64
1945 select CPU_SUPPORTS_CPUFREQ
1948 config SYS_HAS_CPU_LOONGSON2E
1951 config SYS_HAS_CPU_LOONGSON2F
1953 select CPU_SUPPORTS_CPUFREQ
1954 select CPU_SUPPORTS_ADDRWINCFG if 64BIT
1956 config SYS_HAS_CPU_LOONGSON1B
1959 config SYS_HAS_CPU_LOONGSON1C
1962 config SYS_HAS_CPU_MIPS32_R1
1965 config SYS_HAS_CPU_MIPS32_R2
1968 config SYS_HAS_CPU_MIPS32_R3_5
1971 config SYS_HAS_CPU_MIPS32_R5
1973 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
1975 config SYS_HAS_CPU_MIPS32_R6
1977 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
1979 config SYS_HAS_CPU_MIPS64_R1
1982 config SYS_HAS_CPU_MIPS64_R2
1985 config SYS_HAS_CPU_MIPS64_R6
1987 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
1989 config SYS_HAS_CPU_P5600
1991 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
1993 config SYS_HAS_CPU_R3000
1996 config SYS_HAS_CPU_TX39XX
1999 config SYS_HAS_CPU_VR41XX
2002 config SYS_HAS_CPU_R4X00
2005 config SYS_HAS_CPU_TX49XX
2008 config SYS_HAS_CPU_R5000
2011 config SYS_HAS_CPU_R5500
2014 config SYS_HAS_CPU_NEVADA
2017 config SYS_HAS_CPU_R10000
2019 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
2021 config SYS_HAS_CPU_RM7000
2024 config SYS_HAS_CPU_SB1
2027 config SYS_HAS_CPU_CAVIUM_OCTEON
2030 config SYS_HAS_CPU_BMIPS
2033 config SYS_HAS_CPU_BMIPS32_3300
2035 select SYS_HAS_CPU_BMIPS
2037 config SYS_HAS_CPU_BMIPS4350
2039 select SYS_HAS_CPU_BMIPS
2041 config SYS_HAS_CPU_BMIPS4380
2043 select SYS_HAS_CPU_BMIPS
2045 config SYS_HAS_CPU_BMIPS5000
2047 select SYS_HAS_CPU_BMIPS
2048 select ARCH_HAS_SYNC_DMA_FOR_CPU
2050 config SYS_HAS_CPU_XLR
2053 config SYS_HAS_CPU_XLP
2057 # CPU may reorder R->R, R->W, W->R, W->W
2058 # Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC
2060 config WEAK_ORDERING
2064 # CPU may reorder reads and writes beyond LL/SC
2065 # CPU may reorder R->LL, R->LL, W->LL, W->LL, R->SC, R->SC, W->SC, W->SC
2067 config WEAK_REORDERING_BEYOND_LLSC
2072 # These two indicate any level of the MIPS32 and MIPS64 architecture
2076 default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 || CPU_MIPS32_R5 || \
2077 CPU_MIPS32_R6 || CPU_P5600
2081 default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 || CPU_MIPS64_R5 || \
2085 # These indicate the revision of the architecture
2089 default y if CPU_MIPS32_R1 || CPU_MIPS64_R1
2093 default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_CAVIUM_OCTEON
2095 select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
2100 default y if CPU_MIPS32_R5 || CPU_MIPS64_R5 || CPU_P5600
2102 select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
2107 default y if CPU_MIPS32_R6 || CPU_MIPS64_R6
2109 select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
2110 select HAVE_ARCH_BITREVERSE
2111 select MIPS_ASID_BITS_VARIABLE
2112 select MIPS_CRC_SUPPORT
2115 config TARGET_ISA_REV
2117 default 1 if CPU_MIPSR1
2118 default 2 if CPU_MIPSR2
2119 default 5 if CPU_MIPSR5
2120 default 6 if CPU_MIPSR6
2123 Reflects the ISA revision being targeted by the kernel build. This
2124 is effectively the Kconfig equivalent of MIPS_ISA_REV.
2132 config SYS_SUPPORTS_32BIT_KERNEL
2134 config SYS_SUPPORTS_64BIT_KERNEL
2136 config CPU_SUPPORTS_32BIT_KERNEL
2138 config CPU_SUPPORTS_64BIT_KERNEL
2140 config CPU_SUPPORTS_CPUFREQ
2142 config CPU_SUPPORTS_ADDRWINCFG
2144 config CPU_SUPPORTS_HUGEPAGES
2146 depends on !(32BIT && (ARCH_PHYS_ADDR_T_64BIT || EVA))
2147 config MIPS_PGD_C0_CONTEXT
2149 default y if 64BIT && (CPU_MIPSR2 || CPU_MIPSR6) && !CPU_XLP
2152 # Set to y for ptrace access to watch registers.
2154 config HARDWARE_WATCHPOINTS
2156 default y if CPU_MIPSR1 || CPU_MIPSR2 || CPU_MIPSR6
2161 prompt "Kernel code model"
2163 You should only select this option if you have a workload that
2164 actually benefits from 64-bit processing or if your machine has
2165 large memory. You will only be presented a single option in this
2166 menu if your system does not support both 32-bit and 64-bit kernels.
2169 bool "32-bit kernel"
2170 depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL
2173 Select this option if you want to build a 32-bit kernel.
2176 bool "64-bit kernel"
2177 depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL
2179 Select this option if you want to build a 64-bit kernel.
2184 bool "KVM Guest Kernel"
2185 depends on CPU_MIPS32_R2
2186 depends on BROKEN_ON_SMP
2188 Select this option if building a guest kernel for KVM (Trap & Emulate)
2191 config KVM_GUEST_TIMER_FREQ
2192 int "Count/Compare Timer Frequency (MHz)"
2193 depends on KVM_GUEST
2196 Set this to non-zero if building a guest kernel for KVM to skip RTC
2197 emulation when determining guest CPU Frequency. Instead, the guest's
2198 timer frequency is specified directly.
2200 config MIPS_VA_BITS_48
2201 bool "48 bits virtual memory"
2204 Support a maximum at least 48 bits of application virtual
2205 memory. Default is 40 bits or less, depending on the CPU.
2206 For page sizes 16k and above, this option results in a small
2207 memory overhead for page tables. For 4k page size, a fourth
2208 level of page tables is added which imposes both a memory
2209 overhead as well as slower TLB fault handling.
2214 prompt "Kernel page size"
2215 default PAGE_SIZE_4KB
2217 config PAGE_SIZE_4KB
2219 depends on !CPU_LOONGSON2EF && !CPU_LOONGSON64
2221 This option select the standard 4kB Linux page size. On some
2222 R3000-family processors this is the only available page size. Using
2223 4kB page size will minimize memory consumption and is therefore
2224 recommended for low memory systems.
2226 config PAGE_SIZE_8KB
2228 depends on CPU_CAVIUM_OCTEON
2229 depends on !MIPS_VA_BITS_48
2231 Using 8kB page size will result in higher performance kernel at
2232 the price of higher memory consumption. This option is available
2233 only on cnMIPS processors. Note that you will need a suitable Linux
2234 distribution to support this.
2236 config PAGE_SIZE_16KB
2238 depends on !CPU_R3000 && !CPU_TX39XX
2240 Using 16kB page size will result in higher performance kernel at
2241 the price of higher memory consumption. This option is available on
2242 all non-R3000 family processors. Note that you will need a suitable
2243 Linux distribution to support this.
2245 config PAGE_SIZE_32KB
2247 depends on CPU_CAVIUM_OCTEON
2248 depends on !MIPS_VA_BITS_48
2250 Using 32kB page size will result in higher performance kernel at
2251 the price of higher memory consumption. This option is available
2252 only on cnMIPS cores. Note that you will need a suitable Linux
2253 distribution to support this.
2255 config PAGE_SIZE_64KB
2257 depends on !CPU_R3000 && !CPU_TX39XX
2259 Using 64kB page size will result in higher performance kernel at
2260 the price of higher memory consumption. This option is available on
2261 all non-R3000 family processor. Not that at the time of this
2262 writing this option is still high experimental.
2266 config FORCE_MAX_ZONEORDER
2267 int "Maximum zone order"
2268 range 14 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
2269 default "14" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
2270 range 13 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
2271 default "13" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
2272 range 12 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
2273 default "12" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
2277 The kernel memory allocator divides physically contiguous memory
2278 blocks into "zones", where each zone is a power of two number of
2279 pages. This option selects the largest power of two that the kernel
2280 keeps in the memory allocator. If you need to allocate very large
2281 blocks of physically contiguous memory, then you may need to
2282 increase this value.
2284 This config option is actually maximum order plus one. For example,
2285 a value of 11 means that the largest free memory block is 2^10 pages.
2287 The page size is not necessarily 4KB. Keep this in mind
2288 when choosing a value for this option.
2293 config IP22_CPU_SCACHE
2298 # Support for a MIPS32 / MIPS64 style S-caches
2300 config MIPS_CPU_SCACHE
2304 config R5000_CPU_SCACHE
2308 config RM7000_CPU_SCACHE
2312 config SIBYTE_DMA_PAGEOPS
2313 bool "Use DMA to clear/copy pages"
2316 Instead of using the CPU to zero and copy pages, use a Data Mover
2317 channel. These DMA channels are otherwise unused by the standard
2318 SiByte Linux port. Seems to give a small performance benefit.
2320 config CPU_HAS_PREFETCH
2323 config CPU_GENERIC_DUMP_TLB
2325 default y if !(CPU_R3000 || CPU_TX39XX)
2327 config MIPS_FP_SUPPORT
2328 bool "Floating Point support" if EXPERT
2331 Select y to include support for floating point in the kernel
2332 including initialization of FPU hardware, FP context save & restore
2333 and emulation of an FPU where necessary. Without this support any
2334 userland program attempting to use floating point instructions will
2337 If you know that your userland will not attempt to use floating point
2338 instructions then you can say n here to shrink the kernel a little.
2342 config CPU_R2300_FPU
2344 depends on MIPS_FP_SUPPORT
2345 default y if CPU_R3000 || CPU_TX39XX
2352 depends on MIPS_FP_SUPPORT
2353 default y if !CPU_R2300_FPU
2355 config CPU_R4K_CACHE_TLB
2357 default y if !(CPU_R3K_TLB || CPU_SB1 || CPU_CAVIUM_OCTEON)
2360 bool "MIPS MT SMP support (1 TC on each available VPE)"
2362 depends on SYS_SUPPORTS_MULTITHREADING && !CPU_MIPSR6 && !CPU_MICROMIPS
2363 select CPU_MIPSR2_IRQ_VI
2364 select CPU_MIPSR2_IRQ_EI
2369 select SYS_SUPPORTS_SMP
2370 select SYS_SUPPORTS_SCHED_SMT
2371 select MIPS_PERF_SHARED_TC_COUNTERS
2373 This is a kernel model which is known as SMVP. This is supported
2374 on cores with the MT ASE and uses the available VPEs to implement
2375 virtual processors which supports SMP. This is equivalent to the
2376 Intel Hyperthreading feature. For further information go to
2377 <http://www.imgtec.com/mips/mips-multithreading.asp>.
2383 bool "SMT (multithreading) scheduler support"
2384 depends on SYS_SUPPORTS_SCHED_SMT
2387 SMT scheduler support improves the CPU scheduler's decision making
2388 when dealing with MIPS MT enabled cores at a cost of slightly
2389 increased overhead in some places. If unsure say N here.
2391 config SYS_SUPPORTS_SCHED_SMT
2394 config SYS_SUPPORTS_MULTITHREADING
2397 config MIPS_MT_FPAFF
2398 bool "Dynamic FPU affinity for FP-intensive threads"
2400 depends on MIPS_MT_SMP
2402 config MIPSR2_TO_R6_EMULATOR
2403 bool "MIPS R2-to-R6 emulator"
2404 depends on CPU_MIPSR6
2405 depends on MIPS_FP_SUPPORT
2408 Choose this option if you want to run non-R6 MIPS userland code.
2409 Even if you say 'Y' here, the emulator will still be disabled by
2410 default. You can enable it using the 'mipsr2emu' kernel option.
2411 The only reason this is a build-time option is to save ~14K from the
2414 config SYS_SUPPORTS_VPE_LOADER
2416 depends on SYS_SUPPORTS_MULTITHREADING
2418 Indicates that the platform supports the VPE loader, and provides
2421 config MIPS_VPE_LOADER
2422 bool "VPE loader support."
2423 depends on SYS_SUPPORTS_VPE_LOADER && MODULES
2424 select CPU_MIPSR2_IRQ_VI
2425 select CPU_MIPSR2_IRQ_EI
2428 Includes a loader for loading an elf relocatable object
2429 onto another VPE and running it.
2431 config MIPS_VPE_LOADER_CMP
2434 depends on MIPS_VPE_LOADER && MIPS_CMP
2436 config MIPS_VPE_LOADER_MT
2439 depends on MIPS_VPE_LOADER && !MIPS_CMP
2441 config MIPS_VPE_LOADER_TOM
2442 bool "Load VPE program into memory hidden from linux"
2443 depends on MIPS_VPE_LOADER
2446 The loader can use memory that is present but has been hidden from
2447 Linux using the kernel command line option "mem=xxMB". It's up to
2448 you to ensure the amount you put in the option and the space your
2449 program requires is less or equal to the amount physically present.
2451 config MIPS_VPE_APSP_API
2452 bool "Enable support for AP/SP API (RTLX)"
2453 depends on MIPS_VPE_LOADER
2455 config MIPS_VPE_APSP_API_CMP
2458 depends on MIPS_VPE_APSP_API && MIPS_CMP
2460 config MIPS_VPE_APSP_API_MT
2463 depends on MIPS_VPE_APSP_API && !MIPS_CMP
2466 bool "MIPS CMP framework support (DEPRECATED)"
2467 depends on SYS_SUPPORTS_MIPS_CMP && !CPU_MIPSR6
2470 select SYS_SUPPORTS_SMP
2471 select WEAK_ORDERING
2474 Select this if you are using a bootloader which implements the "CMP
2475 framework" protocol (ie. YAMON) and want your kernel to make use of
2476 its ability to start secondary CPUs.
2478 Unless you have a specific need, you should use CONFIG_MIPS_CPS
2482 bool "MIPS Coherent Processing System support"
2483 depends on SYS_SUPPORTS_MIPS_CPS
2485 select MIPS_CPS_PM if HOTPLUG_CPU
2487 select SYNC_R4K if (CEVT_R4K || CSRC_R4K)
2488 select SYS_SUPPORTS_HOTPLUG_CPU
2489 select SYS_SUPPORTS_SCHED_SMT if CPU_MIPSR6
2490 select SYS_SUPPORTS_SMP
2491 select WEAK_ORDERING
2492 select GENERIC_IRQ_MIGRATION if HOTPLUG_CPU
2494 Select this if you wish to run an SMP kernel across multiple cores
2495 within a MIPS Coherent Processing System. When this option is
2496 enabled the kernel will probe for other cores and boot them with
2497 no external assistance. It is safe to enable this when hardware
2498 support is unavailable.
2511 config SB1_PASS_2_WORKAROUNDS
2513 depends on CPU_SB1 && (CPU_SB1_PASS_2_2 || CPU_SB1_PASS_2)
2516 config SB1_PASS_2_1_WORKAROUNDS
2518 depends on CPU_SB1 && CPU_SB1_PASS_2
2522 prompt "SmartMIPS or microMIPS ASE support"
2524 config CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS
2527 Select this if you want neither microMIPS nor SmartMIPS support
2529 config CPU_HAS_SMARTMIPS
2530 depends on SYS_SUPPORTS_SMARTMIPS
2533 SmartMIPS is a extension of the MIPS32 architecture aimed at
2534 increased security at both hardware and software level for
2535 smartcards. Enabling this option will allow proper use of the
2536 SmartMIPS instructions by Linux applications. However a kernel with
2537 this option will not work on a MIPS core without SmartMIPS core. If
2538 you don't know you probably don't have SmartMIPS and should say N
2541 config CPU_MICROMIPS
2542 depends on 32BIT && SYS_SUPPORTS_MICROMIPS && !CPU_MIPSR6
2545 When this option is enabled the kernel will be built using the
2551 bool "Support for the MIPS SIMD Architecture"
2552 depends on CPU_SUPPORTS_MSA
2553 depends on MIPS_FP_SUPPORT
2554 depends on 64BIT || MIPS_O32_FP64_SUPPORT
2556 MIPS SIMD Architecture (MSA) introduces 128 bit wide vector registers
2557 and a set of SIMD instructions to operate on them. When this option
2558 is enabled the kernel will support allocating & switching MSA
2559 vector register contexts. If you know that your kernel will only be
2560 running on CPUs which do not support MSA or that your userland will
2561 not be making use of it then you may wish to say N here to reduce
2562 the size & complexity of your kernel.
2573 depends on !CPU_DIEI_BROKEN
2576 config CPU_DIEI_BROKEN
2582 config CPU_NO_LOAD_STORE_LR
2585 CPU lacks support for unaligned load and store instructions:
2586 LWL, LWR, SWL, SWR (Load/store word left/right).
2587 LDL, LDR, SDL, SDR (Load/store doubleword left/right, for 64bit
2591 # Vectored interrupt mode is an R2 feature
2593 config CPU_MIPSR2_IRQ_VI
2597 # Extended interrupt mode is an R2 feature
2599 config CPU_MIPSR2_IRQ_EI
2604 depends on !CPU_R3000
2610 config CPU_DADDI_WORKAROUNDS
2613 config CPU_R4000_WORKAROUNDS
2615 select CPU_R4400_WORKAROUNDS
2617 config CPU_R4400_WORKAROUNDS
2620 config CPU_R4X00_BUGS64
2622 default y if SYS_HAS_CPU_R4X00 && 64BIT && (TARGET_ISA_REV < 1)
2624 config MIPS_ASID_SHIFT
2626 default 6 if CPU_R3000 || CPU_TX39XX
2629 config MIPS_ASID_BITS
2631 default 0 if MIPS_ASID_BITS_VARIABLE
2632 default 6 if CPU_R3000 || CPU_TX39XX
2635 config MIPS_ASID_BITS_VARIABLE
2638 config MIPS_CRC_SUPPORT
2641 # R4600 erratum. Due to the lack of errata information the exact
2642 # technical details aren't known. I've experimentally found that disabling
2643 # interrupts during indexed I-cache flushes seems to be sufficient to deal
2645 config WAR_R4600_V1_INDEX_ICACHEOP
2648 # Pleasures of the R4600 V1.x. Cite from the IDT R4600 V1.7 errata:
2650 # 18. The CACHE instructions Hit_Writeback_Invalidate_D, Hit_Writeback_D,
2651 # Hit_Invalidate_D and Create_Dirty_Excl_D should only be
2652 # executed if there is no other dcache activity. If the dcache is
2653 # accessed for another instruction immediately preceding when these
2654 # cache instructions are executing, it is possible that the dcache
2655 # tag match outputs used by these cache instructions will be
2656 # incorrect. These cache instructions should be preceded by at least
2657 # four instructions that are not any kind of load or store
2660 # This is not allowed: lw
2664 # cache Hit_Writeback_Invalidate_D
2666 # This is allowed: lw
2671 # cache Hit_Writeback_Invalidate_D
2672 config WAR_R4600_V1_HIT_CACHEOP
2675 # Writeback and invalidate the primary cache dcache before DMA.
2677 # R4600 v2.0 bug: "The CACHE instructions Hit_Writeback_Inv_D,
2678 # Hit_Writeback_D, Hit_Invalidate_D and Create_Dirty_Exclusive_D will only
2679 # operate correctly if the internal data cache refill buffer is empty. These
2680 # CACHE instructions should be separated from any potential data cache miss
2681 # by a load instruction to an uncached address to empty the response buffer."
2682 # (Revision 2.0 device errata from IDT available on https://www.idt.com/
2684 config WAR_R4600_V2_HIT_CACHEOP
2687 # From TX49/H2 manual: "If the instruction (i.e. CACHE) is issued for
2688 # the line which this instruction itself exists, the following
2689 # operation is not guaranteed."
2691 # Workaround: do two phase flushing for Index_Invalidate_I
2692 config WAR_TX49XX_ICACHE_INDEX_INV
2695 # The RM7000 processors and the E9000 cores have a bug (though PMC-Sierra
2696 # opposes it being called that) where invalid instructions in the same
2697 # I-cache line worth of instructions being fetched may case spurious
2699 config WAR_ICACHE_REFILLS
2702 # On the R10000 up to version 2.6 (not sure about 2.7) there is a bug that
2703 # may cause ll / sc and lld / scd sequences to execute non-atomically.
2704 config WAR_R10000_LLSC
2707 # 34K core erratum: "Problems Executing the TLBR Instruction"
2708 config WAR_MIPS34K_MISSED_ITLB
2712 # - Highmem only makes sense for the 32-bit kernel.
2713 # - The current highmem code will only work properly on physically indexed
2714 # caches such as R3000, SB1, R7000 or those that look like they're virtually
2715 # indexed such as R4000/R4400 SC and MC versions or R10000. So for the
2716 # moment we protect the user and offer the highmem option only on machines
2717 # where it's known to be safe. This will not offer highmem on a few systems
2718 # such as MIPS32 and MIPS64 CPUs which may have virtual and physically
2719 # indexed CPUs but we're playing safe.
2720 # - We use SYS_SUPPORTS_HIGHMEM to offer highmem only for systems where we
2721 # know they might have memory configurations that could make use of highmem
2725 bool "High Memory Support"
2726 depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM && !CPU_MIPS32_3_5_EVA
2729 config CPU_SUPPORTS_HIGHMEM
2732 config SYS_SUPPORTS_HIGHMEM
2735 config SYS_SUPPORTS_SMARTMIPS
2738 config SYS_SUPPORTS_MICROMIPS
2741 config SYS_SUPPORTS_MIPS16
2744 This option must be set if a kernel might be executed on a MIPS16-
2745 enabled CPU even if MIPS16 is not actually being used. In other
2746 words, it makes the kernel MIPS16-tolerant.
2748 config CPU_SUPPORTS_MSA
2751 config ARCH_FLATMEM_ENABLE
2753 depends on !NUMA && !CPU_LOONGSON2EF
2755 config ARCH_SPARSEMEM_ENABLE
2757 select SPARSEMEM_STATIC if !SGI_IP27
2761 depends on SYS_SUPPORTS_NUMA
2763 Say Y to compile the kernel to support NUMA (Non-Uniform Memory
2764 Access). This option improves performance on systems with more
2765 than two nodes; on two node systems it is generally better to
2766 leave it disabled; on single node systems leave this option
2769 config SYS_SUPPORTS_NUMA
2772 config HAVE_SETUP_PER_CPU_AREA
2776 config NEED_PER_CPU_EMBED_FIRST_CHUNK
2781 bool "Relocatable kernel"
2782 depends on SYS_SUPPORTS_RELOCATABLE
2783 depends on CPU_MIPS32_R2 || CPU_MIPS64_R2 || \
2784 CPU_MIPS32_R5 || CPU_MIPS64_R5 || \
2785 CPU_MIPS32_R6 || CPU_MIPS64_R6 || \
2786 CPU_P5600 || CAVIUM_OCTEON_SOC || \
2789 This builds a kernel image that retains relocation information
2790 so it can be loaded someplace besides the default 1MB.
2791 The relocations make the kernel binary about 15% larger,
2792 but are discarded at runtime
2794 config RELOCATION_TABLE_SIZE
2795 hex "Relocation table size"
2796 depends on RELOCATABLE
2797 range 0x0 0x01000000
2798 default "0x00200000" if CPU_LOONGSON64
2799 default "0x00100000"
2801 A table of relocation data will be appended to the kernel binary
2802 and parsed at boot to fix up the relocated kernel.
2804 This option allows the amount of space reserved for the table to be
2805 adjusted, although the default of 1Mb should be ok in most cases.
2807 The build will fail and a valid size suggested if this is too small.
2809 If unsure, leave at the default value.
2811 config RANDOMIZE_BASE
2812 bool "Randomize the address of the kernel image"
2813 depends on RELOCATABLE
2815 Randomizes the physical and virtual address at which the
2816 kernel image is loaded, as a security feature that
2817 deters exploit attempts relying on knowledge of the location
2818 of kernel internals.
2820 Entropy is generated using any coprocessor 0 registers available.
2822 The kernel will be offset by up to RANDOMIZE_BASE_MAX_OFFSET.
2826 config RANDOMIZE_BASE_MAX_OFFSET
2827 hex "Maximum kASLR offset" if EXPERT
2828 depends on RANDOMIZE_BASE
2829 range 0x0 0x40000000 if EVA || 64BIT
2830 range 0x0 0x08000000
2831 default "0x01000000"
2833 When kASLR is active, this provides the maximum offset that will
2834 be applied to the kernel image. It should be set according to the
2835 amount of physical RAM available in the target system minus
2836 PHYSICAL_START and must be a power of 2.
2838 This is limited by the size of KSEG0, 256Mb on 32-bit or 1Gb with
2839 EVA or 64-bit. The default is 16Mb.
2844 depends on NEED_MULTIPLE_NODES
2846 config HW_PERF_EVENTS
2847 bool "Enable hardware performance counter support for perf events"
2848 depends on PERF_EVENTS && !OPROFILE && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_XLP || CPU_LOONGSON64)
2851 Enable hardware performance counter support for perf events. If
2852 disabled, perf events will use software events only.
2855 bool "Enable DMI scanning"
2856 depends on MACH_LOONGSON64
2857 select DMI_SCAN_MACHINE_NON_EFI_FALLBACK
2860 Enabled scanning of DMI to identify machine quirks. Say Y
2861 here unless you have verified that your setup is not
2862 affected by entries in the DMI blacklist. Required by PNP
2866 bool "Multi-Processing support"
2867 depends on SYS_SUPPORTS_SMP
2869 This enables support for systems with more than one CPU. If you have
2870 a system with only one CPU, say N. If you have a system with more
2871 than one CPU, say Y.
2873 If you say N here, the kernel will run on uni- and multiprocessor
2874 machines, but will use only one CPU of a multiprocessor machine. If
2875 you say Y here, the kernel will run on many, but not all,
2876 uniprocessor machines. On a uniprocessor machine, the kernel
2877 will run faster if you say N here.
2879 People using multiprocessor machines who say Y here should also say
2880 Y to "Enhanced Real Time Clock Support", below.
2882 See also the SMP-HOWTO available at
2883 <https://www.tldp.org/docs.html#howto>.
2885 If you don't know what to do here, say N.
2888 bool "Support for hot-pluggable CPUs"
2889 depends on SMP && SYS_SUPPORTS_HOTPLUG_CPU
2891 Say Y here to allow turning CPUs off and on. CPUs can be
2892 controlled through /sys/devices/system/cpu.
2893 (Note: power management support will enable this option
2894 automatically on SMP systems. )
2895 Say N if you want to disable CPU hotplug.
2900 config SYS_SUPPORTS_MIPS_CMP
2903 config SYS_SUPPORTS_MIPS_CPS
2906 config SYS_SUPPORTS_SMP
2909 config NR_CPUS_DEFAULT_4
2912 config NR_CPUS_DEFAULT_8
2915 config NR_CPUS_DEFAULT_16
2918 config NR_CPUS_DEFAULT_32
2921 config NR_CPUS_DEFAULT_64
2925 int "Maximum number of CPUs (2-256)"
2928 default "4" if NR_CPUS_DEFAULT_4
2929 default "8" if NR_CPUS_DEFAULT_8
2930 default "16" if NR_CPUS_DEFAULT_16
2931 default "32" if NR_CPUS_DEFAULT_32
2932 default "64" if NR_CPUS_DEFAULT_64
2934 This allows you to specify the maximum number of CPUs which this
2935 kernel will support. The maximum supported value is 32 for 32-bit
2936 kernel and 64 for 64-bit kernels; the minimum value which makes
2937 sense is 1 for Qemu (useful only for kernel debugging purposes)
2938 and 2 for all others.
2940 This is purely to save memory - each supported CPU adds
2941 approximately eight kilobytes to the kernel image. For best
2942 performance should round up your number of processors to the next
2945 config MIPS_PERF_SHARED_TC_COUNTERS
2948 config MIPS_NR_CPU_NR_MAP_1024
2951 config MIPS_NR_CPU_NR_MAP
2954 default 1024 if MIPS_NR_CPU_NR_MAP_1024
2955 default NR_CPUS if !MIPS_NR_CPU_NR_MAP_1024
2958 # Timer Interrupt Frequency Configuration
2962 prompt "Timer frequency"
2965 Allows the configuration of the timer frequency.
2968 bool "24 HZ" if SYS_SUPPORTS_24HZ || SYS_SUPPORTS_ARBIT_HZ
2971 bool "48 HZ" if SYS_SUPPORTS_48HZ || SYS_SUPPORTS_ARBIT_HZ
2974 bool "100 HZ" if SYS_SUPPORTS_100HZ || SYS_SUPPORTS_ARBIT_HZ
2977 bool "128 HZ" if SYS_SUPPORTS_128HZ || SYS_SUPPORTS_ARBIT_HZ
2980 bool "250 HZ" if SYS_SUPPORTS_250HZ || SYS_SUPPORTS_ARBIT_HZ
2983 bool "256 HZ" if SYS_SUPPORTS_256HZ || SYS_SUPPORTS_ARBIT_HZ
2986 bool "1000 HZ" if SYS_SUPPORTS_1000HZ || SYS_SUPPORTS_ARBIT_HZ
2989 bool "1024 HZ" if SYS_SUPPORTS_1024HZ || SYS_SUPPORTS_ARBIT_HZ
2993 config SYS_SUPPORTS_24HZ
2996 config SYS_SUPPORTS_48HZ
2999 config SYS_SUPPORTS_100HZ
3002 config SYS_SUPPORTS_128HZ
3005 config SYS_SUPPORTS_250HZ
3008 config SYS_SUPPORTS_256HZ
3011 config SYS_SUPPORTS_1000HZ
3014 config SYS_SUPPORTS_1024HZ
3017 config SYS_SUPPORTS_ARBIT_HZ
3019 default y if !SYS_SUPPORTS_24HZ && \
3020 !SYS_SUPPORTS_48HZ && \
3021 !SYS_SUPPORTS_100HZ && \
3022 !SYS_SUPPORTS_128HZ && \
3023 !SYS_SUPPORTS_250HZ && \
3024 !SYS_SUPPORTS_256HZ && \
3025 !SYS_SUPPORTS_1000HZ && \
3026 !SYS_SUPPORTS_1024HZ
3032 default 100 if HZ_100
3033 default 128 if HZ_128
3034 default 250 if HZ_250
3035 default 256 if HZ_256
3036 default 1000 if HZ_1000
3037 default 1024 if HZ_1024
3040 def_bool HIGH_RES_TIMERS
3043 bool "Kexec system call"
3046 kexec is a system call that implements the ability to shutdown your
3047 current kernel, and to start another kernel. It is like a reboot
3048 but it is independent of the system firmware. And like a reboot
3049 you can start any kernel with it, not just Linux.
3051 The name comes from the similarity to the exec system call.
3053 It is an ongoing process to be certain the hardware in a machine
3054 is properly shutdown, so do not be surprised if this code does not
3055 initially work for you. As of this writing the exact hardware
3056 interface is strongly in flux, so no good recommendation can be
3060 bool "Kernel crash dumps"
3062 Generate crash dump after being started by kexec.
3063 This should be normally only set in special crash dump kernels
3064 which are loaded in the main kernel with kexec-tools into
3065 a specially reserved region and then later executed after
3066 a crash by kdump/kexec. The crash dump kernel must be compiled
3067 to a memory address not used by the main kernel or firmware using
3070 config PHYSICAL_START
3071 hex "Physical address where the kernel is loaded"
3072 default "0xffffffff84000000"
3073 depends on CRASH_DUMP
3075 This gives the CKSEG0 or KSEG0 address where the kernel is loaded.
3076 If you plan to use kernel for capturing the crash dump change
3077 this value to start of the reserved region (the "X" value as
3078 specified in the "crashkernel=YM@XM" command line boot parameter
3079 passed to the panic-ed kernel).
3081 config MIPS_O32_FP64_SUPPORT
3082 bool "Support for O32 binaries using 64-bit FP" if !CPU_MIPSR6
3083 depends on 32BIT || MIPS32_O32
3085 When this is enabled, the kernel will support use of 64-bit floating
3086 point registers with binaries using the O32 ABI along with the
3087 EF_MIPS_FP64 ELF header flag (typically built with -mfp64). On
3088 32-bit MIPS systems this support is at the cost of increasing the
3089 size and complexity of the compiled FPU emulator. Thus if you are
3090 running a MIPS32 system and know that none of your userland binaries
3091 will require 64-bit floating point, you may wish to reduce the size
3092 of your kernel & potentially improve FP emulation performance by
3095 Although binutils currently supports use of this flag the details
3096 concerning its effect upon the O32 ABI in userland are still being
3097 worked on. In order to avoid userland becoming dependent upon current
3098 behaviour before the details have been finalised, this option should
3099 be considered experimental and only enabled by those working upon
3107 select OF_EARLY_FLATTREE
3117 prompt "Kernel appended dtb support" if USE_OF
3118 default MIPS_NO_APPENDED_DTB
3120 config MIPS_NO_APPENDED_DTB
3123 Do not enable appended dtb support.
3125 config MIPS_ELF_APPENDED_DTB
3128 With this option, the boot code will look for a device tree binary
3129 DTB) included in the vmlinux ELF section .appended_dtb. By default
3130 it is empty and the DTB can be appended using binutils command
3133 objcopy --update-section .appended_dtb=<filename>.dtb vmlinux
3135 This is meant as a backward compatibility convenience for those
3136 systems with a bootloader that can't be upgraded to accommodate
3137 the documented boot protocol using a device tree.
3139 config MIPS_RAW_APPENDED_DTB
3140 bool "vmlinux.bin or vmlinuz.bin"
3142 With this option, the boot code will look for a device tree binary
3143 DTB) appended to raw vmlinux.bin or vmlinuz.bin.
3144 (e.g. cat vmlinux.bin <filename>.dtb > vmlinux_w_dtb).
3146 This is meant as a backward compatibility convenience for those
3147 systems with a bootloader that can't be upgraded to accommodate
3148 the documented boot protocol using a device tree.
3150 Beware that there is very little in terms of protection against
3151 this option being confused by leftover garbage in memory that might
3152 look like a DTB header after a reboot if no actual DTB is appended
3153 to vmlinux.bin. Do not leave this option active in a production kernel
3154 if you don't intend to always append a DTB.
3158 prompt "Kernel command line type" if !CMDLINE_OVERRIDE
3159 default MIPS_CMDLINE_FROM_DTB if USE_OF && !ATH79 && !MACH_INGENIC && \
3160 !MACH_LOONGSON64 && !MIPS_MALTA && \
3162 default MIPS_CMDLINE_FROM_BOOTLOADER
3164 config MIPS_CMDLINE_FROM_DTB
3166 bool "Dtb kernel arguments if available"
3168 config MIPS_CMDLINE_DTB_EXTEND
3170 bool "Extend dtb kernel arguments with bootloader arguments"
3172 config MIPS_CMDLINE_FROM_BOOTLOADER
3173 bool "Bootloader kernel arguments if available"
3175 config MIPS_CMDLINE_BUILTIN_EXTEND
3176 depends on CMDLINE_BOOL
3177 bool "Extend builtin kernel arguments with bootloader arguments"
3182 config LOCKDEP_SUPPORT
3186 config STACKTRACE_SUPPORT
3190 config PGTABLE_LEVELS
3192 default 4 if PAGE_SIZE_4KB && MIPS_VA_BITS_48
3193 default 3 if 64BIT && !PAGE_SIZE_64KB
3196 config MIPS_AUTO_PFN_OFFSET
3199 menu "Bus options (PCI, PCMCIA, EISA, ISA, TC)"
3201 config PCI_DRIVERS_GENERIC
3202 select PCI_DOMAINS_GENERIC if PCI
3205 config PCI_DRIVERS_LEGACY
3206 def_bool !PCI_DRIVERS_GENERIC
3207 select NO_GENERIC_PCI_IOPORT_MAP
3208 select PCI_DOMAINS if PCI
3211 # ISA support is now enabled via select. Too many systems still have the one
3212 # or other ISA chip on the board that users don't know about so don't expect
3213 # users to choose the right thing ...
3219 bool "TURBOchannel support"
3220 depends on MACH_DECSTATION
3222 TURBOchannel is a DEC (now Compaq (now HP)) bus for Alpha and MIPS
3223 processors. TURBOchannel programming specifications are available
3225 <ftp://ftp.hp.com/pub/alphaserver/archive/triadd/>
3227 <http://www.computer-refuge.org/classiccmp/ftp.digital.com/pub/DEC/TriAdd/>
3228 Linux driver support status is documented at:
3229 <http://www.linux-mips.org/wiki/DECstation>
3235 config ARCH_MMAP_RND_BITS_MIN
3239 config ARCH_MMAP_RND_BITS_MAX
3243 config ARCH_MMAP_RND_COMPAT_BITS_MIN
3246 config ARCH_MMAP_RND_COMPAT_BITS_MAX
3253 select MIPS_EXTERNAL_TIMER
3266 config MIPS32_COMPAT
3272 config SYSVIPC_COMPAT
3276 bool "Kernel support for o32 binaries"
3278 select ARCH_WANT_OLD_COMPAT_IPC
3280 select MIPS32_COMPAT
3281 select SYSVIPC_COMPAT if SYSVIPC
3283 Select this option if you want to run o32 binaries. These are pure
3284 32-bit binaries as used by the 32-bit Linux/MIPS port. Most of
3285 existing binaries are in this format.
3290 bool "Kernel support for n32 binaries"
3292 select ARCH_WANT_COMPAT_IPC_PARSE_VERSION
3294 select MIPS32_COMPAT
3295 select SYSVIPC_COMPAT if SYSVIPC
3297 Select this option if you want to run n32 binaries. These are
3298 64-bit binaries using 32-bit quantities for addressing and certain
3299 data that would normally be 64-bit. They are used in special
3306 default y if MIPS32_O32 || MIPS32_N32
3309 menu "Power management options"
3311 config ARCH_HIBERNATION_POSSIBLE
3313 depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
3315 config ARCH_SUSPEND_POSSIBLE
3317 depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
3319 source "kernel/power/Kconfig"
3323 config MIPS_EXTERNAL_TIMER
3326 menu "CPU Power Management"
3328 if CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER
3329 source "drivers/cpufreq/Kconfig"
3332 source "drivers/cpuidle/Kconfig"
3336 source "drivers/firmware/Kconfig"
3338 source "arch/mips/kvm/Kconfig"
3340 source "arch/mips/vdso/Kconfig"