2 * SMP support for PowerNV machines.
4 * Copyright 2011 IBM Corp.
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
12 #include <linux/kernel.h>
13 #include <linux/module.h>
14 #include <linux/sched.h>
15 #include <linux/sched/hotplug.h>
16 #include <linux/smp.h>
17 #include <linux/interrupt.h>
18 #include <linux/delay.h>
19 #include <linux/init.h>
20 #include <linux/spinlock.h>
21 #include <linux/cpu.h>
26 #include <asm/machdep.h>
27 #include <asm/cputable.h>
28 #include <asm/firmware.h>
29 #include <asm/vdso_datapage.h>
30 #include <asm/cputhreads.h>
34 #include <asm/runlatch.h>
35 #include <asm/code-patching.h>
36 #include <asm/dbell.h>
37 #include <asm/kvm_ppc.h>
38 #include <asm/ppc-opcode.h>
39 #include <asm/cpuidle.h>
45 #define DBG(fmt...) udbg_printf(fmt)
50 static void pnv_smp_setup_cpu(int cpu
)
54 else if (cpu
!= boot_cpuid
)
58 static int pnv_smp_kick_cpu(int nr
)
61 unsigned long start_here
=
62 __pa(ppc_function_entry(generic_secondary_smp_init
));
66 if (nr
< 0 || nr
>= nr_cpu_ids
)
69 pcpu
= get_hard_smp_processor_id(nr
);
71 * If we already started or OPAL is not supported, we just
72 * kick the CPU via the PACA
74 if (paca
[nr
].cpu_start
|| !firmware_has_feature(FW_FEATURE_OPAL
))
78 * At this point, the CPU can either be spinning on the way in
79 * from kexec or be inside OPAL waiting to be started for the
80 * first time. OPAL v3 allows us to query OPAL to know if it
81 * has the CPUs, so we do that
83 rc
= opal_query_cpu_status(pcpu
, &status
);
84 if (rc
!= OPAL_SUCCESS
) {
85 pr_warn("OPAL Error %ld querying CPU %d state\n", rc
, nr
);
90 * Already started, just kick it, probably coming from
93 if (status
== OPAL_THREAD_STARTED
)
97 * Available/inactive, let's kick it
99 if (status
== OPAL_THREAD_INACTIVE
) {
100 pr_devel("OPAL: Starting CPU %d (HW 0x%x)...\n", nr
, pcpu
);
101 rc
= opal_start_cpu(pcpu
, start_here
);
102 if (rc
!= OPAL_SUCCESS
) {
103 pr_warn("OPAL Error %ld starting CPU %d\n", rc
, nr
);
108 * An unavailable CPU (or any other unknown status)
109 * shouldn't be started. It should also
110 * not be in the possible map but currently it can
113 pr_devel("OPAL: CPU %d (HW 0x%x) is unavailable"
114 " (status %d)...\n", nr
, pcpu
, status
);
119 return smp_generic_kick_cpu(nr
);
122 #ifdef CONFIG_HOTPLUG_CPU
124 static int pnv_smp_cpu_disable(void)
126 int cpu
= smp_processor_id();
128 /* This is identical to pSeries... might consolidate by
129 * moving migrate_irqs_away to a ppc_md with default to
130 * the generic fixup_irqs. --BenH.
132 set_cpu_online(cpu
, false);
133 vdso_data
->processorCount
--;
134 if (cpu
== boot_cpuid
)
135 boot_cpuid
= cpumask_any(cpu_online_mask
);
137 xive_smp_disable_cpu();
139 xics_migrate_irqs_away();
143 static void pnv_smp_cpu_kill_self(void)
146 unsigned long srr1
, wmask
;
148 /* Standard hot unplug procedure */
150 * This hard disables local interurpts, ensuring we have no lazy
153 WARN_ON(irqs_disabled());
155 WARN_ON(lazy_irq_pending());
158 current
->active_mm
= NULL
; /* for sanity */
159 cpu
= smp_processor_id();
160 DBG("CPU%d offline\n", cpu
);
161 generic_set_cpu_dead(cpu
);
164 wmask
= SRR1_WAKEMASK
;
165 if (cpu_has_feature(CPU_FTR_ARCH_207S
))
166 wmask
= SRR1_WAKEMASK_P8
;
168 while (!generic_check_cpu_restart(cpu
)) {
170 * Clear IPI flag, since we don't handle IPIs while
171 * offline, except for those when changing micro-threading
172 * mode, which are handled explicitly below, and those
173 * for coming online, which are handled via
174 * generic_check_cpu_restart() calls.
176 kvmppc_set_host_ipi(cpu
, 0);
178 srr1
= pnv_cpu_offline(cpu
);
180 WARN_ON(lazy_irq_pending());
183 * If the SRR1 value indicates that we woke up due to
184 * an external interrupt, then clear the interrupt.
185 * We clear the interrupt before checking for the
186 * reason, so as to avoid a race where we wake up for
187 * some other reason, find nothing and clear the interrupt
188 * just as some other cpu is sending us an interrupt.
189 * If we returned from power7_nap as a result of
190 * having finished executing in a KVM guest, then srr1
193 if (((srr1
& wmask
) == SRR1_WAKEEE
) ||
194 ((srr1
& wmask
) == SRR1_WAKEHVI
)) {
195 if (cpu_has_feature(CPU_FTR_ARCH_300
)) {
197 xive_flush_interrupt();
199 icp_opal_flush_interrupt();
201 icp_native_flush_interrupt();
202 } else if ((srr1
& wmask
) == SRR1_WAKEHDBELL
) {
203 unsigned long msg
= PPC_DBELL_TYPE(PPC_DBELL_SERVER
);
204 asm volatile(PPC_MSGCLR(%0) : : "r" (msg
));
208 if (cpu_core_split_required())
211 if (srr1
&& !generic_check_cpu_restart(cpu
))
212 DBG("CPU%d Unexpected exit while offline srr1=%lx!\n",
217 DBG("CPU%d coming online...\n", cpu
);
220 #endif /* CONFIG_HOTPLUG_CPU */
222 static int pnv_cpu_bootable(unsigned int nr
)
225 * Starting with POWER8, the subcore logic relies on all threads of a
226 * core being booted so that they can participate in split mode
227 * switches. So on those machines we ignore the smt_enabled_at_boot
228 * setting (smt-enabled on the kernel command line).
230 if (cpu_has_feature(CPU_FTR_ARCH_207S
))
233 return smp_generic_cpu_bootable(nr
);
236 static int pnv_smp_prepare_cpu(int cpu
)
239 return xive_smp_prepare_cpu(cpu
);
243 /* Cause IPI as setup by the interrupt controller (xics or xive) */
244 static void (*ic_cause_ipi
)(int cpu
);
246 static void pnv_cause_ipi(int cpu
)
248 if (doorbell_try_core_ipi(cpu
))
254 static void pnv_p9_dd1_cause_ipi(int cpu
)
256 int this_cpu
= get_cpu();
259 * POWER9 DD1 has a global addressed msgsnd, but for now we restrict
260 * IPIs to same core, because it requires additional synchronization
261 * for inter-core doorbells which we do not implement.
263 if (cpumask_test_cpu(cpu
, cpu_sibling_mask(this_cpu
)))
264 doorbell_global_ipi(cpu
);
271 static void __init
pnv_smp_probe(void)
278 if (cpu_has_feature(CPU_FTR_DBELL
)) {
279 ic_cause_ipi
= smp_ops
->cause_ipi
;
280 WARN_ON(!ic_cause_ipi
);
282 if (cpu_has_feature(CPU_FTR_ARCH_300
)) {
283 if (cpu_has_feature(CPU_FTR_POWER9_DD1
))
284 smp_ops
->cause_ipi
= pnv_p9_dd1_cause_ipi
;
286 smp_ops
->cause_ipi
= doorbell_global_ipi
;
288 smp_ops
->cause_ipi
= pnv_cause_ipi
;
293 static struct smp_ops_t pnv_smp_ops
= {
294 .message_pass
= NULL
, /* Use smp_muxed_ipi_message_pass */
295 .cause_ipi
= NULL
, /* Filled at runtime by pnv_smp_probe() */
296 .cause_nmi_ipi
= NULL
,
297 .probe
= pnv_smp_probe
,
298 .prepare_cpu
= pnv_smp_prepare_cpu
,
299 .kick_cpu
= pnv_smp_kick_cpu
,
300 .setup_cpu
= pnv_smp_setup_cpu
,
301 .cpu_bootable
= pnv_cpu_bootable
,
302 #ifdef CONFIG_HOTPLUG_CPU
303 .cpu_disable
= pnv_smp_cpu_disable
,
304 .cpu_die
= generic_cpu_die
,
305 #endif /* CONFIG_HOTPLUG_CPU */
308 /* This is called very early during platform setup_arch */
309 void __init
pnv_smp_init(void)
311 smp_ops
= &pnv_smp_ops
;
313 #ifdef CONFIG_HOTPLUG_CPU
314 ppc_md
.cpu_die
= pnv_smp_cpu_kill_self
;