3 * Copyright IBM Corporation 2001, 2005, 2006
4 * Copyright Dave Engebretsen & Todd Inglett 2001
5 * Copyright Linas Vepstas 2005, 2006
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 * Please address comments and feedback to Linas Vepstas <linas@austin.ibm.com>
24 #include <linux/delay.h>
25 #include <linux/init.h>
26 #include <linux/list.h>
27 #include <linux/pci.h>
28 #include <linux/proc_fs.h>
29 #include <linux/rbtree.h>
30 #include <linux/seq_file.h>
31 #include <linux/spinlock.h>
34 #include <asm/atomic.h>
36 #include <asm/eeh_event.h>
38 #include <asm/machdep.h>
39 #include <asm/ppc-pci.h>
44 * EEH, or "Extended Error Handling" is a PCI bridge technology for
45 * dealing with PCI bus errors that can't be dealt with within the
46 * usual PCI framework, except by check-stopping the CPU. Systems
47 * that are designed for high-availability/reliability cannot afford
48 * to crash due to a "mere" PCI error, thus the need for EEH.
49 * An EEH-capable bridge operates by converting a detected error
50 * into a "slot freeze", taking the PCI adapter off-line, making
51 * the slot behave, from the OS'es point of view, as if the slot
52 * were "empty": all reads return 0xff's and all writes are silently
53 * ignored. EEH slot isolation events can be triggered by parity
54 * errors on the address or data busses (e.g. during posted writes),
55 * which in turn might be caused by low voltage on the bus, dust,
56 * vibration, humidity, radioactivity or plain-old failed hardware.
58 * Note, however, that one of the leading causes of EEH slot
59 * freeze events are buggy device drivers, buggy device microcode,
60 * or buggy device hardware. This is because any attempt by the
61 * device to bus-master data to a memory address that is not
62 * assigned to the device will trigger a slot freeze. (The idea
63 * is to prevent devices-gone-wild from corrupting system memory).
64 * Buggy hardware/drivers will have a miserable time co-existing
67 * Ideally, a PCI device driver, when suspecting that an isolation
68 * event has occured (e.g. by reading 0xff's), will then ask EEH
69 * whether this is the case, and then take appropriate steps to
70 * reset the PCI slot, the PCI device, and then resume operations.
71 * However, until that day, the checking is done here, with the
72 * eeh_check_failure() routine embedded in the MMIO macros. If
73 * the slot is found to be isolated, an "EEH Event" is synthesized
74 * and sent out for processing.
77 /* If a device driver keeps reading an MMIO register in an interrupt
78 * handler after a slot isolation event has occurred, we assume it
79 * is broken and panic. This sets the threshold for how many read
80 * attempts we allow before panicking.
82 #define EEH_MAX_FAILS 2100000
84 /* Time to wait for a PCI slot to report status, in milliseconds */
85 #define PCI_BUS_RESET_WAIT_MSEC (60*1000)
88 static int ibm_set_eeh_option
;
89 static int ibm_set_slot_reset
;
90 static int ibm_read_slot_reset_state
;
91 static int ibm_read_slot_reset_state2
;
92 static int ibm_slot_error_detail
;
93 static int ibm_get_config_addr_info
;
94 static int ibm_get_config_addr_info2
;
95 static int ibm_configure_bridge
;
97 int eeh_subsystem_enabled
;
98 EXPORT_SYMBOL(eeh_subsystem_enabled
);
100 /* Lock to avoid races due to multiple reports of an error */
101 static DEFINE_SPINLOCK(confirm_error_lock
);
103 /* Buffer for reporting slot-error-detail rtas calls. Its here
104 * in BSS, and not dynamically alloced, so that it ends up in
105 * RMO where RTAS can access it.
107 static unsigned char slot_errbuf
[RTAS_ERROR_LOG_MAX
];
108 static DEFINE_SPINLOCK(slot_errbuf_lock
);
109 static int eeh_error_buf_size
;
111 /* Buffer for reporting pci register dumps. Its here in BSS, and
112 * not dynamically alloced, so that it ends up in RMO where RTAS
115 #define EEH_PCI_REGS_LOG_LEN 4096
116 static unsigned char pci_regs_buf
[EEH_PCI_REGS_LOG_LEN
];
118 /* System monitoring statistics */
119 static unsigned long no_device
;
120 static unsigned long no_dn
;
121 static unsigned long no_cfg_addr
;
122 static unsigned long ignored_check
;
123 static unsigned long total_mmio_ffs
;
124 static unsigned long false_positives
;
125 static unsigned long slot_resets
;
127 #define IS_BRIDGE(class_code) (((class_code)<<16) == PCI_BASE_CLASS_BRIDGE)
129 /* --------------------------------------------------------------- */
130 /* Below lies the EEH event infrastructure */
132 static void rtas_slot_error_detail(struct pci_dn
*pdn
, int severity
,
133 char *driver_log
, size_t loglen
)
139 /* Log the error with the rtas logger */
140 spin_lock_irqsave(&slot_errbuf_lock
, flags
);
141 memset(slot_errbuf
, 0, eeh_error_buf_size
);
143 /* Use PE configuration address, if present */
144 config_addr
= pdn
->eeh_config_addr
;
145 if (pdn
->eeh_pe_config_addr
)
146 config_addr
= pdn
->eeh_pe_config_addr
;
148 rc
= rtas_call(ibm_slot_error_detail
,
149 8, 1, NULL
, config_addr
,
150 BUID_HI(pdn
->phb
->buid
),
151 BUID_LO(pdn
->phb
->buid
),
152 virt_to_phys(driver_log
), loglen
,
153 virt_to_phys(slot_errbuf
),
158 log_error(slot_errbuf
, ERR_TYPE_RTAS_LOG
, 0);
159 spin_unlock_irqrestore(&slot_errbuf_lock
, flags
);
163 * gather_pci_data - copy assorted PCI config space registers to buff
164 * @pdn: device to report data for
165 * @buf: point to buffer in which to log
166 * @len: amount of room in buffer
168 * This routine captures assorted PCI configuration space data,
169 * and puts them into a buffer for RTAS error logging.
171 static size_t gather_pci_data(struct pci_dn
*pdn
, char * buf
, size_t len
)
173 struct pci_dev
*dev
= pdn
->pcidev
;
178 n
+= scnprintf(buf
+n
, len
-n
, "%s\n", pdn
->node
->full_name
);
179 printk(KERN_WARNING
"EEH: of node=%s\n", pdn
->node
->full_name
);
181 rtas_read_config(pdn
, PCI_VENDOR_ID
, 4, &cfg
);
182 n
+= scnprintf(buf
+n
, len
-n
, "dev/vend:%08x\n", cfg
);
183 printk(KERN_WARNING
"EEH: PCI device/vendor: %08x\n", cfg
);
185 rtas_read_config(pdn
, PCI_COMMAND
, 4, &cfg
);
186 n
+= scnprintf(buf
+n
, len
-n
, "cmd/stat:%x\n", cfg
);
187 printk(KERN_WARNING
"EEH: PCI cmd/status register: %08x\n", cfg
);
190 printk(KERN_WARNING
"EEH: no PCI device for this of node\n");
194 /* Gather bridge-specific registers */
195 if (dev
->class >> 16 == PCI_BASE_CLASS_BRIDGE
) {
196 rtas_read_config(pdn
, PCI_SEC_STATUS
, 2, &cfg
);
197 n
+= scnprintf(buf
+n
, len
-n
, "sec stat:%x\n", cfg
);
198 printk(KERN_WARNING
"EEH: Bridge secondary status: %04x\n", cfg
);
200 rtas_read_config(pdn
, PCI_BRIDGE_CONTROL
, 2, &cfg
);
201 n
+= scnprintf(buf
+n
, len
-n
, "brdg ctl:%x\n", cfg
);
202 printk(KERN_WARNING
"EEH: Bridge control: %04x\n", cfg
);
205 /* Dump out the PCI-X command and status regs */
206 cap
= pci_find_capability(dev
, PCI_CAP_ID_PCIX
);
208 rtas_read_config(pdn
, cap
, 4, &cfg
);
209 n
+= scnprintf(buf
+n
, len
-n
, "pcix-cmd:%x\n", cfg
);
210 printk(KERN_WARNING
"EEH: PCI-X cmd: %08x\n", cfg
);
212 rtas_read_config(pdn
, cap
+4, 4, &cfg
);
213 n
+= scnprintf(buf
+n
, len
-n
, "pcix-stat:%x\n", cfg
);
214 printk(KERN_WARNING
"EEH: PCI-X status: %08x\n", cfg
);
217 /* If PCI-E capable, dump PCI-E cap 10, and the AER */
218 cap
= pci_find_capability(dev
, PCI_CAP_ID_EXP
);
220 n
+= scnprintf(buf
+n
, len
-n
, "pci-e cap10:\n");
222 "EEH: PCI-E capabilities and status follow:\n");
224 for (i
=0; i
<=8; i
++) {
225 rtas_read_config(pdn
, cap
+4*i
, 4, &cfg
);
226 n
+= scnprintf(buf
+n
, len
-n
, "%02x:%x\n", 4*i
, cfg
);
227 printk(KERN_WARNING
"EEH: PCI-E %02x: %08x\n", i
, cfg
);
230 cap
= pci_find_ext_capability(dev
, PCI_EXT_CAP_ID_ERR
);
232 n
+= scnprintf(buf
+n
, len
-n
, "pci-e AER:\n");
234 "EEH: PCI-E AER capability register set follows:\n");
236 for (i
=0; i
<14; i
++) {
237 rtas_read_config(pdn
, cap
+4*i
, 4, &cfg
);
238 n
+= scnprintf(buf
+n
, len
-n
, "%02x:%x\n", 4*i
, cfg
);
239 printk(KERN_WARNING
"EEH: PCI-E AER %02x: %08x\n", i
, cfg
);
244 /* Gather status on devices under the bridge */
245 if (dev
->class >> 16 == PCI_BASE_CLASS_BRIDGE
) {
246 struct device_node
*dn
;
248 for_each_child_of_node(pdn
->node
, dn
) {
251 n
+= gather_pci_data(pdn
, buf
+n
, len
-n
);
258 void eeh_slot_error_detail(struct pci_dn
*pdn
, int severity
)
263 rtas_pci_enable(pdn
, EEH_THAW_MMIO
);
264 loglen
= gather_pci_data(pdn
, pci_regs_buf
, EEH_PCI_REGS_LOG_LEN
);
266 rtas_slot_error_detail(pdn
, severity
, pci_regs_buf
, loglen
);
270 * read_slot_reset_state - Read the reset state of a device node's slot
271 * @dn: device node to read
272 * @rets: array to return results in
274 static int read_slot_reset_state(struct pci_dn
*pdn
, int rets
[])
279 if (ibm_read_slot_reset_state2
!= RTAS_UNKNOWN_SERVICE
) {
280 token
= ibm_read_slot_reset_state2
;
283 token
= ibm_read_slot_reset_state
;
284 rets
[2] = 0; /* fake PE Unavailable info */
288 /* Use PE configuration address, if present */
289 config_addr
= pdn
->eeh_config_addr
;
290 if (pdn
->eeh_pe_config_addr
)
291 config_addr
= pdn
->eeh_pe_config_addr
;
293 return rtas_call(token
, 3, outputs
, rets
, config_addr
,
294 BUID_HI(pdn
->phb
->buid
), BUID_LO(pdn
->phb
->buid
));
298 * eeh_wait_for_slot_status - returns error status of slot
299 * @pdn pci device node
300 * @max_wait_msecs maximum number to millisecs to wait
302 * Return negative value if a permanent error, else return
303 * Partition Endpoint (PE) status value.
305 * If @max_wait_msecs is positive, then this routine will
306 * sleep until a valid status can be obtained, or until
307 * the max allowed wait time is exceeded, in which case
311 eeh_wait_for_slot_status(struct pci_dn
*pdn
, int max_wait_msecs
)
318 rc
= read_slot_reset_state(pdn
, rets
);
320 if (rets
[1] == 0) return -1; /* EEH is not supported */
322 if (rets
[0] != 5) return rets
[0]; /* return actual status */
324 if (rets
[2] == 0) return -1; /* permanently unavailable */
326 if (max_wait_msecs
<= 0) break;
331 "EEH: Firmware returned bad wait value=%d\n", mwait
);
333 } else if (mwait
> 300*1000) {
335 "EEH: Firmware is taking too long, time=%d\n", mwait
);
338 max_wait_msecs
-= mwait
;
342 printk(KERN_WARNING
"EEH: Timed out waiting for slot status\n");
347 * eeh_token_to_phys - convert EEH address token to phys address
348 * @token i/o token, should be address in the form 0xA....
350 static inline unsigned long eeh_token_to_phys(unsigned long token
)
355 ptep
= find_linux_pte(init_mm
.pgd
, token
);
358 pa
= pte_pfn(*ptep
) << PAGE_SHIFT
;
360 return pa
| (token
& (PAGE_SIZE
-1));
364 * Return the "partitionable endpoint" (pe) under which this device lies
366 struct device_node
* find_device_pe(struct device_node
*dn
)
368 while ((dn
->parent
) && PCI_DN(dn
->parent
) &&
369 (PCI_DN(dn
->parent
)->eeh_mode
& EEH_MODE_SUPPORTED
)) {
375 /** Mark all devices that are children of this device as failed.
376 * Mark the device driver too, so that it can see the failure
377 * immediately; this is critical, since some drivers poll
378 * status registers in interrupts ... If a driver is polling,
379 * and the slot is frozen, then the driver can deadlock in
380 * an interrupt context, which is bad.
383 static void __eeh_mark_slot(struct device_node
*parent
, int mode_flag
)
385 struct device_node
*dn
;
387 for_each_child_of_node(parent
, dn
) {
389 /* Mark the pci device driver too */
390 struct pci_dev
*dev
= PCI_DN(dn
)->pcidev
;
392 PCI_DN(dn
)->eeh_mode
|= mode_flag
;
394 if (dev
&& dev
->driver
)
395 dev
->error_state
= pci_channel_io_frozen
;
397 __eeh_mark_slot(dn
, mode_flag
);
402 void eeh_mark_slot (struct device_node
*dn
, int mode_flag
)
405 dn
= find_device_pe (dn
);
407 /* Back up one, since config addrs might be shared */
408 if (!pcibios_find_pci_bus(dn
) && PCI_DN(dn
->parent
))
411 PCI_DN(dn
)->eeh_mode
|= mode_flag
;
413 /* Mark the pci device too */
414 dev
= PCI_DN(dn
)->pcidev
;
416 dev
->error_state
= pci_channel_io_frozen
;
418 __eeh_mark_slot(dn
, mode_flag
);
421 static void __eeh_clear_slot(struct device_node
*parent
, int mode_flag
)
423 struct device_node
*dn
;
425 for_each_child_of_node(parent
, dn
) {
427 PCI_DN(dn
)->eeh_mode
&= ~mode_flag
;
428 PCI_DN(dn
)->eeh_check_count
= 0;
429 __eeh_clear_slot(dn
, mode_flag
);
434 void eeh_clear_slot (struct device_node
*dn
, int mode_flag
)
437 spin_lock_irqsave(&confirm_error_lock
, flags
);
439 dn
= find_device_pe (dn
);
441 /* Back up one, since config addrs might be shared */
442 if (!pcibios_find_pci_bus(dn
) && PCI_DN(dn
->parent
))
445 PCI_DN(dn
)->eeh_mode
&= ~mode_flag
;
446 PCI_DN(dn
)->eeh_check_count
= 0;
447 __eeh_clear_slot(dn
, mode_flag
);
448 spin_unlock_irqrestore(&confirm_error_lock
, flags
);
452 * eeh_dn_check_failure - check if all 1's data is due to EEH slot freeze
454 * @dev pci device, if known
456 * Check for an EEH failure for the given device node. Call this
457 * routine if the result of a read was all 0xff's and you want to
458 * find out if this is due to an EEH slot freeze. This routine
459 * will query firmware for the EEH status.
461 * Returns 0 if there has not been an EEH error; otherwise returns
462 * a non-zero value and queues up a slot isolation event notification.
464 * It is safe to call this routine in an interrupt context.
466 int eeh_dn_check_failure(struct device_node
*dn
, struct pci_dev
*dev
)
476 if (!eeh_subsystem_enabled
)
483 dn
= find_device_pe(dn
);
486 /* Access to IO BARs might get this far and still not want checking. */
487 if (!(pdn
->eeh_mode
& EEH_MODE_SUPPORTED
) ||
488 pdn
->eeh_mode
& EEH_MODE_NOCHECK
) {
491 printk ("EEH:ignored check (%x) for %s %s\n",
492 pdn
->eeh_mode
, pci_name (dev
), dn
->full_name
);
497 if (!pdn
->eeh_config_addr
&& !pdn
->eeh_pe_config_addr
) {
502 /* If we already have a pending isolation event for this
503 * slot, we know it's bad already, we don't need to check.
504 * Do this checking under a lock; as multiple PCI devices
505 * in one slot might report errors simultaneously, and we
506 * only want one error recovery routine running.
508 spin_lock_irqsave(&confirm_error_lock
, flags
);
510 if (pdn
->eeh_mode
& EEH_MODE_ISOLATED
) {
511 pdn
->eeh_check_count
++;
512 if (pdn
->eeh_check_count
>= EEH_MAX_FAILS
) {
513 printk (KERN_ERR
"EEH: Device driver ignored %d bad reads, panicing\n",
514 pdn
->eeh_check_count
);
518 /* re-read the slot reset state */
519 if (read_slot_reset_state(pdn
, rets
) != 0)
520 rets
[0] = -1; /* reset state unknown */
522 /* If we are here, then we hit an infinite loop. Stop. */
523 panic("EEH: MMIO halt (%d) on device:%s\n", rets
[0], pci_name(dev
));
529 * Now test for an EEH failure. This is VERY expensive.
530 * Note that the eeh_config_addr may be a parent device
531 * in the case of a device behind a bridge, or it may be
532 * function zero of a multi-function device.
533 * In any case they must share a common PHB.
535 ret
= read_slot_reset_state(pdn
, rets
);
537 /* If the call to firmware failed, punt */
539 printk(KERN_WARNING
"EEH: read_slot_reset_state() failed; rc=%d dn=%s\n",
542 pdn
->eeh_false_positives
++;
547 /* Note that config-io to empty slots may fail;
548 * they are empty when they don't have children. */
549 if ((rets
[0] == 5) && (rets
[2] == 0) && (dn
->child
== NULL
)) {
551 pdn
->eeh_false_positives
++;
556 /* If EEH is not supported on this device, punt. */
558 printk(KERN_WARNING
"EEH: event on unsupported device, rc=%d dn=%s\n",
561 pdn
->eeh_false_positives
++;
566 /* If not the kind of error we know about, punt. */
567 if (rets
[0] != 1 && rets
[0] != 2 && rets
[0] != 4 && rets
[0] != 5) {
569 pdn
->eeh_false_positives
++;
576 /* Avoid repeated reports of this failure, including problems
577 * with other functions on this device, and functions under
579 eeh_mark_slot (dn
, EEH_MODE_ISOLATED
);
580 spin_unlock_irqrestore(&confirm_error_lock
, flags
);
582 eeh_send_failure_event (dn
, dev
);
584 /* Most EEH events are due to device driver bugs. Having
585 * a stack trace will help the device-driver authors figure
586 * out what happened. So print that out. */
591 spin_unlock_irqrestore(&confirm_error_lock
, flags
);
595 EXPORT_SYMBOL_GPL(eeh_dn_check_failure
);
598 * eeh_check_failure - check if all 1's data is due to EEH slot freeze
599 * @token i/o token, should be address in the form 0xA....
600 * @val value, should be all 1's (XXX why do we need this arg??)
602 * Check for an EEH failure at the given token address. Call this
603 * routine if the result of a read was all 0xff's and you want to
604 * find out if this is due to an EEH slot freeze event. This routine
605 * will query firmware for the EEH status.
607 * Note this routine is safe to call in an interrupt context.
609 unsigned long eeh_check_failure(const volatile void __iomem
*token
, unsigned long val
)
613 struct device_node
*dn
;
615 /* Finding the phys addr + pci device; this is pretty quick. */
616 addr
= eeh_token_to_phys((unsigned long __force
) token
);
617 dev
= pci_get_device_by_addr(addr
);
623 dn
= pci_device_to_OF_node(dev
);
624 eeh_dn_check_failure (dn
, dev
);
630 EXPORT_SYMBOL(eeh_check_failure
);
632 /* ------------------------------------------------------------- */
633 /* The code below deals with error recovery */
636 * rtas_pci_enable - enable MMIO or DMA transfers for this slot
637 * @pdn pci device node
641 rtas_pci_enable(struct pci_dn
*pdn
, int function
)
646 /* Use PE configuration address, if present */
647 config_addr
= pdn
->eeh_config_addr
;
648 if (pdn
->eeh_pe_config_addr
)
649 config_addr
= pdn
->eeh_pe_config_addr
;
651 rc
= rtas_call(ibm_set_eeh_option
, 4, 1, NULL
,
653 BUID_HI(pdn
->phb
->buid
),
654 BUID_LO(pdn
->phb
->buid
),
658 printk(KERN_WARNING
"EEH: Unexpected state change %d, err=%d dn=%s\n",
659 function
, rc
, pdn
->node
->full_name
);
661 rc
= eeh_wait_for_slot_status (pdn
, PCI_BUS_RESET_WAIT_MSEC
);
662 if ((rc
== 4) && (function
== EEH_THAW_MMIO
))
669 * rtas_pci_slot_reset - raises/lowers the pci #RST line
670 * @pdn pci device node
671 * @state: 1/0 to raise/lower the #RST
673 * Clear the EEH-frozen condition on a slot. This routine
674 * asserts the PCI #RST line if the 'state' argument is '1',
675 * and drops the #RST line if 'state is '0'. This routine is
676 * safe to call in an interrupt context.
681 rtas_pci_slot_reset(struct pci_dn
*pdn
, int state
)
689 printk (KERN_WARNING
"EEH: in slot reset, device node %s has no phb\n",
690 pdn
->node
->full_name
);
694 /* Use PE configuration address, if present */
695 config_addr
= pdn
->eeh_config_addr
;
696 if (pdn
->eeh_pe_config_addr
)
697 config_addr
= pdn
->eeh_pe_config_addr
;
699 rc
= rtas_call(ibm_set_slot_reset
,4,1, NULL
,
701 BUID_HI(pdn
->phb
->buid
),
702 BUID_LO(pdn
->phb
->buid
),
705 printk (KERN_WARNING
"EEH: Unable to reset the failed slot,"
706 " (%d) #RST=%d dn=%s\n",
707 rc
, state
, pdn
->node
->full_name
);
711 * pcibios_set_pcie_slot_reset - Set PCI-E reset state
712 * @dev: pci device struct
713 * @state: reset state to enter
718 int pcibios_set_pcie_reset_state(struct pci_dev
*dev
, enum pcie_reset_state state
)
720 struct device_node
*dn
= pci_device_to_OF_node(dev
);
721 struct pci_dn
*pdn
= PCI_DN(dn
);
724 case pcie_deassert_reset
:
725 rtas_pci_slot_reset(pdn
, 0);
728 rtas_pci_slot_reset(pdn
, 1);
730 case pcie_warm_reset
:
731 rtas_pci_slot_reset(pdn
, 3);
741 * rtas_set_slot_reset -- assert the pci #RST line for 1/4 second
742 * @pdn: pci device node to be reset.
744 * Return 0 if success, else a non-zero value.
747 static void __rtas_set_slot_reset(struct pci_dn
*pdn
)
749 rtas_pci_slot_reset (pdn
, 1);
751 /* The PCI bus requires that the reset be held high for at least
752 * a 100 milliseconds. We wait a bit longer 'just in case'. */
754 #define PCI_BUS_RST_HOLD_TIME_MSEC 250
755 msleep (PCI_BUS_RST_HOLD_TIME_MSEC
);
757 /* We might get hit with another EEH freeze as soon as the
758 * pci slot reset line is dropped. Make sure we don't miss
759 * these, and clear the flag now. */
760 eeh_clear_slot (pdn
->node
, EEH_MODE_ISOLATED
);
762 rtas_pci_slot_reset (pdn
, 0);
764 /* After a PCI slot has been reset, the PCI Express spec requires
765 * a 1.5 second idle time for the bus to stabilize, before starting
767 #define PCI_BUS_SETTLE_TIME_MSEC 1800
768 msleep (PCI_BUS_SETTLE_TIME_MSEC
);
771 int rtas_set_slot_reset(struct pci_dn
*pdn
)
775 /* Take three shots at resetting the bus */
776 for (i
=0; i
<3; i
++) {
777 __rtas_set_slot_reset(pdn
);
779 rc
= eeh_wait_for_slot_status(pdn
, PCI_BUS_RESET_WAIT_MSEC
);
784 printk(KERN_ERR
"EEH: unrecoverable slot failure %s\n",
785 pdn
->node
->full_name
);
788 printk(KERN_ERR
"EEH: bus reset %d failed on slot %s, rc=%d\n",
789 i
+1, pdn
->node
->full_name
, rc
);
795 /* ------------------------------------------------------- */
796 /** Save and restore of PCI BARs
798 * Although firmware will set up BARs during boot, it doesn't
799 * set up device BAR's after a device reset, although it will,
800 * if requested, set up bridge configuration. Thus, we need to
801 * configure the PCI devices ourselves.
805 * __restore_bars - Restore the Base Address Registers
806 * @pdn: pci device node
808 * Loads the PCI configuration space base address registers,
809 * the expansion ROM base address, the latency timer, and etc.
810 * from the saved values in the device node.
812 static inline void __restore_bars (struct pci_dn
*pdn
)
816 if (NULL
==pdn
->phb
) return;
817 for (i
=4; i
<10; i
++) {
818 rtas_write_config(pdn
, i
*4, 4, pdn
->config_space
[i
]);
821 /* 12 == Expansion ROM Address */
822 rtas_write_config(pdn
, 12*4, 4, pdn
->config_space
[12]);
824 #define BYTE_SWAP(OFF) (8*((OFF)/4)+3-(OFF))
825 #define SAVED_BYTE(OFF) (((u8 *)(pdn->config_space))[BYTE_SWAP(OFF)])
827 rtas_write_config (pdn
, PCI_CACHE_LINE_SIZE
, 1,
828 SAVED_BYTE(PCI_CACHE_LINE_SIZE
));
830 rtas_write_config (pdn
, PCI_LATENCY_TIMER
, 1,
831 SAVED_BYTE(PCI_LATENCY_TIMER
));
833 /* max latency, min grant, interrupt pin and line */
834 rtas_write_config(pdn
, 15*4, 4, pdn
->config_space
[15]);
838 * eeh_restore_bars - restore the PCI config space info
840 * This routine performs a recursive walk to the children
841 * of this device as well.
843 void eeh_restore_bars(struct pci_dn
*pdn
)
845 struct device_node
*dn
;
849 if ((pdn
->eeh_mode
& EEH_MODE_SUPPORTED
) && !IS_BRIDGE(pdn
->class_code
))
850 __restore_bars (pdn
);
852 for_each_child_of_node(pdn
->node
, dn
)
853 eeh_restore_bars (PCI_DN(dn
));
857 * eeh_save_bars - save device bars
859 * Save the values of the device bars. Unlike the restore
860 * routine, this routine is *not* recursive. This is because
861 * PCI devices are added individuallly; but, for the restore,
862 * an entire slot is reset at a time.
864 static void eeh_save_bars(struct pci_dn
*pdn
)
871 for (i
= 0; i
< 16; i
++)
872 rtas_read_config(pdn
, i
* 4, 4, &pdn
->config_space
[i
]);
876 rtas_configure_bridge(struct pci_dn
*pdn
)
881 /* Use PE configuration address, if present */
882 config_addr
= pdn
->eeh_config_addr
;
883 if (pdn
->eeh_pe_config_addr
)
884 config_addr
= pdn
->eeh_pe_config_addr
;
886 rc
= rtas_call(ibm_configure_bridge
,3,1, NULL
,
888 BUID_HI(pdn
->phb
->buid
),
889 BUID_LO(pdn
->phb
->buid
));
891 printk (KERN_WARNING
"EEH: Unable to configure device bridge (%d) for %s\n",
892 rc
, pdn
->node
->full_name
);
896 /* ------------------------------------------------------------- */
897 /* The code below deals with enabling EEH for devices during the
898 * early boot sequence. EEH must be enabled before any PCI probing
904 struct eeh_early_enable_info
{
905 unsigned int buid_hi
;
906 unsigned int buid_lo
;
909 static int get_pe_addr (int config_addr
,
910 struct eeh_early_enable_info
*info
)
912 unsigned int rets
[3];
915 /* Use latest config-addr token on power6 */
916 if (ibm_get_config_addr_info2
!= RTAS_UNKNOWN_SERVICE
) {
917 /* Make sure we have a PE in hand */
918 ret
= rtas_call (ibm_get_config_addr_info2
, 4, 2, rets
,
919 config_addr
, info
->buid_hi
, info
->buid_lo
, 1);
920 if (ret
|| (rets
[0]==0))
923 ret
= rtas_call (ibm_get_config_addr_info2
, 4, 2, rets
,
924 config_addr
, info
->buid_hi
, info
->buid_lo
, 0);
930 /* Use older config-addr token on power5 */
931 if (ibm_get_config_addr_info
!= RTAS_UNKNOWN_SERVICE
) {
932 ret
= rtas_call (ibm_get_config_addr_info
, 4, 2, rets
,
933 config_addr
, info
->buid_hi
, info
->buid_lo
, 0);
941 /* Enable eeh for the given device node. */
942 static void *early_enable_eeh(struct device_node
*dn
, void *data
)
944 unsigned int rets
[3];
945 struct eeh_early_enable_info
*info
= data
;
947 const u32
*class_code
= of_get_property(dn
, "class-code", NULL
);
948 const u32
*vendor_id
= of_get_property(dn
, "vendor-id", NULL
);
949 const u32
*device_id
= of_get_property(dn
, "device-id", NULL
);
952 struct pci_dn
*pdn
= PCI_DN(dn
);
956 pdn
->eeh_check_count
= 0;
957 pdn
->eeh_freeze_count
= 0;
958 pdn
->eeh_false_positives
= 0;
960 if (!of_device_is_available(dn
))
963 /* Ignore bad nodes. */
964 if (!class_code
|| !vendor_id
|| !device_id
)
967 /* There is nothing to check on PCI to ISA bridges */
968 if (dn
->type
&& !strcmp(dn
->type
, "isa")) {
969 pdn
->eeh_mode
|= EEH_MODE_NOCHECK
;
972 pdn
->class_code
= *class_code
;
974 /* Ok... see if this device supports EEH. Some do, some don't,
975 * and the only way to find out is to check each and every one. */
976 regs
= of_get_property(dn
, "reg", NULL
);
978 /* First register entry is addr (00BBSS00) */
979 /* Try to enable eeh */
980 ret
= rtas_call(ibm_set_eeh_option
, 4, 1, NULL
,
981 regs
[0], info
->buid_hi
, info
->buid_lo
,
986 pdn
->eeh_config_addr
= regs
[0];
988 /* If the newer, better, ibm,get-config-addr-info is supported,
989 * then use that instead. */
990 pdn
->eeh_pe_config_addr
= get_pe_addr(pdn
->eeh_config_addr
, info
);
992 /* Some older systems (Power4) allow the
993 * ibm,set-eeh-option call to succeed even on nodes
994 * where EEH is not supported. Verify support
996 ret
= read_slot_reset_state(pdn
, rets
);
997 if ((ret
== 0) && (rets
[1] == 1))
1002 eeh_subsystem_enabled
= 1;
1003 pdn
->eeh_mode
|= EEH_MODE_SUPPORTED
;
1006 printk(KERN_DEBUG
"EEH: %s: eeh enabled, config=%x pe_config=%x\n",
1007 dn
->full_name
, pdn
->eeh_config_addr
, pdn
->eeh_pe_config_addr
);
1011 /* This device doesn't support EEH, but it may have an
1012 * EEH parent, in which case we mark it as supported. */
1013 if (dn
->parent
&& PCI_DN(dn
->parent
)
1014 && (PCI_DN(dn
->parent
)->eeh_mode
& EEH_MODE_SUPPORTED
)) {
1015 /* Parent supports EEH. */
1016 pdn
->eeh_mode
|= EEH_MODE_SUPPORTED
;
1017 pdn
->eeh_config_addr
= PCI_DN(dn
->parent
)->eeh_config_addr
;
1022 printk(KERN_WARNING
"EEH: %s: unable to get reg property.\n",
1031 * Initialize EEH by trying to enable it for all of the adapters in the system.
1032 * As a side effect we can determine here if eeh is supported at all.
1033 * Note that we leave EEH on so failed config cycles won't cause a machine
1034 * check. If a user turns off EEH for a particular adapter they are really
1035 * telling Linux to ignore errors. Some hardware (e.g. POWER5) won't
1036 * grant access to a slot if EEH isn't enabled, and so we always enable
1037 * EEH for all slots/all devices.
1039 * The eeh-force-off option disables EEH checking globally, for all slots.
1040 * Even if force-off is set, the EEH hardware is still enabled, so that
1041 * newer systems can boot.
1043 void __init
eeh_init(void)
1045 struct device_node
*phb
, *np
;
1046 struct eeh_early_enable_info info
;
1048 spin_lock_init(&confirm_error_lock
);
1049 spin_lock_init(&slot_errbuf_lock
);
1051 np
= of_find_node_by_path("/rtas");
1055 ibm_set_eeh_option
= rtas_token("ibm,set-eeh-option");
1056 ibm_set_slot_reset
= rtas_token("ibm,set-slot-reset");
1057 ibm_read_slot_reset_state2
= rtas_token("ibm,read-slot-reset-state2");
1058 ibm_read_slot_reset_state
= rtas_token("ibm,read-slot-reset-state");
1059 ibm_slot_error_detail
= rtas_token("ibm,slot-error-detail");
1060 ibm_get_config_addr_info
= rtas_token("ibm,get-config-addr-info");
1061 ibm_get_config_addr_info2
= rtas_token("ibm,get-config-addr-info2");
1062 ibm_configure_bridge
= rtas_token ("ibm,configure-bridge");
1064 if (ibm_set_eeh_option
== RTAS_UNKNOWN_SERVICE
)
1067 eeh_error_buf_size
= rtas_token("rtas-error-log-max");
1068 if (eeh_error_buf_size
== RTAS_UNKNOWN_SERVICE
) {
1069 eeh_error_buf_size
= 1024;
1071 if (eeh_error_buf_size
> RTAS_ERROR_LOG_MAX
) {
1072 printk(KERN_WARNING
"EEH: rtas-error-log-max is bigger than allocated "
1073 "buffer ! (%d vs %d)", eeh_error_buf_size
, RTAS_ERROR_LOG_MAX
);
1074 eeh_error_buf_size
= RTAS_ERROR_LOG_MAX
;
1077 /* Enable EEH for all adapters. Note that eeh requires buid's */
1078 for (phb
= of_find_node_by_name(NULL
, "pci"); phb
;
1079 phb
= of_find_node_by_name(phb
, "pci")) {
1082 buid
= get_phb_buid(phb
);
1083 if (buid
== 0 || PCI_DN(phb
) == NULL
)
1086 info
.buid_lo
= BUID_LO(buid
);
1087 info
.buid_hi
= BUID_HI(buid
);
1088 traverse_pci_devices(phb
, early_enable_eeh
, &info
);
1091 if (eeh_subsystem_enabled
)
1092 printk(KERN_INFO
"EEH: PCI Enhanced I/O Error Handling Enabled\n");
1094 printk(KERN_WARNING
"EEH: No capable adapters found\n");
1098 * eeh_add_device_early - enable EEH for the indicated device_node
1099 * @dn: device node for which to set up EEH
1101 * This routine must be used to perform EEH initialization for PCI
1102 * devices that were added after system boot (e.g. hotplug, dlpar).
1103 * This routine must be called before any i/o is performed to the
1104 * adapter (inluding any config-space i/o).
1105 * Whether this actually enables EEH or not for this device depends
1106 * on the CEC architecture, type of the device, on earlier boot
1107 * command-line arguments & etc.
1109 static void eeh_add_device_early(struct device_node
*dn
)
1111 struct pci_controller
*phb
;
1112 struct eeh_early_enable_info info
;
1114 if (!dn
|| !PCI_DN(dn
))
1116 phb
= PCI_DN(dn
)->phb
;
1118 /* USB Bus children of PCI devices will not have BUID's */
1119 if (NULL
== phb
|| 0 == phb
->buid
)
1122 info
.buid_hi
= BUID_HI(phb
->buid
);
1123 info
.buid_lo
= BUID_LO(phb
->buid
);
1124 early_enable_eeh(dn
, &info
);
1127 void eeh_add_device_tree_early(struct device_node
*dn
)
1129 struct device_node
*sib
;
1131 for_each_child_of_node(dn
, sib
)
1132 eeh_add_device_tree_early(sib
);
1133 eeh_add_device_early(dn
);
1135 EXPORT_SYMBOL_GPL(eeh_add_device_tree_early
);
1138 * eeh_add_device_late - perform EEH initialization for the indicated pci device
1139 * @dev: pci device for which to set up EEH
1141 * This routine must be used to complete EEH initialization for PCI
1142 * devices that were added after system boot (e.g. hotplug, dlpar).
1144 static void eeh_add_device_late(struct pci_dev
*dev
)
1146 struct device_node
*dn
;
1149 if (!dev
|| !eeh_subsystem_enabled
)
1153 printk(KERN_DEBUG
"EEH: adding device %s\n", pci_name(dev
));
1157 dn
= pci_device_to_OF_node(dev
);
1161 pci_addr_cache_insert_device(dev
);
1162 eeh_sysfs_add_device(dev
);
1165 void eeh_add_device_tree_late(struct pci_bus
*bus
)
1167 struct pci_dev
*dev
;
1169 list_for_each_entry(dev
, &bus
->devices
, bus_list
) {
1170 eeh_add_device_late(dev
);
1171 if (dev
->hdr_type
== PCI_HEADER_TYPE_BRIDGE
) {
1172 struct pci_bus
*subbus
= dev
->subordinate
;
1174 eeh_add_device_tree_late(subbus
);
1178 EXPORT_SYMBOL_GPL(eeh_add_device_tree_late
);
1181 * eeh_remove_device - undo EEH setup for the indicated pci device
1182 * @dev: pci device to be removed
1184 * This routine should be called when a device is removed from
1185 * a running system (e.g. by hotplug or dlpar). It unregisters
1186 * the PCI device from the EEH subsystem. I/O errors affecting
1187 * this device will no longer be detected after this call; thus,
1188 * i/o errors affecting this slot may leave this device unusable.
1190 static void eeh_remove_device(struct pci_dev
*dev
)
1192 struct device_node
*dn
;
1193 if (!dev
|| !eeh_subsystem_enabled
)
1196 /* Unregister the device with the EEH/PCI address search system */
1198 printk(KERN_DEBUG
"EEH: remove device %s\n", pci_name(dev
));
1200 pci_addr_cache_remove_device(dev
);
1201 eeh_sysfs_remove_device(dev
);
1203 dn
= pci_device_to_OF_node(dev
);
1204 if (PCI_DN(dn
)->pcidev
) {
1205 PCI_DN(dn
)->pcidev
= NULL
;
1210 void eeh_remove_bus_device(struct pci_dev
*dev
)
1212 struct pci_bus
*bus
= dev
->subordinate
;
1213 struct pci_dev
*child
, *tmp
;
1215 eeh_remove_device(dev
);
1217 if (bus
&& dev
->hdr_type
== PCI_HEADER_TYPE_BRIDGE
) {
1218 list_for_each_entry_safe(child
, tmp
, &bus
->devices
, bus_list
)
1219 eeh_remove_bus_device(child
);
1222 EXPORT_SYMBOL_GPL(eeh_remove_bus_device
);
1224 static int proc_eeh_show(struct seq_file
*m
, void *v
)
1226 if (0 == eeh_subsystem_enabled
) {
1227 seq_printf(m
, "EEH Subsystem is globally disabled\n");
1228 seq_printf(m
, "eeh_total_mmio_ffs=%ld\n", total_mmio_ffs
);
1230 seq_printf(m
, "EEH Subsystem is enabled\n");
1233 "no device node=%ld\n"
1234 "no config address=%ld\n"
1235 "check not wanted=%ld\n"
1236 "eeh_total_mmio_ffs=%ld\n"
1237 "eeh_false_positives=%ld\n"
1238 "eeh_slot_resets=%ld\n",
1239 no_device
, no_dn
, no_cfg_addr
,
1240 ignored_check
, total_mmio_ffs
,
1248 static int proc_eeh_open(struct inode
*inode
, struct file
*file
)
1250 return single_open(file
, proc_eeh_show
, NULL
);
1253 static const struct file_operations proc_eeh_operations
= {
1254 .open
= proc_eeh_open
,
1256 .llseek
= seq_lseek
,
1257 .release
= single_release
,
1260 static int __init
eeh_init_proc(void)
1262 if (machine_is(pseries
))
1263 proc_create("ppc64/eeh", 0, NULL
, &proc_eeh_operations
);
1266 __initcall(eeh_init_proc
);