arch/s390/pci/pci_insn.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * s390 specific pci instructions
   4  *
   5  * Copyright IBM Corp. 2013
   6  */
   7
   8 #include <linux/export.h>
   9 #include <linux/errno.h>
  10 #include <linux/delay.h>
  11 #include <asm/facility.h>
  12 #include <asm/pci_insn.h>
  13 #include <asm/pci_debug.h>
  14 #include <asm/processor.h>
  15
  16 #define ZPCI_INSN_BUSY_DELAY    1       /* 1 microsecond */
  17
  18 static inline void zpci_err_insn(u8 cc, u8 status, u64 req, u64 offset)
  19 {
  20         struct {
  21                 u64 req;
  22                 u64 offset;
  23                 u8 cc;
  24                 u8 status;
  25         } __packed data = {req, offset, cc, status};
  26
  27         zpci_err_hex(&data, sizeof(data));
  28 }
  29
  30 /* Modify PCI Function Controls */
  31 static inline u8 __mpcifc(u64 req, struct zpci_fib *fib, u8 *status)
  32 {
  33         u8 cc;
  34
  35         asm volatile (
  36                 "       .insn   rxy,0xe300000000d0,%[req],%[fib]\n"
  37                 "       ipm     %[cc]\n"
  38                 "       srl     %[cc],28\n"
  39                 : [cc] "=d" (cc), [req] "+d" (req), [fib] "+Q" (*fib)
  40                 : : "cc");
  41         *status = req >> 24 & 0xff;
  42         return cc;
  43 }
  44
  45 u8 zpci_mod_fc(u64 req, struct zpci_fib *fib, u8 *status)
  46 {
  47         u8 cc;
  48
  49         do {
  50                 cc = __mpcifc(req, fib, status);
  51                 if (cc == 2)
  52                         msleep(ZPCI_INSN_BUSY_DELAY);
  53         } while (cc == 2);
  54
  55         if (cc)
  56                 zpci_err_insn(cc, *status, req, 0);
  57
  58         return cc;
  59 }
  60
  61 /* Refresh PCI Translations */
  62 static inline u8 __rpcit(u64 fn, u64 addr, u64 range, u8 *status)
  63 {
  64         register u64 __addr asm("2") = addr;
  65         register u64 __range asm("3") = range;
  66         u8 cc;
  67
  68         asm volatile (
  69                 "       .insn   rre,0xb9d30000,%[fn],%[addr]\n"
  70                 "       ipm     %[cc]\n"
  71                 "       srl     %[cc],28\n"
  72                 : [cc] "=d" (cc), [fn] "+d" (fn)
  73                 : [addr] "d" (__addr), "d" (__range)
  74                 : "cc");
  75         *status = fn >> 24 & 0xff;
  76         return cc;
  77 }
  78
  79 int zpci_refresh_trans(u64 fn, u64 addr, u64 range)
  80 {
  81         u8 cc, status;
  82
  83         do {
  84                 cc = __rpcit(fn, addr, range, &status);
  85                 if (cc == 2)
  86                         udelay(ZPCI_INSN_BUSY_DELAY);
  87         } while (cc == 2);
  88
  89         if (cc)
  90                 zpci_err_insn(cc, status, addr, range);
  91
  92         return (cc) ? -EIO : 0;
  93 }
  94
  95 /* Set Interruption Controls */
  96 int zpci_set_irq_ctrl(u16 ctl, char *unused, u8 isc)
  97 {
  98         if (!test_facility(72))
  99                 return -EIO;
 100         asm volatile (
 101                 "       .insn   rsy,0xeb00000000d1,%[ctl],%[isc],%[u]\n"
 102                 : : [ctl] "d" (ctl), [isc] "d" (isc << 27), [u] "Q" (*unused));
 103         return 0;
 104 }
 105
 106 /* PCI Load */
 107 static inline int ____pcilg(u64 *data, u64 req, u64 offset, u8 *status)
 108 {
 109         register u64 __req asm("2") = req;
 110         register u64 __offset asm("3") = offset;
 111         int cc = -ENXIO;
 112         u64 __data;
 113
 114         asm volatile (
 115                 "       .insn   rre,0xb9d20000,%[data],%[req]\n"
 116                 "0:     ipm     %[cc]\n"
 117                 "       srl     %[cc],28\n"
 118                 "1:\n"
 119                 EX_TABLE(0b, 1b)
 120                 : [cc] "+d" (cc), [data] "=d" (__data), [req] "+d" (__req)
 121                 :  "d" (__offset)
 122                 : "cc");
 123         *status = __req >> 24 & 0xff;
 124         *data = __data;
 125         return cc;
 126 }
 127
 128 static inline int __pcilg(u64 *data, u64 req, u64 offset, u8 *status)
 129 {
 130         u64 __data;
 131         int cc;
 132
 133         cc = ____pcilg(&__data, req, offset, status);
 134         if (!cc)
 135                 *data = __data;
 136
 137         return cc;
 138 }
 139
 140 int zpci_load(u64 *data, u64 req, u64 offset)
 141 {
 142         u8 status;
 143         int cc;
 144
 145         do {
 146                 cc = __pcilg(data, req, offset, &status);
 147                 if (cc == 2)
 148                         udelay(ZPCI_INSN_BUSY_DELAY);
 149         } while (cc == 2);
 150
 151         if (cc)
 152                 zpci_err_insn(cc, status, req, offset);
 153
 154         return (cc > 0) ? -EIO : cc;
 155 }
 156 EXPORT_SYMBOL_GPL(zpci_load);
 157
 158 /* PCI Store */
 159 static inline int __pcistg(u64 data, u64 req, u64 offset, u8 *status)
 160 {
 161         register u64 __req asm("2") = req;
 162         register u64 __offset asm("3") = offset;
 163         int cc = -ENXIO;
 164
 165         asm volatile (
 166                 "       .insn   rre,0xb9d00000,%[data],%[req]\n"
 167                 "0:     ipm     %[cc]\n"
 168                 "       srl     %[cc],28\n"
 169                 "1:\n"
 170                 EX_TABLE(0b, 1b)
 171                 : [cc] "+d" (cc), [req] "+d" (__req)
 172                 : "d" (__offset), [data] "d" (data)
 173                 : "cc");
 174         *status = __req >> 24 & 0xff;
 175         return cc;
 176 }
 177
 178 int zpci_store(u64 data, u64 req, u64 offset)
 179 {
 180         u8 status;
 181         int cc;
 182
 183         do {
 184                 cc = __pcistg(data, req, offset, &status);
 185                 if (cc == 2)
 186                         udelay(ZPCI_INSN_BUSY_DELAY);
 187         } while (cc == 2);
 188
 189         if (cc)
 190                 zpci_err_insn(cc, status, req, offset);
 191
 192         return (cc > 0) ? -EIO : cc;
 193 }
 194 EXPORT_SYMBOL_GPL(zpci_store);
 195
 196 /* PCI Store Block */
 197 static inline int __pcistb(const u64 *data, u64 req, u64 offset, u8 *status)
 198 {
 199         int cc = -ENXIO;
 200
 201         asm volatile (
 202                 "       .insn   rsy,0xeb00000000d0,%[req],%[offset],%[data]\n"
 203                 "0:     ipm     %[cc]\n"
 204                 "       srl     %[cc],28\n"
 205                 "1:\n"
 206                 EX_TABLE(0b, 1b)
 207                 : [cc] "+d" (cc), [req] "+d" (req)
 208                 : [offset] "d" (offset), [data] "Q" (*data)
 209                 : "cc");
 210         *status = req >> 24 & 0xff;
 211         return cc;
 212 }
 213
 214 int zpci_store_block(const u64 *data, u64 req, u64 offset)
 215 {
 216         u8 status;
 217         int cc;
 218
 219         do {
 220                 cc = __pcistb(data, req, offset, &status);
 221                 if (cc == 2)
 222                         udelay(ZPCI_INSN_BUSY_DELAY);
 223         } while (cc == 2);
 224
 225         if (cc)
 226                 zpci_err_insn(cc, status, req, offset);
 227
 228         return (cc > 0) ? -EIO : cc;
 229 }
 230 EXPORT_SYMBOL_GPL(zpci_store_block);