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1 /*
2 * linux/arch/sh/kernel/setup_7751se.c
3 *
4 * Copyright (C) 2000 Kazumoto Kojima
5 *
6 * Hitachi SolutionEngine Support.
7 *
8 * Modified for 7751 Solution Engine by
9 * Ian da Silva and Jeremy Siegel, 2001.
10 */
11
12 #include <linux/config.h>
13 #include <linux/init.h>
14 #include <linux/irq.h>
15
16 #include <linux/hdreg.h>
17 #include <linux/ide.h>
18 #include <asm/io.h>
19 #include <asm/se7751/se7751.h>
20
21 #ifdef CONFIG_SH_KGDB
22 #include <asm/kgdb.h>
23 #endif
24
25 /*
26 * Configure the Super I/O chip
27 */
28 #if 0
29 /* Leftover code from regular Solution Engine, for reference. */
30 /* The SH7751 Solution Engine has a different SuperIO. */
31 static void __init smsc_config(int index, int data)
32 {
33 outb_p(index, INDEX_PORT);
34 outb_p(data, DATA_PORT);
35 }
36
37 static void __init init_smsc(void)
38 {
39 outb_p(CONFIG_ENTER, CONFIG_PORT);
40 outb_p(CONFIG_ENTER, CONFIG_PORT);
41
42 /* FDC */
43 smsc_config(CURRENT_LDN_INDEX, LDN_FDC);
44 smsc_config(ACTIVATE_INDEX, 0x01);
45 smsc_config(IRQ_SELECT_INDEX, 6); /* IRQ6 */
46
47 /* IDE1 */
48 smsc_config(CURRENT_LDN_INDEX, LDN_IDE1);
49 smsc_config(ACTIVATE_INDEX, 0x01);
50 smsc_config(IRQ_SELECT_INDEX, 14); /* IRQ14 */
51
52 /* AUXIO (GPIO): to use IDE1 */
53 smsc_config(CURRENT_LDN_INDEX, LDN_AUXIO);
54 smsc_config(GPIO46_INDEX, 0x00); /* nIOROP */
55 smsc_config(GPIO47_INDEX, 0x00); /* nIOWOP */
56
57 /* COM1 */
58 smsc_config(CURRENT_LDN_INDEX, LDN_COM1);
59 smsc_config(ACTIVATE_INDEX, 0x01);
60 smsc_config(IO_BASE_HI_INDEX, 0x03);
61 smsc_config(IO_BASE_LO_INDEX, 0xf8);
62 smsc_config(IRQ_SELECT_INDEX, 4); /* IRQ4 */
63
64 /* COM2 */
65 smsc_config(CURRENT_LDN_INDEX, LDN_COM2);
66 smsc_config(ACTIVATE_INDEX, 0x01);
67 smsc_config(IO_BASE_HI_INDEX, 0x02);
68 smsc_config(IO_BASE_LO_INDEX, 0xf8);
69 smsc_config(IRQ_SELECT_INDEX, 3); /* IRQ3 */
70
71 /* RTC */
72 smsc_config(CURRENT_LDN_INDEX, LDN_RTC);
73 smsc_config(ACTIVATE_INDEX, 0x01);
74 smsc_config(IRQ_SELECT_INDEX, 8); /* IRQ8 */
75
76 /* XXX: PARPORT, KBD, and MOUSE will come here... */
77 outb_p(CONFIG_EXIT, CONFIG_PORT);
78 }
79 #endif
80
81 const char *get_system_type(void)
82 {
83 return "7751 SolutionEngine";
84 }
85
86 #ifdef CONFIG_SH_KGDB
87 static int kgdb_uart_setup(void);
88 static struct kgdb_sermap kgdb_uart_sermap =
89 { "ttyS", 0, kgdb_uart_setup, NULL };
90 #endif
91
92 /*
93 * Initialize the board
94 */
95 void __init platform_setup(void)
96 {
97 /* Call init_smsc() replacement to set up SuperIO. */
98 /* XXX: RTC setting comes here */
99 #ifdef CONFIG_SH_KGDB
100 kgdb_register_sermap(&kgdb_uart_sermap);
101 #endif
102 }
103
104 /*********************************************************************
105 * Currently a hack (e.g. does not interact well w/serial.c, lots of *
106 * hardcoded stuff) but may be useful if SCI/F needs debugging. *
107 * Mostly copied from x86 code (see files asm-i386/kgdb_local.h and *
108 * arch/i386/lib/kgdb_serial.c). *
109 *********************************************************************/
110
111 #ifdef CONFIG_SH_KGDB
112 #include <linux/types.h>
113 #include <linux/serial.h>
114 #include <linux/serialP.h>
115 #include <linux/serial_reg.h>
116
117 #define COM1_PORT 0x3f8 /* Base I/O address */
118 #define COM1_IRQ 4 /* IRQ not used yet */
119 #define COM2_PORT 0x2f8 /* Base I/O address */
120 #define COM2_IRQ 3 /* IRQ not used yet */
121
122 #define SB_CLOCK 1843200 /* Serial baud clock */
123 #define SB_BASE (SB_CLOCK/16)
124 #define SB_MCR UART_MCR_OUT2 | UART_MCR_DTR | UART_MCR_RTS
125
126 struct uart_port {
127 int base;
128 };
129 #define UART_NPORTS 2
130 struct uart_port uart_ports[] = {
131 { COM1_PORT },
132 { COM2_PORT },
133 };
134 struct uart_port *kgdb_uart_port;
135
136 #define UART_IN(reg) inb_p(kgdb_uart_port->base + reg)
137 #define UART_OUT(reg,v) outb_p((v), kgdb_uart_port->base + reg)
138
139 /* Basic read/write functions for the UART */
140 #define UART_LSR_RXCERR (UART_LSR_BI | UART_LSR_FE | UART_LSR_PE)
141 static int kgdb_uart_getchar(void)
142 {
143 int lsr;
144 int c = -1;
145
146 while (c == -1) {
147 lsr = UART_IN(UART_LSR);
148 if (lsr & UART_LSR_DR)
149 c = UART_IN(UART_RX);
150 if ((lsr & UART_LSR_RXCERR))
151 c = -1;
152 }
153 return c;
154 }
155
156 static void kgdb_uart_putchar(int c)
157 {
158 while ((UART_IN(UART_LSR) & UART_LSR_THRE) == 0)
159 ;
160 UART_OUT(UART_TX, c);
161 }
162
163 /*
164 * Initialize UART to configured/requested values.
165 * (But we don't interrupts yet, or interact w/serial.c)
166 */
167 static int kgdb_uart_setup(void)
168 {
169 int port;
170 int lcr = 0;
171 int bdiv = 0;
172
173 if (kgdb_portnum >= UART_NPORTS) {
174 KGDB_PRINTK("uart port %d invalid.\n", kgdb_portnum);
175 return -1;
176 }
177
178 kgdb_uart_port = &uart_ports[kgdb_portnum];
179
180 /* Init sequence from gdb_hook_interrupt */
181 UART_IN(UART_RX);
182 UART_OUT(UART_IER, 0);
183
184 UART_IN(UART_RX); /* Serial driver comments say */
185 UART_IN(UART_IIR); /* this clears interrupt regs */
186 UART_IN(UART_MSR);
187
188 /* Figure basic LCR values */
189 switch (kgdb_bits) {
190 case '7':
191 lcr |= UART_LCR_WLEN7;
192 break;
193 default: case '8':
194 lcr |= UART_LCR_WLEN8;
195 break;
196 }
197 switch (kgdb_parity) {
198 case 'O':
199 lcr |= UART_LCR_PARITY;
200 break;
201 case 'E':
202 lcr |= (UART_LCR_PARITY | UART_LCR_EPAR);
203 break;
204 default: break;
205 }
206
207 /* Figure the baud rate divisor */
208 bdiv = (SB_BASE/kgdb_baud);
209
210 /* Set the baud rate and LCR values */
211 UART_OUT(UART_LCR, (lcr | UART_LCR_DLAB));
212 UART_OUT(UART_DLL, (bdiv & 0xff));
213 UART_OUT(UART_DLM, ((bdiv >> 8) & 0xff));
214 UART_OUT(UART_LCR, lcr);
215
216 /* Set the MCR */
217 UART_OUT(UART_MCR, SB_MCR);
218
219 /* Turn off FIFOs for now */
220 UART_OUT(UART_FCR, 0);
221
222 /* Setup complete: initialize function pointers */
223 kgdb_getchar = kgdb_uart_getchar;
224 kgdb_putchar = kgdb_uart_putchar;
225
226 return 0;
227 }
228 #endif /* CONFIG_SH_KGDB */