1 #ifndef _ASM_X86_APIC_H
2 #define _ASM_X86_APIC_H
4 #include <linux/cpumask.h>
6 #include <asm/alternative.h>
7 #include <asm/cpufeature.h>
8 #include <asm/apicdef.h>
9 #include <linux/atomic.h>
10 #include <asm/fixmap.h>
11 #include <asm/mpspec.h>
13 #include <asm/hardirq.h>
15 #define ARCH_APICTIMER_STOPS_ON_C3 1
21 #define APIC_VERBOSE 1
24 /* Macros for apic_extnmi which controls external NMI masking */
25 #define APIC_EXTNMI_BSP 0 /* Default */
26 #define APIC_EXTNMI_ALL 1
27 #define APIC_EXTNMI_NONE 2
30 * Define the default level of output to be very little
31 * This can be turned up by using apic=verbose for more
32 * information and apic=debug for _lots_ of information.
33 * apic_verbosity is defined in apic.c
35 #define apic_printk(v, s, a...) do { \
36 if ((v) <= apic_verbosity) \
41 #if defined(CONFIG_X86_LOCAL_APIC) && defined(CONFIG_X86_32)
42 extern void generic_apic_probe(void);
44 static inline void generic_apic_probe(void)
49 #ifdef CONFIG_X86_LOCAL_APIC
51 extern unsigned int apic_verbosity
;
52 extern int local_apic_timer_c2_ok
;
54 extern int disable_apic
;
55 extern unsigned int lapic_timer_frequency
;
57 extern enum apic_intr_mode_id apic_intr_mode
;
58 enum apic_intr_mode_id
{
61 APIC_VIRTUAL_WIRE_NO_CONFIG
,
63 APIC_SYMMETRIC_IO_NO_ROUTING
67 extern void __inquire_remote_apic(int apicid
);
68 #else /* CONFIG_SMP */
69 static inline void __inquire_remote_apic(int apicid
)
72 #endif /* CONFIG_SMP */
74 static inline void default_inquire_remote_apic(int apicid
)
76 if (apic_verbosity
>= APIC_DEBUG
)
77 __inquire_remote_apic(apicid
);
81 * With 82489DX we can't rely on apic feature bit
82 * retrieved via cpuid but still have to deal with
83 * such an apic chip so we assume that SMP configuration
84 * is found from MP table (64bit case uses ACPI mostly
85 * which set smp presence flag as well so we are safe
86 * to use this helper too).
88 static inline bool apic_from_smp_config(void)
90 return smp_found_config
&& !disable_apic
;
94 * Basic functions accessing APICs.
96 #ifdef CONFIG_PARAVIRT
97 #include <asm/paravirt.h>
100 extern int setup_profiling_timer(unsigned int);
102 static inline void native_apic_mem_write(u32 reg
, u32 v
)
104 volatile u32
*addr
= (volatile u32
*)(APIC_BASE
+ reg
);
106 alternative_io("movl %0, %P1", "xchgl %0, %P1", X86_BUG_11AP
,
107 ASM_OUTPUT2("=r" (v
), "=m" (*addr
)),
108 ASM_OUTPUT2("0" (v
), "m" (*addr
)));
111 static inline u32
native_apic_mem_read(u32 reg
)
113 return *((volatile u32
*)(APIC_BASE
+ reg
));
116 extern void native_apic_wait_icr_idle(void);
117 extern u32
native_safe_apic_wait_icr_idle(void);
118 extern void native_apic_icr_write(u32 low
, u32 id
);
119 extern u64
native_apic_icr_read(void);
121 static inline bool apic_is_x2apic_enabled(void)
125 if (rdmsrl_safe(MSR_IA32_APICBASE
, &msr
))
127 return msr
& X2APIC_ENABLE
;
130 extern void enable_IR_x2apic(void);
132 extern int get_physical_broadcast(void);
134 extern int lapic_get_maxlvt(void);
135 extern void clear_local_APIC(void);
136 extern void disconnect_bsp_APIC(int virt_wire_setup
);
137 extern void disable_local_APIC(void);
138 extern void lapic_shutdown(void);
139 extern void sync_Arb_IDs(void);
140 extern void init_bsp_APIC(void);
141 extern void apic_intr_mode_init(void);
142 extern void setup_local_APIC(void);
143 extern void init_apic_mappings(void);
144 void register_lapic_address(unsigned long address
);
145 extern void setup_boot_APIC_clock(void);
146 extern void setup_secondary_APIC_clock(void);
147 extern void lapic_update_tsc_freq(void);
150 static inline int apic_force_enable(unsigned long addr
)
155 extern int apic_force_enable(unsigned long addr
);
158 extern void apic_bsp_setup(bool upmode
);
159 extern void apic_ap_setup(void);
162 * On 32bit this is mach-xxx local
165 extern int apic_is_clustered_box(void);
167 static inline int apic_is_clustered_box(void)
173 extern int setup_APIC_eilvt(u8 lvt_off
, u8 vector
, u8 msg_type
, u8 mask
);
174 extern void lapic_assign_system_vectors(void);
175 extern void lapic_assign_legacy_vector(unsigned int isairq
, bool replace
);
176 extern void lapic_online(void);
177 extern void lapic_offline(void);
179 #else /* !CONFIG_X86_LOCAL_APIC */
180 static inline void lapic_shutdown(void) { }
181 #define local_apic_timer_c2_ok 1
182 static inline void init_apic_mappings(void) { }
183 static inline void disable_local_APIC(void) { }
184 # define setup_boot_APIC_clock x86_init_noop
185 # define setup_secondary_APIC_clock x86_init_noop
186 static inline void lapic_update_tsc_freq(void) { }
187 static inline void apic_intr_mode_init(void) { }
188 static inline void lapic_assign_system_vectors(void) { }
189 static inline void lapic_assign_legacy_vector(unsigned int i
, bool r
) { }
190 #endif /* !CONFIG_X86_LOCAL_APIC */
192 #ifdef CONFIG_X86_X2APIC
194 * Make previous memory operations globally visible before
195 * sending the IPI through x2apic wrmsr. We need a serializing instruction or
198 static inline void x2apic_wrmsr_fence(void)
200 asm volatile("mfence" : : : "memory");
203 static inline void native_apic_msr_write(u32 reg
, u32 v
)
205 if (reg
== APIC_DFR
|| reg
== APIC_ID
|| reg
== APIC_LDR
||
209 wrmsr(APIC_BASE_MSR
+ (reg
>> 4), v
, 0);
212 static inline void native_apic_msr_eoi_write(u32 reg
, u32 v
)
214 __wrmsr(APIC_BASE_MSR
+ (APIC_EOI
>> 4), APIC_EOI_ACK
, 0);
217 static inline u32
native_apic_msr_read(u32 reg
)
224 rdmsrl(APIC_BASE_MSR
+ (reg
>> 4), msr
);
228 static inline void native_x2apic_wait_icr_idle(void)
230 /* no need to wait for icr idle in x2apic */
234 static inline u32
native_safe_x2apic_wait_icr_idle(void)
236 /* no need to wait for icr idle in x2apic */
240 static inline void native_x2apic_icr_write(u32 low
, u32 id
)
242 wrmsrl(APIC_BASE_MSR
+ (APIC_ICR
>> 4), ((__u64
) id
) << 32 | low
);
245 static inline u64
native_x2apic_icr_read(void)
249 rdmsrl(APIC_BASE_MSR
+ (APIC_ICR
>> 4), val
);
253 extern int x2apic_mode
;
254 extern int x2apic_phys
;
255 extern void __init
check_x2apic(void);
256 extern void x2apic_setup(void);
257 static inline int x2apic_enabled(void)
259 return boot_cpu_has(X86_FEATURE_X2APIC
) && apic_is_x2apic_enabled();
262 #define x2apic_supported() (boot_cpu_has(X86_FEATURE_X2APIC))
263 #else /* !CONFIG_X86_X2APIC */
264 static inline void check_x2apic(void) { }
265 static inline void x2apic_setup(void) { }
266 static inline int x2apic_enabled(void) { return 0; }
268 #define x2apic_mode (0)
269 #define x2apic_supported() (0)
270 #endif /* !CONFIG_X86_X2APIC */
275 * Copyright 2004 James Cleverdon, IBM.
276 * Subject to the GNU Public License, v.2
278 * Generic APIC sub-arch data struct.
280 * Hacked for x86-64 by James Cleverdon from i386 architecture code by
281 * Martin Bligh, Andi Kleen, James Bottomley, John Stultz, and
285 /* Hotpath functions first */
286 void (*eoi_write
)(u32 reg
, u32 v
);
287 void (*native_eoi_write
)(u32 reg
, u32 v
);
288 void (*write
)(u32 reg
, u32 v
);
289 u32 (*read
)(u32 reg
);
291 /* IPI related functions */
292 void (*wait_icr_idle
)(void);
293 u32 (*safe_wait_icr_idle
)(void);
295 void (*send_IPI
)(int cpu
, int vector
);
296 void (*send_IPI_mask
)(const struct cpumask
*mask
, int vector
);
297 void (*send_IPI_mask_allbutself
)(const struct cpumask
*msk
, int vec
);
298 void (*send_IPI_allbutself
)(int vector
);
299 void (*send_IPI_all
)(int vector
);
300 void (*send_IPI_self
)(int vector
);
302 /* dest_logical is used by the IPI functions */
305 u32 irq_delivery_mode
;
308 /* Functions and data related to vector allocation */
309 void (*vector_allocation_domain
)(int cpu
, struct cpumask
*retmask
,
310 const struct cpumask
*mask
);
311 int (*cpu_mask_to_apicid
)(const struct cpumask
*cpumask
,
312 struct irq_data
*irqdata
,
313 unsigned int *apicid
);
314 u32 (*calc_dest_apicid
)(unsigned int cpu
);
316 /* ICR related functions */
317 u64 (*icr_read
)(void);
318 void (*icr_write
)(u32 low
, u32 high
);
320 /* Probe, setup and smpboot functions */
322 int (*acpi_madt_oem_check
)(char *oem_id
, char *oem_table_id
);
323 int (*apic_id_valid
)(u32 apicid
);
324 int (*apic_id_registered
)(void);
326 bool (*check_apicid_used
)(physid_mask_t
*map
, int apicid
);
327 void (*init_apic_ldr
)(void);
328 void (*ioapic_phys_id_map
)(physid_mask_t
*phys_map
, physid_mask_t
*retmap
);
329 void (*setup_apic_routing
)(void);
330 int (*cpu_present_to_apicid
)(int mps_cpu
);
331 void (*apicid_to_cpu_present
)(int phys_apicid
, physid_mask_t
*retmap
);
332 int (*check_phys_apicid_present
)(int phys_apicid
);
333 int (*phys_pkg_id
)(int cpuid_apic
, int index_msb
);
335 u32 (*get_apic_id
)(unsigned long x
);
336 u32 (*set_apic_id
)(unsigned int id
);
338 /* wakeup_secondary_cpu */
339 int (*wakeup_secondary_cpu
)(int apicid
, unsigned long start_eip
);
341 void (*inquire_remote_apic
)(int apicid
);
345 * Called very early during boot from get_smp_config(). It should
346 * return the logical apicid. x86_[bios]_cpu_to_apicid is
347 * initialized before this function is called.
349 * If logical apicid can't be determined that early, the function
350 * may return BAD_APICID. Logical apicid will be configured after
351 * init_apic_ldr() while bringing up CPUs. Note that NUMA affinity
352 * won't be applied properly during early boot in this case.
354 int (*x86_32_early_logical_apicid
)(int cpu
);
360 * Pointer to the local APIC driver in use on this system (there's
361 * always just one such driver in use - the kernel decides via an
362 * early probing process which one it picks - and then sticks to it):
364 extern struct apic
*apic
;
367 * APIC drivers are probed based on how they are listed in the .apicdrivers
368 * section. So the order is important and enforced by the ordering
369 * of different apic driver files in the Makefile.
371 * For the files having two apic drivers, we use apic_drivers()
372 * to enforce the order with in them.
374 #define apic_driver(sym) \
375 static const struct apic *__apicdrivers_##sym __used \
376 __aligned(sizeof(struct apic *)) \
377 __section(.apicdrivers) = { &sym }
379 #define apic_drivers(sym1, sym2) \
380 static struct apic *__apicdrivers_##sym1##sym2[2] __used \
381 __aligned(sizeof(struct apic *)) \
382 __section(.apicdrivers) = { &sym1, &sym2 }
384 extern struct apic
*__apicdrivers
[], *__apicdrivers_end
[];
387 * APIC functionality to boot other CPUs - only used on SMP:
390 extern int wakeup_secondary_cpu_via_nmi(int apicid
, unsigned long start_eip
);
391 extern int lapic_can_unplug_cpu(void);
394 #ifdef CONFIG_X86_LOCAL_APIC
396 static inline u32
apic_read(u32 reg
)
398 return apic
->read(reg
);
401 static inline void apic_write(u32 reg
, u32 val
)
403 apic
->write(reg
, val
);
406 static inline void apic_eoi(void)
408 apic
->eoi_write(APIC_EOI
, APIC_EOI_ACK
);
411 static inline u64
apic_icr_read(void)
413 return apic
->icr_read();
416 static inline void apic_icr_write(u32 low
, u32 high
)
418 apic
->icr_write(low
, high
);
421 static inline void apic_wait_icr_idle(void)
423 apic
->wait_icr_idle();
426 static inline u32
safe_apic_wait_icr_idle(void)
428 return apic
->safe_wait_icr_idle();
431 extern void __init
apic_set_eoi_write(void (*eoi_write
)(u32 reg
, u32 v
));
433 #else /* CONFIG_X86_LOCAL_APIC */
435 static inline u32
apic_read(u32 reg
) { return 0; }
436 static inline void apic_write(u32 reg
, u32 val
) { }
437 static inline void apic_eoi(void) { }
438 static inline u64
apic_icr_read(void) { return 0; }
439 static inline void apic_icr_write(u32 low
, u32 high
) { }
440 static inline void apic_wait_icr_idle(void) { }
441 static inline u32
safe_apic_wait_icr_idle(void) { return 0; }
442 static inline void apic_set_eoi_write(void (*eoi_write
)(u32 reg
, u32 v
)) {}
444 #endif /* CONFIG_X86_LOCAL_APIC */
446 extern void apic_ack_irq(struct irq_data
*data
);
448 static inline void ack_APIC_irq(void)
451 * ack_APIC_irq() actually gets compiled as a single instruction
457 static inline unsigned default_get_apic_id(unsigned long x
)
459 unsigned int ver
= GET_APIC_VERSION(apic_read(APIC_LVR
));
461 if (APIC_XAPIC(ver
) || boot_cpu_has(X86_FEATURE_EXTD_APICID
))
462 return (x
>> 24) & 0xFF;
464 return (x
>> 24) & 0x0F;
468 * Warm reset vector position:
470 #define TRAMPOLINE_PHYS_LOW 0x467
471 #define TRAMPOLINE_PHYS_HIGH 0x469
474 extern void apic_send_IPI_self(int vector
);
476 DECLARE_PER_CPU(int, x2apic_extra_bits
);
479 extern void generic_bigsmp_probe(void);
481 #ifdef CONFIG_X86_LOCAL_APIC
485 #define APIC_DFR_VALUE (APIC_DFR_FLAT)
487 DECLARE_EARLY_PER_CPU_READ_MOSTLY(u16
, x86_bios_cpu_apicid
);
489 extern struct apic apic_noop
;
491 static inline unsigned int read_apic_id(void)
493 unsigned int reg
= apic_read(APIC_ID
);
495 return apic
->get_apic_id(reg
);
498 extern int default_apic_id_valid(u32 apicid
);
499 extern int default_acpi_madt_oem_check(char *, char *);
500 extern void default_setup_apic_routing(void);
502 extern u32
apic_default_calc_apicid(unsigned int cpu
);
503 extern u32
apic_flat_calc_apicid(unsigned int cpu
);
505 extern int flat_cpu_mask_to_apicid(const struct cpumask
*cpumask
,
506 struct irq_data
*irqdata
,
507 unsigned int *apicid
);
508 extern int default_cpu_mask_to_apicid(const struct cpumask
*cpumask
,
509 struct irq_data
*irqdata
,
510 unsigned int *apicid
);
511 extern bool default_check_apicid_used(physid_mask_t
*map
, int apicid
);
512 extern void flat_vector_allocation_domain(int cpu
, struct cpumask
*retmask
,
513 const struct cpumask
*mask
);
514 extern void default_vector_allocation_domain(int cpu
, struct cpumask
*retmask
,
515 const struct cpumask
*mask
);
516 extern void default_ioapic_phys_id_map(physid_mask_t
*phys_map
, physid_mask_t
*retmap
);
517 extern int default_cpu_present_to_apicid(int mps_cpu
);
518 extern int default_check_phys_apicid_present(int phys_apicid
);
520 #endif /* CONFIG_X86_LOCAL_APIC */
523 bool apic_id_is_primary_thread(unsigned int id
);
525 static inline bool apic_id_is_primary_thread(unsigned int id
) { return false; }
528 extern void irq_enter(void);
529 extern void irq_exit(void);
531 static inline void entering_irq(void)
534 kvm_set_cpu_l1tf_flush_l1d();
537 static inline void entering_ack_irq(void)
543 static inline void ipi_entering_ack_irq(void)
547 kvm_set_cpu_l1tf_flush_l1d();
550 static inline void exiting_irq(void)
555 static inline void exiting_ack_irq(void)
561 extern void ioapic_zap_locks(void);
563 #endif /* _ASM_X86_APIC_H */