2 * Intel CPU Microcode Update Driver for Linux
4 * Copyright (C) 2000-2006 Tigran Aivazian <aivazian.tigran@gmail.com>
5 * 2006 Shaohua Li <shaohua.li@intel.com>
7 * Intel CPU microcode early update for Linux
9 * Copyright (C) 2012 Fenghua Yu <fenghua.yu@intel.com>
10 * H Peter Anvin" <hpa@zytor.com>
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version
15 * 2 of the License, or (at your option) any later version.
19 * This needs to be before all headers so that pr_debug in printk.h doesn't turn
20 * printk calls into no_printk().
24 #define pr_fmt(fmt) "microcode: " fmt
26 #include <linux/earlycpio.h>
27 #include <linux/firmware.h>
28 #include <linux/uaccess.h>
29 #include <linux/vmalloc.h>
30 #include <linux/initrd.h>
31 #include <linux/kernel.h>
32 #include <linux/slab.h>
33 #include <linux/cpu.h>
36 #include <asm/microcode_intel.h>
37 #include <asm/processor.h>
38 #include <asm/tlbflush.h>
39 #include <asm/setup.h>
42 static const char ucode_path
[] = "kernel/x86/microcode/GenuineIntel.bin";
44 /* Current microcode patch used in early patching on the APs. */
45 struct microcode_intel
*intel_ucode_patch
;
47 static inline bool cpu_signatures_match(unsigned int s1
, unsigned int p1
,
48 unsigned int s2
, unsigned int p2
)
53 /* Processor flags are either both 0 ... */
57 /* ... or they intersect. */
62 * Returns 1 if update has been found, 0 otherwise.
64 static int find_matching_signature(void *mc
, unsigned int csig
, int cpf
)
66 struct microcode_header_intel
*mc_hdr
= mc
;
67 struct extended_sigtable
*ext_hdr
;
68 struct extended_signature
*ext_sig
;
71 if (cpu_signatures_match(csig
, cpf
, mc_hdr
->sig
, mc_hdr
->pf
))
74 /* Look for ext. headers: */
75 if (get_totalsize(mc_hdr
) <= get_datasize(mc_hdr
) + MC_HEADER_SIZE
)
78 ext_hdr
= mc
+ get_datasize(mc_hdr
) + MC_HEADER_SIZE
;
79 ext_sig
= (void *)ext_hdr
+ EXT_HEADER_SIZE
;
81 for (i
= 0; i
< ext_hdr
->count
; i
++) {
82 if (cpu_signatures_match(csig
, cpf
, ext_sig
->sig
, ext_sig
->pf
))
90 * Returns 1 if update has been found, 0 otherwise.
92 static int has_newer_microcode(void *mc
, unsigned int csig
, int cpf
, int new_rev
)
94 struct microcode_header_intel
*mc_hdr
= mc
;
96 if (mc_hdr
->rev
<= new_rev
)
99 return find_matching_signature(mc
, csig
, cpf
);
103 * Given CPU signature and a microcode patch, this function finds if the
104 * microcode patch has matching family and model with the CPU.
106 * %true - if there's a match
109 static bool microcode_matches(struct microcode_header_intel
*mc_header
,
112 unsigned long total_size
= get_totalsize(mc_header
);
113 unsigned long data_size
= get_datasize(mc_header
);
114 struct extended_sigtable
*ext_header
;
115 unsigned int fam_ucode
, model_ucode
;
116 struct extended_signature
*ext_sig
;
117 unsigned int fam
, model
;
120 fam
= x86_family(sig
);
121 model
= x86_model(sig
);
123 fam_ucode
= x86_family(mc_header
->sig
);
124 model_ucode
= x86_model(mc_header
->sig
);
126 if (fam
== fam_ucode
&& model
== model_ucode
)
129 /* Look for ext. headers: */
130 if (total_size
<= data_size
+ MC_HEADER_SIZE
)
133 ext_header
= (void *) mc_header
+ data_size
+ MC_HEADER_SIZE
;
134 ext_sig
= (void *)ext_header
+ EXT_HEADER_SIZE
;
135 ext_sigcount
= ext_header
->count
;
137 for (i
= 0; i
< ext_sigcount
; i
++) {
138 fam_ucode
= x86_family(ext_sig
->sig
);
139 model_ucode
= x86_model(ext_sig
->sig
);
141 if (fam
== fam_ucode
&& model
== model_ucode
)
149 static struct ucode_patch
*__alloc_microcode_buf(void *data
, unsigned int size
)
151 struct ucode_patch
*p
;
153 p
= kzalloc(sizeof(struct ucode_patch
), GFP_KERNEL
);
155 return ERR_PTR(-ENOMEM
);
157 p
->data
= kmemdup(data
, size
, GFP_KERNEL
);
160 return ERR_PTR(-ENOMEM
);
166 static void save_microcode_patch(void *data
, unsigned int size
)
168 struct microcode_header_intel
*mc_hdr
, *mc_saved_hdr
;
169 struct ucode_patch
*iter
, *tmp
, *p
;
170 bool prev_found
= false;
171 unsigned int sig
, pf
;
173 mc_hdr
= (struct microcode_header_intel
*)data
;
175 list_for_each_entry_safe(iter
, tmp
, µcode_cache
, plist
) {
176 mc_saved_hdr
= (struct microcode_header_intel
*)iter
->data
;
177 sig
= mc_saved_hdr
->sig
;
178 pf
= mc_saved_hdr
->pf
;
180 if (find_matching_signature(data
, sig
, pf
)) {
183 if (mc_hdr
->rev
<= mc_saved_hdr
->rev
)
186 p
= __alloc_microcode_buf(data
, size
);
188 pr_err("Error allocating buffer %p\n", data
);
190 list_replace(&iter
->plist
, &p
->plist
);
195 * There weren't any previous patches found in the list cache; save the
199 p
= __alloc_microcode_buf(data
, size
);
201 pr_err("Error allocating buffer for %p\n", data
);
203 list_add_tail(&p
->plist
, µcode_cache
);
207 static int microcode_sanity_check(void *mc
, int print_err
)
209 unsigned long total_size
, data_size
, ext_table_size
;
210 struct microcode_header_intel
*mc_header
= mc
;
211 struct extended_sigtable
*ext_header
= NULL
;
212 u32 sum
, orig_sum
, ext_sigcount
= 0, i
;
213 struct extended_signature
*ext_sig
;
215 total_size
= get_totalsize(mc_header
);
216 data_size
= get_datasize(mc_header
);
218 if (data_size
+ MC_HEADER_SIZE
> total_size
) {
220 pr_err("Error: bad microcode data file size.\n");
224 if (mc_header
->ldrver
!= 1 || mc_header
->hdrver
!= 1) {
226 pr_err("Error: invalid/unknown microcode update format.\n");
230 ext_table_size
= total_size
- (MC_HEADER_SIZE
+ data_size
);
231 if (ext_table_size
) {
232 u32 ext_table_sum
= 0;
235 if ((ext_table_size
< EXT_HEADER_SIZE
)
236 || ((ext_table_size
- EXT_HEADER_SIZE
) % EXT_SIGNATURE_SIZE
)) {
238 pr_err("Error: truncated extended signature table.\n");
242 ext_header
= mc
+ MC_HEADER_SIZE
+ data_size
;
243 if (ext_table_size
!= exttable_size(ext_header
)) {
245 pr_err("Error: extended signature table size mismatch.\n");
249 ext_sigcount
= ext_header
->count
;
252 * Check extended table checksum: the sum of all dwords that
253 * comprise a valid table must be 0.
255 ext_tablep
= (u32
*)ext_header
;
257 i
= ext_table_size
/ sizeof(u32
);
259 ext_table_sum
+= ext_tablep
[i
];
263 pr_warn("Bad extended signature table checksum, aborting.\n");
269 * Calculate the checksum of update data and header. The checksum of
270 * valid update data and header including the extended signature table
274 i
= (MC_HEADER_SIZE
+ data_size
) / sizeof(u32
);
276 orig_sum
+= ((u32
*)mc
)[i
];
280 pr_err("Bad microcode data checksum, aborting.\n");
288 * Check extended signature checksum: 0 => valid.
290 for (i
= 0; i
< ext_sigcount
; i
++) {
291 ext_sig
= (void *)ext_header
+ EXT_HEADER_SIZE
+
292 EXT_SIGNATURE_SIZE
* i
;
294 sum
= (mc_header
->sig
+ mc_header
->pf
+ mc_header
->cksum
) -
295 (ext_sig
->sig
+ ext_sig
->pf
+ ext_sig
->cksum
);
298 pr_err("Bad extended signature checksum, aborting.\n");
306 * Get microcode matching with BSP's model. Only CPUs with the same model as
307 * BSP can stay in the platform.
309 static struct microcode_intel
*
310 scan_microcode(void *data
, size_t size
, struct ucode_cpu_info
*uci
, bool save
)
312 struct microcode_header_intel
*mc_header
;
313 struct microcode_intel
*patch
= NULL
;
314 unsigned int mc_size
;
317 if (size
< sizeof(struct microcode_header_intel
))
320 mc_header
= (struct microcode_header_intel
*)data
;
322 mc_size
= get_totalsize(mc_header
);
325 microcode_sanity_check(data
, 0) < 0)
330 if (!microcode_matches(mc_header
, uci
->cpu_sig
.sig
)) {
336 save_microcode_patch(data
, mc_size
);
342 if (!has_newer_microcode(data
,
349 struct microcode_header_intel
*phdr
= &patch
->hdr
;
351 if (!has_newer_microcode(data
,
358 /* We have a newer patch, save it. */
371 static int collect_cpu_info_early(struct ucode_cpu_info
*uci
)
374 unsigned int family
, model
;
375 struct cpu_signature csig
= { 0 };
376 unsigned int eax
, ebx
, ecx
, edx
;
378 memset(uci
, 0, sizeof(*uci
));
382 native_cpuid(&eax
, &ebx
, &ecx
, &edx
);
385 family
= x86_family(eax
);
386 model
= x86_model(eax
);
388 if ((model
>= 5) || (family
> 6)) {
389 /* get processor flags from MSR 0x17 */
390 native_rdmsr(MSR_IA32_PLATFORM_ID
, val
[0], val
[1]);
391 csig
.pf
= 1 << ((val
[1] >> 18) & 7);
394 csig
.rev
= intel_get_microcode_revision();
402 static void show_saved_mc(void)
406 unsigned int sig
, pf
, rev
, total_size
, data_size
, date
;
407 struct ucode_cpu_info uci
;
408 struct ucode_patch
*p
;
410 if (list_empty(µcode_cache
)) {
411 pr_debug("no microcode data saved.\n");
415 collect_cpu_info_early(&uci
);
417 sig
= uci
.cpu_sig
.sig
;
419 rev
= uci
.cpu_sig
.rev
;
420 pr_debug("CPU: sig=0x%x, pf=0x%x, rev=0x%x\n", sig
, pf
, rev
);
422 list_for_each_entry(p
, µcode_cache
, plist
) {
423 struct microcode_header_intel
*mc_saved_header
;
424 struct extended_sigtable
*ext_header
;
425 struct extended_signature
*ext_sig
;
428 mc_saved_header
= (struct microcode_header_intel
*)p
->data
;
430 sig
= mc_saved_header
->sig
;
431 pf
= mc_saved_header
->pf
;
432 rev
= mc_saved_header
->rev
;
433 date
= mc_saved_header
->date
;
435 total_size
= get_totalsize(mc_saved_header
);
436 data_size
= get_datasize(mc_saved_header
);
438 pr_debug("mc_saved[%d]: sig=0x%x, pf=0x%x, rev=0x%x, total size=0x%x, date = %04x-%02x-%02x\n",
439 i
++, sig
, pf
, rev
, total_size
,
442 (date
>> 16) & 0xff);
444 /* Look for ext. headers: */
445 if (total_size
<= data_size
+ MC_HEADER_SIZE
)
448 ext_header
= (void *)mc_saved_header
+ data_size
+ MC_HEADER_SIZE
;
449 ext_sigcount
= ext_header
->count
;
450 ext_sig
= (void *)ext_header
+ EXT_HEADER_SIZE
;
452 for (j
= 0; j
< ext_sigcount
; j
++) {
456 pr_debug("\tExtended[%d]: sig=0x%x, pf=0x%x\n",
466 * Save this microcode patch. It will be loaded early when a CPU is
467 * hot-added or resumes.
469 static void save_mc_for_early(u8
*mc
, unsigned int size
)
471 #ifdef CONFIG_HOTPLUG_CPU
472 /* Synchronization during CPU hotplug. */
473 static DEFINE_MUTEX(x86_cpu_microcode_mutex
);
475 mutex_lock(&x86_cpu_microcode_mutex
);
477 save_microcode_patch(mc
, size
);
480 mutex_unlock(&x86_cpu_microcode_mutex
);
484 static bool load_builtin_intel_microcode(struct cpio_data
*cp
)
486 unsigned int eax
= 1, ebx
, ecx
= 0, edx
;
489 if (IS_ENABLED(CONFIG_X86_32
))
492 native_cpuid(&eax
, &ebx
, &ecx
, &edx
);
494 sprintf(name
, "intel-ucode/%02x-%02x-%02x",
495 x86_family(eax
), x86_model(eax
), x86_stepping(eax
));
497 return get_builtin_firmware(cp
, name
);
501 * Print ucode update info.
504 print_ucode_info(struct ucode_cpu_info
*uci
, unsigned int date
)
506 pr_info_once("microcode updated early to revision 0x%x, date = %04x-%02x-%02x\n",
510 (date
>> 16) & 0xff);
515 static int delay_ucode_info
;
516 static int current_mc_date
;
519 * Print early updated ucode info after printk works. This is delayed info dump.
521 void show_ucode_info_early(void)
523 struct ucode_cpu_info uci
;
525 if (delay_ucode_info
) {
526 collect_cpu_info_early(&uci
);
527 print_ucode_info(&uci
, current_mc_date
);
528 delay_ucode_info
= 0;
533 * At this point, we can not call printk() yet. Delay printing microcode info in
534 * show_ucode_info_early() until printk() works.
536 static void print_ucode(struct ucode_cpu_info
*uci
)
538 struct microcode_intel
*mc
;
539 int *delay_ucode_info_p
;
540 int *current_mc_date_p
;
546 delay_ucode_info_p
= (int *)__pa_nodebug(&delay_ucode_info
);
547 current_mc_date_p
= (int *)__pa_nodebug(¤t_mc_date
);
549 *delay_ucode_info_p
= 1;
550 *current_mc_date_p
= mc
->hdr
.date
;
555 * Flush global tlb. We only do this in x86_64 where paging has been enabled
556 * already and PGE should be enabled as well.
558 static inline void flush_tlb_early(void)
560 __native_flush_tlb_global_irq_disabled();
563 static inline void print_ucode(struct ucode_cpu_info
*uci
)
565 struct microcode_intel
*mc
;
571 print_ucode_info(uci
, mc
->hdr
.date
);
575 static int apply_microcode_early(struct ucode_cpu_info
*uci
, bool early
)
577 struct microcode_intel
*mc
;
584 /* write microcode via MSR 0x79 */
585 native_wrmsrl(MSR_IA32_UCODE_WRITE
, (unsigned long)mc
->bits
);
587 rev
= intel_get_microcode_revision();
588 if (rev
!= mc
->hdr
.rev
)
592 /* Flush global tlb. This is precaution. */
595 uci
->cpu_sig
.rev
= rev
;
600 print_ucode_info(uci
, mc
->hdr
.date
);
605 int __init
save_microcode_in_initrd_intel(void)
607 struct ucode_cpu_info uci
;
610 if (!load_builtin_intel_microcode(&cp
))
611 cp
= find_microcode_in_initrd(ucode_path
, false);
613 if (!(cp
.data
&& cp
.size
))
616 collect_cpu_info_early(&uci
);
618 scan_microcode(cp
.data
, cp
.size
, &uci
, true);
626 * @res_patch, output: a pointer to the patch we found.
628 static struct microcode_intel
*__load_ucode_intel(struct ucode_cpu_info
*uci
)
630 static const char *path
;
634 if (IS_ENABLED(CONFIG_X86_32
)) {
635 path
= (const char *)__pa_nodebug(ucode_path
);
642 /* try built-in microcode first */
643 if (!load_builtin_intel_microcode(&cp
))
644 cp
= find_microcode_in_initrd(path
, use_pa
);
646 if (!(cp
.data
&& cp
.size
))
649 collect_cpu_info_early(uci
);
651 return scan_microcode(cp
.data
, cp
.size
, uci
, false);
654 void __init
load_ucode_intel_bsp(void)
656 struct microcode_intel
*patch
;
657 struct ucode_cpu_info uci
;
659 patch
= __load_ucode_intel(&uci
);
665 apply_microcode_early(&uci
, true);
668 void load_ucode_intel_ap(void)
670 struct microcode_intel
*patch
, **iup
;
671 struct ucode_cpu_info uci
;
673 if (IS_ENABLED(CONFIG_X86_32
))
674 iup
= (struct microcode_intel
**) __pa_nodebug(&intel_ucode_patch
);
676 iup
= &intel_ucode_patch
;
680 patch
= __load_ucode_intel(&uci
);
689 if (apply_microcode_early(&uci
, true)) {
690 /* Mixed-silicon system? Try to refetch the proper patch: */
697 static struct microcode_intel
*find_patch(struct ucode_cpu_info
*uci
)
699 struct microcode_header_intel
*phdr
;
700 struct ucode_patch
*iter
, *tmp
;
702 list_for_each_entry_safe(iter
, tmp
, µcode_cache
, plist
) {
704 phdr
= (struct microcode_header_intel
*)iter
->data
;
706 if (phdr
->rev
<= uci
->cpu_sig
.rev
)
709 if (!find_matching_signature(phdr
,
719 void reload_ucode_intel(void)
721 struct microcode_intel
*p
;
722 struct ucode_cpu_info uci
;
724 collect_cpu_info_early(&uci
);
726 p
= find_patch(&uci
);
732 apply_microcode_early(&uci
, false);
735 static int collect_cpu_info(int cpu_num
, struct cpu_signature
*csig
)
737 static struct cpu_signature prev
;
738 struct cpuinfo_x86
*c
= &cpu_data(cpu_num
);
741 memset(csig
, 0, sizeof(*csig
));
743 csig
->sig
= cpuid_eax(0x00000001);
745 if ((c
->x86_model
>= 5) || (c
->x86
> 6)) {
746 /* get processor flags from MSR 0x17 */
747 rdmsr(MSR_IA32_PLATFORM_ID
, val
[0], val
[1]);
748 csig
->pf
= 1 << ((val
[1] >> 18) & 7);
751 csig
->rev
= c
->microcode
;
753 /* No extra locking on prev, races are harmless. */
754 if (csig
->sig
!= prev
.sig
|| csig
->pf
!= prev
.pf
|| csig
->rev
!= prev
.rev
) {
755 pr_info("sig=0x%x, pf=0x%x, revision=0x%x\n",
756 csig
->sig
, csig
->pf
, csig
->rev
);
763 static int apply_microcode_intel(int cpu
)
765 struct microcode_intel
*mc
;
766 struct ucode_cpu_info
*uci
;
767 struct cpuinfo_x86
*c
;
771 /* We should bind the task to the CPU */
772 if (WARN_ON(raw_smp_processor_id() != cpu
))
775 uci
= ucode_cpu_info
+ cpu
;
778 /* Look for a newer patch in our cache: */
779 mc
= find_patch(uci
);
784 /* write microcode via MSR 0x79 */
785 wrmsrl(MSR_IA32_UCODE_WRITE
, (unsigned long)mc
->bits
);
787 rev
= intel_get_microcode_revision();
789 if (rev
!= mc
->hdr
.rev
) {
790 pr_err("CPU%d update to revision 0x%x failed\n",
795 if (rev
!= prev_rev
) {
796 pr_info("updated to revision 0x%x, date = %04x-%02x-%02x\n",
798 mc
->hdr
.date
& 0xffff,
800 (mc
->hdr
.date
>> 16) & 0xff);
806 uci
->cpu_sig
.rev
= rev
;
812 static enum ucode_state
generic_load_microcode(int cpu
, void *data
, size_t size
,
813 int (*get_ucode_data
)(void *, const void *, size_t))
815 struct ucode_cpu_info
*uci
= ucode_cpu_info
+ cpu
;
816 u8
*ucode_ptr
= data
, *new_mc
= NULL
, *mc
= NULL
;
817 int new_rev
= uci
->cpu_sig
.rev
;
818 unsigned int leftover
= size
;
819 unsigned int curr_mc_size
= 0, new_mc_size
= 0;
820 unsigned int csig
, cpf
;
823 struct microcode_header_intel mc_header
;
824 unsigned int mc_size
;
826 if (leftover
< sizeof(mc_header
)) {
827 pr_err("error! Truncated header in microcode data file\n");
831 if (get_ucode_data(&mc_header
, ucode_ptr
, sizeof(mc_header
)))
834 mc_size
= get_totalsize(&mc_header
);
835 if (!mc_size
|| mc_size
> leftover
) {
836 pr_err("error! Bad data in microcode data file\n");
840 /* For performance reasons, reuse mc area when possible */
841 if (!mc
|| mc_size
> curr_mc_size
) {
843 mc
= vmalloc(mc_size
);
846 curr_mc_size
= mc_size
;
849 if (get_ucode_data(mc
, ucode_ptr
, mc_size
) ||
850 microcode_sanity_check(mc
, 1) < 0) {
854 csig
= uci
->cpu_sig
.sig
;
855 cpf
= uci
->cpu_sig
.pf
;
856 if (has_newer_microcode(mc
, csig
, cpf
, new_rev
)) {
858 new_rev
= mc_header
.rev
;
860 new_mc_size
= mc_size
;
861 mc
= NULL
; /* trigger new vmalloc */
864 ucode_ptr
+= mc_size
;
879 uci
->mc
= (struct microcode_intel
*)new_mc
;
882 * If early loading microcode is supported, save this mc into
883 * permanent memory. So it will be loaded early when a CPU is hot added
886 save_mc_for_early(new_mc
, new_mc_size
);
888 pr_debug("CPU%d found a matching microcode update with version 0x%x (current=0x%x)\n",
889 cpu
, new_rev
, uci
->cpu_sig
.rev
);
894 static int get_ucode_fw(void *to
, const void *from
, size_t n
)
900 static enum ucode_state
request_microcode_fw(int cpu
, struct device
*device
,
904 struct cpuinfo_x86
*c
= &cpu_data(cpu
);
905 const struct firmware
*firmware
;
906 enum ucode_state ret
;
908 sprintf(name
, "intel-ucode/%02x-%02x-%02x",
909 c
->x86
, c
->x86_model
, c
->x86_mask
);
911 if (request_firmware_direct(&firmware
, name
, device
)) {
912 pr_debug("data file %s load failed\n", name
);
916 ret
= generic_load_microcode(cpu
, (void *)firmware
->data
,
917 firmware
->size
, &get_ucode_fw
);
919 release_firmware(firmware
);
924 static int get_ucode_user(void *to
, const void *from
, size_t n
)
926 return copy_from_user(to
, from
, n
);
929 static enum ucode_state
930 request_microcode_user(int cpu
, const void __user
*buf
, size_t size
)
932 return generic_load_microcode(cpu
, (void *)buf
, size
, &get_ucode_user
);
935 static struct microcode_ops microcode_intel_ops
= {
936 .request_microcode_user
= request_microcode_user
,
937 .request_microcode_fw
= request_microcode_fw
,
938 .collect_cpu_info
= collect_cpu_info
,
939 .apply_microcode
= apply_microcode_intel
,
942 struct microcode_ops
* __init
init_intel_microcode(void)
944 struct cpuinfo_x86
*c
= &boot_cpu_data
;
946 if (c
->x86_vendor
!= X86_VENDOR_INTEL
|| c
->x86
< 6 ||
947 cpu_has(c
, X86_FEATURE_IA64
)) {
948 pr_err("Intel CPU family 0x%x not supported\n", c
->x86
);
952 return µcode_intel_ops
;