arch/x86/kernel/head_64.S

   1 /*
   2  *  linux/arch/x86/kernel/head_64.S -- start in 32bit and switch to 64bit
   3  *
   4  *  Copyright (C) 2000 Andrea Arcangeli <andrea@suse.de> SuSE
   5  *  Copyright (C) 2000 Pavel Machek <pavel@suse.cz>
   6  *  Copyright (C) 2000 Karsten Keil <kkeil@suse.de>
   7  *  Copyright (C) 2001,2002 Andi Kleen <ak@suse.de>
   8  *  Copyright (C) 2005 Eric Biederman <ebiederm@xmission.com>
   9  */
  10
  11
  12 #include <linux/linkage.h>
  13 #include <linux/threads.h>
  14 #include <linux/init.h>
  15 #include <asm/segment.h>
  16 #include <asm/pgtable.h>
  17 #include <asm/page.h>
  18 #include <asm/msr.h>
  19 #include <asm/cache.h>
  20 #include <asm/processor-flags.h>
  21 #include <asm/percpu.h>
  22 #include <asm/nops.h>
  23 #include "../entry/calling.h"
  24 #include <asm/export.h>
  25
  26 #ifdef CONFIG_PARAVIRT
  27 #include <asm/asm-offsets.h>
  28 #include <asm/paravirt.h>
  29 #define GET_CR2_INTO(reg) GET_CR2_INTO_RAX ; movq %rax, reg
  30 #else
  31 #define GET_CR2_INTO(reg) movq %cr2, reg
  32 #define INTERRUPT_RETURN iretq
  33 #endif
  34
  35 /* we are not able to switch in one step to the final KERNEL ADDRESS SPACE
  36  * because we need identity-mapped pages.
  37  *
  38  */
  39
  40 #define pud_index(x)    (((x) >> PUD_SHIFT) & (PTRS_PER_PUD-1))
  41
  42 L4_PAGE_OFFSET = pgd_index(__PAGE_OFFSET_BASE)
  43 L4_START_KERNEL = pgd_index(__START_KERNEL_map)
  44 L3_START_KERNEL = pud_index(__START_KERNEL_map)
  45
  46         .text
  47         __HEAD
  48         .code64
  49         .globl startup_64
  50 startup_64:
  51         /*
  52          * At this point the CPU runs in 64bit mode CS.L = 1 CS.D = 0,
  53          * and someone has loaded an identity mapped page table
  54          * for us.  These identity mapped page tables map all of the
  55          * kernel pages and possibly all of memory.
  56          *
  57          * %rsi holds a physical pointer to real_mode_data.
  58          *
  59          * We come here either directly from a 64bit bootloader, or from
  60          * arch/x86/boot/compressed/head_64.S.
  61          *
  62          * We only come here initially at boot nothing else comes here.
  63          *
  64          * Since we may be loaded at an address different from what we were
  65          * compiled to run at we first fixup the physical addresses in our page
  66          * tables and then reload them.
  67          */
  68
  69         /* Set up the stack for verify_cpu(), similar to initial_stack below */
  70         leaq    (__end_init_task - SIZEOF_PTREGS)(%rip), %rsp
  71
  72         /* Sanitize CPU configuration */
  73         call verify_cpu
  74
  75         /*
  76          * Compute the delta between the address I am compiled to run at and the
  77          * address I am actually running at.
  78          */
  79         leaq    _text(%rip), %rbp
  80         subq    $_text - __START_KERNEL_map, %rbp
  81
  82         /* Is the address not 2M aligned? */
  83         testl   $~PMD_PAGE_MASK, %ebp
  84         jnz     bad_address
  85
  86         /*
  87          * Is the address too large?
  88          */
  89         leaq    _text(%rip), %rax
  90         shrq    $MAX_PHYSMEM_BITS, %rax
  91         jnz     bad_address
  92
  93         /*
  94          * Fixup the physical addresses in the page table
  95          */
  96         addq    %rbp, early_level4_pgt + (L4_START_KERNEL*8)(%rip)
  97
  98         addq    %rbp, level3_kernel_pgt + (510*8)(%rip)
  99         addq    %rbp, level3_kernel_pgt + (511*8)(%rip)
 100
 101         addq    %rbp, level2_fixmap_pgt + (506*8)(%rip)
 102
 103         /*
 104          * Set up the identity mapping for the switchover.  These
 105          * entries should *NOT* have the global bit set!  This also
 106          * creates a bunch of nonsense entries but that is fine --
 107          * it avoids problems around wraparound.
 108          */
 109         leaq    _text(%rip), %rdi
 110         leaq    early_level4_pgt(%rip), %rbx
 111
 112         movq    %rdi, %rax
 113         shrq    $PGDIR_SHIFT, %rax
 114
 115         leaq    (PAGE_SIZE + _KERNPG_TABLE)(%rbx), %rdx
 116         movq    %rdx, 0(%rbx,%rax,8)
 117         movq    %rdx, 8(%rbx,%rax,8)
 118
 119         addq    $PAGE_SIZE, %rdx
 120         movq    %rdi, %rax
 121         shrq    $PUD_SHIFT, %rax
 122         andl    $(PTRS_PER_PUD-1), %eax
 123         movq    %rdx, PAGE_SIZE(%rbx,%rax,8)
 124         incl    %eax
 125         andl    $(PTRS_PER_PUD-1), %eax
 126         movq    %rdx, PAGE_SIZE(%rbx,%rax,8)
 127
 128         addq    $PAGE_SIZE * 2, %rbx
 129         movq    %rdi, %rax
 130         shrq    $PMD_SHIFT, %rdi
 131         addq    $(__PAGE_KERNEL_LARGE_EXEC & ~_PAGE_GLOBAL), %rax
 132         leaq    (_end - 1)(%rip), %rcx
 133         shrq    $PMD_SHIFT, %rcx
 134         subq    %rdi, %rcx
 135         incl    %ecx
 136
 137 1:
 138         andq    $(PTRS_PER_PMD - 1), %rdi
 139         movq    %rax, (%rbx,%rdi,8)
 140         incq    %rdi
 141         addq    $PMD_SIZE, %rax
 142         decl    %ecx
 143         jnz     1b
 144
 145         test %rbp, %rbp
 146         jz .Lskip_fixup
 147
 148         /*
 149          * Fixup the kernel text+data virtual addresses. Note that
 150          * we might write invalid pmds, when the kernel is relocated
 151          * cleanup_highmap() fixes this up along with the mappings
 152          * beyond _end.
 153          */
 154         leaq    level2_kernel_pgt(%rip), %rdi
 155         leaq    PAGE_SIZE(%rdi), %r8
 156         /* See if it is a valid page table entry */
 157 1:      testb   $_PAGE_PRESENT, 0(%rdi)
 158         jz      2f
 159         addq    %rbp, 0(%rdi)
 160         /* Go to the next page */
 161 2:      addq    $8, %rdi
 162         cmp     %r8, %rdi
 163         jne     1b
 164
 165         /* Fixup phys_base */
 166         addq    %rbp, phys_base(%rip)
 167
 168 .Lskip_fixup:
 169         movq    $(early_level4_pgt - __START_KERNEL_map), %rax
 170         jmp 1f
 171 ENTRY(secondary_startup_64)
 172         /*
 173          * At this point the CPU runs in 64bit mode CS.L = 1 CS.D = 0,
 174          * and someone has loaded a mapped page table.
 175          *
 176          * %rsi holds a physical pointer to real_mode_data.
 177          *
 178          * We come here either from startup_64 (using physical addresses)
 179          * or from trampoline.S (using virtual addresses).
 180          *
 181          * Using virtual addresses from trampoline.S removes the need
 182          * to have any identity mapped pages in the kernel page table
 183          * after the boot processor executes this code.
 184          */
 185
 186         /* Sanitize CPU configuration */
 187         call verify_cpu
 188
 189         movq    $(init_level4_pgt - __START_KERNEL_map), %rax
 190 1:
 191
 192         /* Enable PAE mode and PGE */
 193         movl    $(X86_CR4_PAE | X86_CR4_PGE), %ecx
 194         movq    %rcx, %cr4
 195
 196         /* Setup early boot stage 4 level pagetables. */
 197         addq    phys_base(%rip), %rax
 198         movq    %rax, %cr3
 199
 200         /* Ensure I am executing from virtual addresses */
 201         movq    $1f, %rax
 202         jmp     *%rax
 203 1:
 204
 205         /* Check if nx is implemented */
 206         movl    $0x80000001, %eax
 207         cpuid
 208         movl    %edx,%edi
 209
 210         /* Setup EFER (Extended Feature Enable Register) */
 211         movl    $MSR_EFER, %ecx
 212         rdmsr
 213         btsl    $_EFER_SCE, %eax        /* Enable System Call */
 214         btl     $20,%edi                /* No Execute supported? */
 215         jnc     1f
 216         btsl    $_EFER_NX, %eax
 217         btsq    $_PAGE_BIT_NX,early_pmd_flags(%rip)
 218 1:      wrmsr                           /* Make changes effective */
 219
 220         /* Setup cr0 */
 221 #define CR0_STATE       (X86_CR0_PE | X86_CR0_MP | X86_CR0_ET | \
 222                          X86_CR0_NE | X86_CR0_WP | X86_CR0_AM | \
 223                          X86_CR0_PG)
 224         movl    $CR0_STATE, %eax
 225         /* Make changes effective */
 226         movq    %rax, %cr0
 227
 228         /* Setup a boot time stack */
 229         movq initial_stack(%rip), %rsp
 230
 231         /* zero EFLAGS after setting rsp */
 232         pushq $0
 233         popfq
 234
 235         /*
 236          * We must switch to a new descriptor in kernel space for the GDT
 237          * because soon the kernel won't have access anymore to the userspace
 238          * addresses where we're currently running on. We have to do that here
 239          * because in 32bit we couldn't load a 64bit linear address.
 240          */
 241         lgdt    early_gdt_descr(%rip)
 242
 243         /* set up data segments */
 244         xorl %eax,%eax
 245         movl %eax,%ds
 246         movl %eax,%ss
 247         movl %eax,%es
 248
 249         /*
 250          * We don't really need to load %fs or %gs, but load them anyway
 251          * to kill any stale realmode selectors.  This allows execution
 252          * under VT hardware.
 253          */
 254         movl %eax,%fs
 255         movl %eax,%gs
 256
 257         /* Set up %gs.
 258          *
 259          * The base of %gs always points to the bottom of the irqstack
 260          * union.  If the stack protector canary is enabled, it is
 261          * located at %gs:40.  Note that, on SMP, the boot cpu uses
 262          * init data section till per cpu areas are set up.
 263          */
 264         movl    $MSR_GS_BASE,%ecx
 265         movl    initial_gs(%rip),%eax
 266         movl    initial_gs+4(%rip),%edx
 267         wrmsr
 268
 269         /* rsi is pointer to real mode structure with interesting info.
 270            pass it to C */
 271         movq    %rsi, %rdi
 272         jmp     start_cpu
 273 ENDPROC(secondary_startup_64)
 274
 275 ENTRY(start_cpu)
 276         /*
 277          * Jump to run C code and to be on a real kernel address.
 278          * Since we are running on identity-mapped space we have to jump
 279          * to the full 64bit address, this is only possible as indirect
 280          * jump.  In addition we need to ensure %cs is set so we make this
 281          * a far return.
 282          *
 283          * Note: do not change to far jump indirect with 64bit offset.
 284          *
 285          * AMD does not support far jump indirect with 64bit offset.
 286          * AMD64 Architecture Programmer's Manual, Volume 3: states only
 287          *      JMP FAR mem16:16 FF /5 Far jump indirect,
 288          *              with the target specified by a far pointer in memory.
 289          *      JMP FAR mem16:32 FF /5 Far jump indirect,
 290          *              with the target specified by a far pointer in memory.
 291          *
 292          * Intel64 does support 64bit offset.
 293          * Software Developer Manual Vol 2: states:
 294          *      FF /5 JMP m16:16 Jump far, absolute indirect,
 295          *              address given in m16:16
 296          *      FF /5 JMP m16:32 Jump far, absolute indirect,
 297          *              address given in m16:32.
 298          *      REX.W + FF /5 JMP m16:64 Jump far, absolute indirect,
 299          *              address given in m16:64.
 300          */
 301         pushq   $.Lafter_lret   # put return address on stack for unwinder
 302         xorq    %rbp, %rbp      # clear frame pointer
 303         movq    initial_code(%rip), %rax
 304         pushq   $__KERNEL_CS    # set correct cs
 305         pushq   %rax            # target address in negative space
 306         lretq
 307 .Lafter_lret:
 308 ENDPROC(start_cpu)
 309
 310 #include "verify_cpu.S"
 311
 312 #ifdef CONFIG_HOTPLUG_CPU
 313 /*
 314  * Boot CPU0 entry point. It's called from play_dead(). Everything has been set
 315  * up already except stack. We just set up stack here. Then call
 316  * start_secondary() via start_cpu().
 317  */
 318 ENTRY(start_cpu0)
 319         movq    initial_stack(%rip), %rsp
 320         jmp     start_cpu
 321 ENDPROC(start_cpu0)
 322 #endif
 323
 324         /* Both SMP bootup and ACPI suspend change these variables */
 325         __REFDATA
 326         .balign 8
 327         GLOBAL(initial_code)
 328         .quad   x86_64_start_kernel
 329         GLOBAL(initial_gs)
 330         .quad   INIT_PER_CPU_VAR(irq_stack_union)
 331         GLOBAL(initial_stack)
 332         /*
 333          * The SIZEOF_PTREGS gap is a convention which helps the in-kernel
 334          * unwinder reliably detect the end of the stack.
 335          */
 336         .quad  init_thread_union + THREAD_SIZE - SIZEOF_PTREGS
 337         __FINITDATA
 338
 339 bad_address:
 340         jmp bad_address
 341
 342         __INIT
 343 ENTRY(early_idt_handler_array)
 344         # 104(%rsp) %rflags
 345         #  96(%rsp) %cs
 346         #  88(%rsp) %rip
 347         #  80(%rsp) error code
 348         i = 0
 349         .rept NUM_EXCEPTION_VECTORS
 350         .ifeq (EXCEPTION_ERRCODE_MASK >> i) & 1
 351         pushq $0                # Dummy error code, to make stack frame uniform
 352         .endif
 353         pushq $i                # 72(%rsp) Vector number
 354         jmp early_idt_handler_common
 355         i = i + 1
 356         .fill early_idt_handler_array + i*EARLY_IDT_HANDLER_SIZE - ., 1, 0xcc
 357         .endr
 358 ENDPROC(early_idt_handler_array)
 359
 360 early_idt_handler_common:
 361         /*
 362          * The stack is the hardware frame, an error code or zero, and the
 363          * vector number.
 364          */
 365         cld
 366
 367         incl early_recursion_flag(%rip)
 368
 369         /* The vector number is currently in the pt_regs->di slot. */
 370         pushq %rsi                              /* pt_regs->si */
 371         movq 8(%rsp), %rsi                      /* RSI = vector number */
 372         movq %rdi, 8(%rsp)                      /* pt_regs->di = RDI */
 373         pushq %rdx                              /* pt_regs->dx */
 374         pushq %rcx                              /* pt_regs->cx */
 375         pushq %rax                              /* pt_regs->ax */
 376         pushq %r8                               /* pt_regs->r8 */
 377         pushq %r9                               /* pt_regs->r9 */
 378         pushq %r10                              /* pt_regs->r10 */
 379         pushq %r11                              /* pt_regs->r11 */
 380         pushq %rbx                              /* pt_regs->bx */
 381         pushq %rbp                              /* pt_regs->bp */
 382         pushq %r12                              /* pt_regs->r12 */
 383         pushq %r13                              /* pt_regs->r13 */
 384         pushq %r14                              /* pt_regs->r14 */
 385         pushq %r15                              /* pt_regs->r15 */
 386
 387         cmpq $14,%rsi           /* Page fault? */
 388         jnz 10f
 389         GET_CR2_INTO(%rdi)      /* Can clobber any volatile register if pv */
 390         call early_make_pgtable
 391         andl %eax,%eax
 392         jz 20f                  /* All good */
 393
 394 10:
 395         movq %rsp,%rdi          /* RDI = pt_regs; RSI is already trapnr */
 396         call early_fixup_exception
 397
 398 20:
 399         decl early_recursion_flag(%rip)
 400         jmp restore_regs_and_iret
 401 ENDPROC(early_idt_handler_common)
 402
 403         __INITDATA
 404
 405         .balign 4
 406 GLOBAL(early_recursion_flag)
 407         .long 0
 408
 409 #define NEXT_PAGE(name) \
 410         .balign PAGE_SIZE; \
 411 GLOBAL(name)
 412
 413 /* Automate the creation of 1 to 1 mapping pmd entries */
 414 #define PMDS(START, PERM, COUNT)                        \
 415         i = 0 ;                                         \
 416         .rept (COUNT) ;                                 \
 417         .quad   (START) + (i << PMD_SHIFT) + (PERM) ;   \
 418         i = i + 1 ;                                     \
 419         .endr
 420
 421         __INITDATA
 422 NEXT_PAGE(early_level4_pgt)
 423         .fill   511,8,0
 424         .quad   level3_kernel_pgt - __START_KERNEL_map + _PAGE_TABLE
 425
 426 NEXT_PAGE(early_dynamic_pgts)
 427         .fill   512*EARLY_DYNAMIC_PAGE_TABLES,8,0
 428
 429         .data
 430
 431 #ifndef CONFIG_XEN
 432 NEXT_PAGE(init_level4_pgt)
 433         .fill   512,8,0
 434 #else
 435 NEXT_PAGE(init_level4_pgt)
 436         .quad   level3_ident_pgt - __START_KERNEL_map + _KERNPG_TABLE
 437         .org    init_level4_pgt + L4_PAGE_OFFSET*8, 0
 438         .quad   level3_ident_pgt - __START_KERNEL_map + _KERNPG_TABLE
 439         .org    init_level4_pgt + L4_START_KERNEL*8, 0
 440         /* (2^48-(2*1024*1024*1024))/(2^39) = 511 */
 441         .quad   level3_kernel_pgt - __START_KERNEL_map + _PAGE_TABLE
 442
 443 NEXT_PAGE(level3_ident_pgt)
 444         .quad   level2_ident_pgt - __START_KERNEL_map + _KERNPG_TABLE
 445         .fill   511, 8, 0
 446 NEXT_PAGE(level2_ident_pgt)
 447         /* Since I easily can, map the first 1G.
 448          * Don't set NX because code runs from these pages.
 449          */
 450         PMDS(0, __PAGE_KERNEL_IDENT_LARGE_EXEC, PTRS_PER_PMD)
 451 #endif
 452
 453 NEXT_PAGE(level3_kernel_pgt)
 454         .fill   L3_START_KERNEL,8,0
 455         /* (2^48-(2*1024*1024*1024)-((2^39)*511))/(2^30) = 510 */
 456         .quad   level2_kernel_pgt - __START_KERNEL_map + _KERNPG_TABLE
 457         .quad   level2_fixmap_pgt - __START_KERNEL_map + _PAGE_TABLE
 458
 459 NEXT_PAGE(level2_kernel_pgt)
 460         /*
 461          * 512 MB kernel mapping. We spend a full page on this pagetable
 462          * anyway.
 463          *
 464          * The kernel code+data+bss must not be bigger than that.
 465          *
 466          * (NOTE: at +512MB starts the module area, see MODULES_VADDR.
 467          *  If you want to increase this then increase MODULES_VADDR
 468          *  too.)
 469          */
 470         PMDS(0, __PAGE_KERNEL_LARGE_EXEC,
 471                 KERNEL_IMAGE_SIZE/PMD_SIZE)
 472
 473 NEXT_PAGE(level2_fixmap_pgt)
 474         .fill   506,8,0
 475         .quad   level1_fixmap_pgt - __START_KERNEL_map + _PAGE_TABLE
 476         /* 8MB reserved for vsyscalls + a 2MB hole = 4 + 1 entries */
 477         .fill   5,8,0
 478
 479 NEXT_PAGE(level1_fixmap_pgt)
 480         .fill   512,8,0
 481
 482 #undef PMDS
 483
 484         .data
 485         .align 16
 486         .globl early_gdt_descr
 487 early_gdt_descr:
 488         .word   GDT_ENTRIES*8-1
 489 early_gdt_descr_base:
 490         .quad   INIT_PER_CPU_VAR(gdt_page)
 491
 492 ENTRY(phys_base)
 493         /* This must match the first entry in level2_kernel_pgt */
 494         .quad   0x0000000000000000
 495 EXPORT_SYMBOL(phys_base)
 496
 497 #include "../../x86/xen/xen-head.S"
 498
 499         __PAGE_ALIGNED_BSS
 500 NEXT_PAGE(empty_zero_page)
 501         .skip PAGE_SIZE
 502 EXPORT_SYMBOL(empty_zero_page)
 503