1 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
3 #include <linux/errno.h>
4 #include <linux/kernel.h>
7 #include <linux/prctl.h>
8 #include <linux/slab.h>
9 #include <linux/sched.h>
10 #include <linux/init.h>
11 #include <linux/export.h>
13 #include <linux/tick.h>
14 #include <linux/random.h>
15 #include <linux/user-return-notifier.h>
16 #include <linux/dmi.h>
17 #include <linux/utsname.h>
18 #include <linux/stackprotector.h>
19 #include <linux/tick.h>
20 #include <linux/cpuidle.h>
21 #include <trace/events/power.h>
22 #include <linux/hw_breakpoint.h>
25 #include <asm/syscalls.h>
27 #include <asm/uaccess.h>
28 #include <asm/mwait.h>
29 #include <asm/fpu/internal.h>
30 #include <asm/debugreg.h>
32 #include <asm/tlbflush.h>
35 #include <asm/switch_to.h>
38 * per-CPU TSS segments. Threads are completely 'soft' on Linux,
39 * no more per-task TSS's. The TSS size is kept cacheline-aligned
40 * so they are allowed to end up in the .data..cacheline_aligned
41 * section. Since TSS's are completely CPU-local, we want them
42 * on exact cacheline boundaries, to eliminate cacheline ping-pong.
44 __visible
DEFINE_PER_CPU_SHARED_ALIGNED(struct tss_struct
, cpu_tss
) = {
46 .sp0
= TOP_OF_INIT_STACK
,
50 .io_bitmap_base
= INVALID_IO_BITMAP_OFFSET
,
55 * Note that the .io_bitmap member must be extra-big. This is because
56 * the CPU will access an additional byte beyond the end of the IO
57 * permission bitmap. The extra byte must be all 1 bits, and must
58 * be within the limit.
60 .io_bitmap
= { [0 ... IO_BITMAP_LONGS
] = ~0 },
63 .SYSENTER_stack_canary
= STACK_END_MAGIC
,
66 EXPORT_PER_CPU_SYMBOL(cpu_tss
);
69 static DEFINE_PER_CPU(unsigned char, is_idle
);
70 static ATOMIC_NOTIFIER_HEAD(idle_notifier
);
72 void idle_notifier_register(struct notifier_block
*n
)
74 atomic_notifier_chain_register(&idle_notifier
, n
);
76 EXPORT_SYMBOL_GPL(idle_notifier_register
);
78 void idle_notifier_unregister(struct notifier_block
*n
)
80 atomic_notifier_chain_unregister(&idle_notifier
, n
);
82 EXPORT_SYMBOL_GPL(idle_notifier_unregister
);
86 * this gets called so that we can store lazy state into memory and copy the
87 * current task into the new thread.
89 int arch_dup_task_struct(struct task_struct
*dst
, struct task_struct
*src
)
91 memcpy(dst
, src
, arch_task_struct_size
);
93 dst
->thread
.vm86
= NULL
;
96 return fpu__copy(&dst
->thread
.fpu
, &src
->thread
.fpu
);
100 * Free current thread data structures etc..
102 void exit_thread(struct task_struct
*tsk
)
104 struct thread_struct
*t
= &tsk
->thread
;
105 unsigned long *bp
= t
->io_bitmap_ptr
;
106 struct fpu
*fpu
= &t
->fpu
;
109 struct tss_struct
*tss
= &per_cpu(cpu_tss
, get_cpu());
111 t
->io_bitmap_ptr
= NULL
;
112 clear_thread_flag(TIF_IO_BITMAP
);
114 * Careful, clear this in the TSS too:
116 memset(tss
->io_bitmap
, 0xff, t
->io_bitmap_max
);
117 t
->io_bitmap_max
= 0;
127 void flush_thread(void)
129 struct task_struct
*tsk
= current
;
131 flush_ptrace_hw_breakpoint(tsk
);
132 memset(tsk
->thread
.tls_array
, 0, sizeof(tsk
->thread
.tls_array
));
134 fpu__clear(&tsk
->thread
.fpu
);
137 static void hard_disable_TSC(void)
139 cr4_set_bits(X86_CR4_TSD
);
142 void disable_TSC(void)
145 if (!test_and_set_thread_flag(TIF_NOTSC
))
147 * Must flip the CPU state synchronously with
148 * TIF_NOTSC in the current running context.
154 static void hard_enable_TSC(void)
156 cr4_clear_bits(X86_CR4_TSD
);
159 static void enable_TSC(void)
162 if (test_and_clear_thread_flag(TIF_NOTSC
))
164 * Must flip the CPU state synchronously with
165 * TIF_NOTSC in the current running context.
171 int get_tsc_mode(unsigned long adr
)
175 if (test_thread_flag(TIF_NOTSC
))
176 val
= PR_TSC_SIGSEGV
;
180 return put_user(val
, (unsigned int __user
*)adr
);
183 int set_tsc_mode(unsigned int val
)
185 if (val
== PR_TSC_SIGSEGV
)
187 else if (val
== PR_TSC_ENABLE
)
195 void __switch_to_xtra(struct task_struct
*prev_p
, struct task_struct
*next_p
,
196 struct tss_struct
*tss
)
198 struct thread_struct
*prev
, *next
;
200 prev
= &prev_p
->thread
;
201 next
= &next_p
->thread
;
203 if (test_tsk_thread_flag(prev_p
, TIF_BLOCKSTEP
) ^
204 test_tsk_thread_flag(next_p
, TIF_BLOCKSTEP
)) {
205 unsigned long debugctl
= get_debugctlmsr();
207 debugctl
&= ~DEBUGCTLMSR_BTF
;
208 if (test_tsk_thread_flag(next_p
, TIF_BLOCKSTEP
))
209 debugctl
|= DEBUGCTLMSR_BTF
;
211 update_debugctlmsr(debugctl
);
214 if (test_tsk_thread_flag(prev_p
, TIF_NOTSC
) ^
215 test_tsk_thread_flag(next_p
, TIF_NOTSC
)) {
216 /* prev and next are different */
217 if (test_tsk_thread_flag(next_p
, TIF_NOTSC
))
223 if (test_tsk_thread_flag(next_p
, TIF_IO_BITMAP
)) {
225 * Copy the relevant range of the IO bitmap.
226 * Normally this is 128 bytes or less:
228 memcpy(tss
->io_bitmap
, next
->io_bitmap_ptr
,
229 max(prev
->io_bitmap_max
, next
->io_bitmap_max
));
230 } else if (test_tsk_thread_flag(prev_p
, TIF_IO_BITMAP
)) {
232 * Clear any possible leftover bits:
234 memset(tss
->io_bitmap
, 0xff, prev
->io_bitmap_max
);
236 propagate_user_return_notify(prev_p
, next_p
);
240 * Idle related variables and functions
242 unsigned long boot_option_idle_override
= IDLE_NO_OVERRIDE
;
243 EXPORT_SYMBOL(boot_option_idle_override
);
245 static void (*x86_idle
)(void);
248 static inline void play_dead(void)
255 void enter_idle(void)
257 this_cpu_write(is_idle
, 1);
258 atomic_notifier_call_chain(&idle_notifier
, IDLE_START
, NULL
);
261 static void __exit_idle(void)
263 if (x86_test_and_clear_bit_percpu(0, is_idle
) == 0)
265 atomic_notifier_call_chain(&idle_notifier
, IDLE_END
, NULL
);
268 /* Called from interrupts to signify idle end */
271 /* idle loop has pid 0 */
278 void arch_cpu_idle_enter(void)
284 void arch_cpu_idle_exit(void)
289 void arch_cpu_idle_dead(void)
295 * Called from the generic idle code.
297 void arch_cpu_idle(void)
303 * We use this if we don't have any better idle routine..
305 void __cpuidle
default_idle(void)
307 trace_cpu_idle_rcuidle(1, smp_processor_id());
309 trace_cpu_idle_rcuidle(PWR_EVENT_EXIT
, smp_processor_id());
311 #ifdef CONFIG_APM_MODULE
312 EXPORT_SYMBOL(default_idle
);
316 bool xen_set_default_idle(void)
318 bool ret
= !!x86_idle
;
320 x86_idle
= default_idle
;
325 void stop_this_cpu(void *dummy
)
331 set_cpu_online(smp_processor_id(), false);
332 disable_local_APIC();
333 mcheck_cpu_clear(this_cpu_ptr(&cpu_info
));
339 bool amd_e400_c1e_detected
;
340 EXPORT_SYMBOL(amd_e400_c1e_detected
);
342 static cpumask_var_t amd_e400_c1e_mask
;
344 void amd_e400_remove_cpu(int cpu
)
346 if (amd_e400_c1e_mask
!= NULL
)
347 cpumask_clear_cpu(cpu
, amd_e400_c1e_mask
);
351 * AMD Erratum 400 aware idle routine. We check for C1E active in the interrupt
352 * pending message MSR. If we detect C1E, then we handle it the same
353 * way as C3 power states (local apic timer and TSC stop)
355 static void amd_e400_idle(void)
357 if (!amd_e400_c1e_detected
) {
360 rdmsr(MSR_K8_INT_PENDING_MSG
, lo
, hi
);
362 if (lo
& K8_INTP_C1E_ACTIVE_MASK
) {
363 amd_e400_c1e_detected
= true;
364 if (!boot_cpu_has(X86_FEATURE_NONSTOP_TSC
))
365 mark_tsc_unstable("TSC halt in AMD C1E");
366 pr_info("System has AMD C1E enabled\n");
370 if (amd_e400_c1e_detected
) {
371 int cpu
= smp_processor_id();
373 if (!cpumask_test_cpu(cpu
, amd_e400_c1e_mask
)) {
374 cpumask_set_cpu(cpu
, amd_e400_c1e_mask
);
375 /* Force broadcast so ACPI can not interfere. */
376 tick_broadcast_force();
377 pr_info("Switch to broadcast mode on CPU%d\n", cpu
);
379 tick_broadcast_enter();
384 * The switch back from broadcast mode needs to be
385 * called with interrupts disabled.
388 tick_broadcast_exit();
395 * Intel Core2 and older machines prefer MWAIT over HALT for C1.
396 * We can't rely on cpuidle installing MWAIT, because it will not load
397 * on systems that support only C1 -- so the boot default must be MWAIT.
399 * Some AMD machines are the opposite, they depend on using HALT.
401 * So for default C1, which is used during boot until cpuidle loads,
402 * use MWAIT-C1 on Intel HW that has it, else use HALT.
404 static int prefer_mwait_c1_over_halt(const struct cpuinfo_x86
*c
)
406 if (c
->x86_vendor
!= X86_VENDOR_INTEL
)
409 if (!cpu_has(c
, X86_FEATURE_MWAIT
) || static_cpu_has_bug(X86_BUG_MONITOR
))
416 * MONITOR/MWAIT with no hints, used for default C1 state. This invokes MWAIT
417 * with interrupts enabled and no flags, which is backwards compatible with the
418 * original MWAIT implementation.
420 static __cpuidle
void mwait_idle(void)
422 if (!current_set_polling_and_test()) {
423 trace_cpu_idle_rcuidle(1, smp_processor_id());
424 if (this_cpu_has(X86_BUG_CLFLUSH_MONITOR
)) {
426 clflush((void *)¤t_thread_info()->flags
);
430 __monitor((void *)¤t_thread_info()->flags
, 0, 0);
435 trace_cpu_idle_rcuidle(PWR_EVENT_EXIT
, smp_processor_id());
439 __current_clr_polling();
442 void select_idle_routine(const struct cpuinfo_x86
*c
)
445 if (boot_option_idle_override
== IDLE_POLL
&& smp_num_siblings
> 1)
446 pr_warn_once("WARNING: polling idle and HT enabled, performance may degrade\n");
448 if (x86_idle
|| boot_option_idle_override
== IDLE_POLL
)
451 if (cpu_has_bug(c
, X86_BUG_AMD_APIC_C1E
)) {
452 /* E400: APIC timer interrupt does not wake up CPU from C1e */
453 pr_info("using AMD E400 aware idle routine\n");
454 x86_idle
= amd_e400_idle
;
455 } else if (prefer_mwait_c1_over_halt(c
)) {
456 pr_info("using mwait in idle threads\n");
457 x86_idle
= mwait_idle
;
459 x86_idle
= default_idle
;
462 void __init
init_amd_e400_c1e_mask(void)
464 /* If we're using amd_e400_idle, we need to allocate amd_e400_c1e_mask. */
465 if (x86_idle
== amd_e400_idle
)
466 zalloc_cpumask_var(&amd_e400_c1e_mask
, GFP_KERNEL
);
469 static int __init
idle_setup(char *str
)
474 if (!strcmp(str
, "poll")) {
475 pr_info("using polling idle threads\n");
476 boot_option_idle_override
= IDLE_POLL
;
477 cpu_idle_poll_ctrl(true);
478 } else if (!strcmp(str
, "halt")) {
480 * When the boot option of idle=halt is added, halt is
481 * forced to be used for CPU idle. In such case CPU C2/C3
482 * won't be used again.
483 * To continue to load the CPU idle driver, don't touch
484 * the boot_option_idle_override.
486 x86_idle
= default_idle
;
487 boot_option_idle_override
= IDLE_HALT
;
488 } else if (!strcmp(str
, "nomwait")) {
490 * If the boot option of "idle=nomwait" is added,
491 * it means that mwait will be disabled for CPU C2/C3
492 * states. In such case it won't touch the variable
493 * of boot_option_idle_override.
495 boot_option_idle_override
= IDLE_NOMWAIT
;
501 early_param("idle", idle_setup
);
503 unsigned long arch_align_stack(unsigned long sp
)
505 if (!(current
->personality
& ADDR_NO_RANDOMIZE
) && randomize_va_space
)
506 sp
-= get_random_int() % 8192;
510 unsigned long arch_randomize_brk(struct mm_struct
*mm
)
512 unsigned long range_end
= mm
->brk
+ 0x02000000;
513 return randomize_range(mm
->brk
, range_end
, 0) ? : mm
->brk
;
517 * Return saved PC of a blocked thread.
518 * What is this good for? it will be always the scheduler or ret_from_fork.
520 unsigned long thread_saved_pc(struct task_struct
*tsk
)
522 struct inactive_task_frame
*frame
=
523 (struct inactive_task_frame
*) READ_ONCE(tsk
->thread
.sp
);
524 return READ_ONCE_NOCHECK(frame
->ret_addr
);
528 * Called from fs/proc with a reference on @p to find the function
529 * which called into schedule(). This needs to be done carefully
530 * because the task might wake up and we might look at a stack
533 unsigned long get_wchan(struct task_struct
*p
)
535 unsigned long start
, bottom
, top
, sp
, fp
, ip
, ret
= 0;
538 if (!p
|| p
== current
|| p
->state
== TASK_RUNNING
)
541 if (!try_get_task_stack(p
))
544 start
= (unsigned long)task_stack_page(p
);
549 * Layout of the stack page:
551 * ----------- topmax = start + THREAD_SIZE - sizeof(unsigned long)
553 * ----------- top = topmax - TOP_OF_KERNEL_STACK_PADDING
555 * ----------- bottom = start
557 * The tasks stack pointer points at the location where the
558 * framepointer is stored. The data on the stack is:
559 * ... IP FP ... IP FP
561 * We need to read FP and IP, so we need to adjust the upper
562 * bound by another unsigned long.
564 top
= start
+ THREAD_SIZE
- TOP_OF_KERNEL_STACK_PADDING
;
565 top
-= 2 * sizeof(unsigned long);
568 sp
= READ_ONCE(p
->thread
.sp
);
569 if (sp
< bottom
|| sp
> top
)
572 fp
= READ_ONCE_NOCHECK(((struct inactive_task_frame
*)sp
)->bp
);
574 if (fp
< bottom
|| fp
> top
)
576 ip
= READ_ONCE_NOCHECK(*(unsigned long *)(fp
+ sizeof(unsigned long)));
577 if (!in_sched_functions(ip
)) {
581 fp
= READ_ONCE_NOCHECK(*(unsigned long *)fp
);
582 } while (count
++ < 16 && p
->state
!= TASK_RUNNING
);