1 // SPDX-License-Identifier: GPL-2.0-only
3 * Kernel-based Virtual Machine driver for Linux
7 * Copyright (C) 2006 Qumranet, Inc.
8 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
11 * Yaniv Kamay <yaniv@qumranet.com>
12 * Avi Kivity <avi@qumranet.com>
18 #include <linux/kvm_types.h>
19 #include <linux/kvm_host.h>
20 #include <linux/bits.h>
23 #include <asm/sev-common.h>
25 #include "kvm_cache_regs.h"
27 #define __sme_page_pa(x) __sme_set(page_to_pfn(x) << PAGE_SHIFT)
29 #define IOPM_SIZE PAGE_SIZE * 3
30 #define MSRPM_SIZE PAGE_SIZE * 2
32 #define MAX_DIRECT_ACCESS_MSRS 46
33 #define MSRPM_OFFSETS 32
34 extern u32 msrpm_offsets
[MSRPM_OFFSETS
] __read_mostly
;
35 extern bool npt_enabled
;
37 extern bool intercept_smi
;
38 extern bool x2avic_enabled
;
42 * VMCB_ALL_CLEAN_MASK might also need to
43 * be updated if this enum is modified.
46 VMCB_INTERCEPTS
, /* Intercept vectors, TSC offset,
48 VMCB_PERM_MAP
, /* IOPM Base and MSRPM Base */
50 VMCB_INTR
, /* int_ctl, int_vector */
51 VMCB_NPT
, /* npt_en, nCR3, gPAT */
52 VMCB_CR
, /* CR0, CR3, CR4, EFER */
53 VMCB_DR
, /* DR6, DR7 */
54 VMCB_DT
, /* GDT, IDT */
55 VMCB_SEG
, /* CS, DS, SS, ES, CPL */
56 VMCB_CR2
, /* CR2 only */
57 VMCB_LBR
, /* DBGCTL, BR_FROM, BR_TO, LAST_EX_FROM, LAST_EX_TO */
58 VMCB_AVIC
, /* AVIC APIC_BAR, AVIC APIC_BACKING_PAGE,
59 * AVIC PHYSICAL_TABLE pointer,
60 * AVIC LOGICAL_TABLE pointer
62 VMCB_SW
= 31, /* Reserved for hypervisor/software use */
65 #define VMCB_ALL_CLEAN_MASK ( \
66 (1U << VMCB_INTERCEPTS) | (1U << VMCB_PERM_MAP) | \
67 (1U << VMCB_ASID) | (1U << VMCB_INTR) | \
68 (1U << VMCB_NPT) | (1U << VMCB_CR) | (1U << VMCB_DR) | \
69 (1U << VMCB_DT) | (1U << VMCB_SEG) | (1U << VMCB_CR2) | \
70 (1U << VMCB_LBR) | (1U << VMCB_AVIC) | \
73 /* TPR and CR2 are always written before VMRUN */
74 #define VMCB_ALWAYS_DIRTY_MASK ((1U << VMCB_INTR) | (1U << VMCB_CR2))
77 bool active
; /* SEV enabled guest */
78 bool es_active
; /* SEV-ES enabled guest */
79 unsigned int asid
; /* ASID used for this guest */
80 unsigned int handle
; /* SEV firmware handle */
81 int fd
; /* SEV device fd */
82 unsigned long pages_locked
; /* Number of pages locked */
83 struct list_head regions_list
; /* List of registered regions */
84 u64 ap_jump_table
; /* SEV-ES AP Jump Table address */
85 struct kvm
*enc_context_owner
; /* Owner of copied encryption context */
86 struct list_head mirror_vms
; /* List of VMs mirroring */
87 struct list_head mirror_entry
; /* Use as a list entry of mirrors */
88 struct misc_cg
*misc_cg
; /* For misc cgroup accounting */
89 atomic_t migration_in_progress
;
95 /* Struct members for AVIC */
97 struct page
*avic_logical_id_table_page
;
98 struct page
*avic_physical_id_table_page
;
99 struct hlist_node hnode
;
101 struct kvm_sev_info sev_info
;
106 struct kvm_vmcb_info
{
110 uint64_t asid_generation
;
113 struct vmcb_save_area_cached
{
122 struct vmcb_ctrl_area_cached
{
123 u32 intercepts
[MAX_INTERCEPT
];
124 u16 pause_filter_thresh
;
125 u16 pause_filter_count
;
139 u32 exit_int_info_err
;
148 struct hv_vmcb_enlightenments hv_enlightenments
;
153 struct svm_nested_state
{
154 struct kvm_vmcb_info vmcb02
;
160 /* These are the merged vectors */
163 /* A VMRUN has started but has not yet been performed, so
164 * we cannot inject a nested vmexit yet. */
165 bool nested_run_pending
;
167 /* cache for control fields of the guest */
168 struct vmcb_ctrl_area_cached ctl
;
171 * Note: this struct is not kept up-to-date while L2 runs; it is only
172 * valid within nested_svm_vmrun.
174 struct vmcb_save_area_cached save
;
179 * Indicates whether MSR bitmap for L2 needs to be rebuilt due to
180 * changes in MSR bitmap for L1 or switching to a different L2. Note,
181 * this flag can only be used reliably in conjunction with a paravirt L1
182 * which informs L0 whether any changes to MSR bitmap for L2 were done
185 bool force_msr_bitmap_recalc
;
188 struct vcpu_sev_es_state
{
190 struct sev_es_save_area
*vmsa
;
192 struct kvm_host_map ghcb_map
;
193 bool received_first_sipi
;
195 /* SEV-ES scratch area support */
203 struct kvm_vcpu vcpu
;
204 /* vmcb always points at current_vmcb->ptr, it's purely a shorthand. */
206 struct kvm_vmcb_info vmcb01
;
207 struct kvm_vmcb_info
*current_vmcb
;
221 * Contains guest-controlled bits of VIRT_SPEC_CTRL, which will be
222 * translated into the appropriate L2_CFG bits on the host to
223 * perform speculative control.
231 struct svm_nested_state nested
;
234 u64 nmi_singlestep_guest_rflags
;
237 unsigned long soft_int_csbase
;
238 unsigned long soft_int_old_rip
;
239 unsigned long soft_int_next_rip
;
240 bool soft_int_injected
;
242 /* optional nested SVM features that are enabled for this guest */
243 bool nrips_enabled
: 1;
244 bool tsc_scaling_enabled
: 1;
245 bool v_vmload_vmsave_enabled
: 1;
246 bool lbrv_enabled
: 1;
247 bool pause_filter_enabled
: 1;
248 bool pause_threshold_enabled
: 1;
249 bool vgif_enabled
: 1;
253 struct page
*avic_backing_page
;
254 u64
*avic_physical_id_cache
;
257 * Per-vcpu list of struct amd_svm_iommu_ir:
258 * This is used mainly to store interrupt remapping information used
259 * when update the vcpu affinity. This avoids the need to scan for
260 * IRTE and try to match ga_tag in the IOMMU driver.
262 struct list_head ir_list
;
263 spinlock_t ir_list_lock
;
265 /* Save desired MSR intercept (read: pass-through) state */
267 DECLARE_BITMAP(read
, MAX_DIRECT_ACCESS_MSRS
);
268 DECLARE_BITMAP(write
, MAX_DIRECT_ACCESS_MSRS
);
269 } shadow_msr_intercept
;
271 struct vcpu_sev_es_state sev_es
;
273 bool guest_state_loaded
;
275 bool x2avic_msrs_intercepted
;
278 struct svm_cpu_data
{
283 struct kvm_ldttss_desc
*tss_desc
;
285 struct page
*save_area
;
286 unsigned long save_area_pa
;
288 struct vmcb
*current_vmcb
;
290 /* index = sev_asid, value = vmcb pointer */
291 struct vmcb
**sev_vmcbs
;
294 DECLARE_PER_CPU(struct svm_cpu_data
, svm_data
);
296 void recalc_intercepts(struct vcpu_svm
*svm
);
298 static __always_inline
struct kvm_svm
*to_kvm_svm(struct kvm
*kvm
)
300 return container_of(kvm
, struct kvm_svm
, kvm
);
303 static __always_inline
bool sev_guest(struct kvm
*kvm
)
305 #ifdef CONFIG_KVM_AMD_SEV
306 struct kvm_sev_info
*sev
= &to_kvm_svm(kvm
)->sev_info
;
314 static __always_inline
bool sev_es_guest(struct kvm
*kvm
)
316 #ifdef CONFIG_KVM_AMD_SEV
317 struct kvm_sev_info
*sev
= &to_kvm_svm(kvm
)->sev_info
;
319 return sev
->es_active
&& !WARN_ON_ONCE(!sev
->active
);
325 static inline void vmcb_mark_all_dirty(struct vmcb
*vmcb
)
327 vmcb
->control
.clean
= 0;
330 static inline void vmcb_mark_all_clean(struct vmcb
*vmcb
)
332 vmcb
->control
.clean
= VMCB_ALL_CLEAN_MASK
333 & ~VMCB_ALWAYS_DIRTY_MASK
;
336 static inline void vmcb_mark_dirty(struct vmcb
*vmcb
, int bit
)
338 vmcb
->control
.clean
&= ~(1 << bit
);
341 static inline bool vmcb_is_dirty(struct vmcb
*vmcb
, int bit
)
343 return !test_bit(bit
, (unsigned long *)&vmcb
->control
.clean
);
346 static __always_inline
struct vcpu_svm
*to_svm(struct kvm_vcpu
*vcpu
)
348 return container_of(vcpu
, struct vcpu_svm
, vcpu
);
352 * Only the PDPTRs are loaded on demand into the shadow MMU. All other
353 * fields are synchronized on VM-Exit, because accessing the VMCB is cheap.
355 * CR3 might be out of date in the VMCB but it is not marked dirty; instead,
356 * KVM_REQ_LOAD_MMU_PGD is always requested when the cached vcpu->arch.cr3
357 * is changed. svm_load_mmu_pgd() then syncs the new CR3 value into the VMCB.
359 #define SVM_REGS_LAZY_LOAD_SET (1 << VCPU_EXREG_PDPTR)
361 static inline void vmcb_set_intercept(struct vmcb_control_area
*control
, u32 bit
)
363 WARN_ON_ONCE(bit
>= 32 * MAX_INTERCEPT
);
364 __set_bit(bit
, (unsigned long *)&control
->intercepts
);
367 static inline void vmcb_clr_intercept(struct vmcb_control_area
*control
, u32 bit
)
369 WARN_ON_ONCE(bit
>= 32 * MAX_INTERCEPT
);
370 __clear_bit(bit
, (unsigned long *)&control
->intercepts
);
373 static inline bool vmcb_is_intercept(struct vmcb_control_area
*control
, u32 bit
)
375 WARN_ON_ONCE(bit
>= 32 * MAX_INTERCEPT
);
376 return test_bit(bit
, (unsigned long *)&control
->intercepts
);
379 static inline bool vmcb12_is_intercept(struct vmcb_ctrl_area_cached
*control
, u32 bit
)
381 WARN_ON_ONCE(bit
>= 32 * MAX_INTERCEPT
);
382 return test_bit(bit
, (unsigned long *)&control
->intercepts
);
385 static inline void set_dr_intercepts(struct vcpu_svm
*svm
)
387 struct vmcb
*vmcb
= svm
->vmcb01
.ptr
;
389 if (!sev_es_guest(svm
->vcpu
.kvm
)) {
390 vmcb_set_intercept(&vmcb
->control
, INTERCEPT_DR0_READ
);
391 vmcb_set_intercept(&vmcb
->control
, INTERCEPT_DR1_READ
);
392 vmcb_set_intercept(&vmcb
->control
, INTERCEPT_DR2_READ
);
393 vmcb_set_intercept(&vmcb
->control
, INTERCEPT_DR3_READ
);
394 vmcb_set_intercept(&vmcb
->control
, INTERCEPT_DR4_READ
);
395 vmcb_set_intercept(&vmcb
->control
, INTERCEPT_DR5_READ
);
396 vmcb_set_intercept(&vmcb
->control
, INTERCEPT_DR6_READ
);
397 vmcb_set_intercept(&vmcb
->control
, INTERCEPT_DR0_WRITE
);
398 vmcb_set_intercept(&vmcb
->control
, INTERCEPT_DR1_WRITE
);
399 vmcb_set_intercept(&vmcb
->control
, INTERCEPT_DR2_WRITE
);
400 vmcb_set_intercept(&vmcb
->control
, INTERCEPT_DR3_WRITE
);
401 vmcb_set_intercept(&vmcb
->control
, INTERCEPT_DR4_WRITE
);
402 vmcb_set_intercept(&vmcb
->control
, INTERCEPT_DR5_WRITE
);
403 vmcb_set_intercept(&vmcb
->control
, INTERCEPT_DR6_WRITE
);
406 vmcb_set_intercept(&vmcb
->control
, INTERCEPT_DR7_READ
);
407 vmcb_set_intercept(&vmcb
->control
, INTERCEPT_DR7_WRITE
);
409 recalc_intercepts(svm
);
412 static inline void clr_dr_intercepts(struct vcpu_svm
*svm
)
414 struct vmcb
*vmcb
= svm
->vmcb01
.ptr
;
416 vmcb
->control
.intercepts
[INTERCEPT_DR
] = 0;
418 /* DR7 access must remain intercepted for an SEV-ES guest */
419 if (sev_es_guest(svm
->vcpu
.kvm
)) {
420 vmcb_set_intercept(&vmcb
->control
, INTERCEPT_DR7_READ
);
421 vmcb_set_intercept(&vmcb
->control
, INTERCEPT_DR7_WRITE
);
424 recalc_intercepts(svm
);
427 static inline void set_exception_intercept(struct vcpu_svm
*svm
, u32 bit
)
429 struct vmcb
*vmcb
= svm
->vmcb01
.ptr
;
431 WARN_ON_ONCE(bit
>= 32);
432 vmcb_set_intercept(&vmcb
->control
, INTERCEPT_EXCEPTION_OFFSET
+ bit
);
434 recalc_intercepts(svm
);
437 static inline void clr_exception_intercept(struct vcpu_svm
*svm
, u32 bit
)
439 struct vmcb
*vmcb
= svm
->vmcb01
.ptr
;
441 WARN_ON_ONCE(bit
>= 32);
442 vmcb_clr_intercept(&vmcb
->control
, INTERCEPT_EXCEPTION_OFFSET
+ bit
);
444 recalc_intercepts(svm
);
447 static inline void svm_set_intercept(struct vcpu_svm
*svm
, int bit
)
449 struct vmcb
*vmcb
= svm
->vmcb01
.ptr
;
451 vmcb_set_intercept(&vmcb
->control
, bit
);
453 recalc_intercepts(svm
);
456 static inline void svm_clr_intercept(struct vcpu_svm
*svm
, int bit
)
458 struct vmcb
*vmcb
= svm
->vmcb01
.ptr
;
460 vmcb_clr_intercept(&vmcb
->control
, bit
);
462 recalc_intercepts(svm
);
465 static inline bool svm_is_intercept(struct vcpu_svm
*svm
, int bit
)
467 return vmcb_is_intercept(&svm
->vmcb
->control
, bit
);
470 static inline bool nested_vgif_enabled(struct vcpu_svm
*svm
)
472 return svm
->vgif_enabled
&& (svm
->nested
.ctl
.int_ctl
& V_GIF_ENABLE_MASK
);
475 static inline struct vmcb
*get_vgif_vmcb(struct vcpu_svm
*svm
)
480 if (is_guest_mode(&svm
->vcpu
) && !nested_vgif_enabled(svm
))
481 return svm
->nested
.vmcb02
.ptr
;
483 return svm
->vmcb01
.ptr
;
486 static inline void enable_gif(struct vcpu_svm
*svm
)
488 struct vmcb
*vmcb
= get_vgif_vmcb(svm
);
491 vmcb
->control
.int_ctl
|= V_GIF_MASK
;
493 svm
->vcpu
.arch
.hflags
|= HF_GIF_MASK
;
496 static inline void disable_gif(struct vcpu_svm
*svm
)
498 struct vmcb
*vmcb
= get_vgif_vmcb(svm
);
501 vmcb
->control
.int_ctl
&= ~V_GIF_MASK
;
503 svm
->vcpu
.arch
.hflags
&= ~HF_GIF_MASK
;
506 static inline bool gif_set(struct vcpu_svm
*svm
)
508 struct vmcb
*vmcb
= get_vgif_vmcb(svm
);
511 return !!(vmcb
->control
.int_ctl
& V_GIF_MASK
);
513 return !!(svm
->vcpu
.arch
.hflags
& HF_GIF_MASK
);
516 static inline bool nested_npt_enabled(struct vcpu_svm
*svm
)
518 return svm
->nested
.ctl
.nested_ctl
& SVM_NESTED_CTL_NP_ENABLE
;
521 static inline bool is_x2apic_msrpm_offset(u32 offset
)
523 /* 4 msrs per u8, and 4 u8 in u32 */
524 u32 msr
= offset
* 16;
526 return (msr
>= APIC_BASE_MSR
) &&
527 (msr
< (APIC_BASE_MSR
+ 0x100));
531 #define MSR_INVALID 0xffffffffU
533 #define DEBUGCTL_RESERVED_BITS (~(0x3fULL))
535 extern bool dump_invalid_vmcb
;
537 u32
svm_msrpm_offset(u32 msr
);
538 u32
*svm_vcpu_alloc_msrpm(void);
539 void svm_vcpu_init_msrpm(struct kvm_vcpu
*vcpu
, u32
*msrpm
);
540 void svm_vcpu_free_msrpm(u32
*msrpm
);
541 void svm_copy_lbrs(struct vmcb
*to_vmcb
, struct vmcb
*from_vmcb
);
542 void svm_update_lbrv(struct kvm_vcpu
*vcpu
);
544 int svm_set_efer(struct kvm_vcpu
*vcpu
, u64 efer
);
545 void svm_set_cr0(struct kvm_vcpu
*vcpu
, unsigned long cr0
);
546 void svm_set_cr4(struct kvm_vcpu
*vcpu
, unsigned long cr4
);
547 void disable_nmi_singlestep(struct vcpu_svm
*svm
);
548 bool svm_smi_blocked(struct kvm_vcpu
*vcpu
);
549 bool svm_nmi_blocked(struct kvm_vcpu
*vcpu
);
550 bool svm_interrupt_blocked(struct kvm_vcpu
*vcpu
);
551 void svm_set_gif(struct vcpu_svm
*svm
, bool value
);
552 int svm_invoke_exit_handler(struct kvm_vcpu
*vcpu
, u64 exit_code
);
553 void set_msr_interception(struct kvm_vcpu
*vcpu
, u32
*msrpm
, u32 msr
,
554 int read
, int write
);
555 void svm_set_x2apic_msr_interception(struct vcpu_svm
*svm
, bool disable
);
556 void svm_complete_interrupt_delivery(struct kvm_vcpu
*vcpu
, int delivery_mode
,
557 int trig_mode
, int vec
);
561 #define NESTED_EXIT_HOST 0 /* Exit handled on host level */
562 #define NESTED_EXIT_DONE 1 /* Exit caused nested vmexit */
563 #define NESTED_EXIT_CONTINUE 2 /* Further checks needed */
565 static inline bool nested_svm_virtualize_tpr(struct kvm_vcpu
*vcpu
)
567 struct vcpu_svm
*svm
= to_svm(vcpu
);
569 return is_guest_mode(vcpu
) && (svm
->nested
.ctl
.int_ctl
& V_INTR_MASKING_MASK
);
572 static inline bool nested_exit_on_smi(struct vcpu_svm
*svm
)
574 return vmcb12_is_intercept(&svm
->nested
.ctl
, INTERCEPT_SMI
);
577 static inline bool nested_exit_on_intr(struct vcpu_svm
*svm
)
579 return vmcb12_is_intercept(&svm
->nested
.ctl
, INTERCEPT_INTR
);
582 static inline bool nested_exit_on_nmi(struct vcpu_svm
*svm
)
584 return vmcb12_is_intercept(&svm
->nested
.ctl
, INTERCEPT_NMI
);
587 int enter_svm_guest_mode(struct kvm_vcpu
*vcpu
,
588 u64 vmcb_gpa
, struct vmcb
*vmcb12
, bool from_vmrun
);
589 void svm_leave_nested(struct kvm_vcpu
*vcpu
);
590 void svm_free_nested(struct vcpu_svm
*svm
);
591 int svm_allocate_nested(struct vcpu_svm
*svm
);
592 int nested_svm_vmrun(struct kvm_vcpu
*vcpu
);
593 void svm_copy_vmrun_state(struct vmcb_save_area
*to_save
,
594 struct vmcb_save_area
*from_save
);
595 void svm_copy_vmloadsave_state(struct vmcb
*to_vmcb
, struct vmcb
*from_vmcb
);
596 int nested_svm_vmexit(struct vcpu_svm
*svm
);
598 static inline int nested_svm_simple_vmexit(struct vcpu_svm
*svm
, u32 exit_code
)
600 svm
->vmcb
->control
.exit_code
= exit_code
;
601 svm
->vmcb
->control
.exit_info_1
= 0;
602 svm
->vmcb
->control
.exit_info_2
= 0;
603 return nested_svm_vmexit(svm
);
606 int nested_svm_exit_handled(struct vcpu_svm
*svm
);
607 int nested_svm_check_permissions(struct kvm_vcpu
*vcpu
);
608 int nested_svm_check_exception(struct vcpu_svm
*svm
, unsigned nr
,
609 bool has_error_code
, u32 error_code
);
610 int nested_svm_exit_special(struct vcpu_svm
*svm
);
611 void nested_svm_update_tsc_ratio_msr(struct kvm_vcpu
*vcpu
);
612 void __svm_write_tsc_multiplier(u64 multiplier
);
613 void nested_copy_vmcb_control_to_cache(struct vcpu_svm
*svm
,
614 struct vmcb_control_area
*control
);
615 void nested_copy_vmcb_save_to_cache(struct vcpu_svm
*svm
,
616 struct vmcb_save_area
*save
);
617 void nested_sync_control_from_vmcb02(struct vcpu_svm
*svm
);
618 void nested_vmcb02_compute_g_pat(struct vcpu_svm
*svm
);
619 void svm_switch_vmcb(struct vcpu_svm
*svm
, struct kvm_vmcb_info
*target_vmcb
);
621 extern struct kvm_x86_nested_ops svm_nested_ops
;
625 bool avic_hardware_setup(struct kvm_x86_ops
*ops
);
626 int avic_ga_log_notifier(u32 ga_tag
);
627 void avic_vm_destroy(struct kvm
*kvm
);
628 int avic_vm_init(struct kvm
*kvm
);
629 void avic_init_vmcb(struct vcpu_svm
*svm
, struct vmcb
*vmcb
);
630 int avic_incomplete_ipi_interception(struct kvm_vcpu
*vcpu
);
631 int avic_unaccelerated_access_interception(struct kvm_vcpu
*vcpu
);
632 int avic_init_vcpu(struct vcpu_svm
*svm
);
633 void avic_vcpu_load(struct kvm_vcpu
*vcpu
, int cpu
);
634 void avic_vcpu_put(struct kvm_vcpu
*vcpu
);
635 void avic_apicv_post_state_restore(struct kvm_vcpu
*vcpu
);
636 void avic_refresh_apicv_exec_ctrl(struct kvm_vcpu
*vcpu
);
637 bool avic_check_apicv_inhibit_reasons(enum kvm_apicv_inhibit reason
);
638 int avic_pi_update_irte(struct kvm
*kvm
, unsigned int host_irq
,
639 uint32_t guest_irq
, bool set
);
640 void avic_vcpu_blocking(struct kvm_vcpu
*vcpu
);
641 void avic_vcpu_unblocking(struct kvm_vcpu
*vcpu
);
642 void avic_ring_doorbell(struct kvm_vcpu
*vcpu
);
643 unsigned long avic_vcpu_get_apicv_inhibit_reasons(struct kvm_vcpu
*vcpu
);
644 void avic_refresh_virtual_apic_mode(struct kvm_vcpu
*vcpu
);
649 #define GHCB_VERSION_MAX 1ULL
650 #define GHCB_VERSION_MIN 1ULL
653 extern unsigned int max_sev_asid
;
655 void sev_vm_destroy(struct kvm
*kvm
);
656 int sev_mem_enc_ioctl(struct kvm
*kvm
, void __user
*argp
);
657 int sev_mem_enc_register_region(struct kvm
*kvm
,
658 struct kvm_enc_region
*range
);
659 int sev_mem_enc_unregister_region(struct kvm
*kvm
,
660 struct kvm_enc_region
*range
);
661 int sev_vm_copy_enc_context_from(struct kvm
*kvm
, unsigned int source_fd
);
662 int sev_vm_move_enc_context_from(struct kvm
*kvm
, unsigned int source_fd
);
663 void sev_guest_memory_reclaimed(struct kvm
*kvm
);
665 void pre_sev_run(struct vcpu_svm
*svm
, int cpu
);
666 void __init
sev_set_cpu_caps(void);
667 void __init
sev_hardware_setup(void);
668 void sev_hardware_unsetup(void);
669 int sev_cpu_init(struct svm_cpu_data
*sd
);
670 void sev_init_vmcb(struct vcpu_svm
*svm
);
671 void sev_free_vcpu(struct kvm_vcpu
*vcpu
);
672 int sev_handle_vmgexit(struct kvm_vcpu
*vcpu
);
673 int sev_es_string_io(struct vcpu_svm
*svm
, int size
, unsigned int port
, int in
);
674 void sev_es_vcpu_reset(struct vcpu_svm
*svm
);
675 void sev_vcpu_deliver_sipi_vector(struct kvm_vcpu
*vcpu
, u8 vector
);
676 void sev_es_prepare_switch_to_guest(struct sev_es_save_area
*hostsa
);
677 void sev_es_unmap_ghcb(struct vcpu_svm
*svm
);
681 void __svm_sev_es_vcpu_run(struct vcpu_svm
*svm
, bool spec_ctrl_intercepted
);
682 void __svm_vcpu_run(struct vcpu_svm
*svm
, bool spec_ctrl_intercepted
);