2 * Kernel-based Virtual Machine driver for Linux
4 * derived from drivers/kvm/kvm_main.c
6 * Copyright (C) 2006 Qumranet, Inc.
7 * Copyright (C) 2008 Qumranet, Inc.
8 * Copyright IBM Corporation, 2008
9 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
12 * Avi Kivity <avi@qumranet.com>
13 * Yaniv Kamay <yaniv@qumranet.com>
14 * Amit Shah <amit.shah@qumranet.com>
15 * Ben-Ami Yassour <benami@il.ibm.com>
17 * This work is licensed under the terms of the GNU GPL, version 2. See
18 * the COPYING file in the top-level directory.
22 #include <linux/kvm_host.h>
27 #include "kvm_cache_regs.h"
33 #include <linux/clocksource.h>
34 #include <linux/interrupt.h>
35 #include <linux/kvm.h>
37 #include <linux/vmalloc.h>
38 #include <linux/export.h>
39 #include <linux/moduleparam.h>
40 #include <linux/mman.h>
41 #include <linux/highmem.h>
42 #include <linux/iommu.h>
43 #include <linux/intel-iommu.h>
44 #include <linux/cpufreq.h>
45 #include <linux/user-return-notifier.h>
46 #include <linux/srcu.h>
47 #include <linux/slab.h>
48 #include <linux/perf_event.h>
49 #include <linux/uaccess.h>
50 #include <linux/hash.h>
51 #include <linux/pci.h>
52 #include <linux/timekeeper_internal.h>
53 #include <linux/pvclock_gtod.h>
54 #include <linux/kvm_irqfd.h>
55 #include <linux/irqbypass.h>
56 #include <linux/sched/stat.h>
57 #include <linux/mem_encrypt.h>
59 #include <trace/events/kvm.h>
61 #include <asm/debugreg.h>
65 #include <linux/kernel_stat.h>
66 #include <asm/fpu/internal.h> /* Ugh! */
67 #include <asm/pvclock.h>
68 #include <asm/div64.h>
69 #include <asm/irq_remapping.h>
70 #include <asm/mshyperv.h>
71 #include <asm/hypervisor.h>
73 #define CREATE_TRACE_POINTS
76 #define MAX_IO_MSRS 256
77 #define KVM_MAX_MCE_BANKS 32
78 u64 __read_mostly kvm_mce_cap_supported
= MCG_CTL_P
| MCG_SER_P
;
79 EXPORT_SYMBOL_GPL(kvm_mce_cap_supported
);
81 #define emul_to_vcpu(ctxt) \
82 container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
85 * - enable syscall per default because its emulated by KVM
86 * - enable LME and LMA per default on 64 bit KVM
90 u64 __read_mostly efer_reserved_bits
= ~((u64
)(EFER_SCE
| EFER_LME
| EFER_LMA
));
92 static u64 __read_mostly efer_reserved_bits
= ~((u64
)EFER_SCE
);
95 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
96 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
98 #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \
99 KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
101 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
);
102 static void process_nmi(struct kvm_vcpu
*vcpu
);
103 static void enter_smm(struct kvm_vcpu
*vcpu
);
104 static void __kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
);
105 static void store_regs(struct kvm_vcpu
*vcpu
);
106 static int sync_regs(struct kvm_vcpu
*vcpu
);
108 struct kvm_x86_ops
*kvm_x86_ops __read_mostly
;
109 EXPORT_SYMBOL_GPL(kvm_x86_ops
);
111 static bool __read_mostly ignore_msrs
= 0;
112 module_param(ignore_msrs
, bool, S_IRUGO
| S_IWUSR
);
114 static bool __read_mostly report_ignored_msrs
= true;
115 module_param(report_ignored_msrs
, bool, S_IRUGO
| S_IWUSR
);
117 unsigned int min_timer_period_us
= 200;
118 module_param(min_timer_period_us
, uint
, S_IRUGO
| S_IWUSR
);
120 static bool __read_mostly kvmclock_periodic_sync
= true;
121 module_param(kvmclock_periodic_sync
, bool, S_IRUGO
);
123 bool __read_mostly kvm_has_tsc_control
;
124 EXPORT_SYMBOL_GPL(kvm_has_tsc_control
);
125 u32 __read_mostly kvm_max_guest_tsc_khz
;
126 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz
);
127 u8 __read_mostly kvm_tsc_scaling_ratio_frac_bits
;
128 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits
);
129 u64 __read_mostly kvm_max_tsc_scaling_ratio
;
130 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio
);
131 u64 __read_mostly kvm_default_tsc_scaling_ratio
;
132 EXPORT_SYMBOL_GPL(kvm_default_tsc_scaling_ratio
);
134 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
135 static u32 __read_mostly tsc_tolerance_ppm
= 250;
136 module_param(tsc_tolerance_ppm
, uint
, S_IRUGO
| S_IWUSR
);
138 /* lapic timer advance (tscdeadline mode only) in nanoseconds */
139 unsigned int __read_mostly lapic_timer_advance_ns
= 0;
140 module_param(lapic_timer_advance_ns
, uint
, S_IRUGO
| S_IWUSR
);
142 static bool __read_mostly vector_hashing
= true;
143 module_param(vector_hashing
, bool, S_IRUGO
);
145 bool __read_mostly enable_vmware_backdoor
= false;
146 module_param(enable_vmware_backdoor
, bool, S_IRUGO
);
147 EXPORT_SYMBOL_GPL(enable_vmware_backdoor
);
149 static bool __read_mostly force_emulation_prefix
= false;
150 module_param(force_emulation_prefix
, bool, S_IRUGO
);
152 #define KVM_NR_SHARED_MSRS 16
154 struct kvm_shared_msrs_global
{
156 u32 msrs
[KVM_NR_SHARED_MSRS
];
159 struct kvm_shared_msrs
{
160 struct user_return_notifier urn
;
162 struct kvm_shared_msr_values
{
165 } values
[KVM_NR_SHARED_MSRS
];
168 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global
;
169 static struct kvm_shared_msrs __percpu
*shared_msrs
;
171 struct kvm_stats_debugfs_item debugfs_entries
[] = {
172 { "pf_fixed", VCPU_STAT(pf_fixed
) },
173 { "pf_guest", VCPU_STAT(pf_guest
) },
174 { "tlb_flush", VCPU_STAT(tlb_flush
) },
175 { "invlpg", VCPU_STAT(invlpg
) },
176 { "exits", VCPU_STAT(exits
) },
177 { "io_exits", VCPU_STAT(io_exits
) },
178 { "mmio_exits", VCPU_STAT(mmio_exits
) },
179 { "signal_exits", VCPU_STAT(signal_exits
) },
180 { "irq_window", VCPU_STAT(irq_window_exits
) },
181 { "nmi_window", VCPU_STAT(nmi_window_exits
) },
182 { "halt_exits", VCPU_STAT(halt_exits
) },
183 { "halt_successful_poll", VCPU_STAT(halt_successful_poll
) },
184 { "halt_attempted_poll", VCPU_STAT(halt_attempted_poll
) },
185 { "halt_poll_invalid", VCPU_STAT(halt_poll_invalid
) },
186 { "halt_wakeup", VCPU_STAT(halt_wakeup
) },
187 { "hypercalls", VCPU_STAT(hypercalls
) },
188 { "request_irq", VCPU_STAT(request_irq_exits
) },
189 { "irq_exits", VCPU_STAT(irq_exits
) },
190 { "host_state_reload", VCPU_STAT(host_state_reload
) },
191 { "fpu_reload", VCPU_STAT(fpu_reload
) },
192 { "insn_emulation", VCPU_STAT(insn_emulation
) },
193 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail
) },
194 { "irq_injections", VCPU_STAT(irq_injections
) },
195 { "nmi_injections", VCPU_STAT(nmi_injections
) },
196 { "req_event", VCPU_STAT(req_event
) },
197 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped
) },
198 { "mmu_pte_write", VM_STAT(mmu_pte_write
) },
199 { "mmu_pte_updated", VM_STAT(mmu_pte_updated
) },
200 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped
) },
201 { "mmu_flooded", VM_STAT(mmu_flooded
) },
202 { "mmu_recycled", VM_STAT(mmu_recycled
) },
203 { "mmu_cache_miss", VM_STAT(mmu_cache_miss
) },
204 { "mmu_unsync", VM_STAT(mmu_unsync
) },
205 { "remote_tlb_flush", VM_STAT(remote_tlb_flush
) },
206 { "largepages", VM_STAT(lpages
) },
207 { "max_mmu_page_hash_collisions",
208 VM_STAT(max_mmu_page_hash_collisions
) },
212 u64 __read_mostly host_xcr0
;
214 static int emulator_fix_hypercall(struct x86_emulate_ctxt
*ctxt
);
216 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu
*vcpu
)
219 for (i
= 0; i
< roundup_pow_of_two(ASYNC_PF_PER_VCPU
); i
++)
220 vcpu
->arch
.apf
.gfns
[i
] = ~0;
223 static void kvm_on_user_return(struct user_return_notifier
*urn
)
226 struct kvm_shared_msrs
*locals
227 = container_of(urn
, struct kvm_shared_msrs
, urn
);
228 struct kvm_shared_msr_values
*values
;
232 * Disabling irqs at this point since the following code could be
233 * interrupted and executed through kvm_arch_hardware_disable()
235 local_irq_save(flags
);
236 if (locals
->registered
) {
237 locals
->registered
= false;
238 user_return_notifier_unregister(urn
);
240 local_irq_restore(flags
);
241 for (slot
= 0; slot
< shared_msrs_global
.nr
; ++slot
) {
242 values
= &locals
->values
[slot
];
243 if (values
->host
!= values
->curr
) {
244 wrmsrl(shared_msrs_global
.msrs
[slot
], values
->host
);
245 values
->curr
= values
->host
;
250 static void shared_msr_update(unsigned slot
, u32 msr
)
253 unsigned int cpu
= smp_processor_id();
254 struct kvm_shared_msrs
*smsr
= per_cpu_ptr(shared_msrs
, cpu
);
256 /* only read, and nobody should modify it at this time,
257 * so don't need lock */
258 if (slot
>= shared_msrs_global
.nr
) {
259 printk(KERN_ERR
"kvm: invalid MSR slot!");
262 rdmsrl_safe(msr
, &value
);
263 smsr
->values
[slot
].host
= value
;
264 smsr
->values
[slot
].curr
= value
;
267 void kvm_define_shared_msr(unsigned slot
, u32 msr
)
269 BUG_ON(slot
>= KVM_NR_SHARED_MSRS
);
270 shared_msrs_global
.msrs
[slot
] = msr
;
271 if (slot
>= shared_msrs_global
.nr
)
272 shared_msrs_global
.nr
= slot
+ 1;
274 EXPORT_SYMBOL_GPL(kvm_define_shared_msr
);
276 static void kvm_shared_msr_cpu_online(void)
280 for (i
= 0; i
< shared_msrs_global
.nr
; ++i
)
281 shared_msr_update(i
, shared_msrs_global
.msrs
[i
]);
284 int kvm_set_shared_msr(unsigned slot
, u64 value
, u64 mask
)
286 unsigned int cpu
= smp_processor_id();
287 struct kvm_shared_msrs
*smsr
= per_cpu_ptr(shared_msrs
, cpu
);
290 if (((value
^ smsr
->values
[slot
].curr
) & mask
) == 0)
292 smsr
->values
[slot
].curr
= value
;
293 err
= wrmsrl_safe(shared_msrs_global
.msrs
[slot
], value
);
297 if (!smsr
->registered
) {
298 smsr
->urn
.on_user_return
= kvm_on_user_return
;
299 user_return_notifier_register(&smsr
->urn
);
300 smsr
->registered
= true;
304 EXPORT_SYMBOL_GPL(kvm_set_shared_msr
);
306 static void drop_user_return_notifiers(void)
308 unsigned int cpu
= smp_processor_id();
309 struct kvm_shared_msrs
*smsr
= per_cpu_ptr(shared_msrs
, cpu
);
311 if (smsr
->registered
)
312 kvm_on_user_return(&smsr
->urn
);
315 u64
kvm_get_apic_base(struct kvm_vcpu
*vcpu
)
317 return vcpu
->arch
.apic_base
;
319 EXPORT_SYMBOL_GPL(kvm_get_apic_base
);
321 enum lapic_mode
kvm_get_apic_mode(struct kvm_vcpu
*vcpu
)
323 return kvm_apic_mode(kvm_get_apic_base(vcpu
));
325 EXPORT_SYMBOL_GPL(kvm_get_apic_mode
);
327 int kvm_set_apic_base(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
329 enum lapic_mode old_mode
= kvm_get_apic_mode(vcpu
);
330 enum lapic_mode new_mode
= kvm_apic_mode(msr_info
->data
);
331 u64 reserved_bits
= ((~0ULL) << cpuid_maxphyaddr(vcpu
)) | 0x2ff |
332 (guest_cpuid_has(vcpu
, X86_FEATURE_X2APIC
) ? 0 : X2APIC_ENABLE
);
334 if ((msr_info
->data
& reserved_bits
) != 0 || new_mode
== LAPIC_MODE_INVALID
)
336 if (!msr_info
->host_initiated
) {
337 if (old_mode
== LAPIC_MODE_X2APIC
&& new_mode
== LAPIC_MODE_XAPIC
)
339 if (old_mode
== LAPIC_MODE_DISABLED
&& new_mode
== LAPIC_MODE_X2APIC
)
343 kvm_lapic_set_base(vcpu
, msr_info
->data
);
346 EXPORT_SYMBOL_GPL(kvm_set_apic_base
);
348 asmlinkage __visible
void kvm_spurious_fault(void)
350 /* Fault while not rebooting. We want the trace. */
353 EXPORT_SYMBOL_GPL(kvm_spurious_fault
);
355 #define EXCPT_BENIGN 0
356 #define EXCPT_CONTRIBUTORY 1
359 static int exception_class(int vector
)
369 return EXCPT_CONTRIBUTORY
;
376 #define EXCPT_FAULT 0
378 #define EXCPT_ABORT 2
379 #define EXCPT_INTERRUPT 3
381 static int exception_type(int vector
)
385 if (WARN_ON(vector
> 31 || vector
== NMI_VECTOR
))
386 return EXCPT_INTERRUPT
;
390 /* #DB is trap, as instruction watchpoints are handled elsewhere */
391 if (mask
& ((1 << DB_VECTOR
) | (1 << BP_VECTOR
) | (1 << OF_VECTOR
)))
394 if (mask
& ((1 << DF_VECTOR
) | (1 << MC_VECTOR
)))
397 /* Reserved exceptions will result in fault */
401 static void kvm_multiple_exception(struct kvm_vcpu
*vcpu
,
402 unsigned nr
, bool has_error
, u32 error_code
,
408 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
410 if (!vcpu
->arch
.exception
.pending
&& !vcpu
->arch
.exception
.injected
) {
412 if (has_error
&& !is_protmode(vcpu
))
416 * On vmentry, vcpu->arch.exception.pending is only
417 * true if an event injection was blocked by
418 * nested_run_pending. In that case, however,
419 * vcpu_enter_guest requests an immediate exit,
420 * and the guest shouldn't proceed far enough to
423 WARN_ON_ONCE(vcpu
->arch
.exception
.pending
);
424 vcpu
->arch
.exception
.injected
= true;
426 vcpu
->arch
.exception
.pending
= true;
427 vcpu
->arch
.exception
.injected
= false;
429 vcpu
->arch
.exception
.has_error_code
= has_error
;
430 vcpu
->arch
.exception
.nr
= nr
;
431 vcpu
->arch
.exception
.error_code
= error_code
;
435 /* to check exception */
436 prev_nr
= vcpu
->arch
.exception
.nr
;
437 if (prev_nr
== DF_VECTOR
) {
438 /* triple fault -> shutdown */
439 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
442 class1
= exception_class(prev_nr
);
443 class2
= exception_class(nr
);
444 if ((class1
== EXCPT_CONTRIBUTORY
&& class2
== EXCPT_CONTRIBUTORY
)
445 || (class1
== EXCPT_PF
&& class2
!= EXCPT_BENIGN
)) {
447 * Generate double fault per SDM Table 5-5. Set
448 * exception.pending = true so that the double fault
449 * can trigger a nested vmexit.
451 vcpu
->arch
.exception
.pending
= true;
452 vcpu
->arch
.exception
.injected
= false;
453 vcpu
->arch
.exception
.has_error_code
= true;
454 vcpu
->arch
.exception
.nr
= DF_VECTOR
;
455 vcpu
->arch
.exception
.error_code
= 0;
457 /* replace previous exception with a new one in a hope
458 that instruction re-execution will regenerate lost
463 void kvm_queue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
465 kvm_multiple_exception(vcpu
, nr
, false, 0, false);
467 EXPORT_SYMBOL_GPL(kvm_queue_exception
);
469 void kvm_requeue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
471 kvm_multiple_exception(vcpu
, nr
, false, 0, true);
473 EXPORT_SYMBOL_GPL(kvm_requeue_exception
);
475 int kvm_complete_insn_gp(struct kvm_vcpu
*vcpu
, int err
)
478 kvm_inject_gp(vcpu
, 0);
480 return kvm_skip_emulated_instruction(vcpu
);
484 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp
);
486 void kvm_inject_page_fault(struct kvm_vcpu
*vcpu
, struct x86_exception
*fault
)
488 ++vcpu
->stat
.pf_guest
;
489 vcpu
->arch
.exception
.nested_apf
=
490 is_guest_mode(vcpu
) && fault
->async_page_fault
;
491 if (vcpu
->arch
.exception
.nested_apf
)
492 vcpu
->arch
.apf
.nested_apf_token
= fault
->address
;
494 vcpu
->arch
.cr2
= fault
->address
;
495 kvm_queue_exception_e(vcpu
, PF_VECTOR
, fault
->error_code
);
497 EXPORT_SYMBOL_GPL(kvm_inject_page_fault
);
499 static bool kvm_propagate_fault(struct kvm_vcpu
*vcpu
, struct x86_exception
*fault
)
501 if (mmu_is_nested(vcpu
) && !fault
->nested_page_fault
)
502 vcpu
->arch
.nested_mmu
.inject_page_fault(vcpu
, fault
);
504 vcpu
->arch
.mmu
.inject_page_fault(vcpu
, fault
);
506 return fault
->nested_page_fault
;
509 void kvm_inject_nmi(struct kvm_vcpu
*vcpu
)
511 atomic_inc(&vcpu
->arch
.nmi_queued
);
512 kvm_make_request(KVM_REQ_NMI
, vcpu
);
514 EXPORT_SYMBOL_GPL(kvm_inject_nmi
);
516 void kvm_queue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
518 kvm_multiple_exception(vcpu
, nr
, true, error_code
, false);
520 EXPORT_SYMBOL_GPL(kvm_queue_exception_e
);
522 void kvm_requeue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
524 kvm_multiple_exception(vcpu
, nr
, true, error_code
, true);
526 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e
);
529 * Checks if cpl <= required_cpl; if true, return true. Otherwise queue
530 * a #GP and return false.
532 bool kvm_require_cpl(struct kvm_vcpu
*vcpu
, int required_cpl
)
534 if (kvm_x86_ops
->get_cpl(vcpu
) <= required_cpl
)
536 kvm_queue_exception_e(vcpu
, GP_VECTOR
, 0);
539 EXPORT_SYMBOL_GPL(kvm_require_cpl
);
541 bool kvm_require_dr(struct kvm_vcpu
*vcpu
, int dr
)
543 if ((dr
!= 4 && dr
!= 5) || !kvm_read_cr4_bits(vcpu
, X86_CR4_DE
))
546 kvm_queue_exception(vcpu
, UD_VECTOR
);
549 EXPORT_SYMBOL_GPL(kvm_require_dr
);
552 * This function will be used to read from the physical memory of the currently
553 * running guest. The difference to kvm_vcpu_read_guest_page is that this function
554 * can read from guest physical or from the guest's guest physical memory.
556 int kvm_read_guest_page_mmu(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
,
557 gfn_t ngfn
, void *data
, int offset
, int len
,
560 struct x86_exception exception
;
564 ngpa
= gfn_to_gpa(ngfn
);
565 real_gfn
= mmu
->translate_gpa(vcpu
, ngpa
, access
, &exception
);
566 if (real_gfn
== UNMAPPED_GVA
)
569 real_gfn
= gpa_to_gfn(real_gfn
);
571 return kvm_vcpu_read_guest_page(vcpu
, real_gfn
, data
, offset
, len
);
573 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu
);
575 static int kvm_read_nested_guest_page(struct kvm_vcpu
*vcpu
, gfn_t gfn
,
576 void *data
, int offset
, int len
, u32 access
)
578 return kvm_read_guest_page_mmu(vcpu
, vcpu
->arch
.walk_mmu
, gfn
,
579 data
, offset
, len
, access
);
583 * Load the pae pdptrs. Return true is they are all valid.
585 int load_pdptrs(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
, unsigned long cr3
)
587 gfn_t pdpt_gfn
= cr3
>> PAGE_SHIFT
;
588 unsigned offset
= ((cr3
& (PAGE_SIZE
-1)) >> 5) << 2;
591 u64 pdpte
[ARRAY_SIZE(mmu
->pdptrs
)];
593 ret
= kvm_read_guest_page_mmu(vcpu
, mmu
, pdpt_gfn
, pdpte
,
594 offset
* sizeof(u64
), sizeof(pdpte
),
595 PFERR_USER_MASK
|PFERR_WRITE_MASK
);
600 for (i
= 0; i
< ARRAY_SIZE(pdpte
); ++i
) {
601 if ((pdpte
[i
] & PT_PRESENT_MASK
) &&
603 vcpu
->arch
.mmu
.guest_rsvd_check
.rsvd_bits_mask
[0][2])) {
610 memcpy(mmu
->pdptrs
, pdpte
, sizeof(mmu
->pdptrs
));
611 __set_bit(VCPU_EXREG_PDPTR
,
612 (unsigned long *)&vcpu
->arch
.regs_avail
);
613 __set_bit(VCPU_EXREG_PDPTR
,
614 (unsigned long *)&vcpu
->arch
.regs_dirty
);
619 EXPORT_SYMBOL_GPL(load_pdptrs
);
621 bool pdptrs_changed(struct kvm_vcpu
*vcpu
)
623 u64 pdpte
[ARRAY_SIZE(vcpu
->arch
.walk_mmu
->pdptrs
)];
629 if (is_long_mode(vcpu
) || !is_pae(vcpu
))
632 if (!test_bit(VCPU_EXREG_PDPTR
,
633 (unsigned long *)&vcpu
->arch
.regs_avail
))
636 gfn
= (kvm_read_cr3(vcpu
) & 0xffffffe0ul
) >> PAGE_SHIFT
;
637 offset
= (kvm_read_cr3(vcpu
) & 0xffffffe0ul
) & (PAGE_SIZE
- 1);
638 r
= kvm_read_nested_guest_page(vcpu
, gfn
, pdpte
, offset
, sizeof(pdpte
),
639 PFERR_USER_MASK
| PFERR_WRITE_MASK
);
642 changed
= memcmp(pdpte
, vcpu
->arch
.walk_mmu
->pdptrs
, sizeof(pdpte
)) != 0;
647 EXPORT_SYMBOL_GPL(pdptrs_changed
);
649 int kvm_set_cr0(struct kvm_vcpu
*vcpu
, unsigned long cr0
)
651 unsigned long old_cr0
= kvm_read_cr0(vcpu
);
652 unsigned long update_bits
= X86_CR0_PG
| X86_CR0_WP
;
657 if (cr0
& 0xffffffff00000000UL
)
661 cr0
&= ~CR0_RESERVED_BITS
;
663 if ((cr0
& X86_CR0_NW
) && !(cr0
& X86_CR0_CD
))
666 if ((cr0
& X86_CR0_PG
) && !(cr0
& X86_CR0_PE
))
669 if (!is_paging(vcpu
) && (cr0
& X86_CR0_PG
)) {
671 if ((vcpu
->arch
.efer
& EFER_LME
)) {
676 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
681 if (is_pae(vcpu
) && !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
,
686 if (!(cr0
& X86_CR0_PG
) && kvm_read_cr4_bits(vcpu
, X86_CR4_PCIDE
))
689 kvm_x86_ops
->set_cr0(vcpu
, cr0
);
691 if ((cr0
^ old_cr0
) & X86_CR0_PG
) {
692 kvm_clear_async_pf_completion_queue(vcpu
);
693 kvm_async_pf_hash_reset(vcpu
);
696 if ((cr0
^ old_cr0
) & update_bits
)
697 kvm_mmu_reset_context(vcpu
);
699 if (((cr0
^ old_cr0
) & X86_CR0_CD
) &&
700 kvm_arch_has_noncoherent_dma(vcpu
->kvm
) &&
701 !kvm_check_has_quirk(vcpu
->kvm
, KVM_X86_QUIRK_CD_NW_CLEARED
))
702 kvm_zap_gfn_range(vcpu
->kvm
, 0, ~0ULL);
706 EXPORT_SYMBOL_GPL(kvm_set_cr0
);
708 void kvm_lmsw(struct kvm_vcpu
*vcpu
, unsigned long msw
)
710 (void)kvm_set_cr0(vcpu
, kvm_read_cr0_bits(vcpu
, ~0x0eul
) | (msw
& 0x0f));
712 EXPORT_SYMBOL_GPL(kvm_lmsw
);
714 static void kvm_load_guest_xcr0(struct kvm_vcpu
*vcpu
)
716 if (kvm_read_cr4_bits(vcpu
, X86_CR4_OSXSAVE
) &&
717 !vcpu
->guest_xcr0_loaded
) {
718 /* kvm_set_xcr() also depends on this */
719 if (vcpu
->arch
.xcr0
!= host_xcr0
)
720 xsetbv(XCR_XFEATURE_ENABLED_MASK
, vcpu
->arch
.xcr0
);
721 vcpu
->guest_xcr0_loaded
= 1;
725 static void kvm_put_guest_xcr0(struct kvm_vcpu
*vcpu
)
727 if (vcpu
->guest_xcr0_loaded
) {
728 if (vcpu
->arch
.xcr0
!= host_xcr0
)
729 xsetbv(XCR_XFEATURE_ENABLED_MASK
, host_xcr0
);
730 vcpu
->guest_xcr0_loaded
= 0;
734 static int __kvm_set_xcr(struct kvm_vcpu
*vcpu
, u32 index
, u64 xcr
)
737 u64 old_xcr0
= vcpu
->arch
.xcr0
;
740 /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now */
741 if (index
!= XCR_XFEATURE_ENABLED_MASK
)
743 if (!(xcr0
& XFEATURE_MASK_FP
))
745 if ((xcr0
& XFEATURE_MASK_YMM
) && !(xcr0
& XFEATURE_MASK_SSE
))
749 * Do not allow the guest to set bits that we do not support
750 * saving. However, xcr0 bit 0 is always set, even if the
751 * emulated CPU does not support XSAVE (see fx_init).
753 valid_bits
= vcpu
->arch
.guest_supported_xcr0
| XFEATURE_MASK_FP
;
754 if (xcr0
& ~valid_bits
)
757 if ((!(xcr0
& XFEATURE_MASK_BNDREGS
)) !=
758 (!(xcr0
& XFEATURE_MASK_BNDCSR
)))
761 if (xcr0
& XFEATURE_MASK_AVX512
) {
762 if (!(xcr0
& XFEATURE_MASK_YMM
))
764 if ((xcr0
& XFEATURE_MASK_AVX512
) != XFEATURE_MASK_AVX512
)
767 vcpu
->arch
.xcr0
= xcr0
;
769 if ((xcr0
^ old_xcr0
) & XFEATURE_MASK_EXTEND
)
770 kvm_update_cpuid(vcpu
);
774 int kvm_set_xcr(struct kvm_vcpu
*vcpu
, u32 index
, u64 xcr
)
776 if (kvm_x86_ops
->get_cpl(vcpu
) != 0 ||
777 __kvm_set_xcr(vcpu
, index
, xcr
)) {
778 kvm_inject_gp(vcpu
, 0);
783 EXPORT_SYMBOL_GPL(kvm_set_xcr
);
785 int kvm_set_cr4(struct kvm_vcpu
*vcpu
, unsigned long cr4
)
787 unsigned long old_cr4
= kvm_read_cr4(vcpu
);
788 unsigned long pdptr_bits
= X86_CR4_PGE
| X86_CR4_PSE
| X86_CR4_PAE
|
789 X86_CR4_SMEP
| X86_CR4_SMAP
| X86_CR4_PKE
;
791 if (cr4
& CR4_RESERVED_BITS
)
794 if (!guest_cpuid_has(vcpu
, X86_FEATURE_XSAVE
) && (cr4
& X86_CR4_OSXSAVE
))
797 if (!guest_cpuid_has(vcpu
, X86_FEATURE_SMEP
) && (cr4
& X86_CR4_SMEP
))
800 if (!guest_cpuid_has(vcpu
, X86_FEATURE_SMAP
) && (cr4
& X86_CR4_SMAP
))
803 if (!guest_cpuid_has(vcpu
, X86_FEATURE_FSGSBASE
) && (cr4
& X86_CR4_FSGSBASE
))
806 if (!guest_cpuid_has(vcpu
, X86_FEATURE_PKU
) && (cr4
& X86_CR4_PKE
))
809 if (!guest_cpuid_has(vcpu
, X86_FEATURE_LA57
) && (cr4
& X86_CR4_LA57
))
812 if (!guest_cpuid_has(vcpu
, X86_FEATURE_UMIP
) && (cr4
& X86_CR4_UMIP
))
815 if (is_long_mode(vcpu
)) {
816 if (!(cr4
& X86_CR4_PAE
))
818 } else if (is_paging(vcpu
) && (cr4
& X86_CR4_PAE
)
819 && ((cr4
^ old_cr4
) & pdptr_bits
)
820 && !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
,
824 if ((cr4
& X86_CR4_PCIDE
) && !(old_cr4
& X86_CR4_PCIDE
)) {
825 if (!guest_cpuid_has(vcpu
, X86_FEATURE_PCID
))
828 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
829 if ((kvm_read_cr3(vcpu
) & X86_CR3_PCID_MASK
) || !is_long_mode(vcpu
))
833 if (kvm_x86_ops
->set_cr4(vcpu
, cr4
))
836 if (((cr4
^ old_cr4
) & pdptr_bits
) ||
837 (!(cr4
& X86_CR4_PCIDE
) && (old_cr4
& X86_CR4_PCIDE
)))
838 kvm_mmu_reset_context(vcpu
);
840 if ((cr4
^ old_cr4
) & (X86_CR4_OSXSAVE
| X86_CR4_PKE
))
841 kvm_update_cpuid(vcpu
);
845 EXPORT_SYMBOL_GPL(kvm_set_cr4
);
847 int kvm_set_cr3(struct kvm_vcpu
*vcpu
, unsigned long cr3
)
850 bool pcid_enabled
= kvm_read_cr4_bits(vcpu
, X86_CR4_PCIDE
);
853 cr3
&= ~CR3_PCID_INVD
;
856 if (cr3
== kvm_read_cr3(vcpu
) && !pdptrs_changed(vcpu
)) {
857 kvm_mmu_sync_roots(vcpu
);
858 kvm_make_request(KVM_REQ_TLB_FLUSH
, vcpu
);
862 if (is_long_mode(vcpu
) &&
863 (cr3
& rsvd_bits(cpuid_maxphyaddr(vcpu
), 63)))
865 else if (is_pae(vcpu
) && is_paging(vcpu
) &&
866 !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, cr3
))
869 vcpu
->arch
.cr3
= cr3
;
870 __set_bit(VCPU_EXREG_CR3
, (ulong
*)&vcpu
->arch
.regs_avail
);
871 kvm_mmu_new_cr3(vcpu
);
874 EXPORT_SYMBOL_GPL(kvm_set_cr3
);
876 int kvm_set_cr8(struct kvm_vcpu
*vcpu
, unsigned long cr8
)
878 if (cr8
& CR8_RESERVED_BITS
)
880 if (lapic_in_kernel(vcpu
))
881 kvm_lapic_set_tpr(vcpu
, cr8
);
883 vcpu
->arch
.cr8
= cr8
;
886 EXPORT_SYMBOL_GPL(kvm_set_cr8
);
888 unsigned long kvm_get_cr8(struct kvm_vcpu
*vcpu
)
890 if (lapic_in_kernel(vcpu
))
891 return kvm_lapic_get_cr8(vcpu
);
893 return vcpu
->arch
.cr8
;
895 EXPORT_SYMBOL_GPL(kvm_get_cr8
);
897 static void kvm_update_dr0123(struct kvm_vcpu
*vcpu
)
901 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)) {
902 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
903 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
904 vcpu
->arch
.switch_db_regs
|= KVM_DEBUGREG_RELOAD
;
908 static void kvm_update_dr6(struct kvm_vcpu
*vcpu
)
910 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
))
911 kvm_x86_ops
->set_dr6(vcpu
, vcpu
->arch
.dr6
);
914 static void kvm_update_dr7(struct kvm_vcpu
*vcpu
)
918 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)
919 dr7
= vcpu
->arch
.guest_debug_dr7
;
921 dr7
= vcpu
->arch
.dr7
;
922 kvm_x86_ops
->set_dr7(vcpu
, dr7
);
923 vcpu
->arch
.switch_db_regs
&= ~KVM_DEBUGREG_BP_ENABLED
;
924 if (dr7
& DR7_BP_EN_MASK
)
925 vcpu
->arch
.switch_db_regs
|= KVM_DEBUGREG_BP_ENABLED
;
928 static u64
kvm_dr6_fixed(struct kvm_vcpu
*vcpu
)
930 u64 fixed
= DR6_FIXED_1
;
932 if (!guest_cpuid_has(vcpu
, X86_FEATURE_RTM
))
937 static int __kvm_set_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long val
)
941 vcpu
->arch
.db
[dr
] = val
;
942 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
))
943 vcpu
->arch
.eff_db
[dr
] = val
;
948 if (val
& 0xffffffff00000000ULL
)
950 vcpu
->arch
.dr6
= (val
& DR6_VOLATILE
) | kvm_dr6_fixed(vcpu
);
951 kvm_update_dr6(vcpu
);
956 if (val
& 0xffffffff00000000ULL
)
958 vcpu
->arch
.dr7
= (val
& DR7_VOLATILE
) | DR7_FIXED_1
;
959 kvm_update_dr7(vcpu
);
966 int kvm_set_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long val
)
968 if (__kvm_set_dr(vcpu
, dr
, val
)) {
969 kvm_inject_gp(vcpu
, 0);
974 EXPORT_SYMBOL_GPL(kvm_set_dr
);
976 int kvm_get_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long *val
)
980 *val
= vcpu
->arch
.db
[dr
];
985 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)
986 *val
= vcpu
->arch
.dr6
;
988 *val
= kvm_x86_ops
->get_dr6(vcpu
);
993 *val
= vcpu
->arch
.dr7
;
998 EXPORT_SYMBOL_GPL(kvm_get_dr
);
1000 bool kvm_rdpmc(struct kvm_vcpu
*vcpu
)
1002 u32 ecx
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
1006 err
= kvm_pmu_rdpmc(vcpu
, ecx
, &data
);
1009 kvm_register_write(vcpu
, VCPU_REGS_RAX
, (u32
)data
);
1010 kvm_register_write(vcpu
, VCPU_REGS_RDX
, data
>> 32);
1013 EXPORT_SYMBOL_GPL(kvm_rdpmc
);
1016 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
1017 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
1019 * This list is modified at module load time to reflect the
1020 * capabilities of the host cpu. This capabilities test skips MSRs that are
1021 * kvm-specific. Those are put in emulated_msrs; filtering of emulated_msrs
1022 * may depend on host virtualization features rather than host cpu features.
1025 static u32 msrs_to_save
[] = {
1026 MSR_IA32_SYSENTER_CS
, MSR_IA32_SYSENTER_ESP
, MSR_IA32_SYSENTER_EIP
,
1028 #ifdef CONFIG_X86_64
1029 MSR_CSTAR
, MSR_KERNEL_GS_BASE
, MSR_SYSCALL_MASK
, MSR_LSTAR
,
1031 MSR_IA32_TSC
, MSR_IA32_CR_PAT
, MSR_VM_HSAVE_PA
,
1032 MSR_IA32_FEATURE_CONTROL
, MSR_IA32_BNDCFGS
, MSR_TSC_AUX
,
1033 MSR_IA32_SPEC_CTRL
, MSR_IA32_ARCH_CAPABILITIES
1036 static unsigned num_msrs_to_save
;
1038 static u32 emulated_msrs
[] = {
1039 MSR_KVM_SYSTEM_TIME
, MSR_KVM_WALL_CLOCK
,
1040 MSR_KVM_SYSTEM_TIME_NEW
, MSR_KVM_WALL_CLOCK_NEW
,
1041 HV_X64_MSR_GUEST_OS_ID
, HV_X64_MSR_HYPERCALL
,
1042 HV_X64_MSR_TIME_REF_COUNT
, HV_X64_MSR_REFERENCE_TSC
,
1043 HV_X64_MSR_TSC_FREQUENCY
, HV_X64_MSR_APIC_FREQUENCY
,
1044 HV_X64_MSR_CRASH_P0
, HV_X64_MSR_CRASH_P1
, HV_X64_MSR_CRASH_P2
,
1045 HV_X64_MSR_CRASH_P3
, HV_X64_MSR_CRASH_P4
, HV_X64_MSR_CRASH_CTL
,
1047 HV_X64_MSR_VP_INDEX
,
1048 HV_X64_MSR_VP_RUNTIME
,
1049 HV_X64_MSR_SCONTROL
,
1050 HV_X64_MSR_STIMER0_CONFIG
,
1051 HV_X64_MSR_VP_ASSIST_PAGE
,
1052 HV_X64_MSR_REENLIGHTENMENT_CONTROL
, HV_X64_MSR_TSC_EMULATION_CONTROL
,
1053 HV_X64_MSR_TSC_EMULATION_STATUS
,
1055 MSR_KVM_ASYNC_PF_EN
, MSR_KVM_STEAL_TIME
,
1058 MSR_IA32_TSC_ADJUST
,
1059 MSR_IA32_TSCDEADLINE
,
1060 MSR_IA32_MISC_ENABLE
,
1061 MSR_IA32_MCG_STATUS
,
1063 MSR_IA32_MCG_EXT_CTL
,
1067 MSR_MISC_FEATURES_ENABLES
,
1070 static unsigned num_emulated_msrs
;
1073 * List of msr numbers which are used to expose MSR-based features that
1074 * can be used by a hypervisor to validate requested CPU features.
1076 static u32 msr_based_features
[] = {
1078 MSR_IA32_VMX_TRUE_PINBASED_CTLS
,
1079 MSR_IA32_VMX_PINBASED_CTLS
,
1080 MSR_IA32_VMX_TRUE_PROCBASED_CTLS
,
1081 MSR_IA32_VMX_PROCBASED_CTLS
,
1082 MSR_IA32_VMX_TRUE_EXIT_CTLS
,
1083 MSR_IA32_VMX_EXIT_CTLS
,
1084 MSR_IA32_VMX_TRUE_ENTRY_CTLS
,
1085 MSR_IA32_VMX_ENTRY_CTLS
,
1087 MSR_IA32_VMX_CR0_FIXED0
,
1088 MSR_IA32_VMX_CR0_FIXED1
,
1089 MSR_IA32_VMX_CR4_FIXED0
,
1090 MSR_IA32_VMX_CR4_FIXED1
,
1091 MSR_IA32_VMX_VMCS_ENUM
,
1092 MSR_IA32_VMX_PROCBASED_CTLS2
,
1093 MSR_IA32_VMX_EPT_VPID_CAP
,
1094 MSR_IA32_VMX_VMFUNC
,
1100 static unsigned int num_msr_based_features
;
1102 static int kvm_get_msr_feature(struct kvm_msr_entry
*msr
)
1104 switch (msr
->index
) {
1105 case MSR_IA32_UCODE_REV
:
1106 rdmsrl(msr
->index
, msr
->data
);
1109 if (kvm_x86_ops
->get_msr_feature(msr
))
1115 static int do_get_msr_feature(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
1117 struct kvm_msr_entry msr
;
1121 r
= kvm_get_msr_feature(&msr
);
1130 bool kvm_valid_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
1132 if (efer
& efer_reserved_bits
)
1135 if (efer
& EFER_FFXSR
&& !guest_cpuid_has(vcpu
, X86_FEATURE_FXSR_OPT
))
1138 if (efer
& EFER_SVME
&& !guest_cpuid_has(vcpu
, X86_FEATURE_SVM
))
1143 EXPORT_SYMBOL_GPL(kvm_valid_efer
);
1145 static int set_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
1147 u64 old_efer
= vcpu
->arch
.efer
;
1149 if (!kvm_valid_efer(vcpu
, efer
))
1153 && (vcpu
->arch
.efer
& EFER_LME
) != (efer
& EFER_LME
))
1157 efer
|= vcpu
->arch
.efer
& EFER_LMA
;
1159 kvm_x86_ops
->set_efer(vcpu
, efer
);
1161 /* Update reserved bits */
1162 if ((efer
^ old_efer
) & EFER_NX
)
1163 kvm_mmu_reset_context(vcpu
);
1168 void kvm_enable_efer_bits(u64 mask
)
1170 efer_reserved_bits
&= ~mask
;
1172 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits
);
1175 * Writes msr value into into the appropriate "register".
1176 * Returns 0 on success, non-0 otherwise.
1177 * Assumes vcpu_load() was already called.
1179 int kvm_set_msr(struct kvm_vcpu
*vcpu
, struct msr_data
*msr
)
1181 switch (msr
->index
) {
1184 case MSR_KERNEL_GS_BASE
:
1187 if (is_noncanonical_address(msr
->data
, vcpu
))
1190 case MSR_IA32_SYSENTER_EIP
:
1191 case MSR_IA32_SYSENTER_ESP
:
1193 * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1194 * non-canonical address is written on Intel but not on
1195 * AMD (which ignores the top 32-bits, because it does
1196 * not implement 64-bit SYSENTER).
1198 * 64-bit code should hence be able to write a non-canonical
1199 * value on AMD. Making the address canonical ensures that
1200 * vmentry does not fail on Intel after writing a non-canonical
1201 * value, and that something deterministic happens if the guest
1202 * invokes 64-bit SYSENTER.
1204 msr
->data
= get_canonical(msr
->data
, vcpu_virt_addr_bits(vcpu
));
1206 return kvm_x86_ops
->set_msr(vcpu
, msr
);
1208 EXPORT_SYMBOL_GPL(kvm_set_msr
);
1211 * Adapt set_msr() to msr_io()'s calling convention
1213 static int do_get_msr(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
1215 struct msr_data msr
;
1219 msr
.host_initiated
= true;
1220 r
= kvm_get_msr(vcpu
, &msr
);
1228 static int do_set_msr(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
1230 struct msr_data msr
;
1234 msr
.host_initiated
= true;
1235 return kvm_set_msr(vcpu
, &msr
);
1238 #ifdef CONFIG_X86_64
1239 struct pvclock_gtod_data
{
1242 struct { /* extract of a clocksource struct */
1255 static struct pvclock_gtod_data pvclock_gtod_data
;
1257 static void update_pvclock_gtod(struct timekeeper
*tk
)
1259 struct pvclock_gtod_data
*vdata
= &pvclock_gtod_data
;
1262 boot_ns
= ktime_to_ns(ktime_add(tk
->tkr_mono
.base
, tk
->offs_boot
));
1264 write_seqcount_begin(&vdata
->seq
);
1266 /* copy pvclock gtod data */
1267 vdata
->clock
.vclock_mode
= tk
->tkr_mono
.clock
->archdata
.vclock_mode
;
1268 vdata
->clock
.cycle_last
= tk
->tkr_mono
.cycle_last
;
1269 vdata
->clock
.mask
= tk
->tkr_mono
.mask
;
1270 vdata
->clock
.mult
= tk
->tkr_mono
.mult
;
1271 vdata
->clock
.shift
= tk
->tkr_mono
.shift
;
1273 vdata
->boot_ns
= boot_ns
;
1274 vdata
->nsec_base
= tk
->tkr_mono
.xtime_nsec
;
1276 vdata
->wall_time_sec
= tk
->xtime_sec
;
1278 write_seqcount_end(&vdata
->seq
);
1282 void kvm_set_pending_timer(struct kvm_vcpu
*vcpu
)
1285 * Note: KVM_REQ_PENDING_TIMER is implicitly checked in
1286 * vcpu_enter_guest. This function is only called from
1287 * the physical CPU that is running vcpu.
1289 kvm_make_request(KVM_REQ_PENDING_TIMER
, vcpu
);
1292 static void kvm_write_wall_clock(struct kvm
*kvm
, gpa_t wall_clock
)
1296 struct pvclock_wall_clock wc
;
1297 struct timespec64 boot
;
1302 r
= kvm_read_guest(kvm
, wall_clock
, &version
, sizeof(version
));
1307 ++version
; /* first time write, random junk */
1311 if (kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
)))
1315 * The guest calculates current wall clock time by adding
1316 * system time (updated by kvm_guest_time_update below) to the
1317 * wall clock specified here. guest system time equals host
1318 * system time for us, thus we must fill in host boot time here.
1320 getboottime64(&boot
);
1322 if (kvm
->arch
.kvmclock_offset
) {
1323 struct timespec64 ts
= ns_to_timespec64(kvm
->arch
.kvmclock_offset
);
1324 boot
= timespec64_sub(boot
, ts
);
1326 wc
.sec
= (u32
)boot
.tv_sec
; /* overflow in 2106 guest time */
1327 wc
.nsec
= boot
.tv_nsec
;
1328 wc
.version
= version
;
1330 kvm_write_guest(kvm
, wall_clock
, &wc
, sizeof(wc
));
1333 kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
));
1336 static uint32_t div_frac(uint32_t dividend
, uint32_t divisor
)
1338 do_shl32_div32(dividend
, divisor
);
1342 static void kvm_get_time_scale(uint64_t scaled_hz
, uint64_t base_hz
,
1343 s8
*pshift
, u32
*pmultiplier
)
1351 scaled64
= scaled_hz
;
1352 while (tps64
> scaled64
*2 || tps64
& 0xffffffff00000000ULL
) {
1357 tps32
= (uint32_t)tps64
;
1358 while (tps32
<= scaled64
|| scaled64
& 0xffffffff00000000ULL
) {
1359 if (scaled64
& 0xffffffff00000000ULL
|| tps32
& 0x80000000)
1367 *pmultiplier
= div_frac(scaled64
, tps32
);
1369 pr_debug("%s: base_hz %llu => %llu, shift %d, mul %u\n",
1370 __func__
, base_hz
, scaled_hz
, shift
, *pmultiplier
);
1373 #ifdef CONFIG_X86_64
1374 static atomic_t kvm_guest_has_master_clock
= ATOMIC_INIT(0);
1377 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz
);
1378 static unsigned long max_tsc_khz
;
1380 static u32
adjust_tsc_khz(u32 khz
, s32 ppm
)
1382 u64 v
= (u64
)khz
* (1000000 + ppm
);
1387 static int set_tsc_khz(struct kvm_vcpu
*vcpu
, u32 user_tsc_khz
, bool scale
)
1391 /* Guest TSC same frequency as host TSC? */
1393 vcpu
->arch
.tsc_scaling_ratio
= kvm_default_tsc_scaling_ratio
;
1397 /* TSC scaling supported? */
1398 if (!kvm_has_tsc_control
) {
1399 if (user_tsc_khz
> tsc_khz
) {
1400 vcpu
->arch
.tsc_catchup
= 1;
1401 vcpu
->arch
.tsc_always_catchup
= 1;
1404 WARN(1, "user requested TSC rate below hardware speed\n");
1409 /* TSC scaling required - calculate ratio */
1410 ratio
= mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits
,
1411 user_tsc_khz
, tsc_khz
);
1413 if (ratio
== 0 || ratio
>= kvm_max_tsc_scaling_ratio
) {
1414 WARN_ONCE(1, "Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
1419 vcpu
->arch
.tsc_scaling_ratio
= ratio
;
1423 static int kvm_set_tsc_khz(struct kvm_vcpu
*vcpu
, u32 user_tsc_khz
)
1425 u32 thresh_lo
, thresh_hi
;
1426 int use_scaling
= 0;
1428 /* tsc_khz can be zero if TSC calibration fails */
1429 if (user_tsc_khz
== 0) {
1430 /* set tsc_scaling_ratio to a safe value */
1431 vcpu
->arch
.tsc_scaling_ratio
= kvm_default_tsc_scaling_ratio
;
1435 /* Compute a scale to convert nanoseconds in TSC cycles */
1436 kvm_get_time_scale(user_tsc_khz
* 1000LL, NSEC_PER_SEC
,
1437 &vcpu
->arch
.virtual_tsc_shift
,
1438 &vcpu
->arch
.virtual_tsc_mult
);
1439 vcpu
->arch
.virtual_tsc_khz
= user_tsc_khz
;
1442 * Compute the variation in TSC rate which is acceptable
1443 * within the range of tolerance and decide if the
1444 * rate being applied is within that bounds of the hardware
1445 * rate. If so, no scaling or compensation need be done.
1447 thresh_lo
= adjust_tsc_khz(tsc_khz
, -tsc_tolerance_ppm
);
1448 thresh_hi
= adjust_tsc_khz(tsc_khz
, tsc_tolerance_ppm
);
1449 if (user_tsc_khz
< thresh_lo
|| user_tsc_khz
> thresh_hi
) {
1450 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz
, thresh_lo
, thresh_hi
);
1453 return set_tsc_khz(vcpu
, user_tsc_khz
, use_scaling
);
1456 static u64
compute_guest_tsc(struct kvm_vcpu
*vcpu
, s64 kernel_ns
)
1458 u64 tsc
= pvclock_scale_delta(kernel_ns
-vcpu
->arch
.this_tsc_nsec
,
1459 vcpu
->arch
.virtual_tsc_mult
,
1460 vcpu
->arch
.virtual_tsc_shift
);
1461 tsc
+= vcpu
->arch
.this_tsc_write
;
1465 static inline int gtod_is_based_on_tsc(int mode
)
1467 return mode
== VCLOCK_TSC
|| mode
== VCLOCK_HVCLOCK
;
1470 static void kvm_track_tsc_matching(struct kvm_vcpu
*vcpu
)
1472 #ifdef CONFIG_X86_64
1474 struct kvm_arch
*ka
= &vcpu
->kvm
->arch
;
1475 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1477 vcpus_matched
= (ka
->nr_vcpus_matched_tsc
+ 1 ==
1478 atomic_read(&vcpu
->kvm
->online_vcpus
));
1481 * Once the masterclock is enabled, always perform request in
1482 * order to update it.
1484 * In order to enable masterclock, the host clocksource must be TSC
1485 * and the vcpus need to have matched TSCs. When that happens,
1486 * perform request to enable masterclock.
1488 if (ka
->use_master_clock
||
1489 (gtod_is_based_on_tsc(gtod
->clock
.vclock_mode
) && vcpus_matched
))
1490 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
1492 trace_kvm_track_tsc(vcpu
->vcpu_id
, ka
->nr_vcpus_matched_tsc
,
1493 atomic_read(&vcpu
->kvm
->online_vcpus
),
1494 ka
->use_master_clock
, gtod
->clock
.vclock_mode
);
1498 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu
*vcpu
, s64 offset
)
1500 u64 curr_offset
= kvm_x86_ops
->read_l1_tsc_offset(vcpu
);
1501 vcpu
->arch
.ia32_tsc_adjust_msr
+= offset
- curr_offset
;
1505 * Multiply tsc by a fixed point number represented by ratio.
1507 * The most significant 64-N bits (mult) of ratio represent the
1508 * integral part of the fixed point number; the remaining N bits
1509 * (frac) represent the fractional part, ie. ratio represents a fixed
1510 * point number (mult + frac * 2^(-N)).
1512 * N equals to kvm_tsc_scaling_ratio_frac_bits.
1514 static inline u64
__scale_tsc(u64 ratio
, u64 tsc
)
1516 return mul_u64_u64_shr(tsc
, ratio
, kvm_tsc_scaling_ratio_frac_bits
);
1519 u64
kvm_scale_tsc(struct kvm_vcpu
*vcpu
, u64 tsc
)
1522 u64 ratio
= vcpu
->arch
.tsc_scaling_ratio
;
1524 if (ratio
!= kvm_default_tsc_scaling_ratio
)
1525 _tsc
= __scale_tsc(ratio
, tsc
);
1529 EXPORT_SYMBOL_GPL(kvm_scale_tsc
);
1531 static u64
kvm_compute_tsc_offset(struct kvm_vcpu
*vcpu
, u64 target_tsc
)
1535 tsc
= kvm_scale_tsc(vcpu
, rdtsc());
1537 return target_tsc
- tsc
;
1540 u64
kvm_read_l1_tsc(struct kvm_vcpu
*vcpu
, u64 host_tsc
)
1542 u64 tsc_offset
= kvm_x86_ops
->read_l1_tsc_offset(vcpu
);
1544 return tsc_offset
+ kvm_scale_tsc(vcpu
, host_tsc
);
1546 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc
);
1548 static void kvm_vcpu_write_tsc_offset(struct kvm_vcpu
*vcpu
, u64 offset
)
1550 kvm_x86_ops
->write_tsc_offset(vcpu
, offset
);
1551 vcpu
->arch
.tsc_offset
= offset
;
1554 static inline bool kvm_check_tsc_unstable(void)
1556 #ifdef CONFIG_X86_64
1558 * TSC is marked unstable when we're running on Hyper-V,
1559 * 'TSC page' clocksource is good.
1561 if (pvclock_gtod_data
.clock
.vclock_mode
== VCLOCK_HVCLOCK
)
1564 return check_tsc_unstable();
1567 void kvm_write_tsc(struct kvm_vcpu
*vcpu
, struct msr_data
*msr
)
1569 struct kvm
*kvm
= vcpu
->kvm
;
1570 u64 offset
, ns
, elapsed
;
1571 unsigned long flags
;
1573 bool already_matched
;
1574 u64 data
= msr
->data
;
1575 bool synchronizing
= false;
1577 raw_spin_lock_irqsave(&kvm
->arch
.tsc_write_lock
, flags
);
1578 offset
= kvm_compute_tsc_offset(vcpu
, data
);
1579 ns
= ktime_get_boot_ns();
1580 elapsed
= ns
- kvm
->arch
.last_tsc_nsec
;
1582 if (vcpu
->arch
.virtual_tsc_khz
) {
1583 if (data
== 0 && msr
->host_initiated
) {
1585 * detection of vcpu initialization -- need to sync
1586 * with other vCPUs. This particularly helps to keep
1587 * kvm_clock stable after CPU hotplug
1589 synchronizing
= true;
1591 u64 tsc_exp
= kvm
->arch
.last_tsc_write
+
1592 nsec_to_cycles(vcpu
, elapsed
);
1593 u64 tsc_hz
= vcpu
->arch
.virtual_tsc_khz
* 1000LL;
1595 * Special case: TSC write with a small delta (1 second)
1596 * of virtual cycle time against real time is
1597 * interpreted as an attempt to synchronize the CPU.
1599 synchronizing
= data
< tsc_exp
+ tsc_hz
&&
1600 data
+ tsc_hz
> tsc_exp
;
1605 * For a reliable TSC, we can match TSC offsets, and for an unstable
1606 * TSC, we add elapsed time in this computation. We could let the
1607 * compensation code attempt to catch up if we fall behind, but
1608 * it's better to try to match offsets from the beginning.
1610 if (synchronizing
&&
1611 vcpu
->arch
.virtual_tsc_khz
== kvm
->arch
.last_tsc_khz
) {
1612 if (!kvm_check_tsc_unstable()) {
1613 offset
= kvm
->arch
.cur_tsc_offset
;
1614 pr_debug("kvm: matched tsc offset for %llu\n", data
);
1616 u64 delta
= nsec_to_cycles(vcpu
, elapsed
);
1618 offset
= kvm_compute_tsc_offset(vcpu
, data
);
1619 pr_debug("kvm: adjusted tsc offset by %llu\n", delta
);
1622 already_matched
= (vcpu
->arch
.this_tsc_generation
== kvm
->arch
.cur_tsc_generation
);
1625 * We split periods of matched TSC writes into generations.
1626 * For each generation, we track the original measured
1627 * nanosecond time, offset, and write, so if TSCs are in
1628 * sync, we can match exact offset, and if not, we can match
1629 * exact software computation in compute_guest_tsc()
1631 * These values are tracked in kvm->arch.cur_xxx variables.
1633 kvm
->arch
.cur_tsc_generation
++;
1634 kvm
->arch
.cur_tsc_nsec
= ns
;
1635 kvm
->arch
.cur_tsc_write
= data
;
1636 kvm
->arch
.cur_tsc_offset
= offset
;
1638 pr_debug("kvm: new tsc generation %llu, clock %llu\n",
1639 kvm
->arch
.cur_tsc_generation
, data
);
1643 * We also track th most recent recorded KHZ, write and time to
1644 * allow the matching interval to be extended at each write.
1646 kvm
->arch
.last_tsc_nsec
= ns
;
1647 kvm
->arch
.last_tsc_write
= data
;
1648 kvm
->arch
.last_tsc_khz
= vcpu
->arch
.virtual_tsc_khz
;
1650 vcpu
->arch
.last_guest_tsc
= data
;
1652 /* Keep track of which generation this VCPU has synchronized to */
1653 vcpu
->arch
.this_tsc_generation
= kvm
->arch
.cur_tsc_generation
;
1654 vcpu
->arch
.this_tsc_nsec
= kvm
->arch
.cur_tsc_nsec
;
1655 vcpu
->arch
.this_tsc_write
= kvm
->arch
.cur_tsc_write
;
1657 if (!msr
->host_initiated
&& guest_cpuid_has(vcpu
, X86_FEATURE_TSC_ADJUST
))
1658 update_ia32_tsc_adjust_msr(vcpu
, offset
);
1660 kvm_vcpu_write_tsc_offset(vcpu
, offset
);
1661 raw_spin_unlock_irqrestore(&kvm
->arch
.tsc_write_lock
, flags
);
1663 spin_lock(&kvm
->arch
.pvclock_gtod_sync_lock
);
1665 kvm
->arch
.nr_vcpus_matched_tsc
= 0;
1666 } else if (!already_matched
) {
1667 kvm
->arch
.nr_vcpus_matched_tsc
++;
1670 kvm_track_tsc_matching(vcpu
);
1671 spin_unlock(&kvm
->arch
.pvclock_gtod_sync_lock
);
1674 EXPORT_SYMBOL_GPL(kvm_write_tsc
);
1676 static inline void adjust_tsc_offset_guest(struct kvm_vcpu
*vcpu
,
1679 kvm_vcpu_write_tsc_offset(vcpu
, vcpu
->arch
.tsc_offset
+ adjustment
);
1682 static inline void adjust_tsc_offset_host(struct kvm_vcpu
*vcpu
, s64 adjustment
)
1684 if (vcpu
->arch
.tsc_scaling_ratio
!= kvm_default_tsc_scaling_ratio
)
1685 WARN_ON(adjustment
< 0);
1686 adjustment
= kvm_scale_tsc(vcpu
, (u64
) adjustment
);
1687 adjust_tsc_offset_guest(vcpu
, adjustment
);
1690 #ifdef CONFIG_X86_64
1692 static u64
read_tsc(void)
1694 u64 ret
= (u64
)rdtsc_ordered();
1695 u64 last
= pvclock_gtod_data
.clock
.cycle_last
;
1697 if (likely(ret
>= last
))
1701 * GCC likes to generate cmov here, but this branch is extremely
1702 * predictable (it's just a function of time and the likely is
1703 * very likely) and there's a data dependence, so force GCC
1704 * to generate a branch instead. I don't barrier() because
1705 * we don't actually need a barrier, and if this function
1706 * ever gets inlined it will generate worse code.
1712 static inline u64
vgettsc(u64
*tsc_timestamp
, int *mode
)
1715 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1718 switch (gtod
->clock
.vclock_mode
) {
1719 case VCLOCK_HVCLOCK
:
1720 tsc_pg_val
= hv_read_tsc_page_tsc(hv_get_tsc_page(),
1722 if (tsc_pg_val
!= U64_MAX
) {
1723 /* TSC page valid */
1724 *mode
= VCLOCK_HVCLOCK
;
1725 v
= (tsc_pg_val
- gtod
->clock
.cycle_last
) &
1728 /* TSC page invalid */
1729 *mode
= VCLOCK_NONE
;
1734 *tsc_timestamp
= read_tsc();
1735 v
= (*tsc_timestamp
- gtod
->clock
.cycle_last
) &
1739 *mode
= VCLOCK_NONE
;
1742 if (*mode
== VCLOCK_NONE
)
1743 *tsc_timestamp
= v
= 0;
1745 return v
* gtod
->clock
.mult
;
1748 static int do_monotonic_boot(s64
*t
, u64
*tsc_timestamp
)
1750 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1756 seq
= read_seqcount_begin(>od
->seq
);
1757 ns
= gtod
->nsec_base
;
1758 ns
+= vgettsc(tsc_timestamp
, &mode
);
1759 ns
>>= gtod
->clock
.shift
;
1760 ns
+= gtod
->boot_ns
;
1761 } while (unlikely(read_seqcount_retry(>od
->seq
, seq
)));
1767 static int do_realtime(struct timespec64
*ts
, u64
*tsc_timestamp
)
1769 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1775 seq
= read_seqcount_begin(>od
->seq
);
1776 ts
->tv_sec
= gtod
->wall_time_sec
;
1777 ns
= gtod
->nsec_base
;
1778 ns
+= vgettsc(tsc_timestamp
, &mode
);
1779 ns
>>= gtod
->clock
.shift
;
1780 } while (unlikely(read_seqcount_retry(>od
->seq
, seq
)));
1782 ts
->tv_sec
+= __iter_div_u64_rem(ns
, NSEC_PER_SEC
, &ns
);
1788 /* returns true if host is using TSC based clocksource */
1789 static bool kvm_get_time_and_clockread(s64
*kernel_ns
, u64
*tsc_timestamp
)
1791 /* checked again under seqlock below */
1792 if (!gtod_is_based_on_tsc(pvclock_gtod_data
.clock
.vclock_mode
))
1795 return gtod_is_based_on_tsc(do_monotonic_boot(kernel_ns
,
1799 /* returns true if host is using TSC based clocksource */
1800 static bool kvm_get_walltime_and_clockread(struct timespec64
*ts
,
1803 /* checked again under seqlock below */
1804 if (!gtod_is_based_on_tsc(pvclock_gtod_data
.clock
.vclock_mode
))
1807 return gtod_is_based_on_tsc(do_realtime(ts
, tsc_timestamp
));
1813 * Assuming a stable TSC across physical CPUS, and a stable TSC
1814 * across virtual CPUs, the following condition is possible.
1815 * Each numbered line represents an event visible to both
1816 * CPUs at the next numbered event.
1818 * "timespecX" represents host monotonic time. "tscX" represents
1821 * VCPU0 on CPU0 | VCPU1 on CPU1
1823 * 1. read timespec0,tsc0
1824 * 2. | timespec1 = timespec0 + N
1826 * 3. transition to guest | transition to guest
1827 * 4. ret0 = timespec0 + (rdtsc - tsc0) |
1828 * 5. | ret1 = timespec1 + (rdtsc - tsc1)
1829 * | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
1831 * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
1834 * - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
1836 * - 0 < N - M => M < N
1838 * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
1839 * always the case (the difference between two distinct xtime instances
1840 * might be smaller then the difference between corresponding TSC reads,
1841 * when updating guest vcpus pvclock areas).
1843 * To avoid that problem, do not allow visibility of distinct
1844 * system_timestamp/tsc_timestamp values simultaneously: use a master
1845 * copy of host monotonic time values. Update that master copy
1848 * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
1852 static void pvclock_update_vm_gtod_copy(struct kvm
*kvm
)
1854 #ifdef CONFIG_X86_64
1855 struct kvm_arch
*ka
= &kvm
->arch
;
1857 bool host_tsc_clocksource
, vcpus_matched
;
1859 vcpus_matched
= (ka
->nr_vcpus_matched_tsc
+ 1 ==
1860 atomic_read(&kvm
->online_vcpus
));
1863 * If the host uses TSC clock, then passthrough TSC as stable
1866 host_tsc_clocksource
= kvm_get_time_and_clockread(
1867 &ka
->master_kernel_ns
,
1868 &ka
->master_cycle_now
);
1870 ka
->use_master_clock
= host_tsc_clocksource
&& vcpus_matched
1871 && !ka
->backwards_tsc_observed
1872 && !ka
->boot_vcpu_runs_old_kvmclock
;
1874 if (ka
->use_master_clock
)
1875 atomic_set(&kvm_guest_has_master_clock
, 1);
1877 vclock_mode
= pvclock_gtod_data
.clock
.vclock_mode
;
1878 trace_kvm_update_master_clock(ka
->use_master_clock
, vclock_mode
,
1883 void kvm_make_mclock_inprogress_request(struct kvm
*kvm
)
1885 kvm_make_all_cpus_request(kvm
, KVM_REQ_MCLOCK_INPROGRESS
);
1888 static void kvm_gen_update_masterclock(struct kvm
*kvm
)
1890 #ifdef CONFIG_X86_64
1892 struct kvm_vcpu
*vcpu
;
1893 struct kvm_arch
*ka
= &kvm
->arch
;
1895 spin_lock(&ka
->pvclock_gtod_sync_lock
);
1896 kvm_make_mclock_inprogress_request(kvm
);
1897 /* no guest entries from this point */
1898 pvclock_update_vm_gtod_copy(kvm
);
1900 kvm_for_each_vcpu(i
, vcpu
, kvm
)
1901 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
1903 /* guest entries allowed */
1904 kvm_for_each_vcpu(i
, vcpu
, kvm
)
1905 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS
, vcpu
);
1907 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
1911 u64
get_kvmclock_ns(struct kvm
*kvm
)
1913 struct kvm_arch
*ka
= &kvm
->arch
;
1914 struct pvclock_vcpu_time_info hv_clock
;
1917 spin_lock(&ka
->pvclock_gtod_sync_lock
);
1918 if (!ka
->use_master_clock
) {
1919 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
1920 return ktime_get_boot_ns() + ka
->kvmclock_offset
;
1923 hv_clock
.tsc_timestamp
= ka
->master_cycle_now
;
1924 hv_clock
.system_time
= ka
->master_kernel_ns
+ ka
->kvmclock_offset
;
1925 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
1927 /* both __this_cpu_read() and rdtsc() should be on the same cpu */
1930 if (__this_cpu_read(cpu_tsc_khz
)) {
1931 kvm_get_time_scale(NSEC_PER_SEC
, __this_cpu_read(cpu_tsc_khz
) * 1000LL,
1932 &hv_clock
.tsc_shift
,
1933 &hv_clock
.tsc_to_system_mul
);
1934 ret
= __pvclock_read_cycles(&hv_clock
, rdtsc());
1936 ret
= ktime_get_boot_ns() + ka
->kvmclock_offset
;
1943 static void kvm_setup_pvclock_page(struct kvm_vcpu
*v
)
1945 struct kvm_vcpu_arch
*vcpu
= &v
->arch
;
1946 struct pvclock_vcpu_time_info guest_hv_clock
;
1948 if (unlikely(kvm_read_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1949 &guest_hv_clock
, sizeof(guest_hv_clock
))))
1952 /* This VCPU is paused, but it's legal for a guest to read another
1953 * VCPU's kvmclock, so we really have to follow the specification where
1954 * it says that version is odd if data is being modified, and even after
1957 * Version field updates must be kept separate. This is because
1958 * kvm_write_guest_cached might use a "rep movs" instruction, and
1959 * writes within a string instruction are weakly ordered. So there
1960 * are three writes overall.
1962 * As a small optimization, only write the version field in the first
1963 * and third write. The vcpu->pv_time cache is still valid, because the
1964 * version field is the first in the struct.
1966 BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info
, version
) != 0);
1968 if (guest_hv_clock
.version
& 1)
1969 ++guest_hv_clock
.version
; /* first time write, random junk */
1971 vcpu
->hv_clock
.version
= guest_hv_clock
.version
+ 1;
1972 kvm_write_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1974 sizeof(vcpu
->hv_clock
.version
));
1978 /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
1979 vcpu
->hv_clock
.flags
|= (guest_hv_clock
.flags
& PVCLOCK_GUEST_STOPPED
);
1981 if (vcpu
->pvclock_set_guest_stopped_request
) {
1982 vcpu
->hv_clock
.flags
|= PVCLOCK_GUEST_STOPPED
;
1983 vcpu
->pvclock_set_guest_stopped_request
= false;
1986 trace_kvm_pvclock_update(v
->vcpu_id
, &vcpu
->hv_clock
);
1988 kvm_write_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1990 sizeof(vcpu
->hv_clock
));
1994 vcpu
->hv_clock
.version
++;
1995 kvm_write_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1997 sizeof(vcpu
->hv_clock
.version
));
2000 static int kvm_guest_time_update(struct kvm_vcpu
*v
)
2002 unsigned long flags
, tgt_tsc_khz
;
2003 struct kvm_vcpu_arch
*vcpu
= &v
->arch
;
2004 struct kvm_arch
*ka
= &v
->kvm
->arch
;
2006 u64 tsc_timestamp
, host_tsc
;
2008 bool use_master_clock
;
2014 * If the host uses TSC clock, then passthrough TSC as stable
2017 spin_lock(&ka
->pvclock_gtod_sync_lock
);
2018 use_master_clock
= ka
->use_master_clock
;
2019 if (use_master_clock
) {
2020 host_tsc
= ka
->master_cycle_now
;
2021 kernel_ns
= ka
->master_kernel_ns
;
2023 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
2025 /* Keep irq disabled to prevent changes to the clock */
2026 local_irq_save(flags
);
2027 tgt_tsc_khz
= __this_cpu_read(cpu_tsc_khz
);
2028 if (unlikely(tgt_tsc_khz
== 0)) {
2029 local_irq_restore(flags
);
2030 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, v
);
2033 if (!use_master_clock
) {
2035 kernel_ns
= ktime_get_boot_ns();
2038 tsc_timestamp
= kvm_read_l1_tsc(v
, host_tsc
);
2041 * We may have to catch up the TSC to match elapsed wall clock
2042 * time for two reasons, even if kvmclock is used.
2043 * 1) CPU could have been running below the maximum TSC rate
2044 * 2) Broken TSC compensation resets the base at each VCPU
2045 * entry to avoid unknown leaps of TSC even when running
2046 * again on the same CPU. This may cause apparent elapsed
2047 * time to disappear, and the guest to stand still or run
2050 if (vcpu
->tsc_catchup
) {
2051 u64 tsc
= compute_guest_tsc(v
, kernel_ns
);
2052 if (tsc
> tsc_timestamp
) {
2053 adjust_tsc_offset_guest(v
, tsc
- tsc_timestamp
);
2054 tsc_timestamp
= tsc
;
2058 local_irq_restore(flags
);
2060 /* With all the info we got, fill in the values */
2062 if (kvm_has_tsc_control
)
2063 tgt_tsc_khz
= kvm_scale_tsc(v
, tgt_tsc_khz
);
2065 if (unlikely(vcpu
->hw_tsc_khz
!= tgt_tsc_khz
)) {
2066 kvm_get_time_scale(NSEC_PER_SEC
, tgt_tsc_khz
* 1000LL,
2067 &vcpu
->hv_clock
.tsc_shift
,
2068 &vcpu
->hv_clock
.tsc_to_system_mul
);
2069 vcpu
->hw_tsc_khz
= tgt_tsc_khz
;
2072 vcpu
->hv_clock
.tsc_timestamp
= tsc_timestamp
;
2073 vcpu
->hv_clock
.system_time
= kernel_ns
+ v
->kvm
->arch
.kvmclock_offset
;
2074 vcpu
->last_guest_tsc
= tsc_timestamp
;
2076 /* If the host uses TSC clocksource, then it is stable */
2078 if (use_master_clock
)
2079 pvclock_flags
|= PVCLOCK_TSC_STABLE_BIT
;
2081 vcpu
->hv_clock
.flags
= pvclock_flags
;
2083 if (vcpu
->pv_time_enabled
)
2084 kvm_setup_pvclock_page(v
);
2085 if (v
== kvm_get_vcpu(v
->kvm
, 0))
2086 kvm_hv_setup_tsc_page(v
->kvm
, &vcpu
->hv_clock
);
2091 * kvmclock updates which are isolated to a given vcpu, such as
2092 * vcpu->cpu migration, should not allow system_timestamp from
2093 * the rest of the vcpus to remain static. Otherwise ntp frequency
2094 * correction applies to one vcpu's system_timestamp but not
2097 * So in those cases, request a kvmclock update for all vcpus.
2098 * We need to rate-limit these requests though, as they can
2099 * considerably slow guests that have a large number of vcpus.
2100 * The time for a remote vcpu to update its kvmclock is bound
2101 * by the delay we use to rate-limit the updates.
2104 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
2106 static void kvmclock_update_fn(struct work_struct
*work
)
2109 struct delayed_work
*dwork
= to_delayed_work(work
);
2110 struct kvm_arch
*ka
= container_of(dwork
, struct kvm_arch
,
2111 kvmclock_update_work
);
2112 struct kvm
*kvm
= container_of(ka
, struct kvm
, arch
);
2113 struct kvm_vcpu
*vcpu
;
2115 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
2116 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
2117 kvm_vcpu_kick(vcpu
);
2121 static void kvm_gen_kvmclock_update(struct kvm_vcpu
*v
)
2123 struct kvm
*kvm
= v
->kvm
;
2125 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, v
);
2126 schedule_delayed_work(&kvm
->arch
.kvmclock_update_work
,
2127 KVMCLOCK_UPDATE_DELAY
);
2130 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
2132 static void kvmclock_sync_fn(struct work_struct
*work
)
2134 struct delayed_work
*dwork
= to_delayed_work(work
);
2135 struct kvm_arch
*ka
= container_of(dwork
, struct kvm_arch
,
2136 kvmclock_sync_work
);
2137 struct kvm
*kvm
= container_of(ka
, struct kvm
, arch
);
2139 if (!kvmclock_periodic_sync
)
2142 schedule_delayed_work(&kvm
->arch
.kvmclock_update_work
, 0);
2143 schedule_delayed_work(&kvm
->arch
.kvmclock_sync_work
,
2144 KVMCLOCK_SYNC_PERIOD
);
2147 static int set_msr_mce(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
2149 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
2150 unsigned bank_num
= mcg_cap
& 0xff;
2151 u32 msr
= msr_info
->index
;
2152 u64 data
= msr_info
->data
;
2155 case MSR_IA32_MCG_STATUS
:
2156 vcpu
->arch
.mcg_status
= data
;
2158 case MSR_IA32_MCG_CTL
:
2159 if (!(mcg_cap
& MCG_CTL_P
))
2161 if (data
!= 0 && data
!= ~(u64
)0)
2163 vcpu
->arch
.mcg_ctl
= data
;
2166 if (msr
>= MSR_IA32_MC0_CTL
&&
2167 msr
< MSR_IA32_MCx_CTL(bank_num
)) {
2168 u32 offset
= msr
- MSR_IA32_MC0_CTL
;
2169 /* only 0 or all 1s can be written to IA32_MCi_CTL
2170 * some Linux kernels though clear bit 10 in bank 4 to
2171 * workaround a BIOS/GART TBL issue on AMD K8s, ignore
2172 * this to avoid an uncatched #GP in the guest
2174 if ((offset
& 0x3) == 0 &&
2175 data
!= 0 && (data
| (1 << 10)) != ~(u64
)0)
2177 if (!msr_info
->host_initiated
&&
2178 (offset
& 0x3) == 1 && data
!= 0)
2180 vcpu
->arch
.mce_banks
[offset
] = data
;
2188 static int xen_hvm_config(struct kvm_vcpu
*vcpu
, u64 data
)
2190 struct kvm
*kvm
= vcpu
->kvm
;
2191 int lm
= is_long_mode(vcpu
);
2192 u8
*blob_addr
= lm
? (u8
*)(long)kvm
->arch
.xen_hvm_config
.blob_addr_64
2193 : (u8
*)(long)kvm
->arch
.xen_hvm_config
.blob_addr_32
;
2194 u8 blob_size
= lm
? kvm
->arch
.xen_hvm_config
.blob_size_64
2195 : kvm
->arch
.xen_hvm_config
.blob_size_32
;
2196 u32 page_num
= data
& ~PAGE_MASK
;
2197 u64 page_addr
= data
& PAGE_MASK
;
2202 if (page_num
>= blob_size
)
2205 page
= memdup_user(blob_addr
+ (page_num
* PAGE_SIZE
), PAGE_SIZE
);
2210 if (kvm_vcpu_write_guest(vcpu
, page_addr
, page
, PAGE_SIZE
))
2219 static int kvm_pv_enable_async_pf(struct kvm_vcpu
*vcpu
, u64 data
)
2221 gpa_t gpa
= data
& ~0x3f;
2223 /* Bits 3:5 are reserved, Should be zero */
2227 vcpu
->arch
.apf
.msr_val
= data
;
2229 if (!(data
& KVM_ASYNC_PF_ENABLED
)) {
2230 kvm_clear_async_pf_completion_queue(vcpu
);
2231 kvm_async_pf_hash_reset(vcpu
);
2235 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, gpa
,
2239 vcpu
->arch
.apf
.send_user_only
= !(data
& KVM_ASYNC_PF_SEND_ALWAYS
);
2240 vcpu
->arch
.apf
.delivery_as_pf_vmexit
= data
& KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT
;
2241 kvm_async_pf_wakeup_all(vcpu
);
2245 static void kvmclock_reset(struct kvm_vcpu
*vcpu
)
2247 vcpu
->arch
.pv_time_enabled
= false;
2250 static void kvm_vcpu_flush_tlb(struct kvm_vcpu
*vcpu
, bool invalidate_gpa
)
2252 ++vcpu
->stat
.tlb_flush
;
2253 kvm_x86_ops
->tlb_flush(vcpu
, invalidate_gpa
);
2256 static void record_steal_time(struct kvm_vcpu
*vcpu
)
2258 if (!(vcpu
->arch
.st
.msr_val
& KVM_MSR_ENABLED
))
2261 if (unlikely(kvm_read_guest_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2262 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
))))
2266 * Doing a TLB flush here, on the guest's behalf, can avoid
2269 if (xchg(&vcpu
->arch
.st
.steal
.preempted
, 0) & KVM_VCPU_FLUSH_TLB
)
2270 kvm_vcpu_flush_tlb(vcpu
, false);
2272 if (vcpu
->arch
.st
.steal
.version
& 1)
2273 vcpu
->arch
.st
.steal
.version
+= 1; /* first time write, random junk */
2275 vcpu
->arch
.st
.steal
.version
+= 1;
2277 kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2278 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
));
2282 vcpu
->arch
.st
.steal
.steal
+= current
->sched_info
.run_delay
-
2283 vcpu
->arch
.st
.last_steal
;
2284 vcpu
->arch
.st
.last_steal
= current
->sched_info
.run_delay
;
2286 kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2287 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
));
2291 vcpu
->arch
.st
.steal
.version
+= 1;
2293 kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2294 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
));
2297 int kvm_set_msr_common(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
2300 u32 msr
= msr_info
->index
;
2301 u64 data
= msr_info
->data
;
2304 case MSR_AMD64_NB_CFG
:
2305 case MSR_IA32_UCODE_WRITE
:
2306 case MSR_VM_HSAVE_PA
:
2307 case MSR_AMD64_PATCH_LOADER
:
2308 case MSR_AMD64_BU_CFG2
:
2309 case MSR_AMD64_DC_CFG
:
2312 case MSR_IA32_UCODE_REV
:
2313 if (msr_info
->host_initiated
)
2314 vcpu
->arch
.microcode_version
= data
;
2317 return set_efer(vcpu
, data
);
2319 data
&= ~(u64
)0x40; /* ignore flush filter disable */
2320 data
&= ~(u64
)0x100; /* ignore ignne emulation enable */
2321 data
&= ~(u64
)0x8; /* ignore TLB cache disable */
2322 data
&= ~(u64
)0x40000; /* ignore Mc status write enable */
2324 vcpu_unimpl(vcpu
, "unimplemented HWCR wrmsr: 0x%llx\n",
2329 case MSR_FAM10H_MMIO_CONF_BASE
:
2331 vcpu_unimpl(vcpu
, "unimplemented MMIO_CONF_BASE wrmsr: "
2336 case MSR_IA32_DEBUGCTLMSR
:
2338 /* We support the non-activated case already */
2340 } else if (data
& ~(DEBUGCTLMSR_LBR
| DEBUGCTLMSR_BTF
)) {
2341 /* Values other than LBR and BTF are vendor-specific,
2342 thus reserved and should throw a #GP */
2345 vcpu_unimpl(vcpu
, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
2348 case 0x200 ... 0x2ff:
2349 return kvm_mtrr_set_msr(vcpu
, msr
, data
);
2350 case MSR_IA32_APICBASE
:
2351 return kvm_set_apic_base(vcpu
, msr_info
);
2352 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0x3ff:
2353 return kvm_x2apic_msr_write(vcpu
, msr
, data
);
2354 case MSR_IA32_TSCDEADLINE
:
2355 kvm_set_lapic_tscdeadline_msr(vcpu
, data
);
2357 case MSR_IA32_TSC_ADJUST
:
2358 if (guest_cpuid_has(vcpu
, X86_FEATURE_TSC_ADJUST
)) {
2359 if (!msr_info
->host_initiated
) {
2360 s64 adj
= data
- vcpu
->arch
.ia32_tsc_adjust_msr
;
2361 adjust_tsc_offset_guest(vcpu
, adj
);
2363 vcpu
->arch
.ia32_tsc_adjust_msr
= data
;
2366 case MSR_IA32_MISC_ENABLE
:
2367 vcpu
->arch
.ia32_misc_enable_msr
= data
;
2369 case MSR_IA32_SMBASE
:
2370 if (!msr_info
->host_initiated
)
2372 vcpu
->arch
.smbase
= data
;
2375 kvm_write_tsc(vcpu
, msr_info
);
2378 if (!msr_info
->host_initiated
)
2380 vcpu
->arch
.smi_count
= data
;
2382 case MSR_KVM_WALL_CLOCK_NEW
:
2383 case MSR_KVM_WALL_CLOCK
:
2384 vcpu
->kvm
->arch
.wall_clock
= data
;
2385 kvm_write_wall_clock(vcpu
->kvm
, data
);
2387 case MSR_KVM_SYSTEM_TIME_NEW
:
2388 case MSR_KVM_SYSTEM_TIME
: {
2389 struct kvm_arch
*ka
= &vcpu
->kvm
->arch
;
2391 kvmclock_reset(vcpu
);
2393 if (vcpu
->vcpu_id
== 0 && !msr_info
->host_initiated
) {
2394 bool tmp
= (msr
== MSR_KVM_SYSTEM_TIME
);
2396 if (ka
->boot_vcpu_runs_old_kvmclock
!= tmp
)
2397 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
2399 ka
->boot_vcpu_runs_old_kvmclock
= tmp
;
2402 vcpu
->arch
.time
= data
;
2403 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
);
2405 /* we verify if the enable bit is set... */
2409 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
,
2410 &vcpu
->arch
.pv_time
, data
& ~1ULL,
2411 sizeof(struct pvclock_vcpu_time_info
)))
2412 vcpu
->arch
.pv_time_enabled
= false;
2414 vcpu
->arch
.pv_time_enabled
= true;
2418 case MSR_KVM_ASYNC_PF_EN
:
2419 if (kvm_pv_enable_async_pf(vcpu
, data
))
2422 case MSR_KVM_STEAL_TIME
:
2424 if (unlikely(!sched_info_on()))
2427 if (data
& KVM_STEAL_RESERVED_MASK
)
2430 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2431 data
& KVM_STEAL_VALID_BITS
,
2432 sizeof(struct kvm_steal_time
)))
2435 vcpu
->arch
.st
.msr_val
= data
;
2437 if (!(data
& KVM_MSR_ENABLED
))
2440 kvm_make_request(KVM_REQ_STEAL_UPDATE
, vcpu
);
2443 case MSR_KVM_PV_EOI_EN
:
2444 if (kvm_lapic_enable_pv_eoi(vcpu
, data
))
2448 case MSR_IA32_MCG_CTL
:
2449 case MSR_IA32_MCG_STATUS
:
2450 case MSR_IA32_MC0_CTL
... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS
) - 1:
2451 return set_msr_mce(vcpu
, msr_info
);
2453 case MSR_K7_PERFCTR0
... MSR_K7_PERFCTR3
:
2454 case MSR_P6_PERFCTR0
... MSR_P6_PERFCTR1
:
2455 pr
= true; /* fall through */
2456 case MSR_K7_EVNTSEL0
... MSR_K7_EVNTSEL3
:
2457 case MSR_P6_EVNTSEL0
... MSR_P6_EVNTSEL1
:
2458 if (kvm_pmu_is_valid_msr(vcpu
, msr
))
2459 return kvm_pmu_set_msr(vcpu
, msr_info
);
2461 if (pr
|| data
!= 0)
2462 vcpu_unimpl(vcpu
, "disabled perfctr wrmsr: "
2463 "0x%x data 0x%llx\n", msr
, data
);
2465 case MSR_K7_CLK_CTL
:
2467 * Ignore all writes to this no longer documented MSR.
2468 * Writes are only relevant for old K7 processors,
2469 * all pre-dating SVM, but a recommended workaround from
2470 * AMD for these chips. It is possible to specify the
2471 * affected processor models on the command line, hence
2472 * the need to ignore the workaround.
2475 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
2476 case HV_X64_MSR_CRASH_P0
... HV_X64_MSR_CRASH_P4
:
2477 case HV_X64_MSR_CRASH_CTL
:
2478 case HV_X64_MSR_STIMER0_CONFIG
... HV_X64_MSR_STIMER3_COUNT
:
2479 case HV_X64_MSR_REENLIGHTENMENT_CONTROL
:
2480 case HV_X64_MSR_TSC_EMULATION_CONTROL
:
2481 case HV_X64_MSR_TSC_EMULATION_STATUS
:
2482 return kvm_hv_set_msr_common(vcpu
, msr
, data
,
2483 msr_info
->host_initiated
);
2484 case MSR_IA32_BBL_CR_CTL3
:
2485 /* Drop writes to this legacy MSR -- see rdmsr
2486 * counterpart for further detail.
2488 if (report_ignored_msrs
)
2489 vcpu_unimpl(vcpu
, "ignored wrmsr: 0x%x data 0x%llx\n",
2492 case MSR_AMD64_OSVW_ID_LENGTH
:
2493 if (!guest_cpuid_has(vcpu
, X86_FEATURE_OSVW
))
2495 vcpu
->arch
.osvw
.length
= data
;
2497 case MSR_AMD64_OSVW_STATUS
:
2498 if (!guest_cpuid_has(vcpu
, X86_FEATURE_OSVW
))
2500 vcpu
->arch
.osvw
.status
= data
;
2502 case MSR_PLATFORM_INFO
:
2503 if (!msr_info
->host_initiated
||
2504 data
& ~MSR_PLATFORM_INFO_CPUID_FAULT
||
2505 (!(data
& MSR_PLATFORM_INFO_CPUID_FAULT
) &&
2506 cpuid_fault_enabled(vcpu
)))
2508 vcpu
->arch
.msr_platform_info
= data
;
2510 case MSR_MISC_FEATURES_ENABLES
:
2511 if (data
& ~MSR_MISC_FEATURES_ENABLES_CPUID_FAULT
||
2512 (data
& MSR_MISC_FEATURES_ENABLES_CPUID_FAULT
&&
2513 !supports_cpuid_fault(vcpu
)))
2515 vcpu
->arch
.msr_misc_features_enables
= data
;
2518 if (msr
&& (msr
== vcpu
->kvm
->arch
.xen_hvm_config
.msr
))
2519 return xen_hvm_config(vcpu
, data
);
2520 if (kvm_pmu_is_valid_msr(vcpu
, msr
))
2521 return kvm_pmu_set_msr(vcpu
, msr_info
);
2523 vcpu_debug_ratelimited(vcpu
, "unhandled wrmsr: 0x%x data 0x%llx\n",
2527 if (report_ignored_msrs
)
2529 "ignored wrmsr: 0x%x data 0x%llx\n",
2536 EXPORT_SYMBOL_GPL(kvm_set_msr_common
);
2540 * Reads an msr value (of 'msr_index') into 'pdata'.
2541 * Returns 0 on success, non-0 otherwise.
2542 * Assumes vcpu_load() was already called.
2544 int kvm_get_msr(struct kvm_vcpu
*vcpu
, struct msr_data
*msr
)
2546 return kvm_x86_ops
->get_msr(vcpu
, msr
);
2548 EXPORT_SYMBOL_GPL(kvm_get_msr
);
2550 static int get_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
2553 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
2554 unsigned bank_num
= mcg_cap
& 0xff;
2557 case MSR_IA32_P5_MC_ADDR
:
2558 case MSR_IA32_P5_MC_TYPE
:
2561 case MSR_IA32_MCG_CAP
:
2562 data
= vcpu
->arch
.mcg_cap
;
2564 case MSR_IA32_MCG_CTL
:
2565 if (!(mcg_cap
& MCG_CTL_P
))
2567 data
= vcpu
->arch
.mcg_ctl
;
2569 case MSR_IA32_MCG_STATUS
:
2570 data
= vcpu
->arch
.mcg_status
;
2573 if (msr
>= MSR_IA32_MC0_CTL
&&
2574 msr
< MSR_IA32_MCx_CTL(bank_num
)) {
2575 u32 offset
= msr
- MSR_IA32_MC0_CTL
;
2576 data
= vcpu
->arch
.mce_banks
[offset
];
2585 int kvm_get_msr_common(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
2587 switch (msr_info
->index
) {
2588 case MSR_IA32_PLATFORM_ID
:
2589 case MSR_IA32_EBL_CR_POWERON
:
2590 case MSR_IA32_DEBUGCTLMSR
:
2591 case MSR_IA32_LASTBRANCHFROMIP
:
2592 case MSR_IA32_LASTBRANCHTOIP
:
2593 case MSR_IA32_LASTINTFROMIP
:
2594 case MSR_IA32_LASTINTTOIP
:
2596 case MSR_K8_TSEG_ADDR
:
2597 case MSR_K8_TSEG_MASK
:
2599 case MSR_VM_HSAVE_PA
:
2600 case MSR_K8_INT_PENDING_MSG
:
2601 case MSR_AMD64_NB_CFG
:
2602 case MSR_FAM10H_MMIO_CONF_BASE
:
2603 case MSR_AMD64_BU_CFG2
:
2604 case MSR_IA32_PERF_CTL
:
2605 case MSR_AMD64_DC_CFG
:
2608 case MSR_F15H_PERF_CTL0
... MSR_F15H_PERF_CTR5
:
2609 case MSR_K7_EVNTSEL0
... MSR_K7_EVNTSEL3
:
2610 case MSR_K7_PERFCTR0
... MSR_K7_PERFCTR3
:
2611 case MSR_P6_PERFCTR0
... MSR_P6_PERFCTR1
:
2612 case MSR_P6_EVNTSEL0
... MSR_P6_EVNTSEL1
:
2613 if (kvm_pmu_is_valid_msr(vcpu
, msr_info
->index
))
2614 return kvm_pmu_get_msr(vcpu
, msr_info
->index
, &msr_info
->data
);
2617 case MSR_IA32_UCODE_REV
:
2618 msr_info
->data
= vcpu
->arch
.microcode_version
;
2621 msr_info
->data
= kvm_scale_tsc(vcpu
, rdtsc()) + vcpu
->arch
.tsc_offset
;
2624 case 0x200 ... 0x2ff:
2625 return kvm_mtrr_get_msr(vcpu
, msr_info
->index
, &msr_info
->data
);
2626 case 0xcd: /* fsb frequency */
2630 * MSR_EBC_FREQUENCY_ID
2631 * Conservative value valid for even the basic CPU models.
2632 * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2633 * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2634 * and 266MHz for model 3, or 4. Set Core Clock
2635 * Frequency to System Bus Frequency Ratio to 1 (bits
2636 * 31:24) even though these are only valid for CPU
2637 * models > 2, however guests may end up dividing or
2638 * multiplying by zero otherwise.
2640 case MSR_EBC_FREQUENCY_ID
:
2641 msr_info
->data
= 1 << 24;
2643 case MSR_IA32_APICBASE
:
2644 msr_info
->data
= kvm_get_apic_base(vcpu
);
2646 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0x3ff:
2647 return kvm_x2apic_msr_read(vcpu
, msr_info
->index
, &msr_info
->data
);
2649 case MSR_IA32_TSCDEADLINE
:
2650 msr_info
->data
= kvm_get_lapic_tscdeadline_msr(vcpu
);
2652 case MSR_IA32_TSC_ADJUST
:
2653 msr_info
->data
= (u64
)vcpu
->arch
.ia32_tsc_adjust_msr
;
2655 case MSR_IA32_MISC_ENABLE
:
2656 msr_info
->data
= vcpu
->arch
.ia32_misc_enable_msr
;
2658 case MSR_IA32_SMBASE
:
2659 if (!msr_info
->host_initiated
)
2661 msr_info
->data
= vcpu
->arch
.smbase
;
2664 msr_info
->data
= vcpu
->arch
.smi_count
;
2666 case MSR_IA32_PERF_STATUS
:
2667 /* TSC increment by tick */
2668 msr_info
->data
= 1000ULL;
2669 /* CPU multiplier */
2670 msr_info
->data
|= (((uint64_t)4ULL) << 40);
2673 msr_info
->data
= vcpu
->arch
.efer
;
2675 case MSR_KVM_WALL_CLOCK
:
2676 case MSR_KVM_WALL_CLOCK_NEW
:
2677 msr_info
->data
= vcpu
->kvm
->arch
.wall_clock
;
2679 case MSR_KVM_SYSTEM_TIME
:
2680 case MSR_KVM_SYSTEM_TIME_NEW
:
2681 msr_info
->data
= vcpu
->arch
.time
;
2683 case MSR_KVM_ASYNC_PF_EN
:
2684 msr_info
->data
= vcpu
->arch
.apf
.msr_val
;
2686 case MSR_KVM_STEAL_TIME
:
2687 msr_info
->data
= vcpu
->arch
.st
.msr_val
;
2689 case MSR_KVM_PV_EOI_EN
:
2690 msr_info
->data
= vcpu
->arch
.pv_eoi
.msr_val
;
2692 case MSR_IA32_P5_MC_ADDR
:
2693 case MSR_IA32_P5_MC_TYPE
:
2694 case MSR_IA32_MCG_CAP
:
2695 case MSR_IA32_MCG_CTL
:
2696 case MSR_IA32_MCG_STATUS
:
2697 case MSR_IA32_MC0_CTL
... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS
) - 1:
2698 return get_msr_mce(vcpu
, msr_info
->index
, &msr_info
->data
);
2699 case MSR_K7_CLK_CTL
:
2701 * Provide expected ramp-up count for K7. All other
2702 * are set to zero, indicating minimum divisors for
2705 * This prevents guest kernels on AMD host with CPU
2706 * type 6, model 8 and higher from exploding due to
2707 * the rdmsr failing.
2709 msr_info
->data
= 0x20000000;
2711 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
2712 case HV_X64_MSR_CRASH_P0
... HV_X64_MSR_CRASH_P4
:
2713 case HV_X64_MSR_CRASH_CTL
:
2714 case HV_X64_MSR_STIMER0_CONFIG
... HV_X64_MSR_STIMER3_COUNT
:
2715 case HV_X64_MSR_REENLIGHTENMENT_CONTROL
:
2716 case HV_X64_MSR_TSC_EMULATION_CONTROL
:
2717 case HV_X64_MSR_TSC_EMULATION_STATUS
:
2718 return kvm_hv_get_msr_common(vcpu
,
2719 msr_info
->index
, &msr_info
->data
);
2721 case MSR_IA32_BBL_CR_CTL3
:
2722 /* This legacy MSR exists but isn't fully documented in current
2723 * silicon. It is however accessed by winxp in very narrow
2724 * scenarios where it sets bit #19, itself documented as
2725 * a "reserved" bit. Best effort attempt to source coherent
2726 * read data here should the balance of the register be
2727 * interpreted by the guest:
2729 * L2 cache control register 3: 64GB range, 256KB size,
2730 * enabled, latency 0x1, configured
2732 msr_info
->data
= 0xbe702111;
2734 case MSR_AMD64_OSVW_ID_LENGTH
:
2735 if (!guest_cpuid_has(vcpu
, X86_FEATURE_OSVW
))
2737 msr_info
->data
= vcpu
->arch
.osvw
.length
;
2739 case MSR_AMD64_OSVW_STATUS
:
2740 if (!guest_cpuid_has(vcpu
, X86_FEATURE_OSVW
))
2742 msr_info
->data
= vcpu
->arch
.osvw
.status
;
2744 case MSR_PLATFORM_INFO
:
2745 msr_info
->data
= vcpu
->arch
.msr_platform_info
;
2747 case MSR_MISC_FEATURES_ENABLES
:
2748 msr_info
->data
= vcpu
->arch
.msr_misc_features_enables
;
2751 if (kvm_pmu_is_valid_msr(vcpu
, msr_info
->index
))
2752 return kvm_pmu_get_msr(vcpu
, msr_info
->index
, &msr_info
->data
);
2754 vcpu_debug_ratelimited(vcpu
, "unhandled rdmsr: 0x%x\n",
2758 if (report_ignored_msrs
)
2759 vcpu_unimpl(vcpu
, "ignored rdmsr: 0x%x\n",
2767 EXPORT_SYMBOL_GPL(kvm_get_msr_common
);
2770 * Read or write a bunch of msrs. All parameters are kernel addresses.
2772 * @return number of msrs set successfully.
2774 static int __msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs
*msrs
,
2775 struct kvm_msr_entry
*entries
,
2776 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
2777 unsigned index
, u64
*data
))
2781 for (i
= 0; i
< msrs
->nmsrs
; ++i
)
2782 if (do_msr(vcpu
, entries
[i
].index
, &entries
[i
].data
))
2789 * Read or write a bunch of msrs. Parameters are user addresses.
2791 * @return number of msrs set successfully.
2793 static int msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs __user
*user_msrs
,
2794 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
2795 unsigned index
, u64
*data
),
2798 struct kvm_msrs msrs
;
2799 struct kvm_msr_entry
*entries
;
2804 if (copy_from_user(&msrs
, user_msrs
, sizeof msrs
))
2808 if (msrs
.nmsrs
>= MAX_IO_MSRS
)
2811 size
= sizeof(struct kvm_msr_entry
) * msrs
.nmsrs
;
2812 entries
= memdup_user(user_msrs
->entries
, size
);
2813 if (IS_ERR(entries
)) {
2814 r
= PTR_ERR(entries
);
2818 r
= n
= __msr_io(vcpu
, &msrs
, entries
, do_msr
);
2823 if (writeback
&& copy_to_user(user_msrs
->entries
, entries
, size
))
2834 static inline bool kvm_can_mwait_in_guest(void)
2836 return boot_cpu_has(X86_FEATURE_MWAIT
) &&
2837 !boot_cpu_has_bug(X86_BUG_MONITOR
) &&
2838 boot_cpu_has(X86_FEATURE_ARAT
);
2841 int kvm_vm_ioctl_check_extension(struct kvm
*kvm
, long ext
)
2846 case KVM_CAP_IRQCHIP
:
2848 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL
:
2849 case KVM_CAP_SET_TSS_ADDR
:
2850 case KVM_CAP_EXT_CPUID
:
2851 case KVM_CAP_EXT_EMUL_CPUID
:
2852 case KVM_CAP_CLOCKSOURCE
:
2854 case KVM_CAP_NOP_IO_DELAY
:
2855 case KVM_CAP_MP_STATE
:
2856 case KVM_CAP_SYNC_MMU
:
2857 case KVM_CAP_USER_NMI
:
2858 case KVM_CAP_REINJECT_CONTROL
:
2859 case KVM_CAP_IRQ_INJECT_STATUS
:
2860 case KVM_CAP_IOEVENTFD
:
2861 case KVM_CAP_IOEVENTFD_NO_LENGTH
:
2863 case KVM_CAP_PIT_STATE2
:
2864 case KVM_CAP_SET_IDENTITY_MAP_ADDR
:
2865 case KVM_CAP_XEN_HVM
:
2866 case KVM_CAP_VCPU_EVENTS
:
2867 case KVM_CAP_HYPERV
:
2868 case KVM_CAP_HYPERV_VAPIC
:
2869 case KVM_CAP_HYPERV_SPIN
:
2870 case KVM_CAP_HYPERV_SYNIC
:
2871 case KVM_CAP_HYPERV_SYNIC2
:
2872 case KVM_CAP_HYPERV_VP_INDEX
:
2873 case KVM_CAP_HYPERV_EVENTFD
:
2874 case KVM_CAP_HYPERV_TLBFLUSH
:
2875 case KVM_CAP_PCI_SEGMENT
:
2876 case KVM_CAP_DEBUGREGS
:
2877 case KVM_CAP_X86_ROBUST_SINGLESTEP
:
2879 case KVM_CAP_ASYNC_PF
:
2880 case KVM_CAP_GET_TSC_KHZ
:
2881 case KVM_CAP_KVMCLOCK_CTRL
:
2882 case KVM_CAP_READONLY_MEM
:
2883 case KVM_CAP_HYPERV_TIME
:
2884 case KVM_CAP_IOAPIC_POLARITY_IGNORED
:
2885 case KVM_CAP_TSC_DEADLINE_TIMER
:
2886 case KVM_CAP_ENABLE_CAP_VM
:
2887 case KVM_CAP_DISABLE_QUIRKS
:
2888 case KVM_CAP_SET_BOOT_CPU_ID
:
2889 case KVM_CAP_SPLIT_IRQCHIP
:
2890 case KVM_CAP_IMMEDIATE_EXIT
:
2891 case KVM_CAP_GET_MSR_FEATURES
:
2894 case KVM_CAP_SYNC_REGS
:
2895 r
= KVM_SYNC_X86_VALID_FIELDS
;
2897 case KVM_CAP_ADJUST_CLOCK
:
2898 r
= KVM_CLOCK_TSC_STABLE
;
2900 case KVM_CAP_X86_DISABLE_EXITS
:
2901 r
|= KVM_X86_DISABLE_EXITS_HTL
| KVM_X86_DISABLE_EXITS_PAUSE
;
2902 if(kvm_can_mwait_in_guest())
2903 r
|= KVM_X86_DISABLE_EXITS_MWAIT
;
2905 case KVM_CAP_X86_SMM
:
2906 /* SMBASE is usually relocated above 1M on modern chipsets,
2907 * and SMM handlers might indeed rely on 4G segment limits,
2908 * so do not report SMM to be available if real mode is
2909 * emulated via vm86 mode. Still, do not go to great lengths
2910 * to avoid userspace's usage of the feature, because it is a
2911 * fringe case that is not enabled except via specific settings
2912 * of the module parameters.
2914 r
= kvm_x86_ops
->cpu_has_high_real_mode_segbase();
2917 r
= !kvm_x86_ops
->cpu_has_accelerated_tpr();
2919 case KVM_CAP_NR_VCPUS
:
2920 r
= KVM_SOFT_MAX_VCPUS
;
2922 case KVM_CAP_MAX_VCPUS
:
2925 case KVM_CAP_NR_MEMSLOTS
:
2926 r
= KVM_USER_MEM_SLOTS
;
2928 case KVM_CAP_PV_MMU
: /* obsolete */
2932 r
= KVM_MAX_MCE_BANKS
;
2935 r
= boot_cpu_has(X86_FEATURE_XSAVE
);
2937 case KVM_CAP_TSC_CONTROL
:
2938 r
= kvm_has_tsc_control
;
2940 case KVM_CAP_X2APIC_API
:
2941 r
= KVM_X2APIC_API_VALID_FLAGS
;
2950 long kvm_arch_dev_ioctl(struct file
*filp
,
2951 unsigned int ioctl
, unsigned long arg
)
2953 void __user
*argp
= (void __user
*)arg
;
2957 case KVM_GET_MSR_INDEX_LIST
: {
2958 struct kvm_msr_list __user
*user_msr_list
= argp
;
2959 struct kvm_msr_list msr_list
;
2963 if (copy_from_user(&msr_list
, user_msr_list
, sizeof msr_list
))
2966 msr_list
.nmsrs
= num_msrs_to_save
+ num_emulated_msrs
;
2967 if (copy_to_user(user_msr_list
, &msr_list
, sizeof msr_list
))
2970 if (n
< msr_list
.nmsrs
)
2973 if (copy_to_user(user_msr_list
->indices
, &msrs_to_save
,
2974 num_msrs_to_save
* sizeof(u32
)))
2976 if (copy_to_user(user_msr_list
->indices
+ num_msrs_to_save
,
2978 num_emulated_msrs
* sizeof(u32
)))
2983 case KVM_GET_SUPPORTED_CPUID
:
2984 case KVM_GET_EMULATED_CPUID
: {
2985 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
2986 struct kvm_cpuid2 cpuid
;
2989 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
2992 r
= kvm_dev_ioctl_get_cpuid(&cpuid
, cpuid_arg
->entries
,
2998 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof cpuid
))
3003 case KVM_X86_GET_MCE_CAP_SUPPORTED
: {
3005 if (copy_to_user(argp
, &kvm_mce_cap_supported
,
3006 sizeof(kvm_mce_cap_supported
)))
3010 case KVM_GET_MSR_FEATURE_INDEX_LIST
: {
3011 struct kvm_msr_list __user
*user_msr_list
= argp
;
3012 struct kvm_msr_list msr_list
;
3016 if (copy_from_user(&msr_list
, user_msr_list
, sizeof(msr_list
)))
3019 msr_list
.nmsrs
= num_msr_based_features
;
3020 if (copy_to_user(user_msr_list
, &msr_list
, sizeof(msr_list
)))
3023 if (n
< msr_list
.nmsrs
)
3026 if (copy_to_user(user_msr_list
->indices
, &msr_based_features
,
3027 num_msr_based_features
* sizeof(u32
)))
3033 r
= msr_io(NULL
, argp
, do_get_msr_feature
, 1);
3043 static void wbinvd_ipi(void *garbage
)
3048 static bool need_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
3050 return kvm_arch_has_noncoherent_dma(vcpu
->kvm
);
3053 void kvm_arch_vcpu_load(struct kvm_vcpu
*vcpu
, int cpu
)
3055 /* Address WBINVD may be executed by guest */
3056 if (need_emulate_wbinvd(vcpu
)) {
3057 if (kvm_x86_ops
->has_wbinvd_exit())
3058 cpumask_set_cpu(cpu
, vcpu
->arch
.wbinvd_dirty_mask
);
3059 else if (vcpu
->cpu
!= -1 && vcpu
->cpu
!= cpu
)
3060 smp_call_function_single(vcpu
->cpu
,
3061 wbinvd_ipi
, NULL
, 1);
3064 kvm_x86_ops
->vcpu_load(vcpu
, cpu
);
3066 /* Apply any externally detected TSC adjustments (due to suspend) */
3067 if (unlikely(vcpu
->arch
.tsc_offset_adjustment
)) {
3068 adjust_tsc_offset_host(vcpu
, vcpu
->arch
.tsc_offset_adjustment
);
3069 vcpu
->arch
.tsc_offset_adjustment
= 0;
3070 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
3073 if (unlikely(vcpu
->cpu
!= cpu
) || kvm_check_tsc_unstable()) {
3074 s64 tsc_delta
= !vcpu
->arch
.last_host_tsc
? 0 :
3075 rdtsc() - vcpu
->arch
.last_host_tsc
;
3077 mark_tsc_unstable("KVM discovered backwards TSC");
3079 if (kvm_check_tsc_unstable()) {
3080 u64 offset
= kvm_compute_tsc_offset(vcpu
,
3081 vcpu
->arch
.last_guest_tsc
);
3082 kvm_vcpu_write_tsc_offset(vcpu
, offset
);
3083 vcpu
->arch
.tsc_catchup
= 1;
3086 if (kvm_lapic_hv_timer_in_use(vcpu
))
3087 kvm_lapic_restart_hv_timer(vcpu
);
3090 * On a host with synchronized TSC, there is no need to update
3091 * kvmclock on vcpu->cpu migration
3093 if (!vcpu
->kvm
->arch
.use_master_clock
|| vcpu
->cpu
== -1)
3094 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
);
3095 if (vcpu
->cpu
!= cpu
)
3096 kvm_make_request(KVM_REQ_MIGRATE_TIMER
, vcpu
);
3100 kvm_make_request(KVM_REQ_STEAL_UPDATE
, vcpu
);
3103 static void kvm_steal_time_set_preempted(struct kvm_vcpu
*vcpu
)
3105 if (!(vcpu
->arch
.st
.msr_val
& KVM_MSR_ENABLED
))
3108 vcpu
->arch
.st
.steal
.preempted
= KVM_VCPU_PREEMPTED
;
3110 kvm_write_guest_offset_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
3111 &vcpu
->arch
.st
.steal
.preempted
,
3112 offsetof(struct kvm_steal_time
, preempted
),
3113 sizeof(vcpu
->arch
.st
.steal
.preempted
));
3116 void kvm_arch_vcpu_put(struct kvm_vcpu
*vcpu
)
3120 if (vcpu
->preempted
)
3121 vcpu
->arch
.preempted_in_kernel
= !kvm_x86_ops
->get_cpl(vcpu
);
3124 * Disable page faults because we're in atomic context here.
3125 * kvm_write_guest_offset_cached() would call might_fault()
3126 * that relies on pagefault_disable() to tell if there's a
3127 * bug. NOTE: the write to guest memory may not go through if
3128 * during postcopy live migration or if there's heavy guest
3131 pagefault_disable();
3133 * kvm_memslots() will be called by
3134 * kvm_write_guest_offset_cached() so take the srcu lock.
3136 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
3137 kvm_steal_time_set_preempted(vcpu
);
3138 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
3140 kvm_x86_ops
->vcpu_put(vcpu
);
3141 vcpu
->arch
.last_host_tsc
= rdtsc();
3143 * If userspace has set any breakpoints or watchpoints, dr6 is restored
3144 * on every vmexit, but if not, we might have a stale dr6 from the
3145 * guest. do_debug expects dr6 to be cleared after it runs, do the same.
3150 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu
*vcpu
,
3151 struct kvm_lapic_state
*s
)
3153 if (vcpu
->arch
.apicv_active
)
3154 kvm_x86_ops
->sync_pir_to_irr(vcpu
);
3156 return kvm_apic_get_state(vcpu
, s
);
3159 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu
*vcpu
,
3160 struct kvm_lapic_state
*s
)
3164 r
= kvm_apic_set_state(vcpu
, s
);
3167 update_cr8_intercept(vcpu
);
3172 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu
*vcpu
)
3174 return (!lapic_in_kernel(vcpu
) ||
3175 kvm_apic_accept_pic_intr(vcpu
));
3179 * if userspace requested an interrupt window, check that the
3180 * interrupt window is open.
3182 * No need to exit to userspace if we already have an interrupt queued.
3184 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu
*vcpu
)
3186 return kvm_arch_interrupt_allowed(vcpu
) &&
3187 !kvm_cpu_has_interrupt(vcpu
) &&
3188 !kvm_event_needs_reinjection(vcpu
) &&
3189 kvm_cpu_accept_dm_intr(vcpu
);
3192 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu
*vcpu
,
3193 struct kvm_interrupt
*irq
)
3195 if (irq
->irq
>= KVM_NR_INTERRUPTS
)
3198 if (!irqchip_in_kernel(vcpu
->kvm
)) {
3199 kvm_queue_interrupt(vcpu
, irq
->irq
, false);
3200 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
3205 * With in-kernel LAPIC, we only use this to inject EXTINT, so
3206 * fail for in-kernel 8259.
3208 if (pic_in_kernel(vcpu
->kvm
))
3211 if (vcpu
->arch
.pending_external_vector
!= -1)
3214 vcpu
->arch
.pending_external_vector
= irq
->irq
;
3215 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
3219 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu
*vcpu
)
3221 kvm_inject_nmi(vcpu
);
3226 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu
*vcpu
)
3228 kvm_make_request(KVM_REQ_SMI
, vcpu
);
3233 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu
*vcpu
,
3234 struct kvm_tpr_access_ctl
*tac
)
3238 vcpu
->arch
.tpr_access_reporting
= !!tac
->enabled
;
3242 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu
*vcpu
,
3246 unsigned bank_num
= mcg_cap
& 0xff, bank
;
3249 if (!bank_num
|| bank_num
>= KVM_MAX_MCE_BANKS
)
3251 if (mcg_cap
& ~(kvm_mce_cap_supported
| 0xff | 0xff0000))
3254 vcpu
->arch
.mcg_cap
= mcg_cap
;
3255 /* Init IA32_MCG_CTL to all 1s */
3256 if (mcg_cap
& MCG_CTL_P
)
3257 vcpu
->arch
.mcg_ctl
= ~(u64
)0;
3258 /* Init IA32_MCi_CTL to all 1s */
3259 for (bank
= 0; bank
< bank_num
; bank
++)
3260 vcpu
->arch
.mce_banks
[bank
*4] = ~(u64
)0;
3262 if (kvm_x86_ops
->setup_mce
)
3263 kvm_x86_ops
->setup_mce(vcpu
);
3268 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu
*vcpu
,
3269 struct kvm_x86_mce
*mce
)
3271 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
3272 unsigned bank_num
= mcg_cap
& 0xff;
3273 u64
*banks
= vcpu
->arch
.mce_banks
;
3275 if (mce
->bank
>= bank_num
|| !(mce
->status
& MCI_STATUS_VAL
))
3278 * if IA32_MCG_CTL is not all 1s, the uncorrected error
3279 * reporting is disabled
3281 if ((mce
->status
& MCI_STATUS_UC
) && (mcg_cap
& MCG_CTL_P
) &&
3282 vcpu
->arch
.mcg_ctl
!= ~(u64
)0)
3284 banks
+= 4 * mce
->bank
;
3286 * if IA32_MCi_CTL is not all 1s, the uncorrected error
3287 * reporting is disabled for the bank
3289 if ((mce
->status
& MCI_STATUS_UC
) && banks
[0] != ~(u64
)0)
3291 if (mce
->status
& MCI_STATUS_UC
) {
3292 if ((vcpu
->arch
.mcg_status
& MCG_STATUS_MCIP
) ||
3293 !kvm_read_cr4_bits(vcpu
, X86_CR4_MCE
)) {
3294 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
3297 if (banks
[1] & MCI_STATUS_VAL
)
3298 mce
->status
|= MCI_STATUS_OVER
;
3299 banks
[2] = mce
->addr
;
3300 banks
[3] = mce
->misc
;
3301 vcpu
->arch
.mcg_status
= mce
->mcg_status
;
3302 banks
[1] = mce
->status
;
3303 kvm_queue_exception(vcpu
, MC_VECTOR
);
3304 } else if (!(banks
[1] & MCI_STATUS_VAL
)
3305 || !(banks
[1] & MCI_STATUS_UC
)) {
3306 if (banks
[1] & MCI_STATUS_VAL
)
3307 mce
->status
|= MCI_STATUS_OVER
;
3308 banks
[2] = mce
->addr
;
3309 banks
[3] = mce
->misc
;
3310 banks
[1] = mce
->status
;
3312 banks
[1] |= MCI_STATUS_OVER
;
3316 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu
*vcpu
,
3317 struct kvm_vcpu_events
*events
)
3321 * FIXME: pass injected and pending separately. This is only
3322 * needed for nested virtualization, whose state cannot be
3323 * migrated yet. For now we can combine them.
3325 events
->exception
.injected
=
3326 (vcpu
->arch
.exception
.pending
||
3327 vcpu
->arch
.exception
.injected
) &&
3328 !kvm_exception_is_soft(vcpu
->arch
.exception
.nr
);
3329 events
->exception
.nr
= vcpu
->arch
.exception
.nr
;
3330 events
->exception
.has_error_code
= vcpu
->arch
.exception
.has_error_code
;
3331 events
->exception
.pad
= 0;
3332 events
->exception
.error_code
= vcpu
->arch
.exception
.error_code
;
3334 events
->interrupt
.injected
=
3335 vcpu
->arch
.interrupt
.injected
&& !vcpu
->arch
.interrupt
.soft
;
3336 events
->interrupt
.nr
= vcpu
->arch
.interrupt
.nr
;
3337 events
->interrupt
.soft
= 0;
3338 events
->interrupt
.shadow
= kvm_x86_ops
->get_interrupt_shadow(vcpu
);
3340 events
->nmi
.injected
= vcpu
->arch
.nmi_injected
;
3341 events
->nmi
.pending
= vcpu
->arch
.nmi_pending
!= 0;
3342 events
->nmi
.masked
= kvm_x86_ops
->get_nmi_mask(vcpu
);
3343 events
->nmi
.pad
= 0;
3345 events
->sipi_vector
= 0; /* never valid when reporting to user space */
3347 events
->smi
.smm
= is_smm(vcpu
);
3348 events
->smi
.pending
= vcpu
->arch
.smi_pending
;
3349 events
->smi
.smm_inside_nmi
=
3350 !!(vcpu
->arch
.hflags
& HF_SMM_INSIDE_NMI_MASK
);
3351 events
->smi
.latched_init
= kvm_lapic_latched_init(vcpu
);
3353 events
->flags
= (KVM_VCPUEVENT_VALID_NMI_PENDING
3354 | KVM_VCPUEVENT_VALID_SHADOW
3355 | KVM_VCPUEVENT_VALID_SMM
);
3356 memset(&events
->reserved
, 0, sizeof(events
->reserved
));
3359 static void kvm_set_hflags(struct kvm_vcpu
*vcpu
, unsigned emul_flags
);
3361 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu
*vcpu
,
3362 struct kvm_vcpu_events
*events
)
3364 if (events
->flags
& ~(KVM_VCPUEVENT_VALID_NMI_PENDING
3365 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
3366 | KVM_VCPUEVENT_VALID_SHADOW
3367 | KVM_VCPUEVENT_VALID_SMM
))
3370 if (events
->exception
.injected
&&
3371 (events
->exception
.nr
> 31 || events
->exception
.nr
== NMI_VECTOR
||
3372 is_guest_mode(vcpu
)))
3375 /* INITs are latched while in SMM */
3376 if (events
->flags
& KVM_VCPUEVENT_VALID_SMM
&&
3377 (events
->smi
.smm
|| events
->smi
.pending
) &&
3378 vcpu
->arch
.mp_state
== KVM_MP_STATE_INIT_RECEIVED
)
3382 vcpu
->arch
.exception
.injected
= false;
3383 vcpu
->arch
.exception
.pending
= events
->exception
.injected
;
3384 vcpu
->arch
.exception
.nr
= events
->exception
.nr
;
3385 vcpu
->arch
.exception
.has_error_code
= events
->exception
.has_error_code
;
3386 vcpu
->arch
.exception
.error_code
= events
->exception
.error_code
;
3388 vcpu
->arch
.interrupt
.injected
= events
->interrupt
.injected
;
3389 vcpu
->arch
.interrupt
.nr
= events
->interrupt
.nr
;
3390 vcpu
->arch
.interrupt
.soft
= events
->interrupt
.soft
;
3391 if (events
->flags
& KVM_VCPUEVENT_VALID_SHADOW
)
3392 kvm_x86_ops
->set_interrupt_shadow(vcpu
,
3393 events
->interrupt
.shadow
);
3395 vcpu
->arch
.nmi_injected
= events
->nmi
.injected
;
3396 if (events
->flags
& KVM_VCPUEVENT_VALID_NMI_PENDING
)
3397 vcpu
->arch
.nmi_pending
= events
->nmi
.pending
;
3398 kvm_x86_ops
->set_nmi_mask(vcpu
, events
->nmi
.masked
);
3400 if (events
->flags
& KVM_VCPUEVENT_VALID_SIPI_VECTOR
&&
3401 lapic_in_kernel(vcpu
))
3402 vcpu
->arch
.apic
->sipi_vector
= events
->sipi_vector
;
3404 if (events
->flags
& KVM_VCPUEVENT_VALID_SMM
) {
3405 u32 hflags
= vcpu
->arch
.hflags
;
3406 if (events
->smi
.smm
)
3407 hflags
|= HF_SMM_MASK
;
3409 hflags
&= ~HF_SMM_MASK
;
3410 kvm_set_hflags(vcpu
, hflags
);
3412 vcpu
->arch
.smi_pending
= events
->smi
.pending
;
3414 if (events
->smi
.smm
) {
3415 if (events
->smi
.smm_inside_nmi
)
3416 vcpu
->arch
.hflags
|= HF_SMM_INSIDE_NMI_MASK
;
3418 vcpu
->arch
.hflags
&= ~HF_SMM_INSIDE_NMI_MASK
;
3419 if (lapic_in_kernel(vcpu
)) {
3420 if (events
->smi
.latched_init
)
3421 set_bit(KVM_APIC_INIT
, &vcpu
->arch
.apic
->pending_events
);
3423 clear_bit(KVM_APIC_INIT
, &vcpu
->arch
.apic
->pending_events
);
3428 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
3433 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu
*vcpu
,
3434 struct kvm_debugregs
*dbgregs
)
3438 memcpy(dbgregs
->db
, vcpu
->arch
.db
, sizeof(vcpu
->arch
.db
));
3439 kvm_get_dr(vcpu
, 6, &val
);
3441 dbgregs
->dr7
= vcpu
->arch
.dr7
;
3443 memset(&dbgregs
->reserved
, 0, sizeof(dbgregs
->reserved
));
3446 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu
*vcpu
,
3447 struct kvm_debugregs
*dbgregs
)
3452 if (dbgregs
->dr6
& ~0xffffffffull
)
3454 if (dbgregs
->dr7
& ~0xffffffffull
)
3457 memcpy(vcpu
->arch
.db
, dbgregs
->db
, sizeof(vcpu
->arch
.db
));
3458 kvm_update_dr0123(vcpu
);
3459 vcpu
->arch
.dr6
= dbgregs
->dr6
;
3460 kvm_update_dr6(vcpu
);
3461 vcpu
->arch
.dr7
= dbgregs
->dr7
;
3462 kvm_update_dr7(vcpu
);
3467 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
3469 static void fill_xsave(u8
*dest
, struct kvm_vcpu
*vcpu
)
3471 struct xregs_state
*xsave
= &vcpu
->arch
.guest_fpu
.state
.xsave
;
3472 u64 xstate_bv
= xsave
->header
.xfeatures
;
3476 * Copy legacy XSAVE area, to avoid complications with CPUID
3477 * leaves 0 and 1 in the loop below.
3479 memcpy(dest
, xsave
, XSAVE_HDR_OFFSET
);
3482 xstate_bv
&= vcpu
->arch
.guest_supported_xcr0
| XFEATURE_MASK_FPSSE
;
3483 *(u64
*)(dest
+ XSAVE_HDR_OFFSET
) = xstate_bv
;
3486 * Copy each region from the possibly compacted offset to the
3487 * non-compacted offset.
3489 valid
= xstate_bv
& ~XFEATURE_MASK_FPSSE
;
3491 u64 feature
= valid
& -valid
;
3492 int index
= fls64(feature
) - 1;
3493 void *src
= get_xsave_addr(xsave
, feature
);
3496 u32 size
, offset
, ecx
, edx
;
3497 cpuid_count(XSTATE_CPUID
, index
,
3498 &size
, &offset
, &ecx
, &edx
);
3499 if (feature
== XFEATURE_MASK_PKRU
)
3500 memcpy(dest
+ offset
, &vcpu
->arch
.pkru
,
3501 sizeof(vcpu
->arch
.pkru
));
3503 memcpy(dest
+ offset
, src
, size
);
3511 static void load_xsave(struct kvm_vcpu
*vcpu
, u8
*src
)
3513 struct xregs_state
*xsave
= &vcpu
->arch
.guest_fpu
.state
.xsave
;
3514 u64 xstate_bv
= *(u64
*)(src
+ XSAVE_HDR_OFFSET
);
3518 * Copy legacy XSAVE area, to avoid complications with CPUID
3519 * leaves 0 and 1 in the loop below.
3521 memcpy(xsave
, src
, XSAVE_HDR_OFFSET
);
3523 /* Set XSTATE_BV and possibly XCOMP_BV. */
3524 xsave
->header
.xfeatures
= xstate_bv
;
3525 if (boot_cpu_has(X86_FEATURE_XSAVES
))
3526 xsave
->header
.xcomp_bv
= host_xcr0
| XSTATE_COMPACTION_ENABLED
;
3529 * Copy each region from the non-compacted offset to the
3530 * possibly compacted offset.
3532 valid
= xstate_bv
& ~XFEATURE_MASK_FPSSE
;
3534 u64 feature
= valid
& -valid
;
3535 int index
= fls64(feature
) - 1;
3536 void *dest
= get_xsave_addr(xsave
, feature
);
3539 u32 size
, offset
, ecx
, edx
;
3540 cpuid_count(XSTATE_CPUID
, index
,
3541 &size
, &offset
, &ecx
, &edx
);
3542 if (feature
== XFEATURE_MASK_PKRU
)
3543 memcpy(&vcpu
->arch
.pkru
, src
+ offset
,
3544 sizeof(vcpu
->arch
.pkru
));
3546 memcpy(dest
, src
+ offset
, size
);
3553 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu
*vcpu
,
3554 struct kvm_xsave
*guest_xsave
)
3556 if (boot_cpu_has(X86_FEATURE_XSAVE
)) {
3557 memset(guest_xsave
, 0, sizeof(struct kvm_xsave
));
3558 fill_xsave((u8
*) guest_xsave
->region
, vcpu
);
3560 memcpy(guest_xsave
->region
,
3561 &vcpu
->arch
.guest_fpu
.state
.fxsave
,
3562 sizeof(struct fxregs_state
));
3563 *(u64
*)&guest_xsave
->region
[XSAVE_HDR_OFFSET
/ sizeof(u32
)] =
3564 XFEATURE_MASK_FPSSE
;
3568 #define XSAVE_MXCSR_OFFSET 24
3570 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu
*vcpu
,
3571 struct kvm_xsave
*guest_xsave
)
3574 *(u64
*)&guest_xsave
->region
[XSAVE_HDR_OFFSET
/ sizeof(u32
)];
3575 u32 mxcsr
= *(u32
*)&guest_xsave
->region
[XSAVE_MXCSR_OFFSET
/ sizeof(u32
)];
3577 if (boot_cpu_has(X86_FEATURE_XSAVE
)) {
3579 * Here we allow setting states that are not present in
3580 * CPUID leaf 0xD, index 0, EDX:EAX. This is for compatibility
3581 * with old userspace.
3583 if (xstate_bv
& ~kvm_supported_xcr0() ||
3584 mxcsr
& ~mxcsr_feature_mask
)
3586 load_xsave(vcpu
, (u8
*)guest_xsave
->region
);
3588 if (xstate_bv
& ~XFEATURE_MASK_FPSSE
||
3589 mxcsr
& ~mxcsr_feature_mask
)
3591 memcpy(&vcpu
->arch
.guest_fpu
.state
.fxsave
,
3592 guest_xsave
->region
, sizeof(struct fxregs_state
));
3597 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu
*vcpu
,
3598 struct kvm_xcrs
*guest_xcrs
)
3600 if (!boot_cpu_has(X86_FEATURE_XSAVE
)) {
3601 guest_xcrs
->nr_xcrs
= 0;
3605 guest_xcrs
->nr_xcrs
= 1;
3606 guest_xcrs
->flags
= 0;
3607 guest_xcrs
->xcrs
[0].xcr
= XCR_XFEATURE_ENABLED_MASK
;
3608 guest_xcrs
->xcrs
[0].value
= vcpu
->arch
.xcr0
;
3611 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu
*vcpu
,
3612 struct kvm_xcrs
*guest_xcrs
)
3616 if (!boot_cpu_has(X86_FEATURE_XSAVE
))
3619 if (guest_xcrs
->nr_xcrs
> KVM_MAX_XCRS
|| guest_xcrs
->flags
)
3622 for (i
= 0; i
< guest_xcrs
->nr_xcrs
; i
++)
3623 /* Only support XCR0 currently */
3624 if (guest_xcrs
->xcrs
[i
].xcr
== XCR_XFEATURE_ENABLED_MASK
) {
3625 r
= __kvm_set_xcr(vcpu
, XCR_XFEATURE_ENABLED_MASK
,
3626 guest_xcrs
->xcrs
[i
].value
);
3635 * kvm_set_guest_paused() indicates to the guest kernel that it has been
3636 * stopped by the hypervisor. This function will be called from the host only.
3637 * EINVAL is returned when the host attempts to set the flag for a guest that
3638 * does not support pv clocks.
3640 static int kvm_set_guest_paused(struct kvm_vcpu
*vcpu
)
3642 if (!vcpu
->arch
.pv_time_enabled
)
3644 vcpu
->arch
.pvclock_set_guest_stopped_request
= true;
3645 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
3649 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu
*vcpu
,
3650 struct kvm_enable_cap
*cap
)
3656 case KVM_CAP_HYPERV_SYNIC2
:
3659 case KVM_CAP_HYPERV_SYNIC
:
3660 if (!irqchip_in_kernel(vcpu
->kvm
))
3662 return kvm_hv_activate_synic(vcpu
, cap
->cap
==
3663 KVM_CAP_HYPERV_SYNIC2
);
3669 long kvm_arch_vcpu_ioctl(struct file
*filp
,
3670 unsigned int ioctl
, unsigned long arg
)
3672 struct kvm_vcpu
*vcpu
= filp
->private_data
;
3673 void __user
*argp
= (void __user
*)arg
;
3676 struct kvm_lapic_state
*lapic
;
3677 struct kvm_xsave
*xsave
;
3678 struct kvm_xcrs
*xcrs
;
3686 case KVM_GET_LAPIC
: {
3688 if (!lapic_in_kernel(vcpu
))
3690 u
.lapic
= kzalloc(sizeof(struct kvm_lapic_state
), GFP_KERNEL
);
3695 r
= kvm_vcpu_ioctl_get_lapic(vcpu
, u
.lapic
);
3699 if (copy_to_user(argp
, u
.lapic
, sizeof(struct kvm_lapic_state
)))
3704 case KVM_SET_LAPIC
: {
3706 if (!lapic_in_kernel(vcpu
))
3708 u
.lapic
= memdup_user(argp
, sizeof(*u
.lapic
));
3709 if (IS_ERR(u
.lapic
)) {
3710 r
= PTR_ERR(u
.lapic
);
3714 r
= kvm_vcpu_ioctl_set_lapic(vcpu
, u
.lapic
);
3717 case KVM_INTERRUPT
: {
3718 struct kvm_interrupt irq
;
3721 if (copy_from_user(&irq
, argp
, sizeof irq
))
3723 r
= kvm_vcpu_ioctl_interrupt(vcpu
, &irq
);
3727 r
= kvm_vcpu_ioctl_nmi(vcpu
);
3731 r
= kvm_vcpu_ioctl_smi(vcpu
);
3734 case KVM_SET_CPUID
: {
3735 struct kvm_cpuid __user
*cpuid_arg
= argp
;
3736 struct kvm_cpuid cpuid
;
3739 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
3741 r
= kvm_vcpu_ioctl_set_cpuid(vcpu
, &cpuid
, cpuid_arg
->entries
);
3744 case KVM_SET_CPUID2
: {
3745 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
3746 struct kvm_cpuid2 cpuid
;
3749 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
3751 r
= kvm_vcpu_ioctl_set_cpuid2(vcpu
, &cpuid
,
3752 cpuid_arg
->entries
);
3755 case KVM_GET_CPUID2
: {
3756 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
3757 struct kvm_cpuid2 cpuid
;
3760 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
3762 r
= kvm_vcpu_ioctl_get_cpuid2(vcpu
, &cpuid
,
3763 cpuid_arg
->entries
);
3767 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof cpuid
))
3772 case KVM_GET_MSRS
: {
3773 int idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
3774 r
= msr_io(vcpu
, argp
, do_get_msr
, 1);
3775 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
3778 case KVM_SET_MSRS
: {
3779 int idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
3780 r
= msr_io(vcpu
, argp
, do_set_msr
, 0);
3781 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
3784 case KVM_TPR_ACCESS_REPORTING
: {
3785 struct kvm_tpr_access_ctl tac
;
3788 if (copy_from_user(&tac
, argp
, sizeof tac
))
3790 r
= vcpu_ioctl_tpr_access_reporting(vcpu
, &tac
);
3794 if (copy_to_user(argp
, &tac
, sizeof tac
))
3799 case KVM_SET_VAPIC_ADDR
: {
3800 struct kvm_vapic_addr va
;
3804 if (!lapic_in_kernel(vcpu
))
3807 if (copy_from_user(&va
, argp
, sizeof va
))
3809 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
3810 r
= kvm_lapic_set_vapic_addr(vcpu
, va
.vapic_addr
);
3811 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
3814 case KVM_X86_SETUP_MCE
: {
3818 if (copy_from_user(&mcg_cap
, argp
, sizeof mcg_cap
))
3820 r
= kvm_vcpu_ioctl_x86_setup_mce(vcpu
, mcg_cap
);
3823 case KVM_X86_SET_MCE
: {
3824 struct kvm_x86_mce mce
;
3827 if (copy_from_user(&mce
, argp
, sizeof mce
))
3829 r
= kvm_vcpu_ioctl_x86_set_mce(vcpu
, &mce
);
3832 case KVM_GET_VCPU_EVENTS
: {
3833 struct kvm_vcpu_events events
;
3835 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu
, &events
);
3838 if (copy_to_user(argp
, &events
, sizeof(struct kvm_vcpu_events
)))
3843 case KVM_SET_VCPU_EVENTS
: {
3844 struct kvm_vcpu_events events
;
3847 if (copy_from_user(&events
, argp
, sizeof(struct kvm_vcpu_events
)))
3850 r
= kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu
, &events
);
3853 case KVM_GET_DEBUGREGS
: {
3854 struct kvm_debugregs dbgregs
;
3856 kvm_vcpu_ioctl_x86_get_debugregs(vcpu
, &dbgregs
);
3859 if (copy_to_user(argp
, &dbgregs
,
3860 sizeof(struct kvm_debugregs
)))
3865 case KVM_SET_DEBUGREGS
: {
3866 struct kvm_debugregs dbgregs
;
3869 if (copy_from_user(&dbgregs
, argp
,
3870 sizeof(struct kvm_debugregs
)))
3873 r
= kvm_vcpu_ioctl_x86_set_debugregs(vcpu
, &dbgregs
);
3876 case KVM_GET_XSAVE
: {
3877 u
.xsave
= kzalloc(sizeof(struct kvm_xsave
), GFP_KERNEL
);
3882 kvm_vcpu_ioctl_x86_get_xsave(vcpu
, u
.xsave
);
3885 if (copy_to_user(argp
, u
.xsave
, sizeof(struct kvm_xsave
)))
3890 case KVM_SET_XSAVE
: {
3891 u
.xsave
= memdup_user(argp
, sizeof(*u
.xsave
));
3892 if (IS_ERR(u
.xsave
)) {
3893 r
= PTR_ERR(u
.xsave
);
3897 r
= kvm_vcpu_ioctl_x86_set_xsave(vcpu
, u
.xsave
);
3900 case KVM_GET_XCRS
: {
3901 u
.xcrs
= kzalloc(sizeof(struct kvm_xcrs
), GFP_KERNEL
);
3906 kvm_vcpu_ioctl_x86_get_xcrs(vcpu
, u
.xcrs
);
3909 if (copy_to_user(argp
, u
.xcrs
,
3910 sizeof(struct kvm_xcrs
)))
3915 case KVM_SET_XCRS
: {
3916 u
.xcrs
= memdup_user(argp
, sizeof(*u
.xcrs
));
3917 if (IS_ERR(u
.xcrs
)) {
3918 r
= PTR_ERR(u
.xcrs
);
3922 r
= kvm_vcpu_ioctl_x86_set_xcrs(vcpu
, u
.xcrs
);
3925 case KVM_SET_TSC_KHZ
: {
3929 user_tsc_khz
= (u32
)arg
;
3931 if (user_tsc_khz
>= kvm_max_guest_tsc_khz
)
3934 if (user_tsc_khz
== 0)
3935 user_tsc_khz
= tsc_khz
;
3937 if (!kvm_set_tsc_khz(vcpu
, user_tsc_khz
))
3942 case KVM_GET_TSC_KHZ
: {
3943 r
= vcpu
->arch
.virtual_tsc_khz
;
3946 case KVM_KVMCLOCK_CTRL
: {
3947 r
= kvm_set_guest_paused(vcpu
);
3950 case KVM_ENABLE_CAP
: {
3951 struct kvm_enable_cap cap
;
3954 if (copy_from_user(&cap
, argp
, sizeof(cap
)))
3956 r
= kvm_vcpu_ioctl_enable_cap(vcpu
, &cap
);
3969 vm_fault_t
kvm_arch_vcpu_fault(struct kvm_vcpu
*vcpu
, struct vm_fault
*vmf
)
3971 return VM_FAULT_SIGBUS
;
3974 static int kvm_vm_ioctl_set_tss_addr(struct kvm
*kvm
, unsigned long addr
)
3978 if (addr
> (unsigned int)(-3 * PAGE_SIZE
))
3980 ret
= kvm_x86_ops
->set_tss_addr(kvm
, addr
);
3984 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm
*kvm
,
3987 return kvm_x86_ops
->set_identity_map_addr(kvm
, ident_addr
);
3990 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm
*kvm
,
3991 u32 kvm_nr_mmu_pages
)
3993 if (kvm_nr_mmu_pages
< KVM_MIN_ALLOC_MMU_PAGES
)
3996 mutex_lock(&kvm
->slots_lock
);
3998 kvm_mmu_change_mmu_pages(kvm
, kvm_nr_mmu_pages
);
3999 kvm
->arch
.n_requested_mmu_pages
= kvm_nr_mmu_pages
;
4001 mutex_unlock(&kvm
->slots_lock
);
4005 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm
*kvm
)
4007 return kvm
->arch
.n_max_mmu_pages
;
4010 static int kvm_vm_ioctl_get_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
4012 struct kvm_pic
*pic
= kvm
->arch
.vpic
;
4016 switch (chip
->chip_id
) {
4017 case KVM_IRQCHIP_PIC_MASTER
:
4018 memcpy(&chip
->chip
.pic
, &pic
->pics
[0],
4019 sizeof(struct kvm_pic_state
));
4021 case KVM_IRQCHIP_PIC_SLAVE
:
4022 memcpy(&chip
->chip
.pic
, &pic
->pics
[1],
4023 sizeof(struct kvm_pic_state
));
4025 case KVM_IRQCHIP_IOAPIC
:
4026 kvm_get_ioapic(kvm
, &chip
->chip
.ioapic
);
4035 static int kvm_vm_ioctl_set_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
4037 struct kvm_pic
*pic
= kvm
->arch
.vpic
;
4041 switch (chip
->chip_id
) {
4042 case KVM_IRQCHIP_PIC_MASTER
:
4043 spin_lock(&pic
->lock
);
4044 memcpy(&pic
->pics
[0], &chip
->chip
.pic
,
4045 sizeof(struct kvm_pic_state
));
4046 spin_unlock(&pic
->lock
);
4048 case KVM_IRQCHIP_PIC_SLAVE
:
4049 spin_lock(&pic
->lock
);
4050 memcpy(&pic
->pics
[1], &chip
->chip
.pic
,
4051 sizeof(struct kvm_pic_state
));
4052 spin_unlock(&pic
->lock
);
4054 case KVM_IRQCHIP_IOAPIC
:
4055 kvm_set_ioapic(kvm
, &chip
->chip
.ioapic
);
4061 kvm_pic_update_irq(pic
);
4065 static int kvm_vm_ioctl_get_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
4067 struct kvm_kpit_state
*kps
= &kvm
->arch
.vpit
->pit_state
;
4069 BUILD_BUG_ON(sizeof(*ps
) != sizeof(kps
->channels
));
4071 mutex_lock(&kps
->lock
);
4072 memcpy(ps
, &kps
->channels
, sizeof(*ps
));
4073 mutex_unlock(&kps
->lock
);
4077 static int kvm_vm_ioctl_set_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
4080 struct kvm_pit
*pit
= kvm
->arch
.vpit
;
4082 mutex_lock(&pit
->pit_state
.lock
);
4083 memcpy(&pit
->pit_state
.channels
, ps
, sizeof(*ps
));
4084 for (i
= 0; i
< 3; i
++)
4085 kvm_pit_load_count(pit
, i
, ps
->channels
[i
].count
, 0);
4086 mutex_unlock(&pit
->pit_state
.lock
);
4090 static int kvm_vm_ioctl_get_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
4092 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
4093 memcpy(ps
->channels
, &kvm
->arch
.vpit
->pit_state
.channels
,
4094 sizeof(ps
->channels
));
4095 ps
->flags
= kvm
->arch
.vpit
->pit_state
.flags
;
4096 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
4097 memset(&ps
->reserved
, 0, sizeof(ps
->reserved
));
4101 static int kvm_vm_ioctl_set_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
4105 u32 prev_legacy
, cur_legacy
;
4106 struct kvm_pit
*pit
= kvm
->arch
.vpit
;
4108 mutex_lock(&pit
->pit_state
.lock
);
4109 prev_legacy
= pit
->pit_state
.flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
4110 cur_legacy
= ps
->flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
4111 if (!prev_legacy
&& cur_legacy
)
4113 memcpy(&pit
->pit_state
.channels
, &ps
->channels
,
4114 sizeof(pit
->pit_state
.channels
));
4115 pit
->pit_state
.flags
= ps
->flags
;
4116 for (i
= 0; i
< 3; i
++)
4117 kvm_pit_load_count(pit
, i
, pit
->pit_state
.channels
[i
].count
,
4119 mutex_unlock(&pit
->pit_state
.lock
);
4123 static int kvm_vm_ioctl_reinject(struct kvm
*kvm
,
4124 struct kvm_reinject_control
*control
)
4126 struct kvm_pit
*pit
= kvm
->arch
.vpit
;
4131 /* pit->pit_state.lock was overloaded to prevent userspace from getting
4132 * an inconsistent state after running multiple KVM_REINJECT_CONTROL
4133 * ioctls in parallel. Use a separate lock if that ioctl isn't rare.
4135 mutex_lock(&pit
->pit_state
.lock
);
4136 kvm_pit_set_reinject(pit
, control
->pit_reinject
);
4137 mutex_unlock(&pit
->pit_state
.lock
);
4143 * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
4144 * @kvm: kvm instance
4145 * @log: slot id and address to which we copy the log
4147 * Steps 1-4 below provide general overview of dirty page logging. See
4148 * kvm_get_dirty_log_protect() function description for additional details.
4150 * We call kvm_get_dirty_log_protect() to handle steps 1-3, upon return we
4151 * always flush the TLB (step 4) even if previous step failed and the dirty
4152 * bitmap may be corrupt. Regardless of previous outcome the KVM logging API
4153 * does not preclude user space subsequent dirty log read. Flushing TLB ensures
4154 * writes will be marked dirty for next log read.
4156 * 1. Take a snapshot of the bit and clear it if needed.
4157 * 2. Write protect the corresponding page.
4158 * 3. Copy the snapshot to the userspace.
4159 * 4. Flush TLB's if needed.
4161 int kvm_vm_ioctl_get_dirty_log(struct kvm
*kvm
, struct kvm_dirty_log
*log
)
4163 bool is_dirty
= false;
4166 mutex_lock(&kvm
->slots_lock
);
4169 * Flush potentially hardware-cached dirty pages to dirty_bitmap.
4171 if (kvm_x86_ops
->flush_log_dirty
)
4172 kvm_x86_ops
->flush_log_dirty(kvm
);
4174 r
= kvm_get_dirty_log_protect(kvm
, log
, &is_dirty
);
4177 * All the TLBs can be flushed out of mmu lock, see the comments in
4178 * kvm_mmu_slot_remove_write_access().
4180 lockdep_assert_held(&kvm
->slots_lock
);
4182 kvm_flush_remote_tlbs(kvm
);
4184 mutex_unlock(&kvm
->slots_lock
);
4188 int kvm_vm_ioctl_irq_line(struct kvm
*kvm
, struct kvm_irq_level
*irq_event
,
4191 if (!irqchip_in_kernel(kvm
))
4194 irq_event
->status
= kvm_set_irq(kvm
, KVM_USERSPACE_IRQ_SOURCE_ID
,
4195 irq_event
->irq
, irq_event
->level
,
4200 static int kvm_vm_ioctl_enable_cap(struct kvm
*kvm
,
4201 struct kvm_enable_cap
*cap
)
4209 case KVM_CAP_DISABLE_QUIRKS
:
4210 kvm
->arch
.disabled_quirks
= cap
->args
[0];
4213 case KVM_CAP_SPLIT_IRQCHIP
: {
4214 mutex_lock(&kvm
->lock
);
4216 if (cap
->args
[0] > MAX_NR_RESERVED_IOAPIC_PINS
)
4217 goto split_irqchip_unlock
;
4219 if (irqchip_in_kernel(kvm
))
4220 goto split_irqchip_unlock
;
4221 if (kvm
->created_vcpus
)
4222 goto split_irqchip_unlock
;
4223 r
= kvm_setup_empty_irq_routing(kvm
);
4225 goto split_irqchip_unlock
;
4226 /* Pairs with irqchip_in_kernel. */
4228 kvm
->arch
.irqchip_mode
= KVM_IRQCHIP_SPLIT
;
4229 kvm
->arch
.nr_reserved_ioapic_pins
= cap
->args
[0];
4231 split_irqchip_unlock
:
4232 mutex_unlock(&kvm
->lock
);
4235 case KVM_CAP_X2APIC_API
:
4237 if (cap
->args
[0] & ~KVM_X2APIC_API_VALID_FLAGS
)
4240 if (cap
->args
[0] & KVM_X2APIC_API_USE_32BIT_IDS
)
4241 kvm
->arch
.x2apic_format
= true;
4242 if (cap
->args
[0] & KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK
)
4243 kvm
->arch
.x2apic_broadcast_quirk_disabled
= true;
4247 case KVM_CAP_X86_DISABLE_EXITS
:
4249 if (cap
->args
[0] & ~KVM_X86_DISABLE_VALID_EXITS
)
4252 if ((cap
->args
[0] & KVM_X86_DISABLE_EXITS_MWAIT
) &&
4253 kvm_can_mwait_in_guest())
4254 kvm
->arch
.mwait_in_guest
= true;
4255 if (cap
->args
[0] & KVM_X86_DISABLE_EXITS_HTL
)
4256 kvm
->arch
.hlt_in_guest
= true;
4257 if (cap
->args
[0] & KVM_X86_DISABLE_EXITS_PAUSE
)
4258 kvm
->arch
.pause_in_guest
= true;
4268 long kvm_arch_vm_ioctl(struct file
*filp
,
4269 unsigned int ioctl
, unsigned long arg
)
4271 struct kvm
*kvm
= filp
->private_data
;
4272 void __user
*argp
= (void __user
*)arg
;
4275 * This union makes it completely explicit to gcc-3.x
4276 * that these two variables' stack usage should be
4277 * combined, not added together.
4280 struct kvm_pit_state ps
;
4281 struct kvm_pit_state2 ps2
;
4282 struct kvm_pit_config pit_config
;
4286 case KVM_SET_TSS_ADDR
:
4287 r
= kvm_vm_ioctl_set_tss_addr(kvm
, arg
);
4289 case KVM_SET_IDENTITY_MAP_ADDR
: {
4292 mutex_lock(&kvm
->lock
);
4294 if (kvm
->created_vcpus
)
4295 goto set_identity_unlock
;
4297 if (copy_from_user(&ident_addr
, argp
, sizeof ident_addr
))
4298 goto set_identity_unlock
;
4299 r
= kvm_vm_ioctl_set_identity_map_addr(kvm
, ident_addr
);
4300 set_identity_unlock
:
4301 mutex_unlock(&kvm
->lock
);
4304 case KVM_SET_NR_MMU_PAGES
:
4305 r
= kvm_vm_ioctl_set_nr_mmu_pages(kvm
, arg
);
4307 case KVM_GET_NR_MMU_PAGES
:
4308 r
= kvm_vm_ioctl_get_nr_mmu_pages(kvm
);
4310 case KVM_CREATE_IRQCHIP
: {
4311 mutex_lock(&kvm
->lock
);
4314 if (irqchip_in_kernel(kvm
))
4315 goto create_irqchip_unlock
;
4318 if (kvm
->created_vcpus
)
4319 goto create_irqchip_unlock
;
4321 r
= kvm_pic_init(kvm
);
4323 goto create_irqchip_unlock
;
4325 r
= kvm_ioapic_init(kvm
);
4327 kvm_pic_destroy(kvm
);
4328 goto create_irqchip_unlock
;
4331 r
= kvm_setup_default_irq_routing(kvm
);
4333 kvm_ioapic_destroy(kvm
);
4334 kvm_pic_destroy(kvm
);
4335 goto create_irqchip_unlock
;
4337 /* Write kvm->irq_routing before enabling irqchip_in_kernel. */
4339 kvm
->arch
.irqchip_mode
= KVM_IRQCHIP_KERNEL
;
4340 create_irqchip_unlock
:
4341 mutex_unlock(&kvm
->lock
);
4344 case KVM_CREATE_PIT
:
4345 u
.pit_config
.flags
= KVM_PIT_SPEAKER_DUMMY
;
4347 case KVM_CREATE_PIT2
:
4349 if (copy_from_user(&u
.pit_config
, argp
,
4350 sizeof(struct kvm_pit_config
)))
4353 mutex_lock(&kvm
->lock
);
4356 goto create_pit_unlock
;
4358 kvm
->arch
.vpit
= kvm_create_pit(kvm
, u
.pit_config
.flags
);
4362 mutex_unlock(&kvm
->lock
);
4364 case KVM_GET_IRQCHIP
: {
4365 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
4366 struct kvm_irqchip
*chip
;
4368 chip
= memdup_user(argp
, sizeof(*chip
));
4375 if (!irqchip_kernel(kvm
))
4376 goto get_irqchip_out
;
4377 r
= kvm_vm_ioctl_get_irqchip(kvm
, chip
);
4379 goto get_irqchip_out
;
4381 if (copy_to_user(argp
, chip
, sizeof *chip
))
4382 goto get_irqchip_out
;
4388 case KVM_SET_IRQCHIP
: {
4389 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
4390 struct kvm_irqchip
*chip
;
4392 chip
= memdup_user(argp
, sizeof(*chip
));
4399 if (!irqchip_kernel(kvm
))
4400 goto set_irqchip_out
;
4401 r
= kvm_vm_ioctl_set_irqchip(kvm
, chip
);
4403 goto set_irqchip_out
;
4411 if (copy_from_user(&u
.ps
, argp
, sizeof(struct kvm_pit_state
)))
4414 if (!kvm
->arch
.vpit
)
4416 r
= kvm_vm_ioctl_get_pit(kvm
, &u
.ps
);
4420 if (copy_to_user(argp
, &u
.ps
, sizeof(struct kvm_pit_state
)))
4427 if (copy_from_user(&u
.ps
, argp
, sizeof u
.ps
))
4430 if (!kvm
->arch
.vpit
)
4432 r
= kvm_vm_ioctl_set_pit(kvm
, &u
.ps
);
4435 case KVM_GET_PIT2
: {
4437 if (!kvm
->arch
.vpit
)
4439 r
= kvm_vm_ioctl_get_pit2(kvm
, &u
.ps2
);
4443 if (copy_to_user(argp
, &u
.ps2
, sizeof(u
.ps2
)))
4448 case KVM_SET_PIT2
: {
4450 if (copy_from_user(&u
.ps2
, argp
, sizeof(u
.ps2
)))
4453 if (!kvm
->arch
.vpit
)
4455 r
= kvm_vm_ioctl_set_pit2(kvm
, &u
.ps2
);
4458 case KVM_REINJECT_CONTROL
: {
4459 struct kvm_reinject_control control
;
4461 if (copy_from_user(&control
, argp
, sizeof(control
)))
4463 r
= kvm_vm_ioctl_reinject(kvm
, &control
);
4466 case KVM_SET_BOOT_CPU_ID
:
4468 mutex_lock(&kvm
->lock
);
4469 if (kvm
->created_vcpus
)
4472 kvm
->arch
.bsp_vcpu_id
= arg
;
4473 mutex_unlock(&kvm
->lock
);
4475 case KVM_XEN_HVM_CONFIG
: {
4476 struct kvm_xen_hvm_config xhc
;
4478 if (copy_from_user(&xhc
, argp
, sizeof(xhc
)))
4483 memcpy(&kvm
->arch
.xen_hvm_config
, &xhc
, sizeof(xhc
));
4487 case KVM_SET_CLOCK
: {
4488 struct kvm_clock_data user_ns
;
4492 if (copy_from_user(&user_ns
, argp
, sizeof(user_ns
)))
4501 * TODO: userspace has to take care of races with VCPU_RUN, so
4502 * kvm_gen_update_masterclock() can be cut down to locked
4503 * pvclock_update_vm_gtod_copy().
4505 kvm_gen_update_masterclock(kvm
);
4506 now_ns
= get_kvmclock_ns(kvm
);
4507 kvm
->arch
.kvmclock_offset
+= user_ns
.clock
- now_ns
;
4508 kvm_make_all_cpus_request(kvm
, KVM_REQ_CLOCK_UPDATE
);
4511 case KVM_GET_CLOCK
: {
4512 struct kvm_clock_data user_ns
;
4515 now_ns
= get_kvmclock_ns(kvm
);
4516 user_ns
.clock
= now_ns
;
4517 user_ns
.flags
= kvm
->arch
.use_master_clock
? KVM_CLOCK_TSC_STABLE
: 0;
4518 memset(&user_ns
.pad
, 0, sizeof(user_ns
.pad
));
4521 if (copy_to_user(argp
, &user_ns
, sizeof(user_ns
)))
4526 case KVM_ENABLE_CAP
: {
4527 struct kvm_enable_cap cap
;
4530 if (copy_from_user(&cap
, argp
, sizeof(cap
)))
4532 r
= kvm_vm_ioctl_enable_cap(kvm
, &cap
);
4535 case KVM_MEMORY_ENCRYPT_OP
: {
4537 if (kvm_x86_ops
->mem_enc_op
)
4538 r
= kvm_x86_ops
->mem_enc_op(kvm
, argp
);
4541 case KVM_MEMORY_ENCRYPT_REG_REGION
: {
4542 struct kvm_enc_region region
;
4545 if (copy_from_user(®ion
, argp
, sizeof(region
)))
4549 if (kvm_x86_ops
->mem_enc_reg_region
)
4550 r
= kvm_x86_ops
->mem_enc_reg_region(kvm
, ®ion
);
4553 case KVM_MEMORY_ENCRYPT_UNREG_REGION
: {
4554 struct kvm_enc_region region
;
4557 if (copy_from_user(®ion
, argp
, sizeof(region
)))
4561 if (kvm_x86_ops
->mem_enc_unreg_region
)
4562 r
= kvm_x86_ops
->mem_enc_unreg_region(kvm
, ®ion
);
4565 case KVM_HYPERV_EVENTFD
: {
4566 struct kvm_hyperv_eventfd hvevfd
;
4569 if (copy_from_user(&hvevfd
, argp
, sizeof(hvevfd
)))
4571 r
= kvm_vm_ioctl_hv_eventfd(kvm
, &hvevfd
);
4581 static void kvm_init_msr_list(void)
4586 for (i
= j
= 0; i
< ARRAY_SIZE(msrs_to_save
); i
++) {
4587 if (rdmsr_safe(msrs_to_save
[i
], &dummy
[0], &dummy
[1]) < 0)
4591 * Even MSRs that are valid in the host may not be exposed
4592 * to the guests in some cases.
4594 switch (msrs_to_save
[i
]) {
4595 case MSR_IA32_BNDCFGS
:
4596 if (!kvm_x86_ops
->mpx_supported())
4600 if (!kvm_x86_ops
->rdtscp_supported())
4608 msrs_to_save
[j
] = msrs_to_save
[i
];
4611 num_msrs_to_save
= j
;
4613 for (i
= j
= 0; i
< ARRAY_SIZE(emulated_msrs
); i
++) {
4614 switch (emulated_msrs
[i
]) {
4615 case MSR_IA32_SMBASE
:
4616 if (!kvm_x86_ops
->cpu_has_high_real_mode_segbase())
4624 emulated_msrs
[j
] = emulated_msrs
[i
];
4627 num_emulated_msrs
= j
;
4629 for (i
= j
= 0; i
< ARRAY_SIZE(msr_based_features
); i
++) {
4630 struct kvm_msr_entry msr
;
4632 msr
.index
= msr_based_features
[i
];
4633 if (kvm_get_msr_feature(&msr
))
4637 msr_based_features
[j
] = msr_based_features
[i
];
4640 num_msr_based_features
= j
;
4643 static int vcpu_mmio_write(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
,
4651 if (!(lapic_in_kernel(vcpu
) &&
4652 !kvm_iodevice_write(vcpu
, &vcpu
->arch
.apic
->dev
, addr
, n
, v
))
4653 && kvm_io_bus_write(vcpu
, KVM_MMIO_BUS
, addr
, n
, v
))
4664 static int vcpu_mmio_read(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
, void *v
)
4671 if (!(lapic_in_kernel(vcpu
) &&
4672 !kvm_iodevice_read(vcpu
, &vcpu
->arch
.apic
->dev
,
4674 && kvm_io_bus_read(vcpu
, KVM_MMIO_BUS
, addr
, n
, v
))
4676 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, n
, addr
, v
);
4686 static void kvm_set_segment(struct kvm_vcpu
*vcpu
,
4687 struct kvm_segment
*var
, int seg
)
4689 kvm_x86_ops
->set_segment(vcpu
, var
, seg
);
4692 void kvm_get_segment(struct kvm_vcpu
*vcpu
,
4693 struct kvm_segment
*var
, int seg
)
4695 kvm_x86_ops
->get_segment(vcpu
, var
, seg
);
4698 gpa_t
translate_nested_gpa(struct kvm_vcpu
*vcpu
, gpa_t gpa
, u32 access
,
4699 struct x86_exception
*exception
)
4703 BUG_ON(!mmu_is_nested(vcpu
));
4705 /* NPT walks are always user-walks */
4706 access
|= PFERR_USER_MASK
;
4707 t_gpa
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, gpa
, access
, exception
);
4712 gpa_t
kvm_mmu_gva_to_gpa_read(struct kvm_vcpu
*vcpu
, gva_t gva
,
4713 struct x86_exception
*exception
)
4715 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4716 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4719 gpa_t
kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu
*vcpu
, gva_t gva
,
4720 struct x86_exception
*exception
)
4722 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4723 access
|= PFERR_FETCH_MASK
;
4724 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4727 gpa_t
kvm_mmu_gva_to_gpa_write(struct kvm_vcpu
*vcpu
, gva_t gva
,
4728 struct x86_exception
*exception
)
4730 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4731 access
|= PFERR_WRITE_MASK
;
4732 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4735 /* uses this to access any guest's mapped memory without checking CPL */
4736 gpa_t
kvm_mmu_gva_to_gpa_system(struct kvm_vcpu
*vcpu
, gva_t gva
,
4737 struct x86_exception
*exception
)
4739 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, 0, exception
);
4742 static int kvm_read_guest_virt_helper(gva_t addr
, void *val
, unsigned int bytes
,
4743 struct kvm_vcpu
*vcpu
, u32 access
,
4744 struct x86_exception
*exception
)
4747 int r
= X86EMUL_CONTINUE
;
4750 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
, access
,
4752 unsigned offset
= addr
& (PAGE_SIZE
-1);
4753 unsigned toread
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
4756 if (gpa
== UNMAPPED_GVA
)
4757 return X86EMUL_PROPAGATE_FAULT
;
4758 ret
= kvm_vcpu_read_guest_page(vcpu
, gpa
>> PAGE_SHIFT
, data
,
4761 r
= X86EMUL_IO_NEEDED
;
4773 /* used for instruction fetching */
4774 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt
*ctxt
,
4775 gva_t addr
, void *val
, unsigned int bytes
,
4776 struct x86_exception
*exception
)
4778 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4779 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4783 /* Inline kvm_read_guest_virt_helper for speed. */
4784 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
, access
|PFERR_FETCH_MASK
,
4786 if (unlikely(gpa
== UNMAPPED_GVA
))
4787 return X86EMUL_PROPAGATE_FAULT
;
4789 offset
= addr
& (PAGE_SIZE
-1);
4790 if (WARN_ON(offset
+ bytes
> PAGE_SIZE
))
4791 bytes
= (unsigned)PAGE_SIZE
- offset
;
4792 ret
= kvm_vcpu_read_guest_page(vcpu
, gpa
>> PAGE_SHIFT
, val
,
4794 if (unlikely(ret
< 0))
4795 return X86EMUL_IO_NEEDED
;
4797 return X86EMUL_CONTINUE
;
4800 int kvm_read_guest_virt(struct x86_emulate_ctxt
*ctxt
,
4801 gva_t addr
, void *val
, unsigned int bytes
,
4802 struct x86_exception
*exception
)
4804 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4805 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4807 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, access
,
4810 EXPORT_SYMBOL_GPL(kvm_read_guest_virt
);
4812 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt
*ctxt
,
4813 gva_t addr
, void *val
, unsigned int bytes
,
4814 struct x86_exception
*exception
)
4816 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4817 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, 0, exception
);
4820 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt
*ctxt
,
4821 unsigned long addr
, void *val
, unsigned int bytes
)
4823 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4824 int r
= kvm_vcpu_read_guest(vcpu
, addr
, val
, bytes
);
4826 return r
< 0 ? X86EMUL_IO_NEEDED
: X86EMUL_CONTINUE
;
4829 int kvm_write_guest_virt_system(struct x86_emulate_ctxt
*ctxt
,
4830 gva_t addr
, void *val
,
4832 struct x86_exception
*exception
)
4834 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4836 int r
= X86EMUL_CONTINUE
;
4839 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
,
4842 unsigned offset
= addr
& (PAGE_SIZE
-1);
4843 unsigned towrite
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
4846 if (gpa
== UNMAPPED_GVA
)
4847 return X86EMUL_PROPAGATE_FAULT
;
4848 ret
= kvm_vcpu_write_guest(vcpu
, gpa
, data
, towrite
);
4850 r
= X86EMUL_IO_NEEDED
;
4861 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system
);
4863 int handle_ud(struct kvm_vcpu
*vcpu
)
4865 int emul_type
= EMULTYPE_TRAP_UD
;
4866 enum emulation_result er
;
4867 char sig
[5]; /* ud2; .ascii "kvm" */
4868 struct x86_exception e
;
4870 if (force_emulation_prefix
&&
4871 kvm_read_guest_virt(&vcpu
->arch
.emulate_ctxt
,
4872 kvm_get_linear_rip(vcpu
), sig
, sizeof(sig
), &e
) == 0 &&
4873 memcmp(sig
, "\xf\xbkvm", sizeof(sig
)) == 0) {
4874 kvm_rip_write(vcpu
, kvm_rip_read(vcpu
) + sizeof(sig
));
4878 er
= emulate_instruction(vcpu
, emul_type
);
4879 if (er
== EMULATE_USER_EXIT
)
4881 if (er
!= EMULATE_DONE
)
4882 kvm_queue_exception(vcpu
, UD_VECTOR
);
4885 EXPORT_SYMBOL_GPL(handle_ud
);
4887 static int vcpu_is_mmio_gpa(struct kvm_vcpu
*vcpu
, unsigned long gva
,
4888 gpa_t gpa
, bool write
)
4890 /* For APIC access vmexit */
4891 if ((gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
4894 if (vcpu_match_mmio_gpa(vcpu
, gpa
)) {
4895 trace_vcpu_match_mmio(gva
, gpa
, write
, true);
4902 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu
*vcpu
, unsigned long gva
,
4903 gpa_t
*gpa
, struct x86_exception
*exception
,
4906 u32 access
= ((kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0)
4907 | (write
? PFERR_WRITE_MASK
: 0);
4910 * currently PKRU is only applied to ept enabled guest so
4911 * there is no pkey in EPT page table for L1 guest or EPT
4912 * shadow page table for L2 guest.
4914 if (vcpu_match_mmio_gva(vcpu
, gva
)
4915 && !permission_fault(vcpu
, vcpu
->arch
.walk_mmu
,
4916 vcpu
->arch
.access
, 0, access
)) {
4917 *gpa
= vcpu
->arch
.mmio_gfn
<< PAGE_SHIFT
|
4918 (gva
& (PAGE_SIZE
- 1));
4919 trace_vcpu_match_mmio(gva
, *gpa
, write
, false);
4923 *gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4925 if (*gpa
== UNMAPPED_GVA
)
4928 return vcpu_is_mmio_gpa(vcpu
, gva
, *gpa
, write
);
4931 int emulator_write_phys(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4932 const void *val
, int bytes
)
4936 ret
= kvm_vcpu_write_guest(vcpu
, gpa
, val
, bytes
);
4939 kvm_page_track_write(vcpu
, gpa
, val
, bytes
);
4943 struct read_write_emulator_ops
{
4944 int (*read_write_prepare
)(struct kvm_vcpu
*vcpu
, void *val
,
4946 int (*read_write_emulate
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4947 void *val
, int bytes
);
4948 int (*read_write_mmio
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4949 int bytes
, void *val
);
4950 int (*read_write_exit_mmio
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4951 void *val
, int bytes
);
4955 static int read_prepare(struct kvm_vcpu
*vcpu
, void *val
, int bytes
)
4957 if (vcpu
->mmio_read_completed
) {
4958 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, bytes
,
4959 vcpu
->mmio_fragments
[0].gpa
, val
);
4960 vcpu
->mmio_read_completed
= 0;
4967 static int read_emulate(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4968 void *val
, int bytes
)
4970 return !kvm_vcpu_read_guest(vcpu
, gpa
, val
, bytes
);
4973 static int write_emulate(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4974 void *val
, int bytes
)
4976 return emulator_write_phys(vcpu
, gpa
, val
, bytes
);
4979 static int write_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
, int bytes
, void *val
)
4981 trace_kvm_mmio(KVM_TRACE_MMIO_WRITE
, bytes
, gpa
, val
);
4982 return vcpu_mmio_write(vcpu
, gpa
, bytes
, val
);
4985 static int read_exit_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4986 void *val
, int bytes
)
4988 trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED
, bytes
, gpa
, NULL
);
4989 return X86EMUL_IO_NEEDED
;
4992 static int write_exit_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4993 void *val
, int bytes
)
4995 struct kvm_mmio_fragment
*frag
= &vcpu
->mmio_fragments
[0];
4997 memcpy(vcpu
->run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
4998 return X86EMUL_CONTINUE
;
5001 static const struct read_write_emulator_ops read_emultor
= {
5002 .read_write_prepare
= read_prepare
,
5003 .read_write_emulate
= read_emulate
,
5004 .read_write_mmio
= vcpu_mmio_read
,
5005 .read_write_exit_mmio
= read_exit_mmio
,
5008 static const struct read_write_emulator_ops write_emultor
= {
5009 .read_write_emulate
= write_emulate
,
5010 .read_write_mmio
= write_mmio
,
5011 .read_write_exit_mmio
= write_exit_mmio
,
5015 static int emulator_read_write_onepage(unsigned long addr
, void *val
,
5017 struct x86_exception
*exception
,
5018 struct kvm_vcpu
*vcpu
,
5019 const struct read_write_emulator_ops
*ops
)
5023 bool write
= ops
->write
;
5024 struct kvm_mmio_fragment
*frag
;
5025 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5028 * If the exit was due to a NPF we may already have a GPA.
5029 * If the GPA is present, use it to avoid the GVA to GPA table walk.
5030 * Note, this cannot be used on string operations since string
5031 * operation using rep will only have the initial GPA from the NPF
5034 if (vcpu
->arch
.gpa_available
&&
5035 emulator_can_use_gpa(ctxt
) &&
5036 (addr
& ~PAGE_MASK
) == (vcpu
->arch
.gpa_val
& ~PAGE_MASK
)) {
5037 gpa
= vcpu
->arch
.gpa_val
;
5038 ret
= vcpu_is_mmio_gpa(vcpu
, addr
, gpa
, write
);
5040 ret
= vcpu_mmio_gva_to_gpa(vcpu
, addr
, &gpa
, exception
, write
);
5042 return X86EMUL_PROPAGATE_FAULT
;
5045 if (!ret
&& ops
->read_write_emulate(vcpu
, gpa
, val
, bytes
))
5046 return X86EMUL_CONTINUE
;
5049 * Is this MMIO handled locally?
5051 handled
= ops
->read_write_mmio(vcpu
, gpa
, bytes
, val
);
5052 if (handled
== bytes
)
5053 return X86EMUL_CONTINUE
;
5059 WARN_ON(vcpu
->mmio_nr_fragments
>= KVM_MAX_MMIO_FRAGMENTS
);
5060 frag
= &vcpu
->mmio_fragments
[vcpu
->mmio_nr_fragments
++];
5064 return X86EMUL_CONTINUE
;
5067 static int emulator_read_write(struct x86_emulate_ctxt
*ctxt
,
5069 void *val
, unsigned int bytes
,
5070 struct x86_exception
*exception
,
5071 const struct read_write_emulator_ops
*ops
)
5073 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5077 if (ops
->read_write_prepare
&&
5078 ops
->read_write_prepare(vcpu
, val
, bytes
))
5079 return X86EMUL_CONTINUE
;
5081 vcpu
->mmio_nr_fragments
= 0;
5083 /* Crossing a page boundary? */
5084 if (((addr
+ bytes
- 1) ^ addr
) & PAGE_MASK
) {
5087 now
= -addr
& ~PAGE_MASK
;
5088 rc
= emulator_read_write_onepage(addr
, val
, now
, exception
,
5091 if (rc
!= X86EMUL_CONTINUE
)
5094 if (ctxt
->mode
!= X86EMUL_MODE_PROT64
)
5100 rc
= emulator_read_write_onepage(addr
, val
, bytes
, exception
,
5102 if (rc
!= X86EMUL_CONTINUE
)
5105 if (!vcpu
->mmio_nr_fragments
)
5108 gpa
= vcpu
->mmio_fragments
[0].gpa
;
5110 vcpu
->mmio_needed
= 1;
5111 vcpu
->mmio_cur_fragment
= 0;
5113 vcpu
->run
->mmio
.len
= min(8u, vcpu
->mmio_fragments
[0].len
);
5114 vcpu
->run
->mmio
.is_write
= vcpu
->mmio_is_write
= ops
->write
;
5115 vcpu
->run
->exit_reason
= KVM_EXIT_MMIO
;
5116 vcpu
->run
->mmio
.phys_addr
= gpa
;
5118 return ops
->read_write_exit_mmio(vcpu
, gpa
, val
, bytes
);
5121 static int emulator_read_emulated(struct x86_emulate_ctxt
*ctxt
,
5125 struct x86_exception
*exception
)
5127 return emulator_read_write(ctxt
, addr
, val
, bytes
,
5128 exception
, &read_emultor
);
5131 static int emulator_write_emulated(struct x86_emulate_ctxt
*ctxt
,
5135 struct x86_exception
*exception
)
5137 return emulator_read_write(ctxt
, addr
, (void *)val
, bytes
,
5138 exception
, &write_emultor
);
5141 #define CMPXCHG_TYPE(t, ptr, old, new) \
5142 (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
5144 #ifdef CONFIG_X86_64
5145 # define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
5147 # define CMPXCHG64(ptr, old, new) \
5148 (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
5151 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt
*ctxt
,
5156 struct x86_exception
*exception
)
5158 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5164 /* guests cmpxchg8b have to be emulated atomically */
5165 if (bytes
> 8 || (bytes
& (bytes
- 1)))
5168 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, addr
, NULL
);
5170 if (gpa
== UNMAPPED_GVA
||
5171 (gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
5174 if (((gpa
+ bytes
- 1) & PAGE_MASK
) != (gpa
& PAGE_MASK
))
5177 page
= kvm_vcpu_gfn_to_page(vcpu
, gpa
>> PAGE_SHIFT
);
5178 if (is_error_page(page
))
5181 kaddr
= kmap_atomic(page
);
5182 kaddr
+= offset_in_page(gpa
);
5185 exchanged
= CMPXCHG_TYPE(u8
, kaddr
, old
, new);
5188 exchanged
= CMPXCHG_TYPE(u16
, kaddr
, old
, new);
5191 exchanged
= CMPXCHG_TYPE(u32
, kaddr
, old
, new);
5194 exchanged
= CMPXCHG64(kaddr
, old
, new);
5199 kunmap_atomic(kaddr
);
5200 kvm_release_page_dirty(page
);
5203 return X86EMUL_CMPXCHG_FAILED
;
5205 kvm_vcpu_mark_page_dirty(vcpu
, gpa
>> PAGE_SHIFT
);
5206 kvm_page_track_write(vcpu
, gpa
, new, bytes
);
5208 return X86EMUL_CONTINUE
;
5211 printk_once(KERN_WARNING
"kvm: emulating exchange as write\n");
5213 return emulator_write_emulated(ctxt
, addr
, new, bytes
, exception
);
5216 static int kernel_pio(struct kvm_vcpu
*vcpu
, void *pd
)
5220 for (i
= 0; i
< vcpu
->arch
.pio
.count
; i
++) {
5221 if (vcpu
->arch
.pio
.in
)
5222 r
= kvm_io_bus_read(vcpu
, KVM_PIO_BUS
, vcpu
->arch
.pio
.port
,
5223 vcpu
->arch
.pio
.size
, pd
);
5225 r
= kvm_io_bus_write(vcpu
, KVM_PIO_BUS
,
5226 vcpu
->arch
.pio
.port
, vcpu
->arch
.pio
.size
,
5230 pd
+= vcpu
->arch
.pio
.size
;
5235 static int emulator_pio_in_out(struct kvm_vcpu
*vcpu
, int size
,
5236 unsigned short port
, void *val
,
5237 unsigned int count
, bool in
)
5239 vcpu
->arch
.pio
.port
= port
;
5240 vcpu
->arch
.pio
.in
= in
;
5241 vcpu
->arch
.pio
.count
= count
;
5242 vcpu
->arch
.pio
.size
= size
;
5244 if (!kernel_pio(vcpu
, vcpu
->arch
.pio_data
)) {
5245 vcpu
->arch
.pio
.count
= 0;
5249 vcpu
->run
->exit_reason
= KVM_EXIT_IO
;
5250 vcpu
->run
->io
.direction
= in
? KVM_EXIT_IO_IN
: KVM_EXIT_IO_OUT
;
5251 vcpu
->run
->io
.size
= size
;
5252 vcpu
->run
->io
.data_offset
= KVM_PIO_PAGE_OFFSET
* PAGE_SIZE
;
5253 vcpu
->run
->io
.count
= count
;
5254 vcpu
->run
->io
.port
= port
;
5259 static int emulator_pio_in_emulated(struct x86_emulate_ctxt
*ctxt
,
5260 int size
, unsigned short port
, void *val
,
5263 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5266 if (vcpu
->arch
.pio
.count
)
5269 memset(vcpu
->arch
.pio_data
, 0, size
* count
);
5271 ret
= emulator_pio_in_out(vcpu
, size
, port
, val
, count
, true);
5274 memcpy(val
, vcpu
->arch
.pio_data
, size
* count
);
5275 trace_kvm_pio(KVM_PIO_IN
, port
, size
, count
, vcpu
->arch
.pio_data
);
5276 vcpu
->arch
.pio
.count
= 0;
5283 static int emulator_pio_out_emulated(struct x86_emulate_ctxt
*ctxt
,
5284 int size
, unsigned short port
,
5285 const void *val
, unsigned int count
)
5287 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5289 memcpy(vcpu
->arch
.pio_data
, val
, size
* count
);
5290 trace_kvm_pio(KVM_PIO_OUT
, port
, size
, count
, vcpu
->arch
.pio_data
);
5291 return emulator_pio_in_out(vcpu
, size
, port
, (void *)val
, count
, false);
5294 static unsigned long get_segment_base(struct kvm_vcpu
*vcpu
, int seg
)
5296 return kvm_x86_ops
->get_segment_base(vcpu
, seg
);
5299 static void emulator_invlpg(struct x86_emulate_ctxt
*ctxt
, ulong address
)
5301 kvm_mmu_invlpg(emul_to_vcpu(ctxt
), address
);
5304 static int kvm_emulate_wbinvd_noskip(struct kvm_vcpu
*vcpu
)
5306 if (!need_emulate_wbinvd(vcpu
))
5307 return X86EMUL_CONTINUE
;
5309 if (kvm_x86_ops
->has_wbinvd_exit()) {
5310 int cpu
= get_cpu();
5312 cpumask_set_cpu(cpu
, vcpu
->arch
.wbinvd_dirty_mask
);
5313 smp_call_function_many(vcpu
->arch
.wbinvd_dirty_mask
,
5314 wbinvd_ipi
, NULL
, 1);
5316 cpumask_clear(vcpu
->arch
.wbinvd_dirty_mask
);
5319 return X86EMUL_CONTINUE
;
5322 int kvm_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
5324 kvm_emulate_wbinvd_noskip(vcpu
);
5325 return kvm_skip_emulated_instruction(vcpu
);
5327 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd
);
5331 static void emulator_wbinvd(struct x86_emulate_ctxt
*ctxt
)
5333 kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt
));
5336 static int emulator_get_dr(struct x86_emulate_ctxt
*ctxt
, int dr
,
5337 unsigned long *dest
)
5339 return kvm_get_dr(emul_to_vcpu(ctxt
), dr
, dest
);
5342 static int emulator_set_dr(struct x86_emulate_ctxt
*ctxt
, int dr
,
5343 unsigned long value
)
5346 return __kvm_set_dr(emul_to_vcpu(ctxt
), dr
, value
);
5349 static u64
mk_cr_64(u64 curr_cr
, u32 new_val
)
5351 return (curr_cr
& ~((1ULL << 32) - 1)) | new_val
;
5354 static unsigned long emulator_get_cr(struct x86_emulate_ctxt
*ctxt
, int cr
)
5356 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5357 unsigned long value
;
5361 value
= kvm_read_cr0(vcpu
);
5364 value
= vcpu
->arch
.cr2
;
5367 value
= kvm_read_cr3(vcpu
);
5370 value
= kvm_read_cr4(vcpu
);
5373 value
= kvm_get_cr8(vcpu
);
5376 kvm_err("%s: unexpected cr %u\n", __func__
, cr
);
5383 static int emulator_set_cr(struct x86_emulate_ctxt
*ctxt
, int cr
, ulong val
)
5385 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5390 res
= kvm_set_cr0(vcpu
, mk_cr_64(kvm_read_cr0(vcpu
), val
));
5393 vcpu
->arch
.cr2
= val
;
5396 res
= kvm_set_cr3(vcpu
, val
);
5399 res
= kvm_set_cr4(vcpu
, mk_cr_64(kvm_read_cr4(vcpu
), val
));
5402 res
= kvm_set_cr8(vcpu
, val
);
5405 kvm_err("%s: unexpected cr %u\n", __func__
, cr
);
5412 static int emulator_get_cpl(struct x86_emulate_ctxt
*ctxt
)
5414 return kvm_x86_ops
->get_cpl(emul_to_vcpu(ctxt
));
5417 static void emulator_get_gdt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
5419 kvm_x86_ops
->get_gdt(emul_to_vcpu(ctxt
), dt
);
5422 static void emulator_get_idt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
5424 kvm_x86_ops
->get_idt(emul_to_vcpu(ctxt
), dt
);
5427 static void emulator_set_gdt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
5429 kvm_x86_ops
->set_gdt(emul_to_vcpu(ctxt
), dt
);
5432 static void emulator_set_idt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
5434 kvm_x86_ops
->set_idt(emul_to_vcpu(ctxt
), dt
);
5437 static unsigned long emulator_get_cached_segment_base(
5438 struct x86_emulate_ctxt
*ctxt
, int seg
)
5440 return get_segment_base(emul_to_vcpu(ctxt
), seg
);
5443 static bool emulator_get_segment(struct x86_emulate_ctxt
*ctxt
, u16
*selector
,
5444 struct desc_struct
*desc
, u32
*base3
,
5447 struct kvm_segment var
;
5449 kvm_get_segment(emul_to_vcpu(ctxt
), &var
, seg
);
5450 *selector
= var
.selector
;
5453 memset(desc
, 0, sizeof(*desc
));
5461 set_desc_limit(desc
, var
.limit
);
5462 set_desc_base(desc
, (unsigned long)var
.base
);
5463 #ifdef CONFIG_X86_64
5465 *base3
= var
.base
>> 32;
5467 desc
->type
= var
.type
;
5469 desc
->dpl
= var
.dpl
;
5470 desc
->p
= var
.present
;
5471 desc
->avl
= var
.avl
;
5479 static void emulator_set_segment(struct x86_emulate_ctxt
*ctxt
, u16 selector
,
5480 struct desc_struct
*desc
, u32 base3
,
5483 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5484 struct kvm_segment var
;
5486 var
.selector
= selector
;
5487 var
.base
= get_desc_base(desc
);
5488 #ifdef CONFIG_X86_64
5489 var
.base
|= ((u64
)base3
) << 32;
5491 var
.limit
= get_desc_limit(desc
);
5493 var
.limit
= (var
.limit
<< 12) | 0xfff;
5494 var
.type
= desc
->type
;
5495 var
.dpl
= desc
->dpl
;
5500 var
.avl
= desc
->avl
;
5501 var
.present
= desc
->p
;
5502 var
.unusable
= !var
.present
;
5505 kvm_set_segment(vcpu
, &var
, seg
);
5509 static int emulator_get_msr(struct x86_emulate_ctxt
*ctxt
,
5510 u32 msr_index
, u64
*pdata
)
5512 struct msr_data msr
;
5515 msr
.index
= msr_index
;
5516 msr
.host_initiated
= false;
5517 r
= kvm_get_msr(emul_to_vcpu(ctxt
), &msr
);
5525 static int emulator_set_msr(struct x86_emulate_ctxt
*ctxt
,
5526 u32 msr_index
, u64 data
)
5528 struct msr_data msr
;
5531 msr
.index
= msr_index
;
5532 msr
.host_initiated
= false;
5533 return kvm_set_msr(emul_to_vcpu(ctxt
), &msr
);
5536 static u64
emulator_get_smbase(struct x86_emulate_ctxt
*ctxt
)
5538 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5540 return vcpu
->arch
.smbase
;
5543 static void emulator_set_smbase(struct x86_emulate_ctxt
*ctxt
, u64 smbase
)
5545 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5547 vcpu
->arch
.smbase
= smbase
;
5550 static int emulator_check_pmc(struct x86_emulate_ctxt
*ctxt
,
5553 return kvm_pmu_is_valid_msr_idx(emul_to_vcpu(ctxt
), pmc
);
5556 static int emulator_read_pmc(struct x86_emulate_ctxt
*ctxt
,
5557 u32 pmc
, u64
*pdata
)
5559 return kvm_pmu_rdpmc(emul_to_vcpu(ctxt
), pmc
, pdata
);
5562 static void emulator_halt(struct x86_emulate_ctxt
*ctxt
)
5564 emul_to_vcpu(ctxt
)->arch
.halt_request
= 1;
5567 static int emulator_intercept(struct x86_emulate_ctxt
*ctxt
,
5568 struct x86_instruction_info
*info
,
5569 enum x86_intercept_stage stage
)
5571 return kvm_x86_ops
->check_intercept(emul_to_vcpu(ctxt
), info
, stage
);
5574 static bool emulator_get_cpuid(struct x86_emulate_ctxt
*ctxt
,
5575 u32
*eax
, u32
*ebx
, u32
*ecx
, u32
*edx
, bool check_limit
)
5577 return kvm_cpuid(emul_to_vcpu(ctxt
), eax
, ebx
, ecx
, edx
, check_limit
);
5580 static ulong
emulator_read_gpr(struct x86_emulate_ctxt
*ctxt
, unsigned reg
)
5582 return kvm_register_read(emul_to_vcpu(ctxt
), reg
);
5585 static void emulator_write_gpr(struct x86_emulate_ctxt
*ctxt
, unsigned reg
, ulong val
)
5587 kvm_register_write(emul_to_vcpu(ctxt
), reg
, val
);
5590 static void emulator_set_nmi_mask(struct x86_emulate_ctxt
*ctxt
, bool masked
)
5592 kvm_x86_ops
->set_nmi_mask(emul_to_vcpu(ctxt
), masked
);
5595 static unsigned emulator_get_hflags(struct x86_emulate_ctxt
*ctxt
)
5597 return emul_to_vcpu(ctxt
)->arch
.hflags
;
5600 static void emulator_set_hflags(struct x86_emulate_ctxt
*ctxt
, unsigned emul_flags
)
5602 kvm_set_hflags(emul_to_vcpu(ctxt
), emul_flags
);
5605 static int emulator_pre_leave_smm(struct x86_emulate_ctxt
*ctxt
, u64 smbase
)
5607 return kvm_x86_ops
->pre_leave_smm(emul_to_vcpu(ctxt
), smbase
);
5610 static const struct x86_emulate_ops emulate_ops
= {
5611 .read_gpr
= emulator_read_gpr
,
5612 .write_gpr
= emulator_write_gpr
,
5613 .read_std
= kvm_read_guest_virt_system
,
5614 .write_std
= kvm_write_guest_virt_system
,
5615 .read_phys
= kvm_read_guest_phys_system
,
5616 .fetch
= kvm_fetch_guest_virt
,
5617 .read_emulated
= emulator_read_emulated
,
5618 .write_emulated
= emulator_write_emulated
,
5619 .cmpxchg_emulated
= emulator_cmpxchg_emulated
,
5620 .invlpg
= emulator_invlpg
,
5621 .pio_in_emulated
= emulator_pio_in_emulated
,
5622 .pio_out_emulated
= emulator_pio_out_emulated
,
5623 .get_segment
= emulator_get_segment
,
5624 .set_segment
= emulator_set_segment
,
5625 .get_cached_segment_base
= emulator_get_cached_segment_base
,
5626 .get_gdt
= emulator_get_gdt
,
5627 .get_idt
= emulator_get_idt
,
5628 .set_gdt
= emulator_set_gdt
,
5629 .set_idt
= emulator_set_idt
,
5630 .get_cr
= emulator_get_cr
,
5631 .set_cr
= emulator_set_cr
,
5632 .cpl
= emulator_get_cpl
,
5633 .get_dr
= emulator_get_dr
,
5634 .set_dr
= emulator_set_dr
,
5635 .get_smbase
= emulator_get_smbase
,
5636 .set_smbase
= emulator_set_smbase
,
5637 .set_msr
= emulator_set_msr
,
5638 .get_msr
= emulator_get_msr
,
5639 .check_pmc
= emulator_check_pmc
,
5640 .read_pmc
= emulator_read_pmc
,
5641 .halt
= emulator_halt
,
5642 .wbinvd
= emulator_wbinvd
,
5643 .fix_hypercall
= emulator_fix_hypercall
,
5644 .intercept
= emulator_intercept
,
5645 .get_cpuid
= emulator_get_cpuid
,
5646 .set_nmi_mask
= emulator_set_nmi_mask
,
5647 .get_hflags
= emulator_get_hflags
,
5648 .set_hflags
= emulator_set_hflags
,
5649 .pre_leave_smm
= emulator_pre_leave_smm
,
5652 static void toggle_interruptibility(struct kvm_vcpu
*vcpu
, u32 mask
)
5654 u32 int_shadow
= kvm_x86_ops
->get_interrupt_shadow(vcpu
);
5656 * an sti; sti; sequence only disable interrupts for the first
5657 * instruction. So, if the last instruction, be it emulated or
5658 * not, left the system with the INT_STI flag enabled, it
5659 * means that the last instruction is an sti. We should not
5660 * leave the flag on in this case. The same goes for mov ss
5662 if (int_shadow
& mask
)
5664 if (unlikely(int_shadow
|| mask
)) {
5665 kvm_x86_ops
->set_interrupt_shadow(vcpu
, mask
);
5667 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5671 static bool inject_emulated_exception(struct kvm_vcpu
*vcpu
)
5673 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5674 if (ctxt
->exception
.vector
== PF_VECTOR
)
5675 return kvm_propagate_fault(vcpu
, &ctxt
->exception
);
5677 if (ctxt
->exception
.error_code_valid
)
5678 kvm_queue_exception_e(vcpu
, ctxt
->exception
.vector
,
5679 ctxt
->exception
.error_code
);
5681 kvm_queue_exception(vcpu
, ctxt
->exception
.vector
);
5685 static void init_emulate_ctxt(struct kvm_vcpu
*vcpu
)
5687 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5690 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
5692 ctxt
->eflags
= kvm_get_rflags(vcpu
);
5693 ctxt
->tf
= (ctxt
->eflags
& X86_EFLAGS_TF
) != 0;
5695 ctxt
->eip
= kvm_rip_read(vcpu
);
5696 ctxt
->mode
= (!is_protmode(vcpu
)) ? X86EMUL_MODE_REAL
:
5697 (ctxt
->eflags
& X86_EFLAGS_VM
) ? X86EMUL_MODE_VM86
:
5698 (cs_l
&& is_long_mode(vcpu
)) ? X86EMUL_MODE_PROT64
:
5699 cs_db
? X86EMUL_MODE_PROT32
:
5700 X86EMUL_MODE_PROT16
;
5701 BUILD_BUG_ON(HF_GUEST_MASK
!= X86EMUL_GUEST_MASK
);
5702 BUILD_BUG_ON(HF_SMM_MASK
!= X86EMUL_SMM_MASK
);
5703 BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK
!= X86EMUL_SMM_INSIDE_NMI_MASK
);
5705 init_decode_cache(ctxt
);
5706 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= false;
5709 int kvm_inject_realmode_interrupt(struct kvm_vcpu
*vcpu
, int irq
, int inc_eip
)
5711 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5714 init_emulate_ctxt(vcpu
);
5718 ctxt
->_eip
= ctxt
->eip
+ inc_eip
;
5719 ret
= emulate_int_real(ctxt
, irq
);
5721 if (ret
!= X86EMUL_CONTINUE
)
5722 return EMULATE_FAIL
;
5724 ctxt
->eip
= ctxt
->_eip
;
5725 kvm_rip_write(vcpu
, ctxt
->eip
);
5726 kvm_set_rflags(vcpu
, ctxt
->eflags
);
5728 return EMULATE_DONE
;
5730 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt
);
5732 static int handle_emulation_failure(struct kvm_vcpu
*vcpu
, int emulation_type
)
5734 int r
= EMULATE_DONE
;
5736 ++vcpu
->stat
.insn_emulation_fail
;
5737 trace_kvm_emulate_insn_failed(vcpu
);
5739 if (emulation_type
& EMULTYPE_NO_UD_ON_FAIL
)
5740 return EMULATE_FAIL
;
5742 if (!is_guest_mode(vcpu
) && kvm_x86_ops
->get_cpl(vcpu
) == 0) {
5743 vcpu
->run
->exit_reason
= KVM_EXIT_INTERNAL_ERROR
;
5744 vcpu
->run
->internal
.suberror
= KVM_INTERNAL_ERROR_EMULATION
;
5745 vcpu
->run
->internal
.ndata
= 0;
5746 r
= EMULATE_USER_EXIT
;
5749 kvm_queue_exception(vcpu
, UD_VECTOR
);
5754 static bool reexecute_instruction(struct kvm_vcpu
*vcpu
, gva_t cr2
,
5755 bool write_fault_to_shadow_pgtable
,
5761 if (emulation_type
& EMULTYPE_NO_REEXECUTE
)
5764 if (!vcpu
->arch
.mmu
.direct_map
) {
5766 * Write permission should be allowed since only
5767 * write access need to be emulated.
5769 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, cr2
, NULL
);
5772 * If the mapping is invalid in guest, let cpu retry
5773 * it to generate fault.
5775 if (gpa
== UNMAPPED_GVA
)
5780 * Do not retry the unhandleable instruction if it faults on the
5781 * readonly host memory, otherwise it will goto a infinite loop:
5782 * retry instruction -> write #PF -> emulation fail -> retry
5783 * instruction -> ...
5785 pfn
= gfn_to_pfn(vcpu
->kvm
, gpa_to_gfn(gpa
));
5788 * If the instruction failed on the error pfn, it can not be fixed,
5789 * report the error to userspace.
5791 if (is_error_noslot_pfn(pfn
))
5794 kvm_release_pfn_clean(pfn
);
5796 /* The instructions are well-emulated on direct mmu. */
5797 if (vcpu
->arch
.mmu
.direct_map
) {
5798 unsigned int indirect_shadow_pages
;
5800 spin_lock(&vcpu
->kvm
->mmu_lock
);
5801 indirect_shadow_pages
= vcpu
->kvm
->arch
.indirect_shadow_pages
;
5802 spin_unlock(&vcpu
->kvm
->mmu_lock
);
5804 if (indirect_shadow_pages
)
5805 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
5811 * if emulation was due to access to shadowed page table
5812 * and it failed try to unshadow page and re-enter the
5813 * guest to let CPU execute the instruction.
5815 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
5818 * If the access faults on its page table, it can not
5819 * be fixed by unprotecting shadow page and it should
5820 * be reported to userspace.
5822 return !write_fault_to_shadow_pgtable
;
5825 static bool retry_instruction(struct x86_emulate_ctxt
*ctxt
,
5826 unsigned long cr2
, int emulation_type
)
5828 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5829 unsigned long last_retry_eip
, last_retry_addr
, gpa
= cr2
;
5831 last_retry_eip
= vcpu
->arch
.last_retry_eip
;
5832 last_retry_addr
= vcpu
->arch
.last_retry_addr
;
5835 * If the emulation is caused by #PF and it is non-page_table
5836 * writing instruction, it means the VM-EXIT is caused by shadow
5837 * page protected, we can zap the shadow page and retry this
5838 * instruction directly.
5840 * Note: if the guest uses a non-page-table modifying instruction
5841 * on the PDE that points to the instruction, then we will unmap
5842 * the instruction and go to an infinite loop. So, we cache the
5843 * last retried eip and the last fault address, if we meet the eip
5844 * and the address again, we can break out of the potential infinite
5847 vcpu
->arch
.last_retry_eip
= vcpu
->arch
.last_retry_addr
= 0;
5849 if (!(emulation_type
& EMULTYPE_RETRY
))
5852 if (x86_page_table_writing_insn(ctxt
))
5855 if (ctxt
->eip
== last_retry_eip
&& last_retry_addr
== cr2
)
5858 vcpu
->arch
.last_retry_eip
= ctxt
->eip
;
5859 vcpu
->arch
.last_retry_addr
= cr2
;
5861 if (!vcpu
->arch
.mmu
.direct_map
)
5862 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, cr2
, NULL
);
5864 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
5869 static int complete_emulated_mmio(struct kvm_vcpu
*vcpu
);
5870 static int complete_emulated_pio(struct kvm_vcpu
*vcpu
);
5872 static void kvm_smm_changed(struct kvm_vcpu
*vcpu
)
5874 if (!(vcpu
->arch
.hflags
& HF_SMM_MASK
)) {
5875 /* This is a good place to trace that we are exiting SMM. */
5876 trace_kvm_enter_smm(vcpu
->vcpu_id
, vcpu
->arch
.smbase
, false);
5878 /* Process a latched INIT or SMI, if any. */
5879 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5882 kvm_mmu_reset_context(vcpu
);
5885 static void kvm_set_hflags(struct kvm_vcpu
*vcpu
, unsigned emul_flags
)
5887 unsigned changed
= vcpu
->arch
.hflags
^ emul_flags
;
5889 vcpu
->arch
.hflags
= emul_flags
;
5891 if (changed
& HF_SMM_MASK
)
5892 kvm_smm_changed(vcpu
);
5895 static int kvm_vcpu_check_hw_bp(unsigned long addr
, u32 type
, u32 dr7
,
5904 for (i
= 0; i
< 4; i
++, enable
>>= 2, rwlen
>>= 4)
5905 if ((enable
& 3) && (rwlen
& 15) == type
&& db
[i
] == addr
)
5910 static void kvm_vcpu_do_singlestep(struct kvm_vcpu
*vcpu
, int *r
)
5912 struct kvm_run
*kvm_run
= vcpu
->run
;
5914 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
) {
5915 kvm_run
->debug
.arch
.dr6
= DR6_BS
| DR6_FIXED_1
| DR6_RTM
;
5916 kvm_run
->debug
.arch
.pc
= vcpu
->arch
.singlestep_rip
;
5917 kvm_run
->debug
.arch
.exception
= DB_VECTOR
;
5918 kvm_run
->exit_reason
= KVM_EXIT_DEBUG
;
5919 *r
= EMULATE_USER_EXIT
;
5922 * "Certain debug exceptions may clear bit 0-3. The
5923 * remaining contents of the DR6 register are never
5924 * cleared by the processor".
5926 vcpu
->arch
.dr6
&= ~15;
5927 vcpu
->arch
.dr6
|= DR6_BS
| DR6_RTM
;
5928 kvm_queue_exception(vcpu
, DB_VECTOR
);
5932 int kvm_skip_emulated_instruction(struct kvm_vcpu
*vcpu
)
5934 unsigned long rflags
= kvm_x86_ops
->get_rflags(vcpu
);
5935 int r
= EMULATE_DONE
;
5937 kvm_x86_ops
->skip_emulated_instruction(vcpu
);
5940 * rflags is the old, "raw" value of the flags. The new value has
5941 * not been saved yet.
5943 * This is correct even for TF set by the guest, because "the
5944 * processor will not generate this exception after the instruction
5945 * that sets the TF flag".
5947 if (unlikely(rflags
& X86_EFLAGS_TF
))
5948 kvm_vcpu_do_singlestep(vcpu
, &r
);
5949 return r
== EMULATE_DONE
;
5951 EXPORT_SYMBOL_GPL(kvm_skip_emulated_instruction
);
5953 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu
*vcpu
, int *r
)
5955 if (unlikely(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
) &&
5956 (vcpu
->arch
.guest_debug_dr7
& DR7_BP_EN_MASK
)) {
5957 struct kvm_run
*kvm_run
= vcpu
->run
;
5958 unsigned long eip
= kvm_get_linear_rip(vcpu
);
5959 u32 dr6
= kvm_vcpu_check_hw_bp(eip
, 0,
5960 vcpu
->arch
.guest_debug_dr7
,
5964 kvm_run
->debug
.arch
.dr6
= dr6
| DR6_FIXED_1
| DR6_RTM
;
5965 kvm_run
->debug
.arch
.pc
= eip
;
5966 kvm_run
->debug
.arch
.exception
= DB_VECTOR
;
5967 kvm_run
->exit_reason
= KVM_EXIT_DEBUG
;
5968 *r
= EMULATE_USER_EXIT
;
5973 if (unlikely(vcpu
->arch
.dr7
& DR7_BP_EN_MASK
) &&
5974 !(kvm_get_rflags(vcpu
) & X86_EFLAGS_RF
)) {
5975 unsigned long eip
= kvm_get_linear_rip(vcpu
);
5976 u32 dr6
= kvm_vcpu_check_hw_bp(eip
, 0,
5981 vcpu
->arch
.dr6
&= ~15;
5982 vcpu
->arch
.dr6
|= dr6
| DR6_RTM
;
5983 kvm_queue_exception(vcpu
, DB_VECTOR
);
5992 static bool is_vmware_backdoor_opcode(struct x86_emulate_ctxt
*ctxt
)
5994 switch (ctxt
->opcode_len
) {
6001 case 0xe6: /* OUT */
6005 case 0x6c: /* INS */
6007 case 0x6e: /* OUTS */
6014 case 0x33: /* RDPMC */
6023 int x86_emulate_instruction(struct kvm_vcpu
*vcpu
,
6030 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
6031 bool writeback
= true;
6032 bool write_fault_to_spt
= vcpu
->arch
.write_fault_to_shadow_pgtable
;
6035 * Clear write_fault_to_shadow_pgtable here to ensure it is
6038 vcpu
->arch
.write_fault_to_shadow_pgtable
= false;
6039 kvm_clear_exception_queue(vcpu
);
6041 if (!(emulation_type
& EMULTYPE_NO_DECODE
)) {
6042 init_emulate_ctxt(vcpu
);
6045 * We will reenter on the same instruction since
6046 * we do not set complete_userspace_io. This does not
6047 * handle watchpoints yet, those would be handled in
6050 if (!(emulation_type
& EMULTYPE_SKIP
) &&
6051 kvm_vcpu_check_breakpoint(vcpu
, &r
))
6054 ctxt
->interruptibility
= 0;
6055 ctxt
->have_exception
= false;
6056 ctxt
->exception
.vector
= -1;
6057 ctxt
->perm_ok
= false;
6059 ctxt
->ud
= emulation_type
& EMULTYPE_TRAP_UD
;
6061 r
= x86_decode_insn(ctxt
, insn
, insn_len
);
6063 trace_kvm_emulate_insn_start(vcpu
);
6064 ++vcpu
->stat
.insn_emulation
;
6065 if (r
!= EMULATION_OK
) {
6066 if (emulation_type
& EMULTYPE_TRAP_UD
)
6067 return EMULATE_FAIL
;
6068 if (reexecute_instruction(vcpu
, cr2
, write_fault_to_spt
,
6070 return EMULATE_DONE
;
6071 if (ctxt
->have_exception
&& inject_emulated_exception(vcpu
))
6072 return EMULATE_DONE
;
6073 if (emulation_type
& EMULTYPE_SKIP
)
6074 return EMULATE_FAIL
;
6075 return handle_emulation_failure(vcpu
, emulation_type
);
6079 if ((emulation_type
& EMULTYPE_VMWARE
) &&
6080 !is_vmware_backdoor_opcode(ctxt
))
6081 return EMULATE_FAIL
;
6083 if (emulation_type
& EMULTYPE_SKIP
) {
6084 kvm_rip_write(vcpu
, ctxt
->_eip
);
6085 if (ctxt
->eflags
& X86_EFLAGS_RF
)
6086 kvm_set_rflags(vcpu
, ctxt
->eflags
& ~X86_EFLAGS_RF
);
6087 return EMULATE_DONE
;
6090 if (retry_instruction(ctxt
, cr2
, emulation_type
))
6091 return EMULATE_DONE
;
6093 /* this is needed for vmware backdoor interface to work since it
6094 changes registers values during IO operation */
6095 if (vcpu
->arch
.emulate_regs_need_sync_from_vcpu
) {
6096 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= false;
6097 emulator_invalidate_register_cache(ctxt
);
6101 /* Save the faulting GPA (cr2) in the address field */
6102 ctxt
->exception
.address
= cr2
;
6104 r
= x86_emulate_insn(ctxt
);
6106 if (r
== EMULATION_INTERCEPTED
)
6107 return EMULATE_DONE
;
6109 if (r
== EMULATION_FAILED
) {
6110 if (reexecute_instruction(vcpu
, cr2
, write_fault_to_spt
,
6112 return EMULATE_DONE
;
6114 return handle_emulation_failure(vcpu
, emulation_type
);
6117 if (ctxt
->have_exception
) {
6119 if (inject_emulated_exception(vcpu
))
6121 } else if (vcpu
->arch
.pio
.count
) {
6122 if (!vcpu
->arch
.pio
.in
) {
6123 /* FIXME: return into emulator if single-stepping. */
6124 vcpu
->arch
.pio
.count
= 0;
6127 vcpu
->arch
.complete_userspace_io
= complete_emulated_pio
;
6129 r
= EMULATE_USER_EXIT
;
6130 } else if (vcpu
->mmio_needed
) {
6131 if (!vcpu
->mmio_is_write
)
6133 r
= EMULATE_USER_EXIT
;
6134 vcpu
->arch
.complete_userspace_io
= complete_emulated_mmio
;
6135 } else if (r
== EMULATION_RESTART
)
6141 unsigned long rflags
= kvm_x86_ops
->get_rflags(vcpu
);
6142 toggle_interruptibility(vcpu
, ctxt
->interruptibility
);
6143 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
6144 kvm_rip_write(vcpu
, ctxt
->eip
);
6145 if (r
== EMULATE_DONE
&&
6146 (ctxt
->tf
|| (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)))
6147 kvm_vcpu_do_singlestep(vcpu
, &r
);
6148 if (!ctxt
->have_exception
||
6149 exception_type(ctxt
->exception
.vector
) == EXCPT_TRAP
)
6150 __kvm_set_rflags(vcpu
, ctxt
->eflags
);
6153 * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
6154 * do nothing, and it will be requested again as soon as
6155 * the shadow expires. But we still need to check here,
6156 * because POPF has no interrupt shadow.
6158 if (unlikely((ctxt
->eflags
& ~rflags
) & X86_EFLAGS_IF
))
6159 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6161 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= true;
6165 EXPORT_SYMBOL_GPL(x86_emulate_instruction
);
6167 static int kvm_fast_pio_out(struct kvm_vcpu
*vcpu
, int size
,
6168 unsigned short port
)
6170 unsigned long val
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
6171 int ret
= emulator_pio_out_emulated(&vcpu
->arch
.emulate_ctxt
,
6172 size
, port
, &val
, 1);
6173 /* do not return to emulator after return from userspace */
6174 vcpu
->arch
.pio
.count
= 0;
6178 static int complete_fast_pio_in(struct kvm_vcpu
*vcpu
)
6182 /* We should only ever be called with arch.pio.count equal to 1 */
6183 BUG_ON(vcpu
->arch
.pio
.count
!= 1);
6185 /* For size less than 4 we merge, else we zero extend */
6186 val
= (vcpu
->arch
.pio
.size
< 4) ? kvm_register_read(vcpu
, VCPU_REGS_RAX
)
6190 * Since vcpu->arch.pio.count == 1 let emulator_pio_in_emulated perform
6191 * the copy and tracing
6193 emulator_pio_in_emulated(&vcpu
->arch
.emulate_ctxt
, vcpu
->arch
.pio
.size
,
6194 vcpu
->arch
.pio
.port
, &val
, 1);
6195 kvm_register_write(vcpu
, VCPU_REGS_RAX
, val
);
6200 static int kvm_fast_pio_in(struct kvm_vcpu
*vcpu
, int size
,
6201 unsigned short port
)
6206 /* For size less than 4 we merge, else we zero extend */
6207 val
= (size
< 4) ? kvm_register_read(vcpu
, VCPU_REGS_RAX
) : 0;
6209 ret
= emulator_pio_in_emulated(&vcpu
->arch
.emulate_ctxt
, size
, port
,
6212 kvm_register_write(vcpu
, VCPU_REGS_RAX
, val
);
6216 vcpu
->arch
.complete_userspace_io
= complete_fast_pio_in
;
6221 int kvm_fast_pio(struct kvm_vcpu
*vcpu
, int size
, unsigned short port
, int in
)
6223 int ret
= kvm_skip_emulated_instruction(vcpu
);
6226 * TODO: we might be squashing a KVM_GUESTDBG_SINGLESTEP-triggered
6227 * KVM_EXIT_DEBUG here.
6230 return kvm_fast_pio_in(vcpu
, size
, port
) && ret
;
6232 return kvm_fast_pio_out(vcpu
, size
, port
) && ret
;
6234 EXPORT_SYMBOL_GPL(kvm_fast_pio
);
6236 static int kvmclock_cpu_down_prep(unsigned int cpu
)
6238 __this_cpu_write(cpu_tsc_khz
, 0);
6242 static void tsc_khz_changed(void *data
)
6244 struct cpufreq_freqs
*freq
= data
;
6245 unsigned long khz
= 0;
6249 else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
6250 khz
= cpufreq_quick_get(raw_smp_processor_id());
6253 __this_cpu_write(cpu_tsc_khz
, khz
);
6256 #ifdef CONFIG_X86_64
6257 static void kvm_hyperv_tsc_notifier(void)
6260 struct kvm_vcpu
*vcpu
;
6263 spin_lock(&kvm_lock
);
6264 list_for_each_entry(kvm
, &vm_list
, vm_list
)
6265 kvm_make_mclock_inprogress_request(kvm
);
6267 hyperv_stop_tsc_emulation();
6269 /* TSC frequency always matches when on Hyper-V */
6270 for_each_present_cpu(cpu
)
6271 per_cpu(cpu_tsc_khz
, cpu
) = tsc_khz
;
6272 kvm_max_guest_tsc_khz
= tsc_khz
;
6274 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
6275 struct kvm_arch
*ka
= &kvm
->arch
;
6277 spin_lock(&ka
->pvclock_gtod_sync_lock
);
6279 pvclock_update_vm_gtod_copy(kvm
);
6281 kvm_for_each_vcpu(cpu
, vcpu
, kvm
)
6282 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
6284 kvm_for_each_vcpu(cpu
, vcpu
, kvm
)
6285 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS
, vcpu
);
6287 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
6289 spin_unlock(&kvm_lock
);
6293 static int kvmclock_cpufreq_notifier(struct notifier_block
*nb
, unsigned long val
,
6296 struct cpufreq_freqs
*freq
= data
;
6298 struct kvm_vcpu
*vcpu
;
6299 int i
, send_ipi
= 0;
6302 * We allow guests to temporarily run on slowing clocks,
6303 * provided we notify them after, or to run on accelerating
6304 * clocks, provided we notify them before. Thus time never
6307 * However, we have a problem. We can't atomically update
6308 * the frequency of a given CPU from this function; it is
6309 * merely a notifier, which can be called from any CPU.
6310 * Changing the TSC frequency at arbitrary points in time
6311 * requires a recomputation of local variables related to
6312 * the TSC for each VCPU. We must flag these local variables
6313 * to be updated and be sure the update takes place with the
6314 * new frequency before any guests proceed.
6316 * Unfortunately, the combination of hotplug CPU and frequency
6317 * change creates an intractable locking scenario; the order
6318 * of when these callouts happen is undefined with respect to
6319 * CPU hotplug, and they can race with each other. As such,
6320 * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
6321 * undefined; you can actually have a CPU frequency change take
6322 * place in between the computation of X and the setting of the
6323 * variable. To protect against this problem, all updates of
6324 * the per_cpu tsc_khz variable are done in an interrupt
6325 * protected IPI, and all callers wishing to update the value
6326 * must wait for a synchronous IPI to complete (which is trivial
6327 * if the caller is on the CPU already). This establishes the
6328 * necessary total order on variable updates.
6330 * Note that because a guest time update may take place
6331 * anytime after the setting of the VCPU's request bit, the
6332 * correct TSC value must be set before the request. However,
6333 * to ensure the update actually makes it to any guest which
6334 * starts running in hardware virtualization between the set
6335 * and the acquisition of the spinlock, we must also ping the
6336 * CPU after setting the request bit.
6340 if (val
== CPUFREQ_PRECHANGE
&& freq
->old
> freq
->new)
6342 if (val
== CPUFREQ_POSTCHANGE
&& freq
->old
< freq
->new)
6345 smp_call_function_single(freq
->cpu
, tsc_khz_changed
, freq
, 1);
6347 spin_lock(&kvm_lock
);
6348 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
6349 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
6350 if (vcpu
->cpu
!= freq
->cpu
)
6352 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
6353 if (vcpu
->cpu
!= smp_processor_id())
6357 spin_unlock(&kvm_lock
);
6359 if (freq
->old
< freq
->new && send_ipi
) {
6361 * We upscale the frequency. Must make the guest
6362 * doesn't see old kvmclock values while running with
6363 * the new frequency, otherwise we risk the guest sees
6364 * time go backwards.
6366 * In case we update the frequency for another cpu
6367 * (which might be in guest context) send an interrupt
6368 * to kick the cpu out of guest context. Next time
6369 * guest context is entered kvmclock will be updated,
6370 * so the guest will not see stale values.
6372 smp_call_function_single(freq
->cpu
, tsc_khz_changed
, freq
, 1);
6377 static struct notifier_block kvmclock_cpufreq_notifier_block
= {
6378 .notifier_call
= kvmclock_cpufreq_notifier
6381 static int kvmclock_cpu_online(unsigned int cpu
)
6383 tsc_khz_changed(NULL
);
6387 static void kvm_timer_init(void)
6389 max_tsc_khz
= tsc_khz
;
6391 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
)) {
6392 #ifdef CONFIG_CPU_FREQ
6393 struct cpufreq_policy policy
;
6396 memset(&policy
, 0, sizeof(policy
));
6398 cpufreq_get_policy(&policy
, cpu
);
6399 if (policy
.cpuinfo
.max_freq
)
6400 max_tsc_khz
= policy
.cpuinfo
.max_freq
;
6403 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block
,
6404 CPUFREQ_TRANSITION_NOTIFIER
);
6406 pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz
);
6408 cpuhp_setup_state(CPUHP_AP_X86_KVM_CLK_ONLINE
, "x86/kvm/clk:online",
6409 kvmclock_cpu_online
, kvmclock_cpu_down_prep
);
6412 DEFINE_PER_CPU(struct kvm_vcpu
*, current_vcpu
);
6413 EXPORT_PER_CPU_SYMBOL_GPL(current_vcpu
);
6415 int kvm_is_in_guest(void)
6417 return __this_cpu_read(current_vcpu
) != NULL
;
6420 static int kvm_is_user_mode(void)
6424 if (__this_cpu_read(current_vcpu
))
6425 user_mode
= kvm_x86_ops
->get_cpl(__this_cpu_read(current_vcpu
));
6427 return user_mode
!= 0;
6430 static unsigned long kvm_get_guest_ip(void)
6432 unsigned long ip
= 0;
6434 if (__this_cpu_read(current_vcpu
))
6435 ip
= kvm_rip_read(__this_cpu_read(current_vcpu
));
6440 static struct perf_guest_info_callbacks kvm_guest_cbs
= {
6441 .is_in_guest
= kvm_is_in_guest
,
6442 .is_user_mode
= kvm_is_user_mode
,
6443 .get_guest_ip
= kvm_get_guest_ip
,
6446 static void kvm_set_mmio_spte_mask(void)
6449 int maxphyaddr
= boot_cpu_data
.x86_phys_bits
;
6452 * Set the reserved bits and the present bit of an paging-structure
6453 * entry to generate page fault with PFER.RSV = 1.
6455 /* Mask the reserved physical address bits. */
6456 mask
= rsvd_bits(maxphyaddr
, 51);
6458 /* Set the present bit. */
6461 #ifdef CONFIG_X86_64
6463 * If reserved bit is not supported, clear the present bit to disable
6466 if (maxphyaddr
== 52)
6470 kvm_mmu_set_mmio_spte_mask(mask
, mask
);
6473 #ifdef CONFIG_X86_64
6474 static void pvclock_gtod_update_fn(struct work_struct
*work
)
6478 struct kvm_vcpu
*vcpu
;
6481 spin_lock(&kvm_lock
);
6482 list_for_each_entry(kvm
, &vm_list
, vm_list
)
6483 kvm_for_each_vcpu(i
, vcpu
, kvm
)
6484 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
6485 atomic_set(&kvm_guest_has_master_clock
, 0);
6486 spin_unlock(&kvm_lock
);
6489 static DECLARE_WORK(pvclock_gtod_work
, pvclock_gtod_update_fn
);
6492 * Notification about pvclock gtod data update.
6494 static int pvclock_gtod_notify(struct notifier_block
*nb
, unsigned long unused
,
6497 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
6498 struct timekeeper
*tk
= priv
;
6500 update_pvclock_gtod(tk
);
6502 /* disable master clock if host does not trust, or does not
6503 * use, TSC based clocksource.
6505 if (!gtod_is_based_on_tsc(gtod
->clock
.vclock_mode
) &&
6506 atomic_read(&kvm_guest_has_master_clock
) != 0)
6507 queue_work(system_long_wq
, &pvclock_gtod_work
);
6512 static struct notifier_block pvclock_gtod_notifier
= {
6513 .notifier_call
= pvclock_gtod_notify
,
6517 int kvm_arch_init(void *opaque
)
6520 struct kvm_x86_ops
*ops
= opaque
;
6523 printk(KERN_ERR
"kvm: already loaded the other module\n");
6528 if (!ops
->cpu_has_kvm_support()) {
6529 printk(KERN_ERR
"kvm: no hardware support\n");
6533 if (ops
->disabled_by_bios()) {
6534 printk(KERN_ERR
"kvm: disabled by bios\n");
6540 shared_msrs
= alloc_percpu(struct kvm_shared_msrs
);
6542 printk(KERN_ERR
"kvm: failed to allocate percpu kvm_shared_msrs\n");
6546 r
= kvm_mmu_module_init();
6548 goto out_free_percpu
;
6550 kvm_set_mmio_spte_mask();
6554 kvm_mmu_set_mask_ptes(PT_USER_MASK
, PT_ACCESSED_MASK
,
6555 PT_DIRTY_MASK
, PT64_NX_MASK
, 0,
6556 PT_PRESENT_MASK
, 0, sme_me_mask
);
6559 perf_register_guest_info_callbacks(&kvm_guest_cbs
);
6561 if (boot_cpu_has(X86_FEATURE_XSAVE
))
6562 host_xcr0
= xgetbv(XCR_XFEATURE_ENABLED_MASK
);
6565 #ifdef CONFIG_X86_64
6566 pvclock_gtod_register_notifier(&pvclock_gtod_notifier
);
6568 if (hypervisor_is_type(X86_HYPER_MS_HYPERV
))
6569 set_hv_tscchange_cb(kvm_hyperv_tsc_notifier
);
6575 free_percpu(shared_msrs
);
6580 void kvm_arch_exit(void)
6582 #ifdef CONFIG_X86_64
6583 if (hypervisor_is_type(X86_HYPER_MS_HYPERV
))
6584 clear_hv_tscchange_cb();
6587 perf_unregister_guest_info_callbacks(&kvm_guest_cbs
);
6589 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
6590 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block
,
6591 CPUFREQ_TRANSITION_NOTIFIER
);
6592 cpuhp_remove_state_nocalls(CPUHP_AP_X86_KVM_CLK_ONLINE
);
6593 #ifdef CONFIG_X86_64
6594 pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier
);
6597 kvm_mmu_module_exit();
6598 free_percpu(shared_msrs
);
6601 int kvm_vcpu_halt(struct kvm_vcpu
*vcpu
)
6603 ++vcpu
->stat
.halt_exits
;
6604 if (lapic_in_kernel(vcpu
)) {
6605 vcpu
->arch
.mp_state
= KVM_MP_STATE_HALTED
;
6608 vcpu
->run
->exit_reason
= KVM_EXIT_HLT
;
6612 EXPORT_SYMBOL_GPL(kvm_vcpu_halt
);
6614 int kvm_emulate_halt(struct kvm_vcpu
*vcpu
)
6616 int ret
= kvm_skip_emulated_instruction(vcpu
);
6618 * TODO: we might be squashing a GUESTDBG_SINGLESTEP-triggered
6619 * KVM_EXIT_DEBUG here.
6621 return kvm_vcpu_halt(vcpu
) && ret
;
6623 EXPORT_SYMBOL_GPL(kvm_emulate_halt
);
6625 #ifdef CONFIG_X86_64
6626 static int kvm_pv_clock_pairing(struct kvm_vcpu
*vcpu
, gpa_t paddr
,
6627 unsigned long clock_type
)
6629 struct kvm_clock_pairing clock_pairing
;
6630 struct timespec64 ts
;
6634 if (clock_type
!= KVM_CLOCK_PAIRING_WALLCLOCK
)
6635 return -KVM_EOPNOTSUPP
;
6637 if (kvm_get_walltime_and_clockread(&ts
, &cycle
) == false)
6638 return -KVM_EOPNOTSUPP
;
6640 clock_pairing
.sec
= ts
.tv_sec
;
6641 clock_pairing
.nsec
= ts
.tv_nsec
;
6642 clock_pairing
.tsc
= kvm_read_l1_tsc(vcpu
, cycle
);
6643 clock_pairing
.flags
= 0;
6646 if (kvm_write_guest(vcpu
->kvm
, paddr
, &clock_pairing
,
6647 sizeof(struct kvm_clock_pairing
)))
6655 * kvm_pv_kick_cpu_op: Kick a vcpu.
6657 * @apicid - apicid of vcpu to be kicked.
6659 static void kvm_pv_kick_cpu_op(struct kvm
*kvm
, unsigned long flags
, int apicid
)
6661 struct kvm_lapic_irq lapic_irq
;
6663 lapic_irq
.shorthand
= 0;
6664 lapic_irq
.dest_mode
= 0;
6665 lapic_irq
.level
= 0;
6666 lapic_irq
.dest_id
= apicid
;
6667 lapic_irq
.msi_redir_hint
= false;
6669 lapic_irq
.delivery_mode
= APIC_DM_REMRD
;
6670 kvm_irq_delivery_to_apic(kvm
, NULL
, &lapic_irq
, NULL
);
6673 void kvm_vcpu_deactivate_apicv(struct kvm_vcpu
*vcpu
)
6675 vcpu
->arch
.apicv_active
= false;
6676 kvm_x86_ops
->refresh_apicv_exec_ctrl(vcpu
);
6679 int kvm_emulate_hypercall(struct kvm_vcpu
*vcpu
)
6681 unsigned long nr
, a0
, a1
, a2
, a3
, ret
;
6684 if (kvm_hv_hypercall_enabled(vcpu
->kvm
)) {
6685 if (!kvm_hv_hypercall(vcpu
))
6690 nr
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
6691 a0
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
6692 a1
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
6693 a2
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
6694 a3
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
6696 trace_kvm_hypercall(nr
, a0
, a1
, a2
, a3
);
6698 op_64_bit
= is_64_bit_mode(vcpu
);
6707 if (kvm_x86_ops
->get_cpl(vcpu
) != 0) {
6713 case KVM_HC_VAPIC_POLL_IRQ
:
6716 case KVM_HC_KICK_CPU
:
6717 kvm_pv_kick_cpu_op(vcpu
->kvm
, a0
, a1
);
6720 #ifdef CONFIG_X86_64
6721 case KVM_HC_CLOCK_PAIRING
:
6722 ret
= kvm_pv_clock_pairing(vcpu
, a0
, a1
);
6732 kvm_register_write(vcpu
, VCPU_REGS_RAX
, ret
);
6735 ++vcpu
->stat
.hypercalls
;
6736 return kvm_skip_emulated_instruction(vcpu
);
6738 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall
);
6740 static int emulator_fix_hypercall(struct x86_emulate_ctxt
*ctxt
)
6742 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
6743 char instruction
[3];
6744 unsigned long rip
= kvm_rip_read(vcpu
);
6746 kvm_x86_ops
->patch_hypercall(vcpu
, instruction
);
6748 return emulator_write_emulated(ctxt
, rip
, instruction
, 3,
6752 static int dm_request_for_irq_injection(struct kvm_vcpu
*vcpu
)
6754 return vcpu
->run
->request_interrupt_window
&&
6755 likely(!pic_in_kernel(vcpu
->kvm
));
6758 static void post_kvm_run_save(struct kvm_vcpu
*vcpu
)
6760 struct kvm_run
*kvm_run
= vcpu
->run
;
6762 kvm_run
->if_flag
= (kvm_get_rflags(vcpu
) & X86_EFLAGS_IF
) != 0;
6763 kvm_run
->flags
= is_smm(vcpu
) ? KVM_RUN_X86_SMM
: 0;
6764 kvm_run
->cr8
= kvm_get_cr8(vcpu
);
6765 kvm_run
->apic_base
= kvm_get_apic_base(vcpu
);
6766 kvm_run
->ready_for_interrupt_injection
=
6767 pic_in_kernel(vcpu
->kvm
) ||
6768 kvm_vcpu_ready_for_interrupt_injection(vcpu
);
6771 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
)
6775 if (!kvm_x86_ops
->update_cr8_intercept
)
6778 if (!lapic_in_kernel(vcpu
))
6781 if (vcpu
->arch
.apicv_active
)
6784 if (!vcpu
->arch
.apic
->vapic_addr
)
6785 max_irr
= kvm_lapic_find_highest_irr(vcpu
);
6792 tpr
= kvm_lapic_get_cr8(vcpu
);
6794 kvm_x86_ops
->update_cr8_intercept(vcpu
, tpr
, max_irr
);
6797 static int inject_pending_event(struct kvm_vcpu
*vcpu
, bool req_int_win
)
6801 /* try to reinject previous events if any */
6803 if (vcpu
->arch
.exception
.injected
)
6804 kvm_x86_ops
->queue_exception(vcpu
);
6806 * Do not inject an NMI or interrupt if there is a pending
6807 * exception. Exceptions and interrupts are recognized at
6808 * instruction boundaries, i.e. the start of an instruction.
6809 * Trap-like exceptions, e.g. #DB, have higher priority than
6810 * NMIs and interrupts, i.e. traps are recognized before an
6811 * NMI/interrupt that's pending on the same instruction.
6812 * Fault-like exceptions, e.g. #GP and #PF, are the lowest
6813 * priority, but are only generated (pended) during instruction
6814 * execution, i.e. a pending fault-like exception means the
6815 * fault occurred on the *previous* instruction and must be
6816 * serviced prior to recognizing any new events in order to
6817 * fully complete the previous instruction.
6819 else if (!vcpu
->arch
.exception
.pending
) {
6820 if (vcpu
->arch
.nmi_injected
)
6821 kvm_x86_ops
->set_nmi(vcpu
);
6822 else if (vcpu
->arch
.interrupt
.injected
)
6823 kvm_x86_ops
->set_irq(vcpu
);
6827 * Call check_nested_events() even if we reinjected a previous event
6828 * in order for caller to determine if it should require immediate-exit
6829 * from L2 to L1 due to pending L1 events which require exit
6832 if (is_guest_mode(vcpu
) && kvm_x86_ops
->check_nested_events
) {
6833 r
= kvm_x86_ops
->check_nested_events(vcpu
, req_int_win
);
6838 /* try to inject new event if pending */
6839 if (vcpu
->arch
.exception
.pending
) {
6840 trace_kvm_inj_exception(vcpu
->arch
.exception
.nr
,
6841 vcpu
->arch
.exception
.has_error_code
,
6842 vcpu
->arch
.exception
.error_code
);
6844 WARN_ON_ONCE(vcpu
->arch
.exception
.injected
);
6845 vcpu
->arch
.exception
.pending
= false;
6846 vcpu
->arch
.exception
.injected
= true;
6848 if (exception_type(vcpu
->arch
.exception
.nr
) == EXCPT_FAULT
)
6849 __kvm_set_rflags(vcpu
, kvm_get_rflags(vcpu
) |
6852 if (vcpu
->arch
.exception
.nr
== DB_VECTOR
&&
6853 (vcpu
->arch
.dr7
& DR7_GD
)) {
6854 vcpu
->arch
.dr7
&= ~DR7_GD
;
6855 kvm_update_dr7(vcpu
);
6858 kvm_x86_ops
->queue_exception(vcpu
);
6861 /* Don't consider new event if we re-injected an event */
6862 if (kvm_event_needs_reinjection(vcpu
))
6865 if (vcpu
->arch
.smi_pending
&& !is_smm(vcpu
) &&
6866 kvm_x86_ops
->smi_allowed(vcpu
)) {
6867 vcpu
->arch
.smi_pending
= false;
6868 ++vcpu
->arch
.smi_count
;
6870 } else if (vcpu
->arch
.nmi_pending
&& kvm_x86_ops
->nmi_allowed(vcpu
)) {
6871 --vcpu
->arch
.nmi_pending
;
6872 vcpu
->arch
.nmi_injected
= true;
6873 kvm_x86_ops
->set_nmi(vcpu
);
6874 } else if (kvm_cpu_has_injectable_intr(vcpu
)) {
6876 * Because interrupts can be injected asynchronously, we are
6877 * calling check_nested_events again here to avoid a race condition.
6878 * See https://lkml.org/lkml/2014/7/2/60 for discussion about this
6879 * proposal and current concerns. Perhaps we should be setting
6880 * KVM_REQ_EVENT only on certain events and not unconditionally?
6882 if (is_guest_mode(vcpu
) && kvm_x86_ops
->check_nested_events
) {
6883 r
= kvm_x86_ops
->check_nested_events(vcpu
, req_int_win
);
6887 if (kvm_x86_ops
->interrupt_allowed(vcpu
)) {
6888 kvm_queue_interrupt(vcpu
, kvm_cpu_get_interrupt(vcpu
),
6890 kvm_x86_ops
->set_irq(vcpu
);
6897 static void process_nmi(struct kvm_vcpu
*vcpu
)
6902 * x86 is limited to one NMI running, and one NMI pending after it.
6903 * If an NMI is already in progress, limit further NMIs to just one.
6904 * Otherwise, allow two (and we'll inject the first one immediately).
6906 if (kvm_x86_ops
->get_nmi_mask(vcpu
) || vcpu
->arch
.nmi_injected
)
6909 vcpu
->arch
.nmi_pending
+= atomic_xchg(&vcpu
->arch
.nmi_queued
, 0);
6910 vcpu
->arch
.nmi_pending
= min(vcpu
->arch
.nmi_pending
, limit
);
6911 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6914 static u32
enter_smm_get_segment_flags(struct kvm_segment
*seg
)
6917 flags
|= seg
->g
<< 23;
6918 flags
|= seg
->db
<< 22;
6919 flags
|= seg
->l
<< 21;
6920 flags
|= seg
->avl
<< 20;
6921 flags
|= seg
->present
<< 15;
6922 flags
|= seg
->dpl
<< 13;
6923 flags
|= seg
->s
<< 12;
6924 flags
|= seg
->type
<< 8;
6928 static void enter_smm_save_seg_32(struct kvm_vcpu
*vcpu
, char *buf
, int n
)
6930 struct kvm_segment seg
;
6933 kvm_get_segment(vcpu
, &seg
, n
);
6934 put_smstate(u32
, buf
, 0x7fa8 + n
* 4, seg
.selector
);
6937 offset
= 0x7f84 + n
* 12;
6939 offset
= 0x7f2c + (n
- 3) * 12;
6941 put_smstate(u32
, buf
, offset
+ 8, seg
.base
);
6942 put_smstate(u32
, buf
, offset
+ 4, seg
.limit
);
6943 put_smstate(u32
, buf
, offset
, enter_smm_get_segment_flags(&seg
));
6946 #ifdef CONFIG_X86_64
6947 static void enter_smm_save_seg_64(struct kvm_vcpu
*vcpu
, char *buf
, int n
)
6949 struct kvm_segment seg
;
6953 kvm_get_segment(vcpu
, &seg
, n
);
6954 offset
= 0x7e00 + n
* 16;
6956 flags
= enter_smm_get_segment_flags(&seg
) >> 8;
6957 put_smstate(u16
, buf
, offset
, seg
.selector
);
6958 put_smstate(u16
, buf
, offset
+ 2, flags
);
6959 put_smstate(u32
, buf
, offset
+ 4, seg
.limit
);
6960 put_smstate(u64
, buf
, offset
+ 8, seg
.base
);
6964 static void enter_smm_save_state_32(struct kvm_vcpu
*vcpu
, char *buf
)
6967 struct kvm_segment seg
;
6971 put_smstate(u32
, buf
, 0x7ffc, kvm_read_cr0(vcpu
));
6972 put_smstate(u32
, buf
, 0x7ff8, kvm_read_cr3(vcpu
));
6973 put_smstate(u32
, buf
, 0x7ff4, kvm_get_rflags(vcpu
));
6974 put_smstate(u32
, buf
, 0x7ff0, kvm_rip_read(vcpu
));
6976 for (i
= 0; i
< 8; i
++)
6977 put_smstate(u32
, buf
, 0x7fd0 + i
* 4, kvm_register_read(vcpu
, i
));
6979 kvm_get_dr(vcpu
, 6, &val
);
6980 put_smstate(u32
, buf
, 0x7fcc, (u32
)val
);
6981 kvm_get_dr(vcpu
, 7, &val
);
6982 put_smstate(u32
, buf
, 0x7fc8, (u32
)val
);
6984 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_TR
);
6985 put_smstate(u32
, buf
, 0x7fc4, seg
.selector
);
6986 put_smstate(u32
, buf
, 0x7f64, seg
.base
);
6987 put_smstate(u32
, buf
, 0x7f60, seg
.limit
);
6988 put_smstate(u32
, buf
, 0x7f5c, enter_smm_get_segment_flags(&seg
));
6990 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_LDTR
);
6991 put_smstate(u32
, buf
, 0x7fc0, seg
.selector
);
6992 put_smstate(u32
, buf
, 0x7f80, seg
.base
);
6993 put_smstate(u32
, buf
, 0x7f7c, seg
.limit
);
6994 put_smstate(u32
, buf
, 0x7f78, enter_smm_get_segment_flags(&seg
));
6996 kvm_x86_ops
->get_gdt(vcpu
, &dt
);
6997 put_smstate(u32
, buf
, 0x7f74, dt
.address
);
6998 put_smstate(u32
, buf
, 0x7f70, dt
.size
);
7000 kvm_x86_ops
->get_idt(vcpu
, &dt
);
7001 put_smstate(u32
, buf
, 0x7f58, dt
.address
);
7002 put_smstate(u32
, buf
, 0x7f54, dt
.size
);
7004 for (i
= 0; i
< 6; i
++)
7005 enter_smm_save_seg_32(vcpu
, buf
, i
);
7007 put_smstate(u32
, buf
, 0x7f14, kvm_read_cr4(vcpu
));
7010 put_smstate(u32
, buf
, 0x7efc, 0x00020000);
7011 put_smstate(u32
, buf
, 0x7ef8, vcpu
->arch
.smbase
);
7014 static void enter_smm_save_state_64(struct kvm_vcpu
*vcpu
, char *buf
)
7016 #ifdef CONFIG_X86_64
7018 struct kvm_segment seg
;
7022 for (i
= 0; i
< 16; i
++)
7023 put_smstate(u64
, buf
, 0x7ff8 - i
* 8, kvm_register_read(vcpu
, i
));
7025 put_smstate(u64
, buf
, 0x7f78, kvm_rip_read(vcpu
));
7026 put_smstate(u32
, buf
, 0x7f70, kvm_get_rflags(vcpu
));
7028 kvm_get_dr(vcpu
, 6, &val
);
7029 put_smstate(u64
, buf
, 0x7f68, val
);
7030 kvm_get_dr(vcpu
, 7, &val
);
7031 put_smstate(u64
, buf
, 0x7f60, val
);
7033 put_smstate(u64
, buf
, 0x7f58, kvm_read_cr0(vcpu
));
7034 put_smstate(u64
, buf
, 0x7f50, kvm_read_cr3(vcpu
));
7035 put_smstate(u64
, buf
, 0x7f48, kvm_read_cr4(vcpu
));
7037 put_smstate(u32
, buf
, 0x7f00, vcpu
->arch
.smbase
);
7040 put_smstate(u32
, buf
, 0x7efc, 0x00020064);
7042 put_smstate(u64
, buf
, 0x7ed0, vcpu
->arch
.efer
);
7044 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_TR
);
7045 put_smstate(u16
, buf
, 0x7e90, seg
.selector
);
7046 put_smstate(u16
, buf
, 0x7e92, enter_smm_get_segment_flags(&seg
) >> 8);
7047 put_smstate(u32
, buf
, 0x7e94, seg
.limit
);
7048 put_smstate(u64
, buf
, 0x7e98, seg
.base
);
7050 kvm_x86_ops
->get_idt(vcpu
, &dt
);
7051 put_smstate(u32
, buf
, 0x7e84, dt
.size
);
7052 put_smstate(u64
, buf
, 0x7e88, dt
.address
);
7054 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_LDTR
);
7055 put_smstate(u16
, buf
, 0x7e70, seg
.selector
);
7056 put_smstate(u16
, buf
, 0x7e72, enter_smm_get_segment_flags(&seg
) >> 8);
7057 put_smstate(u32
, buf
, 0x7e74, seg
.limit
);
7058 put_smstate(u64
, buf
, 0x7e78, seg
.base
);
7060 kvm_x86_ops
->get_gdt(vcpu
, &dt
);
7061 put_smstate(u32
, buf
, 0x7e64, dt
.size
);
7062 put_smstate(u64
, buf
, 0x7e68, dt
.address
);
7064 for (i
= 0; i
< 6; i
++)
7065 enter_smm_save_seg_64(vcpu
, buf
, i
);
7071 static void enter_smm(struct kvm_vcpu
*vcpu
)
7073 struct kvm_segment cs
, ds
;
7078 trace_kvm_enter_smm(vcpu
->vcpu_id
, vcpu
->arch
.smbase
, true);
7079 memset(buf
, 0, 512);
7080 if (guest_cpuid_has(vcpu
, X86_FEATURE_LM
))
7081 enter_smm_save_state_64(vcpu
, buf
);
7083 enter_smm_save_state_32(vcpu
, buf
);
7086 * Give pre_enter_smm() a chance to make ISA-specific changes to the
7087 * vCPU state (e.g. leave guest mode) after we've saved the state into
7088 * the SMM state-save area.
7090 kvm_x86_ops
->pre_enter_smm(vcpu
, buf
);
7092 vcpu
->arch
.hflags
|= HF_SMM_MASK
;
7093 kvm_vcpu_write_guest(vcpu
, vcpu
->arch
.smbase
+ 0xfe00, buf
, sizeof(buf
));
7095 if (kvm_x86_ops
->get_nmi_mask(vcpu
))
7096 vcpu
->arch
.hflags
|= HF_SMM_INSIDE_NMI_MASK
;
7098 kvm_x86_ops
->set_nmi_mask(vcpu
, true);
7100 kvm_set_rflags(vcpu
, X86_EFLAGS_FIXED
);
7101 kvm_rip_write(vcpu
, 0x8000);
7103 cr0
= vcpu
->arch
.cr0
& ~(X86_CR0_PE
| X86_CR0_EM
| X86_CR0_TS
| X86_CR0_PG
);
7104 kvm_x86_ops
->set_cr0(vcpu
, cr0
);
7105 vcpu
->arch
.cr0
= cr0
;
7107 kvm_x86_ops
->set_cr4(vcpu
, 0);
7109 /* Undocumented: IDT limit is set to zero on entry to SMM. */
7110 dt
.address
= dt
.size
= 0;
7111 kvm_x86_ops
->set_idt(vcpu
, &dt
);
7113 __kvm_set_dr(vcpu
, 7, DR7_FIXED_1
);
7115 cs
.selector
= (vcpu
->arch
.smbase
>> 4) & 0xffff;
7116 cs
.base
= vcpu
->arch
.smbase
;
7121 cs
.limit
= ds
.limit
= 0xffffffff;
7122 cs
.type
= ds
.type
= 0x3;
7123 cs
.dpl
= ds
.dpl
= 0;
7128 cs
.avl
= ds
.avl
= 0;
7129 cs
.present
= ds
.present
= 1;
7130 cs
.unusable
= ds
.unusable
= 0;
7131 cs
.padding
= ds
.padding
= 0;
7133 kvm_set_segment(vcpu
, &cs
, VCPU_SREG_CS
);
7134 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_DS
);
7135 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_ES
);
7136 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_FS
);
7137 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_GS
);
7138 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_SS
);
7140 if (guest_cpuid_has(vcpu
, X86_FEATURE_LM
))
7141 kvm_x86_ops
->set_efer(vcpu
, 0);
7143 kvm_update_cpuid(vcpu
);
7144 kvm_mmu_reset_context(vcpu
);
7147 static void process_smi(struct kvm_vcpu
*vcpu
)
7149 vcpu
->arch
.smi_pending
= true;
7150 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7153 void kvm_make_scan_ioapic_request(struct kvm
*kvm
)
7155 kvm_make_all_cpus_request(kvm
, KVM_REQ_SCAN_IOAPIC
);
7158 static void vcpu_scan_ioapic(struct kvm_vcpu
*vcpu
)
7160 if (!kvm_apic_hw_enabled(vcpu
->arch
.apic
))
7163 bitmap_zero(vcpu
->arch
.ioapic_handled_vectors
, 256);
7165 if (irqchip_split(vcpu
->kvm
))
7166 kvm_scan_ioapic_routes(vcpu
, vcpu
->arch
.ioapic_handled_vectors
);
7168 if (vcpu
->arch
.apicv_active
)
7169 kvm_x86_ops
->sync_pir_to_irr(vcpu
);
7170 kvm_ioapic_scan_entry(vcpu
, vcpu
->arch
.ioapic_handled_vectors
);
7173 if (is_guest_mode(vcpu
))
7174 vcpu
->arch
.load_eoi_exitmap_pending
= true;
7176 kvm_make_request(KVM_REQ_LOAD_EOI_EXITMAP
, vcpu
);
7179 static void vcpu_load_eoi_exitmap(struct kvm_vcpu
*vcpu
)
7181 u64 eoi_exit_bitmap
[4];
7183 if (!kvm_apic_hw_enabled(vcpu
->arch
.apic
))
7186 bitmap_or((ulong
*)eoi_exit_bitmap
, vcpu
->arch
.ioapic_handled_vectors
,
7187 vcpu_to_synic(vcpu
)->vec_bitmap
, 256);
7188 kvm_x86_ops
->load_eoi_exitmap(vcpu
, eoi_exit_bitmap
);
7191 void kvm_arch_mmu_notifier_invalidate_range(struct kvm
*kvm
,
7192 unsigned long start
, unsigned long end
)
7194 unsigned long apic_address
;
7197 * The physical address of apic access page is stored in the VMCS.
7198 * Update it when it becomes invalid.
7200 apic_address
= gfn_to_hva(kvm
, APIC_DEFAULT_PHYS_BASE
>> PAGE_SHIFT
);
7201 if (start
<= apic_address
&& apic_address
< end
)
7202 kvm_make_all_cpus_request(kvm
, KVM_REQ_APIC_PAGE_RELOAD
);
7205 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu
*vcpu
)
7207 struct page
*page
= NULL
;
7209 if (!lapic_in_kernel(vcpu
))
7212 if (!kvm_x86_ops
->set_apic_access_page_addr
)
7215 page
= gfn_to_page(vcpu
->kvm
, APIC_DEFAULT_PHYS_BASE
>> PAGE_SHIFT
);
7216 if (is_error_page(page
))
7218 kvm_x86_ops
->set_apic_access_page_addr(vcpu
, page_to_phys(page
));
7221 * Do not pin apic access page in memory, the MMU notifier
7222 * will call us again if it is migrated or swapped out.
7226 EXPORT_SYMBOL_GPL(kvm_vcpu_reload_apic_access_page
);
7229 * Returns 1 to let vcpu_run() continue the guest execution loop without
7230 * exiting to the userspace. Otherwise, the value will be returned to the
7233 static int vcpu_enter_guest(struct kvm_vcpu
*vcpu
)
7237 dm_request_for_irq_injection(vcpu
) &&
7238 kvm_cpu_accept_dm_intr(vcpu
);
7240 bool req_immediate_exit
= false;
7242 if (kvm_request_pending(vcpu
)) {
7243 if (kvm_check_request(KVM_REQ_MMU_RELOAD
, vcpu
))
7244 kvm_mmu_unload(vcpu
);
7245 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER
, vcpu
))
7246 __kvm_migrate_timers(vcpu
);
7247 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
))
7248 kvm_gen_update_masterclock(vcpu
->kvm
);
7249 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
))
7250 kvm_gen_kvmclock_update(vcpu
);
7251 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE
, vcpu
)) {
7252 r
= kvm_guest_time_update(vcpu
);
7256 if (kvm_check_request(KVM_REQ_MMU_SYNC
, vcpu
))
7257 kvm_mmu_sync_roots(vcpu
);
7258 if (kvm_check_request(KVM_REQ_TLB_FLUSH
, vcpu
))
7259 kvm_vcpu_flush_tlb(vcpu
, true);
7260 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS
, vcpu
)) {
7261 vcpu
->run
->exit_reason
= KVM_EXIT_TPR_ACCESS
;
7265 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT
, vcpu
)) {
7266 vcpu
->run
->exit_reason
= KVM_EXIT_SHUTDOWN
;
7267 vcpu
->mmio_needed
= 0;
7271 if (kvm_check_request(KVM_REQ_APF_HALT
, vcpu
)) {
7272 /* Page is swapped out. Do synthetic halt */
7273 vcpu
->arch
.apf
.halted
= true;
7277 if (kvm_check_request(KVM_REQ_STEAL_UPDATE
, vcpu
))
7278 record_steal_time(vcpu
);
7279 if (kvm_check_request(KVM_REQ_SMI
, vcpu
))
7281 if (kvm_check_request(KVM_REQ_NMI
, vcpu
))
7283 if (kvm_check_request(KVM_REQ_PMU
, vcpu
))
7284 kvm_pmu_handle_event(vcpu
);
7285 if (kvm_check_request(KVM_REQ_PMI
, vcpu
))
7286 kvm_pmu_deliver_pmi(vcpu
);
7287 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT
, vcpu
)) {
7288 BUG_ON(vcpu
->arch
.pending_ioapic_eoi
> 255);
7289 if (test_bit(vcpu
->arch
.pending_ioapic_eoi
,
7290 vcpu
->arch
.ioapic_handled_vectors
)) {
7291 vcpu
->run
->exit_reason
= KVM_EXIT_IOAPIC_EOI
;
7292 vcpu
->run
->eoi
.vector
=
7293 vcpu
->arch
.pending_ioapic_eoi
;
7298 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC
, vcpu
))
7299 vcpu_scan_ioapic(vcpu
);
7300 if (kvm_check_request(KVM_REQ_LOAD_EOI_EXITMAP
, vcpu
))
7301 vcpu_load_eoi_exitmap(vcpu
);
7302 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD
, vcpu
))
7303 kvm_vcpu_reload_apic_access_page(vcpu
);
7304 if (kvm_check_request(KVM_REQ_HV_CRASH
, vcpu
)) {
7305 vcpu
->run
->exit_reason
= KVM_EXIT_SYSTEM_EVENT
;
7306 vcpu
->run
->system_event
.type
= KVM_SYSTEM_EVENT_CRASH
;
7310 if (kvm_check_request(KVM_REQ_HV_RESET
, vcpu
)) {
7311 vcpu
->run
->exit_reason
= KVM_EXIT_SYSTEM_EVENT
;
7312 vcpu
->run
->system_event
.type
= KVM_SYSTEM_EVENT_RESET
;
7316 if (kvm_check_request(KVM_REQ_HV_EXIT
, vcpu
)) {
7317 vcpu
->run
->exit_reason
= KVM_EXIT_HYPERV
;
7318 vcpu
->run
->hyperv
= vcpu
->arch
.hyperv
.exit
;
7324 * KVM_REQ_HV_STIMER has to be processed after
7325 * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
7326 * depend on the guest clock being up-to-date
7328 if (kvm_check_request(KVM_REQ_HV_STIMER
, vcpu
))
7329 kvm_hv_process_stimers(vcpu
);
7332 if (kvm_check_request(KVM_REQ_EVENT
, vcpu
) || req_int_win
) {
7333 ++vcpu
->stat
.req_event
;
7334 kvm_apic_accept_events(vcpu
);
7335 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_INIT_RECEIVED
) {
7340 if (inject_pending_event(vcpu
, req_int_win
) != 0)
7341 req_immediate_exit
= true;
7343 /* Enable SMI/NMI/IRQ window open exits if needed.
7345 * SMIs have three cases:
7346 * 1) They can be nested, and then there is nothing to
7347 * do here because RSM will cause a vmexit anyway.
7348 * 2) There is an ISA-specific reason why SMI cannot be
7349 * injected, and the moment when this changes can be
7351 * 3) Or the SMI can be pending because
7352 * inject_pending_event has completed the injection
7353 * of an IRQ or NMI from the previous vmexit, and
7354 * then we request an immediate exit to inject the
7357 if (vcpu
->arch
.smi_pending
&& !is_smm(vcpu
))
7358 if (!kvm_x86_ops
->enable_smi_window(vcpu
))
7359 req_immediate_exit
= true;
7360 if (vcpu
->arch
.nmi_pending
)
7361 kvm_x86_ops
->enable_nmi_window(vcpu
);
7362 if (kvm_cpu_has_injectable_intr(vcpu
) || req_int_win
)
7363 kvm_x86_ops
->enable_irq_window(vcpu
);
7364 WARN_ON(vcpu
->arch
.exception
.pending
);
7367 if (kvm_lapic_enabled(vcpu
)) {
7368 update_cr8_intercept(vcpu
);
7369 kvm_lapic_sync_to_vapic(vcpu
);
7373 r
= kvm_mmu_reload(vcpu
);
7375 goto cancel_injection
;
7380 kvm_x86_ops
->prepare_guest_switch(vcpu
);
7383 * Disable IRQs before setting IN_GUEST_MODE. Posted interrupt
7384 * IPI are then delayed after guest entry, which ensures that they
7385 * result in virtual interrupt delivery.
7387 local_irq_disable();
7388 vcpu
->mode
= IN_GUEST_MODE
;
7390 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
7393 * 1) We should set ->mode before checking ->requests. Please see
7394 * the comment in kvm_vcpu_exiting_guest_mode().
7396 * 2) For APICv, we should set ->mode before checking PIR.ON. This
7397 * pairs with the memory barrier implicit in pi_test_and_set_on
7398 * (see vmx_deliver_posted_interrupt).
7400 * 3) This also orders the write to mode from any reads to the page
7401 * tables done while the VCPU is running. Please see the comment
7402 * in kvm_flush_remote_tlbs.
7404 smp_mb__after_srcu_read_unlock();
7407 * This handles the case where a posted interrupt was
7408 * notified with kvm_vcpu_kick.
7410 if (kvm_lapic_enabled(vcpu
) && vcpu
->arch
.apicv_active
)
7411 kvm_x86_ops
->sync_pir_to_irr(vcpu
);
7413 if (vcpu
->mode
== EXITING_GUEST_MODE
|| kvm_request_pending(vcpu
)
7414 || need_resched() || signal_pending(current
)) {
7415 vcpu
->mode
= OUTSIDE_GUEST_MODE
;
7419 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
7421 goto cancel_injection
;
7424 kvm_load_guest_xcr0(vcpu
);
7426 if (req_immediate_exit
) {
7427 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7428 smp_send_reschedule(vcpu
->cpu
);
7431 trace_kvm_entry(vcpu
->vcpu_id
);
7432 if (lapic_timer_advance_ns
)
7433 wait_lapic_expire(vcpu
);
7434 guest_enter_irqoff();
7436 if (unlikely(vcpu
->arch
.switch_db_regs
)) {
7438 set_debugreg(vcpu
->arch
.eff_db
[0], 0);
7439 set_debugreg(vcpu
->arch
.eff_db
[1], 1);
7440 set_debugreg(vcpu
->arch
.eff_db
[2], 2);
7441 set_debugreg(vcpu
->arch
.eff_db
[3], 3);
7442 set_debugreg(vcpu
->arch
.dr6
, 6);
7443 vcpu
->arch
.switch_db_regs
&= ~KVM_DEBUGREG_RELOAD
;
7446 kvm_x86_ops
->run(vcpu
);
7449 * Do this here before restoring debug registers on the host. And
7450 * since we do this before handling the vmexit, a DR access vmexit
7451 * can (a) read the correct value of the debug registers, (b) set
7452 * KVM_DEBUGREG_WONT_EXIT again.
7454 if (unlikely(vcpu
->arch
.switch_db_regs
& KVM_DEBUGREG_WONT_EXIT
)) {
7455 WARN_ON(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
);
7456 kvm_x86_ops
->sync_dirty_debug_regs(vcpu
);
7457 kvm_update_dr0123(vcpu
);
7458 kvm_update_dr6(vcpu
);
7459 kvm_update_dr7(vcpu
);
7460 vcpu
->arch
.switch_db_regs
&= ~KVM_DEBUGREG_RELOAD
;
7464 * If the guest has used debug registers, at least dr7
7465 * will be disabled while returning to the host.
7466 * If we don't have active breakpoints in the host, we don't
7467 * care about the messed up debug address registers. But if
7468 * we have some of them active, restore the old state.
7470 if (hw_breakpoint_active())
7471 hw_breakpoint_restore();
7473 vcpu
->arch
.last_guest_tsc
= kvm_read_l1_tsc(vcpu
, rdtsc());
7475 vcpu
->mode
= OUTSIDE_GUEST_MODE
;
7478 kvm_put_guest_xcr0(vcpu
);
7480 kvm_before_interrupt(vcpu
);
7481 kvm_x86_ops
->handle_external_intr(vcpu
);
7482 kvm_after_interrupt(vcpu
);
7486 guest_exit_irqoff();
7491 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
7494 * Profile KVM exit RIPs:
7496 if (unlikely(prof_on
== KVM_PROFILING
)) {
7497 unsigned long rip
= kvm_rip_read(vcpu
);
7498 profile_hit(KVM_PROFILING
, (void *)rip
);
7501 if (unlikely(vcpu
->arch
.tsc_always_catchup
))
7502 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
7504 if (vcpu
->arch
.apic_attention
)
7505 kvm_lapic_sync_from_vapic(vcpu
);
7507 vcpu
->arch
.gpa_available
= false;
7508 r
= kvm_x86_ops
->handle_exit(vcpu
);
7512 kvm_x86_ops
->cancel_injection(vcpu
);
7513 if (unlikely(vcpu
->arch
.apic_attention
))
7514 kvm_lapic_sync_from_vapic(vcpu
);
7519 static inline int vcpu_block(struct kvm
*kvm
, struct kvm_vcpu
*vcpu
)
7521 if (!kvm_arch_vcpu_runnable(vcpu
) &&
7522 (!kvm_x86_ops
->pre_block
|| kvm_x86_ops
->pre_block(vcpu
) == 0)) {
7523 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
7524 kvm_vcpu_block(vcpu
);
7525 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
7527 if (kvm_x86_ops
->post_block
)
7528 kvm_x86_ops
->post_block(vcpu
);
7530 if (!kvm_check_request(KVM_REQ_UNHALT
, vcpu
))
7534 kvm_apic_accept_events(vcpu
);
7535 switch(vcpu
->arch
.mp_state
) {
7536 case KVM_MP_STATE_HALTED
:
7537 vcpu
->arch
.pv
.pv_unhalted
= false;
7538 vcpu
->arch
.mp_state
=
7539 KVM_MP_STATE_RUNNABLE
;
7540 case KVM_MP_STATE_RUNNABLE
:
7541 vcpu
->arch
.apf
.halted
= false;
7543 case KVM_MP_STATE_INIT_RECEIVED
:
7552 static inline bool kvm_vcpu_running(struct kvm_vcpu
*vcpu
)
7554 if (is_guest_mode(vcpu
) && kvm_x86_ops
->check_nested_events
)
7555 kvm_x86_ops
->check_nested_events(vcpu
, false);
7557 return (vcpu
->arch
.mp_state
== KVM_MP_STATE_RUNNABLE
&&
7558 !vcpu
->arch
.apf
.halted
);
7561 static int vcpu_run(struct kvm_vcpu
*vcpu
)
7564 struct kvm
*kvm
= vcpu
->kvm
;
7566 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
7569 if (kvm_vcpu_running(vcpu
)) {
7570 r
= vcpu_enter_guest(vcpu
);
7572 r
= vcpu_block(kvm
, vcpu
);
7578 kvm_clear_request(KVM_REQ_PENDING_TIMER
, vcpu
);
7579 if (kvm_cpu_has_pending_timer(vcpu
))
7580 kvm_inject_pending_timer_irqs(vcpu
);
7582 if (dm_request_for_irq_injection(vcpu
) &&
7583 kvm_vcpu_ready_for_interrupt_injection(vcpu
)) {
7585 vcpu
->run
->exit_reason
= KVM_EXIT_IRQ_WINDOW_OPEN
;
7586 ++vcpu
->stat
.request_irq_exits
;
7590 kvm_check_async_pf_completion(vcpu
);
7592 if (signal_pending(current
)) {
7594 vcpu
->run
->exit_reason
= KVM_EXIT_INTR
;
7595 ++vcpu
->stat
.signal_exits
;
7598 if (need_resched()) {
7599 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
7601 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
7605 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
7610 static inline int complete_emulated_io(struct kvm_vcpu
*vcpu
)
7613 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
7614 r
= emulate_instruction(vcpu
, EMULTYPE_NO_DECODE
);
7615 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
7616 if (r
!= EMULATE_DONE
)
7621 static int complete_emulated_pio(struct kvm_vcpu
*vcpu
)
7623 BUG_ON(!vcpu
->arch
.pio
.count
);
7625 return complete_emulated_io(vcpu
);
7629 * Implements the following, as a state machine:
7633 * for each mmio piece in the fragment
7641 * for each mmio piece in the fragment
7646 static int complete_emulated_mmio(struct kvm_vcpu
*vcpu
)
7648 struct kvm_run
*run
= vcpu
->run
;
7649 struct kvm_mmio_fragment
*frag
;
7652 BUG_ON(!vcpu
->mmio_needed
);
7654 /* Complete previous fragment */
7655 frag
= &vcpu
->mmio_fragments
[vcpu
->mmio_cur_fragment
];
7656 len
= min(8u, frag
->len
);
7657 if (!vcpu
->mmio_is_write
)
7658 memcpy(frag
->data
, run
->mmio
.data
, len
);
7660 if (frag
->len
<= 8) {
7661 /* Switch to the next fragment. */
7663 vcpu
->mmio_cur_fragment
++;
7665 /* Go forward to the next mmio piece. */
7671 if (vcpu
->mmio_cur_fragment
>= vcpu
->mmio_nr_fragments
) {
7672 vcpu
->mmio_needed
= 0;
7674 /* FIXME: return into emulator if single-stepping. */
7675 if (vcpu
->mmio_is_write
)
7677 vcpu
->mmio_read_completed
= 1;
7678 return complete_emulated_io(vcpu
);
7681 run
->exit_reason
= KVM_EXIT_MMIO
;
7682 run
->mmio
.phys_addr
= frag
->gpa
;
7683 if (vcpu
->mmio_is_write
)
7684 memcpy(run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
7685 run
->mmio
.len
= min(8u, frag
->len
);
7686 run
->mmio
.is_write
= vcpu
->mmio_is_write
;
7687 vcpu
->arch
.complete_userspace_io
= complete_emulated_mmio
;
7691 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
7696 kvm_sigset_activate(vcpu
);
7697 kvm_load_guest_fpu(vcpu
);
7699 if (unlikely(vcpu
->arch
.mp_state
== KVM_MP_STATE_UNINITIALIZED
)) {
7700 if (kvm_run
->immediate_exit
) {
7704 kvm_vcpu_block(vcpu
);
7705 kvm_apic_accept_events(vcpu
);
7706 kvm_clear_request(KVM_REQ_UNHALT
, vcpu
);
7708 if (signal_pending(current
)) {
7710 vcpu
->run
->exit_reason
= KVM_EXIT_INTR
;
7711 ++vcpu
->stat
.signal_exits
;
7716 if (vcpu
->run
->kvm_valid_regs
& ~KVM_SYNC_X86_VALID_FIELDS
) {
7721 if (vcpu
->run
->kvm_dirty_regs
) {
7722 r
= sync_regs(vcpu
);
7727 /* re-sync apic's tpr */
7728 if (!lapic_in_kernel(vcpu
)) {
7729 if (kvm_set_cr8(vcpu
, kvm_run
->cr8
) != 0) {
7735 if (unlikely(vcpu
->arch
.complete_userspace_io
)) {
7736 int (*cui
)(struct kvm_vcpu
*) = vcpu
->arch
.complete_userspace_io
;
7737 vcpu
->arch
.complete_userspace_io
= NULL
;
7742 WARN_ON(vcpu
->arch
.pio
.count
|| vcpu
->mmio_needed
);
7744 if (kvm_run
->immediate_exit
)
7750 kvm_put_guest_fpu(vcpu
);
7751 if (vcpu
->run
->kvm_valid_regs
)
7753 post_kvm_run_save(vcpu
);
7754 kvm_sigset_deactivate(vcpu
);
7760 static void __get_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
7762 if (vcpu
->arch
.emulate_regs_need_sync_to_vcpu
) {
7764 * We are here if userspace calls get_regs() in the middle of
7765 * instruction emulation. Registers state needs to be copied
7766 * back from emulation context to vcpu. Userspace shouldn't do
7767 * that usually, but some bad designed PV devices (vmware
7768 * backdoor interface) need this to work
7770 emulator_writeback_register_cache(&vcpu
->arch
.emulate_ctxt
);
7771 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
7773 regs
->rax
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
7774 regs
->rbx
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
7775 regs
->rcx
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
7776 regs
->rdx
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
7777 regs
->rsi
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
7778 regs
->rdi
= kvm_register_read(vcpu
, VCPU_REGS_RDI
);
7779 regs
->rsp
= kvm_register_read(vcpu
, VCPU_REGS_RSP
);
7780 regs
->rbp
= kvm_register_read(vcpu
, VCPU_REGS_RBP
);
7781 #ifdef CONFIG_X86_64
7782 regs
->r8
= kvm_register_read(vcpu
, VCPU_REGS_R8
);
7783 regs
->r9
= kvm_register_read(vcpu
, VCPU_REGS_R9
);
7784 regs
->r10
= kvm_register_read(vcpu
, VCPU_REGS_R10
);
7785 regs
->r11
= kvm_register_read(vcpu
, VCPU_REGS_R11
);
7786 regs
->r12
= kvm_register_read(vcpu
, VCPU_REGS_R12
);
7787 regs
->r13
= kvm_register_read(vcpu
, VCPU_REGS_R13
);
7788 regs
->r14
= kvm_register_read(vcpu
, VCPU_REGS_R14
);
7789 regs
->r15
= kvm_register_read(vcpu
, VCPU_REGS_R15
);
7792 regs
->rip
= kvm_rip_read(vcpu
);
7793 regs
->rflags
= kvm_get_rflags(vcpu
);
7796 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
7799 __get_regs(vcpu
, regs
);
7804 static void __set_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
7806 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= true;
7807 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
7809 kvm_register_write(vcpu
, VCPU_REGS_RAX
, regs
->rax
);
7810 kvm_register_write(vcpu
, VCPU_REGS_RBX
, regs
->rbx
);
7811 kvm_register_write(vcpu
, VCPU_REGS_RCX
, regs
->rcx
);
7812 kvm_register_write(vcpu
, VCPU_REGS_RDX
, regs
->rdx
);
7813 kvm_register_write(vcpu
, VCPU_REGS_RSI
, regs
->rsi
);
7814 kvm_register_write(vcpu
, VCPU_REGS_RDI
, regs
->rdi
);
7815 kvm_register_write(vcpu
, VCPU_REGS_RSP
, regs
->rsp
);
7816 kvm_register_write(vcpu
, VCPU_REGS_RBP
, regs
->rbp
);
7817 #ifdef CONFIG_X86_64
7818 kvm_register_write(vcpu
, VCPU_REGS_R8
, regs
->r8
);
7819 kvm_register_write(vcpu
, VCPU_REGS_R9
, regs
->r9
);
7820 kvm_register_write(vcpu
, VCPU_REGS_R10
, regs
->r10
);
7821 kvm_register_write(vcpu
, VCPU_REGS_R11
, regs
->r11
);
7822 kvm_register_write(vcpu
, VCPU_REGS_R12
, regs
->r12
);
7823 kvm_register_write(vcpu
, VCPU_REGS_R13
, regs
->r13
);
7824 kvm_register_write(vcpu
, VCPU_REGS_R14
, regs
->r14
);
7825 kvm_register_write(vcpu
, VCPU_REGS_R15
, regs
->r15
);
7828 kvm_rip_write(vcpu
, regs
->rip
);
7829 kvm_set_rflags(vcpu
, regs
->rflags
| X86_EFLAGS_FIXED
);
7831 vcpu
->arch
.exception
.pending
= false;
7833 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7836 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
7839 __set_regs(vcpu
, regs
);
7844 void kvm_get_cs_db_l_bits(struct kvm_vcpu
*vcpu
, int *db
, int *l
)
7846 struct kvm_segment cs
;
7848 kvm_get_segment(vcpu
, &cs
, VCPU_SREG_CS
);
7852 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits
);
7854 static void __get_sregs(struct kvm_vcpu
*vcpu
, struct kvm_sregs
*sregs
)
7858 kvm_get_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
7859 kvm_get_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
7860 kvm_get_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
7861 kvm_get_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
7862 kvm_get_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
7863 kvm_get_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
7865 kvm_get_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
7866 kvm_get_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
7868 kvm_x86_ops
->get_idt(vcpu
, &dt
);
7869 sregs
->idt
.limit
= dt
.size
;
7870 sregs
->idt
.base
= dt
.address
;
7871 kvm_x86_ops
->get_gdt(vcpu
, &dt
);
7872 sregs
->gdt
.limit
= dt
.size
;
7873 sregs
->gdt
.base
= dt
.address
;
7875 sregs
->cr0
= kvm_read_cr0(vcpu
);
7876 sregs
->cr2
= vcpu
->arch
.cr2
;
7877 sregs
->cr3
= kvm_read_cr3(vcpu
);
7878 sregs
->cr4
= kvm_read_cr4(vcpu
);
7879 sregs
->cr8
= kvm_get_cr8(vcpu
);
7880 sregs
->efer
= vcpu
->arch
.efer
;
7881 sregs
->apic_base
= kvm_get_apic_base(vcpu
);
7883 memset(sregs
->interrupt_bitmap
, 0, sizeof sregs
->interrupt_bitmap
);
7885 if (vcpu
->arch
.interrupt
.injected
&& !vcpu
->arch
.interrupt
.soft
)
7886 set_bit(vcpu
->arch
.interrupt
.nr
,
7887 (unsigned long *)sregs
->interrupt_bitmap
);
7890 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu
*vcpu
,
7891 struct kvm_sregs
*sregs
)
7894 __get_sregs(vcpu
, sregs
);
7899 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu
*vcpu
,
7900 struct kvm_mp_state
*mp_state
)
7904 kvm_apic_accept_events(vcpu
);
7905 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_HALTED
&&
7906 vcpu
->arch
.pv
.pv_unhalted
)
7907 mp_state
->mp_state
= KVM_MP_STATE_RUNNABLE
;
7909 mp_state
->mp_state
= vcpu
->arch
.mp_state
;
7915 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu
*vcpu
,
7916 struct kvm_mp_state
*mp_state
)
7922 if (!lapic_in_kernel(vcpu
) &&
7923 mp_state
->mp_state
!= KVM_MP_STATE_RUNNABLE
)
7926 /* INITs are latched while in SMM */
7927 if ((is_smm(vcpu
) || vcpu
->arch
.smi_pending
) &&
7928 (mp_state
->mp_state
== KVM_MP_STATE_SIPI_RECEIVED
||
7929 mp_state
->mp_state
== KVM_MP_STATE_INIT_RECEIVED
))
7932 if (mp_state
->mp_state
== KVM_MP_STATE_SIPI_RECEIVED
) {
7933 vcpu
->arch
.mp_state
= KVM_MP_STATE_INIT_RECEIVED
;
7934 set_bit(KVM_APIC_SIPI
, &vcpu
->arch
.apic
->pending_events
);
7936 vcpu
->arch
.mp_state
= mp_state
->mp_state
;
7937 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7945 int kvm_task_switch(struct kvm_vcpu
*vcpu
, u16 tss_selector
, int idt_index
,
7946 int reason
, bool has_error_code
, u32 error_code
)
7948 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
7951 init_emulate_ctxt(vcpu
);
7953 ret
= emulator_task_switch(ctxt
, tss_selector
, idt_index
, reason
,
7954 has_error_code
, error_code
);
7957 return EMULATE_FAIL
;
7959 kvm_rip_write(vcpu
, ctxt
->eip
);
7960 kvm_set_rflags(vcpu
, ctxt
->eflags
);
7961 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7962 return EMULATE_DONE
;
7964 EXPORT_SYMBOL_GPL(kvm_task_switch
);
7966 static int kvm_valid_sregs(struct kvm_vcpu
*vcpu
, struct kvm_sregs
*sregs
)
7968 if ((sregs
->efer
& EFER_LME
) && (sregs
->cr0
& X86_CR0_PG
)) {
7970 * When EFER.LME and CR0.PG are set, the processor is in
7971 * 64-bit mode (though maybe in a 32-bit code segment).
7972 * CR4.PAE and EFER.LMA must be set.
7974 if (!(sregs
->cr4
& X86_CR4_PAE
)
7975 || !(sregs
->efer
& EFER_LMA
))
7979 * Not in 64-bit mode: EFER.LMA is clear and the code
7980 * segment cannot be 64-bit.
7982 if (sregs
->efer
& EFER_LMA
|| sregs
->cs
.l
)
7989 static int __set_sregs(struct kvm_vcpu
*vcpu
, struct kvm_sregs
*sregs
)
7991 struct msr_data apic_base_msr
;
7992 int mmu_reset_needed
= 0;
7993 int pending_vec
, max_bits
, idx
;
7997 if (!guest_cpuid_has(vcpu
, X86_FEATURE_XSAVE
) &&
7998 (sregs
->cr4
& X86_CR4_OSXSAVE
))
8001 if (kvm_valid_sregs(vcpu
, sregs
))
8004 apic_base_msr
.data
= sregs
->apic_base
;
8005 apic_base_msr
.host_initiated
= true;
8006 if (kvm_set_apic_base(vcpu
, &apic_base_msr
))
8009 dt
.size
= sregs
->idt
.limit
;
8010 dt
.address
= sregs
->idt
.base
;
8011 kvm_x86_ops
->set_idt(vcpu
, &dt
);
8012 dt
.size
= sregs
->gdt
.limit
;
8013 dt
.address
= sregs
->gdt
.base
;
8014 kvm_x86_ops
->set_gdt(vcpu
, &dt
);
8016 vcpu
->arch
.cr2
= sregs
->cr2
;
8017 mmu_reset_needed
|= kvm_read_cr3(vcpu
) != sregs
->cr3
;
8018 vcpu
->arch
.cr3
= sregs
->cr3
;
8019 __set_bit(VCPU_EXREG_CR3
, (ulong
*)&vcpu
->arch
.regs_avail
);
8021 kvm_set_cr8(vcpu
, sregs
->cr8
);
8023 mmu_reset_needed
|= vcpu
->arch
.efer
!= sregs
->efer
;
8024 kvm_x86_ops
->set_efer(vcpu
, sregs
->efer
);
8026 mmu_reset_needed
|= kvm_read_cr0(vcpu
) != sregs
->cr0
;
8027 kvm_x86_ops
->set_cr0(vcpu
, sregs
->cr0
);
8028 vcpu
->arch
.cr0
= sregs
->cr0
;
8030 mmu_reset_needed
|= kvm_read_cr4(vcpu
) != sregs
->cr4
;
8031 kvm_x86_ops
->set_cr4(vcpu
, sregs
->cr4
);
8032 if (sregs
->cr4
& (X86_CR4_OSXSAVE
| X86_CR4_PKE
))
8033 kvm_update_cpuid(vcpu
);
8035 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
8036 if (!is_long_mode(vcpu
) && is_pae(vcpu
)) {
8037 load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, kvm_read_cr3(vcpu
));
8038 mmu_reset_needed
= 1;
8040 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
8042 if (mmu_reset_needed
)
8043 kvm_mmu_reset_context(vcpu
);
8045 max_bits
= KVM_NR_INTERRUPTS
;
8046 pending_vec
= find_first_bit(
8047 (const unsigned long *)sregs
->interrupt_bitmap
, max_bits
);
8048 if (pending_vec
< max_bits
) {
8049 kvm_queue_interrupt(vcpu
, pending_vec
, false);
8050 pr_debug("Set back pending irq %d\n", pending_vec
);
8053 kvm_set_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
8054 kvm_set_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
8055 kvm_set_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
8056 kvm_set_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
8057 kvm_set_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
8058 kvm_set_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
8060 kvm_set_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
8061 kvm_set_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
8063 update_cr8_intercept(vcpu
);
8065 /* Older userspace won't unhalt the vcpu on reset. */
8066 if (kvm_vcpu_is_bsp(vcpu
) && kvm_rip_read(vcpu
) == 0xfff0 &&
8067 sregs
->cs
.selector
== 0xf000 && sregs
->cs
.base
== 0xffff0000 &&
8069 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
8071 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
8078 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu
*vcpu
,
8079 struct kvm_sregs
*sregs
)
8084 ret
= __set_sregs(vcpu
, sregs
);
8089 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu
*vcpu
,
8090 struct kvm_guest_debug
*dbg
)
8092 unsigned long rflags
;
8097 if (dbg
->control
& (KVM_GUESTDBG_INJECT_DB
| KVM_GUESTDBG_INJECT_BP
)) {
8099 if (vcpu
->arch
.exception
.pending
)
8101 if (dbg
->control
& KVM_GUESTDBG_INJECT_DB
)
8102 kvm_queue_exception(vcpu
, DB_VECTOR
);
8104 kvm_queue_exception(vcpu
, BP_VECTOR
);
8108 * Read rflags as long as potentially injected trace flags are still
8111 rflags
= kvm_get_rflags(vcpu
);
8113 vcpu
->guest_debug
= dbg
->control
;
8114 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_ENABLE
))
8115 vcpu
->guest_debug
= 0;
8117 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
) {
8118 for (i
= 0; i
< KVM_NR_DB_REGS
; ++i
)
8119 vcpu
->arch
.eff_db
[i
] = dbg
->arch
.debugreg
[i
];
8120 vcpu
->arch
.guest_debug_dr7
= dbg
->arch
.debugreg
[7];
8122 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
8123 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
8125 kvm_update_dr7(vcpu
);
8127 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
8128 vcpu
->arch
.singlestep_rip
= kvm_rip_read(vcpu
) +
8129 get_segment_base(vcpu
, VCPU_SREG_CS
);
8132 * Trigger an rflags update that will inject or remove the trace
8135 kvm_set_rflags(vcpu
, rflags
);
8137 kvm_x86_ops
->update_bp_intercept(vcpu
);
8147 * Translate a guest virtual address to a guest physical address.
8149 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu
*vcpu
,
8150 struct kvm_translation
*tr
)
8152 unsigned long vaddr
= tr
->linear_address
;
8158 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
8159 gpa
= kvm_mmu_gva_to_gpa_system(vcpu
, vaddr
, NULL
);
8160 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
8161 tr
->physical_address
= gpa
;
8162 tr
->valid
= gpa
!= UNMAPPED_GVA
;
8170 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
8172 struct fxregs_state
*fxsave
;
8176 fxsave
= &vcpu
->arch
.guest_fpu
.state
.fxsave
;
8177 memcpy(fpu
->fpr
, fxsave
->st_space
, 128);
8178 fpu
->fcw
= fxsave
->cwd
;
8179 fpu
->fsw
= fxsave
->swd
;
8180 fpu
->ftwx
= fxsave
->twd
;
8181 fpu
->last_opcode
= fxsave
->fop
;
8182 fpu
->last_ip
= fxsave
->rip
;
8183 fpu
->last_dp
= fxsave
->rdp
;
8184 memcpy(fpu
->xmm
, fxsave
->xmm_space
, sizeof fxsave
->xmm_space
);
8190 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
8192 struct fxregs_state
*fxsave
;
8196 fxsave
= &vcpu
->arch
.guest_fpu
.state
.fxsave
;
8198 memcpy(fxsave
->st_space
, fpu
->fpr
, 128);
8199 fxsave
->cwd
= fpu
->fcw
;
8200 fxsave
->swd
= fpu
->fsw
;
8201 fxsave
->twd
= fpu
->ftwx
;
8202 fxsave
->fop
= fpu
->last_opcode
;
8203 fxsave
->rip
= fpu
->last_ip
;
8204 fxsave
->rdp
= fpu
->last_dp
;
8205 memcpy(fxsave
->xmm_space
, fpu
->xmm
, sizeof fxsave
->xmm_space
);
8211 static void store_regs(struct kvm_vcpu
*vcpu
)
8213 BUILD_BUG_ON(sizeof(struct kvm_sync_regs
) > SYNC_REGS_SIZE_BYTES
);
8215 if (vcpu
->run
->kvm_valid_regs
& KVM_SYNC_X86_REGS
)
8216 __get_regs(vcpu
, &vcpu
->run
->s
.regs
.regs
);
8218 if (vcpu
->run
->kvm_valid_regs
& KVM_SYNC_X86_SREGS
)
8219 __get_sregs(vcpu
, &vcpu
->run
->s
.regs
.sregs
);
8221 if (vcpu
->run
->kvm_valid_regs
& KVM_SYNC_X86_EVENTS
)
8222 kvm_vcpu_ioctl_x86_get_vcpu_events(
8223 vcpu
, &vcpu
->run
->s
.regs
.events
);
8226 static int sync_regs(struct kvm_vcpu
*vcpu
)
8228 if (vcpu
->run
->kvm_dirty_regs
& ~KVM_SYNC_X86_VALID_FIELDS
)
8231 if (vcpu
->run
->kvm_dirty_regs
& KVM_SYNC_X86_REGS
) {
8232 __set_regs(vcpu
, &vcpu
->run
->s
.regs
.regs
);
8233 vcpu
->run
->kvm_dirty_regs
&= ~KVM_SYNC_X86_REGS
;
8235 if (vcpu
->run
->kvm_dirty_regs
& KVM_SYNC_X86_SREGS
) {
8236 if (__set_sregs(vcpu
, &vcpu
->run
->s
.regs
.sregs
))
8238 vcpu
->run
->kvm_dirty_regs
&= ~KVM_SYNC_X86_SREGS
;
8240 if (vcpu
->run
->kvm_dirty_regs
& KVM_SYNC_X86_EVENTS
) {
8241 if (kvm_vcpu_ioctl_x86_set_vcpu_events(
8242 vcpu
, &vcpu
->run
->s
.regs
.events
))
8244 vcpu
->run
->kvm_dirty_regs
&= ~KVM_SYNC_X86_EVENTS
;
8250 static void fx_init(struct kvm_vcpu
*vcpu
)
8252 fpstate_init(&vcpu
->arch
.guest_fpu
.state
);
8253 if (boot_cpu_has(X86_FEATURE_XSAVES
))
8254 vcpu
->arch
.guest_fpu
.state
.xsave
.header
.xcomp_bv
=
8255 host_xcr0
| XSTATE_COMPACTION_ENABLED
;
8258 * Ensure guest xcr0 is valid for loading
8260 vcpu
->arch
.xcr0
= XFEATURE_MASK_FP
;
8262 vcpu
->arch
.cr0
|= X86_CR0_ET
;
8265 /* Swap (qemu) user FPU context for the guest FPU context. */
8266 void kvm_load_guest_fpu(struct kvm_vcpu
*vcpu
)
8269 copy_fpregs_to_fpstate(&vcpu
->arch
.user_fpu
);
8270 /* PKRU is separately restored in kvm_x86_ops->run. */
8271 __copy_kernel_to_fpregs(&vcpu
->arch
.guest_fpu
.state
,
8272 ~XFEATURE_MASK_PKRU
);
8277 /* When vcpu_run ends, restore user space FPU context. */
8278 void kvm_put_guest_fpu(struct kvm_vcpu
*vcpu
)
8281 copy_fpregs_to_fpstate(&vcpu
->arch
.guest_fpu
);
8282 copy_kernel_to_fpregs(&vcpu
->arch
.user_fpu
.state
);
8284 ++vcpu
->stat
.fpu_reload
;
8288 void kvm_arch_vcpu_free(struct kvm_vcpu
*vcpu
)
8290 void *wbinvd_dirty_mask
= vcpu
->arch
.wbinvd_dirty_mask
;
8292 kvmclock_reset(vcpu
);
8294 kvm_x86_ops
->vcpu_free(vcpu
);
8295 free_cpumask_var(wbinvd_dirty_mask
);
8298 struct kvm_vcpu
*kvm_arch_vcpu_create(struct kvm
*kvm
,
8301 struct kvm_vcpu
*vcpu
;
8303 if (kvm_check_tsc_unstable() && atomic_read(&kvm
->online_vcpus
) != 0)
8304 printk_once(KERN_WARNING
8305 "kvm: SMP vm created on host with unstable TSC; "
8306 "guest TSC will not be reliable\n");
8308 vcpu
= kvm_x86_ops
->vcpu_create(kvm
, id
);
8313 int kvm_arch_vcpu_setup(struct kvm_vcpu
*vcpu
)
8315 kvm_vcpu_mtrr_init(vcpu
);
8317 kvm_vcpu_reset(vcpu
, false);
8318 kvm_mmu_setup(vcpu
);
8323 void kvm_arch_vcpu_postcreate(struct kvm_vcpu
*vcpu
)
8325 struct msr_data msr
;
8326 struct kvm
*kvm
= vcpu
->kvm
;
8328 kvm_hv_vcpu_postcreate(vcpu
);
8330 if (mutex_lock_killable(&vcpu
->mutex
))
8334 msr
.index
= MSR_IA32_TSC
;
8335 msr
.host_initiated
= true;
8336 kvm_write_tsc(vcpu
, &msr
);
8338 mutex_unlock(&vcpu
->mutex
);
8340 if (!kvmclock_periodic_sync
)
8343 schedule_delayed_work(&kvm
->arch
.kvmclock_sync_work
,
8344 KVMCLOCK_SYNC_PERIOD
);
8347 void kvm_arch_vcpu_destroy(struct kvm_vcpu
*vcpu
)
8349 vcpu
->arch
.apf
.msr_val
= 0;
8352 kvm_mmu_unload(vcpu
);
8355 kvm_x86_ops
->vcpu_free(vcpu
);
8358 void kvm_vcpu_reset(struct kvm_vcpu
*vcpu
, bool init_event
)
8360 kvm_lapic_reset(vcpu
, init_event
);
8362 vcpu
->arch
.hflags
= 0;
8364 vcpu
->arch
.smi_pending
= 0;
8365 vcpu
->arch
.smi_count
= 0;
8366 atomic_set(&vcpu
->arch
.nmi_queued
, 0);
8367 vcpu
->arch
.nmi_pending
= 0;
8368 vcpu
->arch
.nmi_injected
= false;
8369 kvm_clear_interrupt_queue(vcpu
);
8370 kvm_clear_exception_queue(vcpu
);
8371 vcpu
->arch
.exception
.pending
= false;
8373 memset(vcpu
->arch
.db
, 0, sizeof(vcpu
->arch
.db
));
8374 kvm_update_dr0123(vcpu
);
8375 vcpu
->arch
.dr6
= DR6_INIT
;
8376 kvm_update_dr6(vcpu
);
8377 vcpu
->arch
.dr7
= DR7_FIXED_1
;
8378 kvm_update_dr7(vcpu
);
8382 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
8383 vcpu
->arch
.apf
.msr_val
= 0;
8384 vcpu
->arch
.st
.msr_val
= 0;
8386 kvmclock_reset(vcpu
);
8388 kvm_clear_async_pf_completion_queue(vcpu
);
8389 kvm_async_pf_hash_reset(vcpu
);
8390 vcpu
->arch
.apf
.halted
= false;
8392 if (kvm_mpx_supported()) {
8393 void *mpx_state_buffer
;
8396 * To avoid have the INIT path from kvm_apic_has_events() that be
8397 * called with loaded FPU and does not let userspace fix the state.
8400 kvm_put_guest_fpu(vcpu
);
8401 mpx_state_buffer
= get_xsave_addr(&vcpu
->arch
.guest_fpu
.state
.xsave
,
8402 XFEATURE_MASK_BNDREGS
);
8403 if (mpx_state_buffer
)
8404 memset(mpx_state_buffer
, 0, sizeof(struct mpx_bndreg_state
));
8405 mpx_state_buffer
= get_xsave_addr(&vcpu
->arch
.guest_fpu
.state
.xsave
,
8406 XFEATURE_MASK_BNDCSR
);
8407 if (mpx_state_buffer
)
8408 memset(mpx_state_buffer
, 0, sizeof(struct mpx_bndcsr
));
8410 kvm_load_guest_fpu(vcpu
);
8414 kvm_pmu_reset(vcpu
);
8415 vcpu
->arch
.smbase
= 0x30000;
8417 vcpu
->arch
.msr_platform_info
= MSR_PLATFORM_INFO_CPUID_FAULT
;
8418 vcpu
->arch
.msr_misc_features_enables
= 0;
8420 vcpu
->arch
.xcr0
= XFEATURE_MASK_FP
;
8423 memset(vcpu
->arch
.regs
, 0, sizeof(vcpu
->arch
.regs
));
8424 vcpu
->arch
.regs_avail
= ~0;
8425 vcpu
->arch
.regs_dirty
= ~0;
8427 vcpu
->arch
.ia32_xss
= 0;
8429 kvm_x86_ops
->vcpu_reset(vcpu
, init_event
);
8432 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu
*vcpu
, u8 vector
)
8434 struct kvm_segment cs
;
8436 kvm_get_segment(vcpu
, &cs
, VCPU_SREG_CS
);
8437 cs
.selector
= vector
<< 8;
8438 cs
.base
= vector
<< 12;
8439 kvm_set_segment(vcpu
, &cs
, VCPU_SREG_CS
);
8440 kvm_rip_write(vcpu
, 0);
8443 int kvm_arch_hardware_enable(void)
8446 struct kvm_vcpu
*vcpu
;
8451 bool stable
, backwards_tsc
= false;
8453 kvm_shared_msr_cpu_online();
8454 ret
= kvm_x86_ops
->hardware_enable();
8458 local_tsc
= rdtsc();
8459 stable
= !kvm_check_tsc_unstable();
8460 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
8461 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
8462 if (!stable
&& vcpu
->cpu
== smp_processor_id())
8463 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
8464 if (stable
&& vcpu
->arch
.last_host_tsc
> local_tsc
) {
8465 backwards_tsc
= true;
8466 if (vcpu
->arch
.last_host_tsc
> max_tsc
)
8467 max_tsc
= vcpu
->arch
.last_host_tsc
;
8473 * Sometimes, even reliable TSCs go backwards. This happens on
8474 * platforms that reset TSC during suspend or hibernate actions, but
8475 * maintain synchronization. We must compensate. Fortunately, we can
8476 * detect that condition here, which happens early in CPU bringup,
8477 * before any KVM threads can be running. Unfortunately, we can't
8478 * bring the TSCs fully up to date with real time, as we aren't yet far
8479 * enough into CPU bringup that we know how much real time has actually
8480 * elapsed; our helper function, ktime_get_boot_ns() will be using boot
8481 * variables that haven't been updated yet.
8483 * So we simply find the maximum observed TSC above, then record the
8484 * adjustment to TSC in each VCPU. When the VCPU later gets loaded,
8485 * the adjustment will be applied. Note that we accumulate
8486 * adjustments, in case multiple suspend cycles happen before some VCPU
8487 * gets a chance to run again. In the event that no KVM threads get a
8488 * chance to run, we will miss the entire elapsed period, as we'll have
8489 * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
8490 * loose cycle time. This isn't too big a deal, since the loss will be
8491 * uniform across all VCPUs (not to mention the scenario is extremely
8492 * unlikely). It is possible that a second hibernate recovery happens
8493 * much faster than a first, causing the observed TSC here to be
8494 * smaller; this would require additional padding adjustment, which is
8495 * why we set last_host_tsc to the local tsc observed here.
8497 * N.B. - this code below runs only on platforms with reliable TSC,
8498 * as that is the only way backwards_tsc is set above. Also note
8499 * that this runs for ALL vcpus, which is not a bug; all VCPUs should
8500 * have the same delta_cyc adjustment applied if backwards_tsc
8501 * is detected. Note further, this adjustment is only done once,
8502 * as we reset last_host_tsc on all VCPUs to stop this from being
8503 * called multiple times (one for each physical CPU bringup).
8505 * Platforms with unreliable TSCs don't have to deal with this, they
8506 * will be compensated by the logic in vcpu_load, which sets the TSC to
8507 * catchup mode. This will catchup all VCPUs to real time, but cannot
8508 * guarantee that they stay in perfect synchronization.
8510 if (backwards_tsc
) {
8511 u64 delta_cyc
= max_tsc
- local_tsc
;
8512 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
8513 kvm
->arch
.backwards_tsc_observed
= true;
8514 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
8515 vcpu
->arch
.tsc_offset_adjustment
+= delta_cyc
;
8516 vcpu
->arch
.last_host_tsc
= local_tsc
;
8517 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
8521 * We have to disable TSC offset matching.. if you were
8522 * booting a VM while issuing an S4 host suspend....
8523 * you may have some problem. Solving this issue is
8524 * left as an exercise to the reader.
8526 kvm
->arch
.last_tsc_nsec
= 0;
8527 kvm
->arch
.last_tsc_write
= 0;
8534 void kvm_arch_hardware_disable(void)
8536 kvm_x86_ops
->hardware_disable();
8537 drop_user_return_notifiers();
8540 int kvm_arch_hardware_setup(void)
8544 r
= kvm_x86_ops
->hardware_setup();
8548 if (kvm_has_tsc_control
) {
8550 * Make sure the user can only configure tsc_khz values that
8551 * fit into a signed integer.
8552 * A min value is not calculated needed because it will always
8553 * be 1 on all machines.
8555 u64 max
= min(0x7fffffffULL
,
8556 __scale_tsc(kvm_max_tsc_scaling_ratio
, tsc_khz
));
8557 kvm_max_guest_tsc_khz
= max
;
8559 kvm_default_tsc_scaling_ratio
= 1ULL << kvm_tsc_scaling_ratio_frac_bits
;
8562 kvm_init_msr_list();
8566 void kvm_arch_hardware_unsetup(void)
8568 kvm_x86_ops
->hardware_unsetup();
8571 void kvm_arch_check_processor_compat(void *rtn
)
8573 kvm_x86_ops
->check_processor_compatibility(rtn
);
8576 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu
*vcpu
)
8578 return vcpu
->kvm
->arch
.bsp_vcpu_id
== vcpu
->vcpu_id
;
8580 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp
);
8582 bool kvm_vcpu_is_bsp(struct kvm_vcpu
*vcpu
)
8584 return (vcpu
->arch
.apic_base
& MSR_IA32_APICBASE_BSP
) != 0;
8587 struct static_key kvm_no_apic_vcpu __read_mostly
;
8588 EXPORT_SYMBOL_GPL(kvm_no_apic_vcpu
);
8590 int kvm_arch_vcpu_init(struct kvm_vcpu
*vcpu
)
8595 vcpu
->arch
.apicv_active
= kvm_x86_ops
->get_enable_apicv(vcpu
);
8596 vcpu
->arch
.emulate_ctxt
.ops
= &emulate_ops
;
8597 if (!irqchip_in_kernel(vcpu
->kvm
) || kvm_vcpu_is_reset_bsp(vcpu
))
8598 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
8600 vcpu
->arch
.mp_state
= KVM_MP_STATE_UNINITIALIZED
;
8602 page
= alloc_page(GFP_KERNEL
| __GFP_ZERO
);
8607 vcpu
->arch
.pio_data
= page_address(page
);
8609 kvm_set_tsc_khz(vcpu
, max_tsc_khz
);
8611 r
= kvm_mmu_create(vcpu
);
8613 goto fail_free_pio_data
;
8615 if (irqchip_in_kernel(vcpu
->kvm
)) {
8616 r
= kvm_create_lapic(vcpu
);
8618 goto fail_mmu_destroy
;
8620 static_key_slow_inc(&kvm_no_apic_vcpu
);
8622 vcpu
->arch
.mce_banks
= kzalloc(KVM_MAX_MCE_BANKS
* sizeof(u64
) * 4,
8624 if (!vcpu
->arch
.mce_banks
) {
8626 goto fail_free_lapic
;
8628 vcpu
->arch
.mcg_cap
= KVM_MAX_MCE_BANKS
;
8630 if (!zalloc_cpumask_var(&vcpu
->arch
.wbinvd_dirty_mask
, GFP_KERNEL
)) {
8632 goto fail_free_mce_banks
;
8637 vcpu
->arch
.guest_xstate_size
= XSAVE_HDR_SIZE
+ XSAVE_HDR_OFFSET
;
8639 vcpu
->arch
.maxphyaddr
= cpuid_query_maxphyaddr(vcpu
);
8641 vcpu
->arch
.pat
= MSR_IA32_CR_PAT_DEFAULT
;
8643 kvm_async_pf_hash_reset(vcpu
);
8646 vcpu
->arch
.pending_external_vector
= -1;
8647 vcpu
->arch
.preempted_in_kernel
= false;
8649 kvm_hv_vcpu_init(vcpu
);
8653 fail_free_mce_banks
:
8654 kfree(vcpu
->arch
.mce_banks
);
8656 kvm_free_lapic(vcpu
);
8658 kvm_mmu_destroy(vcpu
);
8660 free_page((unsigned long)vcpu
->arch
.pio_data
);
8665 void kvm_arch_vcpu_uninit(struct kvm_vcpu
*vcpu
)
8669 kvm_hv_vcpu_uninit(vcpu
);
8670 kvm_pmu_destroy(vcpu
);
8671 kfree(vcpu
->arch
.mce_banks
);
8672 kvm_free_lapic(vcpu
);
8673 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
8674 kvm_mmu_destroy(vcpu
);
8675 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
8676 free_page((unsigned long)vcpu
->arch
.pio_data
);
8677 if (!lapic_in_kernel(vcpu
))
8678 static_key_slow_dec(&kvm_no_apic_vcpu
);
8681 void kvm_arch_sched_in(struct kvm_vcpu
*vcpu
, int cpu
)
8683 kvm_x86_ops
->sched_in(vcpu
, cpu
);
8686 int kvm_arch_init_vm(struct kvm
*kvm
, unsigned long type
)
8691 INIT_HLIST_HEAD(&kvm
->arch
.mask_notifier_list
);
8692 INIT_LIST_HEAD(&kvm
->arch
.active_mmu_pages
);
8693 INIT_LIST_HEAD(&kvm
->arch
.zapped_obsolete_pages
);
8694 INIT_LIST_HEAD(&kvm
->arch
.assigned_dev_head
);
8695 atomic_set(&kvm
->arch
.noncoherent_dma_count
, 0);
8697 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
8698 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID
, &kvm
->arch
.irq_sources_bitmap
);
8699 /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
8700 set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID
,
8701 &kvm
->arch
.irq_sources_bitmap
);
8703 raw_spin_lock_init(&kvm
->arch
.tsc_write_lock
);
8704 mutex_init(&kvm
->arch
.apic_map_lock
);
8705 spin_lock_init(&kvm
->arch
.pvclock_gtod_sync_lock
);
8707 kvm
->arch
.kvmclock_offset
= -ktime_get_boot_ns();
8708 pvclock_update_vm_gtod_copy(kvm
);
8710 INIT_DELAYED_WORK(&kvm
->arch
.kvmclock_update_work
, kvmclock_update_fn
);
8711 INIT_DELAYED_WORK(&kvm
->arch
.kvmclock_sync_work
, kvmclock_sync_fn
);
8713 kvm_hv_init_vm(kvm
);
8714 kvm_page_track_init(kvm
);
8715 kvm_mmu_init_vm(kvm
);
8717 if (kvm_x86_ops
->vm_init
)
8718 return kvm_x86_ops
->vm_init(kvm
);
8723 static void kvm_unload_vcpu_mmu(struct kvm_vcpu
*vcpu
)
8726 kvm_mmu_unload(vcpu
);
8730 static void kvm_free_vcpus(struct kvm
*kvm
)
8733 struct kvm_vcpu
*vcpu
;
8736 * Unpin any mmu pages first.
8738 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
8739 kvm_clear_async_pf_completion_queue(vcpu
);
8740 kvm_unload_vcpu_mmu(vcpu
);
8742 kvm_for_each_vcpu(i
, vcpu
, kvm
)
8743 kvm_arch_vcpu_free(vcpu
);
8745 mutex_lock(&kvm
->lock
);
8746 for (i
= 0; i
< atomic_read(&kvm
->online_vcpus
); i
++)
8747 kvm
->vcpus
[i
] = NULL
;
8749 atomic_set(&kvm
->online_vcpus
, 0);
8750 mutex_unlock(&kvm
->lock
);
8753 void kvm_arch_sync_events(struct kvm
*kvm
)
8755 cancel_delayed_work_sync(&kvm
->arch
.kvmclock_sync_work
);
8756 cancel_delayed_work_sync(&kvm
->arch
.kvmclock_update_work
);
8760 int __x86_set_memory_region(struct kvm
*kvm
, int id
, gpa_t gpa
, u32 size
)
8764 struct kvm_memslots
*slots
= kvm_memslots(kvm
);
8765 struct kvm_memory_slot
*slot
, old
;
8767 /* Called with kvm->slots_lock held. */
8768 if (WARN_ON(id
>= KVM_MEM_SLOTS_NUM
))
8771 slot
= id_to_memslot(slots
, id
);
8777 * MAP_SHARED to prevent internal slot pages from being moved
8780 hva
= vm_mmap(NULL
, 0, size
, PROT_READ
| PROT_WRITE
,
8781 MAP_SHARED
| MAP_ANONYMOUS
, 0);
8782 if (IS_ERR((void *)hva
))
8783 return PTR_ERR((void *)hva
);
8792 for (i
= 0; i
< KVM_ADDRESS_SPACE_NUM
; i
++) {
8793 struct kvm_userspace_memory_region m
;
8795 m
.slot
= id
| (i
<< 16);
8797 m
.guest_phys_addr
= gpa
;
8798 m
.userspace_addr
= hva
;
8799 m
.memory_size
= size
;
8800 r
= __kvm_set_memory_region(kvm
, &m
);
8806 vm_munmap(old
.userspace_addr
, old
.npages
* PAGE_SIZE
);
8810 EXPORT_SYMBOL_GPL(__x86_set_memory_region
);
8812 int x86_set_memory_region(struct kvm
*kvm
, int id
, gpa_t gpa
, u32 size
)
8816 mutex_lock(&kvm
->slots_lock
);
8817 r
= __x86_set_memory_region(kvm
, id
, gpa
, size
);
8818 mutex_unlock(&kvm
->slots_lock
);
8822 EXPORT_SYMBOL_GPL(x86_set_memory_region
);
8824 void kvm_arch_destroy_vm(struct kvm
*kvm
)
8826 if (current
->mm
== kvm
->mm
) {
8828 * Free memory regions allocated on behalf of userspace,
8829 * unless the the memory map has changed due to process exit
8832 x86_set_memory_region(kvm
, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT
, 0, 0);
8833 x86_set_memory_region(kvm
, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT
, 0, 0);
8834 x86_set_memory_region(kvm
, TSS_PRIVATE_MEMSLOT
, 0, 0);
8836 if (kvm_x86_ops
->vm_destroy
)
8837 kvm_x86_ops
->vm_destroy(kvm
);
8838 kvm_pic_destroy(kvm
);
8839 kvm_ioapic_destroy(kvm
);
8840 kvm_free_vcpus(kvm
);
8841 kvfree(rcu_dereference_check(kvm
->arch
.apic_map
, 1));
8842 kvm_mmu_uninit_vm(kvm
);
8843 kvm_page_track_cleanup(kvm
);
8844 kvm_hv_destroy_vm(kvm
);
8847 void kvm_arch_free_memslot(struct kvm
*kvm
, struct kvm_memory_slot
*free
,
8848 struct kvm_memory_slot
*dont
)
8852 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
8853 if (!dont
|| free
->arch
.rmap
[i
] != dont
->arch
.rmap
[i
]) {
8854 kvfree(free
->arch
.rmap
[i
]);
8855 free
->arch
.rmap
[i
] = NULL
;
8860 if (!dont
|| free
->arch
.lpage_info
[i
- 1] !=
8861 dont
->arch
.lpage_info
[i
- 1]) {
8862 kvfree(free
->arch
.lpage_info
[i
- 1]);
8863 free
->arch
.lpage_info
[i
- 1] = NULL
;
8867 kvm_page_track_free_memslot(free
, dont
);
8870 int kvm_arch_create_memslot(struct kvm
*kvm
, struct kvm_memory_slot
*slot
,
8871 unsigned long npages
)
8875 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
8876 struct kvm_lpage_info
*linfo
;
8881 lpages
= gfn_to_index(slot
->base_gfn
+ npages
- 1,
8882 slot
->base_gfn
, level
) + 1;
8884 slot
->arch
.rmap
[i
] =
8885 kvzalloc(lpages
* sizeof(*slot
->arch
.rmap
[i
]), GFP_KERNEL
);
8886 if (!slot
->arch
.rmap
[i
])
8891 linfo
= kvzalloc(lpages
* sizeof(*linfo
), GFP_KERNEL
);
8895 slot
->arch
.lpage_info
[i
- 1] = linfo
;
8897 if (slot
->base_gfn
& (KVM_PAGES_PER_HPAGE(level
) - 1))
8898 linfo
[0].disallow_lpage
= 1;
8899 if ((slot
->base_gfn
+ npages
) & (KVM_PAGES_PER_HPAGE(level
) - 1))
8900 linfo
[lpages
- 1].disallow_lpage
= 1;
8901 ugfn
= slot
->userspace_addr
>> PAGE_SHIFT
;
8903 * If the gfn and userspace address are not aligned wrt each
8904 * other, or if explicitly asked to, disable large page
8905 * support for this slot
8907 if ((slot
->base_gfn
^ ugfn
) & (KVM_PAGES_PER_HPAGE(level
) - 1) ||
8908 !kvm_largepages_enabled()) {
8911 for (j
= 0; j
< lpages
; ++j
)
8912 linfo
[j
].disallow_lpage
= 1;
8916 if (kvm_page_track_create_memslot(slot
, npages
))
8922 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
8923 kvfree(slot
->arch
.rmap
[i
]);
8924 slot
->arch
.rmap
[i
] = NULL
;
8928 kvfree(slot
->arch
.lpage_info
[i
- 1]);
8929 slot
->arch
.lpage_info
[i
- 1] = NULL
;
8934 void kvm_arch_memslots_updated(struct kvm
*kvm
, struct kvm_memslots
*slots
)
8937 * memslots->generation has been incremented.
8938 * mmio generation may have reached its maximum value.
8940 kvm_mmu_invalidate_mmio_sptes(kvm
, slots
);
8943 int kvm_arch_prepare_memory_region(struct kvm
*kvm
,
8944 struct kvm_memory_slot
*memslot
,
8945 const struct kvm_userspace_memory_region
*mem
,
8946 enum kvm_mr_change change
)
8951 static void kvm_mmu_slot_apply_flags(struct kvm
*kvm
,
8952 struct kvm_memory_slot
*new)
8954 /* Still write protect RO slot */
8955 if (new->flags
& KVM_MEM_READONLY
) {
8956 kvm_mmu_slot_remove_write_access(kvm
, new);
8961 * Call kvm_x86_ops dirty logging hooks when they are valid.
8963 * kvm_x86_ops->slot_disable_log_dirty is called when:
8965 * - KVM_MR_CREATE with dirty logging is disabled
8966 * - KVM_MR_FLAGS_ONLY with dirty logging is disabled in new flag
8968 * The reason is, in case of PML, we need to set D-bit for any slots
8969 * with dirty logging disabled in order to eliminate unnecessary GPA
8970 * logging in PML buffer (and potential PML buffer full VMEXT). This
8971 * guarantees leaving PML enabled during guest's lifetime won't have
8972 * any additonal overhead from PML when guest is running with dirty
8973 * logging disabled for memory slots.
8975 * kvm_x86_ops->slot_enable_log_dirty is called when switching new slot
8976 * to dirty logging mode.
8978 * If kvm_x86_ops dirty logging hooks are invalid, use write protect.
8980 * In case of write protect:
8982 * Write protect all pages for dirty logging.
8984 * All the sptes including the large sptes which point to this
8985 * slot are set to readonly. We can not create any new large
8986 * spte on this slot until the end of the logging.
8988 * See the comments in fast_page_fault().
8990 if (new->flags
& KVM_MEM_LOG_DIRTY_PAGES
) {
8991 if (kvm_x86_ops
->slot_enable_log_dirty
)
8992 kvm_x86_ops
->slot_enable_log_dirty(kvm
, new);
8994 kvm_mmu_slot_remove_write_access(kvm
, new);
8996 if (kvm_x86_ops
->slot_disable_log_dirty
)
8997 kvm_x86_ops
->slot_disable_log_dirty(kvm
, new);
9001 void kvm_arch_commit_memory_region(struct kvm
*kvm
,
9002 const struct kvm_userspace_memory_region
*mem
,
9003 const struct kvm_memory_slot
*old
,
9004 const struct kvm_memory_slot
*new,
9005 enum kvm_mr_change change
)
9007 int nr_mmu_pages
= 0;
9009 if (!kvm
->arch
.n_requested_mmu_pages
)
9010 nr_mmu_pages
= kvm_mmu_calculate_mmu_pages(kvm
);
9013 kvm_mmu_change_mmu_pages(kvm
, nr_mmu_pages
);
9016 * Dirty logging tracks sptes in 4k granularity, meaning that large
9017 * sptes have to be split. If live migration is successful, the guest
9018 * in the source machine will be destroyed and large sptes will be
9019 * created in the destination. However, if the guest continues to run
9020 * in the source machine (for example if live migration fails), small
9021 * sptes will remain around and cause bad performance.
9023 * Scan sptes if dirty logging has been stopped, dropping those
9024 * which can be collapsed into a single large-page spte. Later
9025 * page faults will create the large-page sptes.
9027 if ((change
!= KVM_MR_DELETE
) &&
9028 (old
->flags
& KVM_MEM_LOG_DIRTY_PAGES
) &&
9029 !(new->flags
& KVM_MEM_LOG_DIRTY_PAGES
))
9030 kvm_mmu_zap_collapsible_sptes(kvm
, new);
9033 * Set up write protection and/or dirty logging for the new slot.
9035 * For KVM_MR_DELETE and KVM_MR_MOVE, the shadow pages of old slot have
9036 * been zapped so no dirty logging staff is needed for old slot. For
9037 * KVM_MR_FLAGS_ONLY, the old slot is essentially the same one as the
9038 * new and it's also covered when dealing with the new slot.
9040 * FIXME: const-ify all uses of struct kvm_memory_slot.
9042 if (change
!= KVM_MR_DELETE
)
9043 kvm_mmu_slot_apply_flags(kvm
, (struct kvm_memory_slot
*) new);
9046 void kvm_arch_flush_shadow_all(struct kvm
*kvm
)
9048 kvm_mmu_invalidate_zap_all_pages(kvm
);
9051 void kvm_arch_flush_shadow_memslot(struct kvm
*kvm
,
9052 struct kvm_memory_slot
*slot
)
9054 kvm_page_track_flush_slot(kvm
, slot
);
9057 static inline bool kvm_vcpu_has_events(struct kvm_vcpu
*vcpu
)
9059 if (!list_empty_careful(&vcpu
->async_pf
.done
))
9062 if (kvm_apic_has_events(vcpu
))
9065 if (vcpu
->arch
.pv
.pv_unhalted
)
9068 if (vcpu
->arch
.exception
.pending
)
9071 if (kvm_test_request(KVM_REQ_NMI
, vcpu
) ||
9072 (vcpu
->arch
.nmi_pending
&&
9073 kvm_x86_ops
->nmi_allowed(vcpu
)))
9076 if (kvm_test_request(KVM_REQ_SMI
, vcpu
) ||
9077 (vcpu
->arch
.smi_pending
&& !is_smm(vcpu
)))
9080 if (kvm_arch_interrupt_allowed(vcpu
) &&
9081 kvm_cpu_has_interrupt(vcpu
))
9084 if (kvm_hv_has_stimer_pending(vcpu
))
9090 int kvm_arch_vcpu_runnable(struct kvm_vcpu
*vcpu
)
9092 return kvm_vcpu_running(vcpu
) || kvm_vcpu_has_events(vcpu
);
9095 bool kvm_arch_vcpu_in_kernel(struct kvm_vcpu
*vcpu
)
9097 return vcpu
->arch
.preempted_in_kernel
;
9100 int kvm_arch_vcpu_should_kick(struct kvm_vcpu
*vcpu
)
9102 return kvm_vcpu_exiting_guest_mode(vcpu
) == IN_GUEST_MODE
;
9105 int kvm_arch_interrupt_allowed(struct kvm_vcpu
*vcpu
)
9107 return kvm_x86_ops
->interrupt_allowed(vcpu
);
9110 unsigned long kvm_get_linear_rip(struct kvm_vcpu
*vcpu
)
9112 if (is_64_bit_mode(vcpu
))
9113 return kvm_rip_read(vcpu
);
9114 return (u32
)(get_segment_base(vcpu
, VCPU_SREG_CS
) +
9115 kvm_rip_read(vcpu
));
9117 EXPORT_SYMBOL_GPL(kvm_get_linear_rip
);
9119 bool kvm_is_linear_rip(struct kvm_vcpu
*vcpu
, unsigned long linear_rip
)
9121 return kvm_get_linear_rip(vcpu
) == linear_rip
;
9123 EXPORT_SYMBOL_GPL(kvm_is_linear_rip
);
9125 unsigned long kvm_get_rflags(struct kvm_vcpu
*vcpu
)
9127 unsigned long rflags
;
9129 rflags
= kvm_x86_ops
->get_rflags(vcpu
);
9130 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
9131 rflags
&= ~X86_EFLAGS_TF
;
9134 EXPORT_SYMBOL_GPL(kvm_get_rflags
);
9136 static void __kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
9138 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
&&
9139 kvm_is_linear_rip(vcpu
, vcpu
->arch
.singlestep_rip
))
9140 rflags
|= X86_EFLAGS_TF
;
9141 kvm_x86_ops
->set_rflags(vcpu
, rflags
);
9144 void kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
9146 __kvm_set_rflags(vcpu
, rflags
);
9147 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
9149 EXPORT_SYMBOL_GPL(kvm_set_rflags
);
9151 void kvm_arch_async_page_ready(struct kvm_vcpu
*vcpu
, struct kvm_async_pf
*work
)
9155 if ((vcpu
->arch
.mmu
.direct_map
!= work
->arch
.direct_map
) ||
9159 r
= kvm_mmu_reload(vcpu
);
9163 if (!vcpu
->arch
.mmu
.direct_map
&&
9164 work
->arch
.cr3
!= vcpu
->arch
.mmu
.get_cr3(vcpu
))
9167 vcpu
->arch
.mmu
.page_fault(vcpu
, work
->gva
, 0, true);
9170 static inline u32
kvm_async_pf_hash_fn(gfn_t gfn
)
9172 return hash_32(gfn
& 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU
));
9175 static inline u32
kvm_async_pf_next_probe(u32 key
)
9177 return (key
+ 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU
) - 1);
9180 static void kvm_add_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
9182 u32 key
= kvm_async_pf_hash_fn(gfn
);
9184 while (vcpu
->arch
.apf
.gfns
[key
] != ~0)
9185 key
= kvm_async_pf_next_probe(key
);
9187 vcpu
->arch
.apf
.gfns
[key
] = gfn
;
9190 static u32
kvm_async_pf_gfn_slot(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
9193 u32 key
= kvm_async_pf_hash_fn(gfn
);
9195 for (i
= 0; i
< roundup_pow_of_two(ASYNC_PF_PER_VCPU
) &&
9196 (vcpu
->arch
.apf
.gfns
[key
] != gfn
&&
9197 vcpu
->arch
.apf
.gfns
[key
] != ~0); i
++)
9198 key
= kvm_async_pf_next_probe(key
);
9203 bool kvm_find_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
9205 return vcpu
->arch
.apf
.gfns
[kvm_async_pf_gfn_slot(vcpu
, gfn
)] == gfn
;
9208 static void kvm_del_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
9212 i
= j
= kvm_async_pf_gfn_slot(vcpu
, gfn
);
9214 vcpu
->arch
.apf
.gfns
[i
] = ~0;
9216 j
= kvm_async_pf_next_probe(j
);
9217 if (vcpu
->arch
.apf
.gfns
[j
] == ~0)
9219 k
= kvm_async_pf_hash_fn(vcpu
->arch
.apf
.gfns
[j
]);
9221 * k lies cyclically in ]i,j]
9223 * |....j i.k.| or |.k..j i...|
9225 } while ((i
<= j
) ? (i
< k
&& k
<= j
) : (i
< k
|| k
<= j
));
9226 vcpu
->arch
.apf
.gfns
[i
] = vcpu
->arch
.apf
.gfns
[j
];
9231 static int apf_put_user(struct kvm_vcpu
*vcpu
, u32 val
)
9234 return kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, &val
,
9238 static int apf_get_user(struct kvm_vcpu
*vcpu
, u32
*val
)
9241 return kvm_read_guest_cached(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, val
,
9245 void kvm_arch_async_page_not_present(struct kvm_vcpu
*vcpu
,
9246 struct kvm_async_pf
*work
)
9248 struct x86_exception fault
;
9250 trace_kvm_async_pf_not_present(work
->arch
.token
, work
->gva
);
9251 kvm_add_async_pf_gfn(vcpu
, work
->arch
.gfn
);
9253 if (!(vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
) ||
9254 (vcpu
->arch
.apf
.send_user_only
&&
9255 kvm_x86_ops
->get_cpl(vcpu
) == 0))
9256 kvm_make_request(KVM_REQ_APF_HALT
, vcpu
);
9257 else if (!apf_put_user(vcpu
, KVM_PV_REASON_PAGE_NOT_PRESENT
)) {
9258 fault
.vector
= PF_VECTOR
;
9259 fault
.error_code_valid
= true;
9260 fault
.error_code
= 0;
9261 fault
.nested_page_fault
= false;
9262 fault
.address
= work
->arch
.token
;
9263 fault
.async_page_fault
= true;
9264 kvm_inject_page_fault(vcpu
, &fault
);
9268 void kvm_arch_async_page_present(struct kvm_vcpu
*vcpu
,
9269 struct kvm_async_pf
*work
)
9271 struct x86_exception fault
;
9274 if (work
->wakeup_all
)
9275 work
->arch
.token
= ~0; /* broadcast wakeup */
9277 kvm_del_async_pf_gfn(vcpu
, work
->arch
.gfn
);
9278 trace_kvm_async_pf_ready(work
->arch
.token
, work
->gva
);
9280 if (vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
&&
9281 !apf_get_user(vcpu
, &val
)) {
9282 if (val
== KVM_PV_REASON_PAGE_NOT_PRESENT
&&
9283 vcpu
->arch
.exception
.pending
&&
9284 vcpu
->arch
.exception
.nr
== PF_VECTOR
&&
9285 !apf_put_user(vcpu
, 0)) {
9286 vcpu
->arch
.exception
.injected
= false;
9287 vcpu
->arch
.exception
.pending
= false;
9288 vcpu
->arch
.exception
.nr
= 0;
9289 vcpu
->arch
.exception
.has_error_code
= false;
9290 vcpu
->arch
.exception
.error_code
= 0;
9291 } else if (!apf_put_user(vcpu
, KVM_PV_REASON_PAGE_READY
)) {
9292 fault
.vector
= PF_VECTOR
;
9293 fault
.error_code_valid
= true;
9294 fault
.error_code
= 0;
9295 fault
.nested_page_fault
= false;
9296 fault
.address
= work
->arch
.token
;
9297 fault
.async_page_fault
= true;
9298 kvm_inject_page_fault(vcpu
, &fault
);
9301 vcpu
->arch
.apf
.halted
= false;
9302 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
9305 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu
*vcpu
)
9307 if (!(vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
))
9310 return kvm_can_do_async_pf(vcpu
);
9313 void kvm_arch_start_assignment(struct kvm
*kvm
)
9315 atomic_inc(&kvm
->arch
.assigned_device_count
);
9317 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment
);
9319 void kvm_arch_end_assignment(struct kvm
*kvm
)
9321 atomic_dec(&kvm
->arch
.assigned_device_count
);
9323 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment
);
9325 bool kvm_arch_has_assigned_device(struct kvm
*kvm
)
9327 return atomic_read(&kvm
->arch
.assigned_device_count
);
9329 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device
);
9331 void kvm_arch_register_noncoherent_dma(struct kvm
*kvm
)
9333 atomic_inc(&kvm
->arch
.noncoherent_dma_count
);
9335 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma
);
9337 void kvm_arch_unregister_noncoherent_dma(struct kvm
*kvm
)
9339 atomic_dec(&kvm
->arch
.noncoherent_dma_count
);
9341 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma
);
9343 bool kvm_arch_has_noncoherent_dma(struct kvm
*kvm
)
9345 return atomic_read(&kvm
->arch
.noncoherent_dma_count
);
9347 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma
);
9349 bool kvm_arch_has_irq_bypass(void)
9351 return kvm_x86_ops
->update_pi_irte
!= NULL
;
9354 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer
*cons
,
9355 struct irq_bypass_producer
*prod
)
9357 struct kvm_kernel_irqfd
*irqfd
=
9358 container_of(cons
, struct kvm_kernel_irqfd
, consumer
);
9360 irqfd
->producer
= prod
;
9362 return kvm_x86_ops
->update_pi_irte(irqfd
->kvm
,
9363 prod
->irq
, irqfd
->gsi
, 1);
9366 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer
*cons
,
9367 struct irq_bypass_producer
*prod
)
9370 struct kvm_kernel_irqfd
*irqfd
=
9371 container_of(cons
, struct kvm_kernel_irqfd
, consumer
);
9373 WARN_ON(irqfd
->producer
!= prod
);
9374 irqfd
->producer
= NULL
;
9377 * When producer of consumer is unregistered, we change back to
9378 * remapped mode, so we can re-use the current implementation
9379 * when the irq is masked/disabled or the consumer side (KVM
9380 * int this case doesn't want to receive the interrupts.
9382 ret
= kvm_x86_ops
->update_pi_irte(irqfd
->kvm
, prod
->irq
, irqfd
->gsi
, 0);
9384 printk(KERN_INFO
"irq bypass consumer (token %p) unregistration"
9385 " fails: %d\n", irqfd
->consumer
.token
, ret
);
9388 int kvm_arch_update_irqfd_routing(struct kvm
*kvm
, unsigned int host_irq
,
9389 uint32_t guest_irq
, bool set
)
9391 if (!kvm_x86_ops
->update_pi_irte
)
9394 return kvm_x86_ops
->update_pi_irte(kvm
, host_irq
, guest_irq
, set
);
9397 bool kvm_vector_hashing_enabled(void)
9399 return vector_hashing
;
9401 EXPORT_SYMBOL_GPL(kvm_vector_hashing_enabled
);
9403 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit
);
9404 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio
);
9405 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq
);
9406 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault
);
9407 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr
);
9408 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr
);
9409 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun
);
9410 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit
);
9411 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject
);
9412 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit
);
9413 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga
);
9414 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit
);
9415 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts
);
9416 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset
);
9417 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window
);
9418 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full
);
9419 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update
);
9420 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access
);
9421 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi
);