2 * Kernel-based Virtual Machine driver for Linux
4 * derived from drivers/kvm/kvm_main.c
6 * Copyright (C) 2006 Qumranet, Inc.
7 * Copyright (C) 2008 Qumranet, Inc.
8 * Copyright IBM Corporation, 2008
9 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
12 * Avi Kivity <avi@qumranet.com>
13 * Yaniv Kamay <yaniv@qumranet.com>
14 * Amit Shah <amit.shah@qumranet.com>
15 * Ben-Ami Yassour <benami@il.ibm.com>
17 * This work is licensed under the terms of the GNU GPL, version 2. See
18 * the COPYING file in the top-level directory.
22 #include <linux/kvm_host.h>
27 #include "kvm_cache_regs.h"
31 #include <linux/clocksource.h>
32 #include <linux/interrupt.h>
33 #include <linux/kvm.h>
35 #include <linux/vmalloc.h>
36 #include <linux/module.h>
37 #include <linux/mman.h>
38 #include <linux/highmem.h>
39 #include <linux/iommu.h>
40 #include <linux/intel-iommu.h>
41 #include <linux/cpufreq.h>
42 #include <linux/user-return-notifier.h>
43 #include <linux/srcu.h>
44 #include <linux/slab.h>
45 #include <linux/perf_event.h>
46 #include <linux/uaccess.h>
47 #include <linux/hash.h>
48 #include <linux/pci.h>
49 #include <trace/events/kvm.h>
51 #define CREATE_TRACE_POINTS
54 #include <asm/debugreg.h>
60 #include <asm/fpu-internal.h> /* Ugh! */
62 #include <asm/pvclock.h>
63 #include <asm/div64.h>
65 #define MAX_IO_MSRS 256
66 #define KVM_MAX_MCE_BANKS 32
67 #define KVM_MCE_CAP_SUPPORTED (MCG_CTL_P | MCG_SER_P)
69 #define emul_to_vcpu(ctxt) \
70 container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
73 * - enable syscall per default because its emulated by KVM
74 * - enable LME and LMA per default on 64 bit KVM
78 u64 __read_mostly efer_reserved_bits
= ~((u64
)(EFER_SCE
| EFER_LME
| EFER_LMA
));
80 static u64 __read_mostly efer_reserved_bits
= ~((u64
)EFER_SCE
);
83 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
84 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
86 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
);
87 static void process_nmi(struct kvm_vcpu
*vcpu
);
89 struct kvm_x86_ops
*kvm_x86_ops
;
90 EXPORT_SYMBOL_GPL(kvm_x86_ops
);
92 static bool ignore_msrs
= 0;
93 module_param(ignore_msrs
, bool, S_IRUGO
| S_IWUSR
);
95 bool kvm_has_tsc_control
;
96 EXPORT_SYMBOL_GPL(kvm_has_tsc_control
);
97 u32 kvm_max_guest_tsc_khz
;
98 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz
);
100 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
101 static u32 tsc_tolerance_ppm
= 250;
102 module_param(tsc_tolerance_ppm
, uint
, S_IRUGO
| S_IWUSR
);
104 #define KVM_NR_SHARED_MSRS 16
106 struct kvm_shared_msrs_global
{
108 u32 msrs
[KVM_NR_SHARED_MSRS
];
111 struct kvm_shared_msrs
{
112 struct user_return_notifier urn
;
114 struct kvm_shared_msr_values
{
117 } values
[KVM_NR_SHARED_MSRS
];
120 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global
;
121 static DEFINE_PER_CPU(struct kvm_shared_msrs
, shared_msrs
);
123 struct kvm_stats_debugfs_item debugfs_entries
[] = {
124 { "pf_fixed", VCPU_STAT(pf_fixed
) },
125 { "pf_guest", VCPU_STAT(pf_guest
) },
126 { "tlb_flush", VCPU_STAT(tlb_flush
) },
127 { "invlpg", VCPU_STAT(invlpg
) },
128 { "exits", VCPU_STAT(exits
) },
129 { "io_exits", VCPU_STAT(io_exits
) },
130 { "mmio_exits", VCPU_STAT(mmio_exits
) },
131 { "signal_exits", VCPU_STAT(signal_exits
) },
132 { "irq_window", VCPU_STAT(irq_window_exits
) },
133 { "nmi_window", VCPU_STAT(nmi_window_exits
) },
134 { "halt_exits", VCPU_STAT(halt_exits
) },
135 { "halt_wakeup", VCPU_STAT(halt_wakeup
) },
136 { "hypercalls", VCPU_STAT(hypercalls
) },
137 { "request_irq", VCPU_STAT(request_irq_exits
) },
138 { "irq_exits", VCPU_STAT(irq_exits
) },
139 { "host_state_reload", VCPU_STAT(host_state_reload
) },
140 { "efer_reload", VCPU_STAT(efer_reload
) },
141 { "fpu_reload", VCPU_STAT(fpu_reload
) },
142 { "insn_emulation", VCPU_STAT(insn_emulation
) },
143 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail
) },
144 { "irq_injections", VCPU_STAT(irq_injections
) },
145 { "nmi_injections", VCPU_STAT(nmi_injections
) },
146 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped
) },
147 { "mmu_pte_write", VM_STAT(mmu_pte_write
) },
148 { "mmu_pte_updated", VM_STAT(mmu_pte_updated
) },
149 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped
) },
150 { "mmu_flooded", VM_STAT(mmu_flooded
) },
151 { "mmu_recycled", VM_STAT(mmu_recycled
) },
152 { "mmu_cache_miss", VM_STAT(mmu_cache_miss
) },
153 { "mmu_unsync", VM_STAT(mmu_unsync
) },
154 { "remote_tlb_flush", VM_STAT(remote_tlb_flush
) },
155 { "largepages", VM_STAT(lpages
) },
159 u64 __read_mostly host_xcr0
;
161 int emulator_fix_hypercall(struct x86_emulate_ctxt
*ctxt
);
163 static int kvm_vcpu_reset(struct kvm_vcpu
*vcpu
);
165 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu
*vcpu
)
168 for (i
= 0; i
< roundup_pow_of_two(ASYNC_PF_PER_VCPU
); i
++)
169 vcpu
->arch
.apf
.gfns
[i
] = ~0;
172 static void kvm_on_user_return(struct user_return_notifier
*urn
)
175 struct kvm_shared_msrs
*locals
176 = container_of(urn
, struct kvm_shared_msrs
, urn
);
177 struct kvm_shared_msr_values
*values
;
179 for (slot
= 0; slot
< shared_msrs_global
.nr
; ++slot
) {
180 values
= &locals
->values
[slot
];
181 if (values
->host
!= values
->curr
) {
182 wrmsrl(shared_msrs_global
.msrs
[slot
], values
->host
);
183 values
->curr
= values
->host
;
186 locals
->registered
= false;
187 user_return_notifier_unregister(urn
);
190 static void shared_msr_update(unsigned slot
, u32 msr
)
192 struct kvm_shared_msrs
*smsr
;
195 smsr
= &__get_cpu_var(shared_msrs
);
196 /* only read, and nobody should modify it at this time,
197 * so don't need lock */
198 if (slot
>= shared_msrs_global
.nr
) {
199 printk(KERN_ERR
"kvm: invalid MSR slot!");
202 rdmsrl_safe(msr
, &value
);
203 smsr
->values
[slot
].host
= value
;
204 smsr
->values
[slot
].curr
= value
;
207 void kvm_define_shared_msr(unsigned slot
, u32 msr
)
209 if (slot
>= shared_msrs_global
.nr
)
210 shared_msrs_global
.nr
= slot
+ 1;
211 shared_msrs_global
.msrs
[slot
] = msr
;
212 /* we need ensured the shared_msr_global have been updated */
215 EXPORT_SYMBOL_GPL(kvm_define_shared_msr
);
217 static void kvm_shared_msr_cpu_online(void)
221 for (i
= 0; i
< shared_msrs_global
.nr
; ++i
)
222 shared_msr_update(i
, shared_msrs_global
.msrs
[i
]);
225 void kvm_set_shared_msr(unsigned slot
, u64 value
, u64 mask
)
227 struct kvm_shared_msrs
*smsr
= &__get_cpu_var(shared_msrs
);
229 if (((value
^ smsr
->values
[slot
].curr
) & mask
) == 0)
231 smsr
->values
[slot
].curr
= value
;
232 wrmsrl(shared_msrs_global
.msrs
[slot
], value
);
233 if (!smsr
->registered
) {
234 smsr
->urn
.on_user_return
= kvm_on_user_return
;
235 user_return_notifier_register(&smsr
->urn
);
236 smsr
->registered
= true;
239 EXPORT_SYMBOL_GPL(kvm_set_shared_msr
);
241 static void drop_user_return_notifiers(void *ignore
)
243 struct kvm_shared_msrs
*smsr
= &__get_cpu_var(shared_msrs
);
245 if (smsr
->registered
)
246 kvm_on_user_return(&smsr
->urn
);
249 u64
kvm_get_apic_base(struct kvm_vcpu
*vcpu
)
251 return vcpu
->arch
.apic_base
;
253 EXPORT_SYMBOL_GPL(kvm_get_apic_base
);
255 void kvm_set_apic_base(struct kvm_vcpu
*vcpu
, u64 data
)
257 /* TODO: reserve bits check */
258 kvm_lapic_set_base(vcpu
, data
);
260 EXPORT_SYMBOL_GPL(kvm_set_apic_base
);
262 #define EXCPT_BENIGN 0
263 #define EXCPT_CONTRIBUTORY 1
266 static int exception_class(int vector
)
276 return EXCPT_CONTRIBUTORY
;
283 static void kvm_multiple_exception(struct kvm_vcpu
*vcpu
,
284 unsigned nr
, bool has_error
, u32 error_code
,
290 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
292 if (!vcpu
->arch
.exception
.pending
) {
294 vcpu
->arch
.exception
.pending
= true;
295 vcpu
->arch
.exception
.has_error_code
= has_error
;
296 vcpu
->arch
.exception
.nr
= nr
;
297 vcpu
->arch
.exception
.error_code
= error_code
;
298 vcpu
->arch
.exception
.reinject
= reinject
;
302 /* to check exception */
303 prev_nr
= vcpu
->arch
.exception
.nr
;
304 if (prev_nr
== DF_VECTOR
) {
305 /* triple fault -> shutdown */
306 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
309 class1
= exception_class(prev_nr
);
310 class2
= exception_class(nr
);
311 if ((class1
== EXCPT_CONTRIBUTORY
&& class2
== EXCPT_CONTRIBUTORY
)
312 || (class1
== EXCPT_PF
&& class2
!= EXCPT_BENIGN
)) {
313 /* generate double fault per SDM Table 5-5 */
314 vcpu
->arch
.exception
.pending
= true;
315 vcpu
->arch
.exception
.has_error_code
= true;
316 vcpu
->arch
.exception
.nr
= DF_VECTOR
;
317 vcpu
->arch
.exception
.error_code
= 0;
319 /* replace previous exception with a new one in a hope
320 that instruction re-execution will regenerate lost
325 void kvm_queue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
327 kvm_multiple_exception(vcpu
, nr
, false, 0, false);
329 EXPORT_SYMBOL_GPL(kvm_queue_exception
);
331 void kvm_requeue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
333 kvm_multiple_exception(vcpu
, nr
, false, 0, true);
335 EXPORT_SYMBOL_GPL(kvm_requeue_exception
);
337 void kvm_complete_insn_gp(struct kvm_vcpu
*vcpu
, int err
)
340 kvm_inject_gp(vcpu
, 0);
342 kvm_x86_ops
->skip_emulated_instruction(vcpu
);
344 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp
);
346 void kvm_inject_page_fault(struct kvm_vcpu
*vcpu
, struct x86_exception
*fault
)
348 ++vcpu
->stat
.pf_guest
;
349 vcpu
->arch
.cr2
= fault
->address
;
350 kvm_queue_exception_e(vcpu
, PF_VECTOR
, fault
->error_code
);
352 EXPORT_SYMBOL_GPL(kvm_inject_page_fault
);
354 void kvm_propagate_fault(struct kvm_vcpu
*vcpu
, struct x86_exception
*fault
)
356 if (mmu_is_nested(vcpu
) && !fault
->nested_page_fault
)
357 vcpu
->arch
.nested_mmu
.inject_page_fault(vcpu
, fault
);
359 vcpu
->arch
.mmu
.inject_page_fault(vcpu
, fault
);
362 void kvm_inject_nmi(struct kvm_vcpu
*vcpu
)
364 atomic_inc(&vcpu
->arch
.nmi_queued
);
365 kvm_make_request(KVM_REQ_NMI
, vcpu
);
367 EXPORT_SYMBOL_GPL(kvm_inject_nmi
);
369 void kvm_queue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
371 kvm_multiple_exception(vcpu
, nr
, true, error_code
, false);
373 EXPORT_SYMBOL_GPL(kvm_queue_exception_e
);
375 void kvm_requeue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
377 kvm_multiple_exception(vcpu
, nr
, true, error_code
, true);
379 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e
);
382 * Checks if cpl <= required_cpl; if true, return true. Otherwise queue
383 * a #GP and return false.
385 bool kvm_require_cpl(struct kvm_vcpu
*vcpu
, int required_cpl
)
387 if (kvm_x86_ops
->get_cpl(vcpu
) <= required_cpl
)
389 kvm_queue_exception_e(vcpu
, GP_VECTOR
, 0);
392 EXPORT_SYMBOL_GPL(kvm_require_cpl
);
395 * This function will be used to read from the physical memory of the currently
396 * running guest. The difference to kvm_read_guest_page is that this function
397 * can read from guest physical or from the guest's guest physical memory.
399 int kvm_read_guest_page_mmu(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
,
400 gfn_t ngfn
, void *data
, int offset
, int len
,
406 ngpa
= gfn_to_gpa(ngfn
);
407 real_gfn
= mmu
->translate_gpa(vcpu
, ngpa
, access
);
408 if (real_gfn
== UNMAPPED_GVA
)
411 real_gfn
= gpa_to_gfn(real_gfn
);
413 return kvm_read_guest_page(vcpu
->kvm
, real_gfn
, data
, offset
, len
);
415 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu
);
417 int kvm_read_nested_guest_page(struct kvm_vcpu
*vcpu
, gfn_t gfn
,
418 void *data
, int offset
, int len
, u32 access
)
420 return kvm_read_guest_page_mmu(vcpu
, vcpu
->arch
.walk_mmu
, gfn
,
421 data
, offset
, len
, access
);
425 * Load the pae pdptrs. Return true is they are all valid.
427 int load_pdptrs(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
, unsigned long cr3
)
429 gfn_t pdpt_gfn
= cr3
>> PAGE_SHIFT
;
430 unsigned offset
= ((cr3
& (PAGE_SIZE
-1)) >> 5) << 2;
433 u64 pdpte
[ARRAY_SIZE(mmu
->pdptrs
)];
435 ret
= kvm_read_guest_page_mmu(vcpu
, mmu
, pdpt_gfn
, pdpte
,
436 offset
* sizeof(u64
), sizeof(pdpte
),
437 PFERR_USER_MASK
|PFERR_WRITE_MASK
);
442 for (i
= 0; i
< ARRAY_SIZE(pdpte
); ++i
) {
443 if (is_present_gpte(pdpte
[i
]) &&
444 (pdpte
[i
] & vcpu
->arch
.mmu
.rsvd_bits_mask
[0][2])) {
451 memcpy(mmu
->pdptrs
, pdpte
, sizeof(mmu
->pdptrs
));
452 __set_bit(VCPU_EXREG_PDPTR
,
453 (unsigned long *)&vcpu
->arch
.regs_avail
);
454 __set_bit(VCPU_EXREG_PDPTR
,
455 (unsigned long *)&vcpu
->arch
.regs_dirty
);
460 EXPORT_SYMBOL_GPL(load_pdptrs
);
462 static bool pdptrs_changed(struct kvm_vcpu
*vcpu
)
464 u64 pdpte
[ARRAY_SIZE(vcpu
->arch
.walk_mmu
->pdptrs
)];
470 if (is_long_mode(vcpu
) || !is_pae(vcpu
))
473 if (!test_bit(VCPU_EXREG_PDPTR
,
474 (unsigned long *)&vcpu
->arch
.regs_avail
))
477 gfn
= (kvm_read_cr3(vcpu
) & ~31u) >> PAGE_SHIFT
;
478 offset
= (kvm_read_cr3(vcpu
) & ~31u) & (PAGE_SIZE
- 1);
479 r
= kvm_read_nested_guest_page(vcpu
, gfn
, pdpte
, offset
, sizeof(pdpte
),
480 PFERR_USER_MASK
| PFERR_WRITE_MASK
);
483 changed
= memcmp(pdpte
, vcpu
->arch
.walk_mmu
->pdptrs
, sizeof(pdpte
)) != 0;
489 int kvm_set_cr0(struct kvm_vcpu
*vcpu
, unsigned long cr0
)
491 unsigned long old_cr0
= kvm_read_cr0(vcpu
);
492 unsigned long update_bits
= X86_CR0_PG
| X86_CR0_WP
|
493 X86_CR0_CD
| X86_CR0_NW
;
498 if (cr0
& 0xffffffff00000000UL
)
502 cr0
&= ~CR0_RESERVED_BITS
;
504 if ((cr0
& X86_CR0_NW
) && !(cr0
& X86_CR0_CD
))
507 if ((cr0
& X86_CR0_PG
) && !(cr0
& X86_CR0_PE
))
510 if (!is_paging(vcpu
) && (cr0
& X86_CR0_PG
)) {
512 if ((vcpu
->arch
.efer
& EFER_LME
)) {
517 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
522 if (is_pae(vcpu
) && !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
,
527 if (!(cr0
& X86_CR0_PG
) && kvm_read_cr4_bits(vcpu
, X86_CR4_PCIDE
))
530 kvm_x86_ops
->set_cr0(vcpu
, cr0
);
532 if ((cr0
^ old_cr0
) & X86_CR0_PG
) {
533 kvm_clear_async_pf_completion_queue(vcpu
);
534 kvm_async_pf_hash_reset(vcpu
);
537 if ((cr0
^ old_cr0
) & update_bits
)
538 kvm_mmu_reset_context(vcpu
);
541 EXPORT_SYMBOL_GPL(kvm_set_cr0
);
543 void kvm_lmsw(struct kvm_vcpu
*vcpu
, unsigned long msw
)
545 (void)kvm_set_cr0(vcpu
, kvm_read_cr0_bits(vcpu
, ~0x0eul
) | (msw
& 0x0f));
547 EXPORT_SYMBOL_GPL(kvm_lmsw
);
549 int __kvm_set_xcr(struct kvm_vcpu
*vcpu
, u32 index
, u64 xcr
)
553 /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now */
554 if (index
!= XCR_XFEATURE_ENABLED_MASK
)
557 if (kvm_x86_ops
->get_cpl(vcpu
) != 0)
559 if (!(xcr0
& XSTATE_FP
))
561 if ((xcr0
& XSTATE_YMM
) && !(xcr0
& XSTATE_SSE
))
563 if (xcr0
& ~host_xcr0
)
565 vcpu
->arch
.xcr0
= xcr0
;
566 vcpu
->guest_xcr0_loaded
= 0;
570 int kvm_set_xcr(struct kvm_vcpu
*vcpu
, u32 index
, u64 xcr
)
572 if (__kvm_set_xcr(vcpu
, index
, xcr
)) {
573 kvm_inject_gp(vcpu
, 0);
578 EXPORT_SYMBOL_GPL(kvm_set_xcr
);
580 int kvm_set_cr4(struct kvm_vcpu
*vcpu
, unsigned long cr4
)
582 unsigned long old_cr4
= kvm_read_cr4(vcpu
);
583 unsigned long pdptr_bits
= X86_CR4_PGE
| X86_CR4_PSE
|
584 X86_CR4_PAE
| X86_CR4_SMEP
;
585 if (cr4
& CR4_RESERVED_BITS
)
588 if (!guest_cpuid_has_xsave(vcpu
) && (cr4
& X86_CR4_OSXSAVE
))
591 if (!guest_cpuid_has_smep(vcpu
) && (cr4
& X86_CR4_SMEP
))
594 if (!guest_cpuid_has_fsgsbase(vcpu
) && (cr4
& X86_CR4_RDWRGSFS
))
597 if (is_long_mode(vcpu
)) {
598 if (!(cr4
& X86_CR4_PAE
))
600 } else if (is_paging(vcpu
) && (cr4
& X86_CR4_PAE
)
601 && ((cr4
^ old_cr4
) & pdptr_bits
)
602 && !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
,
606 if ((cr4
& X86_CR4_PCIDE
) && !(old_cr4
& X86_CR4_PCIDE
)) {
607 if (!guest_cpuid_has_pcid(vcpu
))
610 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
611 if ((kvm_read_cr3(vcpu
) & X86_CR3_PCID_MASK
) || !is_long_mode(vcpu
))
615 if (kvm_x86_ops
->set_cr4(vcpu
, cr4
))
618 if (((cr4
^ old_cr4
) & pdptr_bits
) ||
619 (!(cr4
& X86_CR4_PCIDE
) && (old_cr4
& X86_CR4_PCIDE
)))
620 kvm_mmu_reset_context(vcpu
);
622 if ((cr4
^ old_cr4
) & X86_CR4_OSXSAVE
)
623 kvm_update_cpuid(vcpu
);
627 EXPORT_SYMBOL_GPL(kvm_set_cr4
);
629 int kvm_set_cr3(struct kvm_vcpu
*vcpu
, unsigned long cr3
)
631 if (cr3
== kvm_read_cr3(vcpu
) && !pdptrs_changed(vcpu
)) {
632 kvm_mmu_sync_roots(vcpu
);
633 kvm_mmu_flush_tlb(vcpu
);
637 if (is_long_mode(vcpu
)) {
638 if (kvm_read_cr4(vcpu
) & X86_CR4_PCIDE
) {
639 if (cr3
& CR3_PCID_ENABLED_RESERVED_BITS
)
642 if (cr3
& CR3_L_MODE_RESERVED_BITS
)
646 if (cr3
& CR3_PAE_RESERVED_BITS
)
648 if (is_paging(vcpu
) &&
649 !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, cr3
))
653 * We don't check reserved bits in nonpae mode, because
654 * this isn't enforced, and VMware depends on this.
659 * Does the new cr3 value map to physical memory? (Note, we
660 * catch an invalid cr3 even in real-mode, because it would
661 * cause trouble later on when we turn on paging anyway.)
663 * A real CPU would silently accept an invalid cr3 and would
664 * attempt to use it - with largely undefined (and often hard
665 * to debug) behavior on the guest side.
667 if (unlikely(!gfn_to_memslot(vcpu
->kvm
, cr3
>> PAGE_SHIFT
)))
669 vcpu
->arch
.cr3
= cr3
;
670 __set_bit(VCPU_EXREG_CR3
, (ulong
*)&vcpu
->arch
.regs_avail
);
671 vcpu
->arch
.mmu
.new_cr3(vcpu
);
674 EXPORT_SYMBOL_GPL(kvm_set_cr3
);
676 int kvm_set_cr8(struct kvm_vcpu
*vcpu
, unsigned long cr8
)
678 if (cr8
& CR8_RESERVED_BITS
)
680 if (irqchip_in_kernel(vcpu
->kvm
))
681 kvm_lapic_set_tpr(vcpu
, cr8
);
683 vcpu
->arch
.cr8
= cr8
;
686 EXPORT_SYMBOL_GPL(kvm_set_cr8
);
688 unsigned long kvm_get_cr8(struct kvm_vcpu
*vcpu
)
690 if (irqchip_in_kernel(vcpu
->kvm
))
691 return kvm_lapic_get_cr8(vcpu
);
693 return vcpu
->arch
.cr8
;
695 EXPORT_SYMBOL_GPL(kvm_get_cr8
);
697 static void kvm_update_dr7(struct kvm_vcpu
*vcpu
)
701 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)
702 dr7
= vcpu
->arch
.guest_debug_dr7
;
704 dr7
= vcpu
->arch
.dr7
;
705 kvm_x86_ops
->set_dr7(vcpu
, dr7
);
706 vcpu
->arch
.switch_db_regs
= (dr7
& DR7_BP_EN_MASK
);
709 static int __kvm_set_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long val
)
713 vcpu
->arch
.db
[dr
] = val
;
714 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
))
715 vcpu
->arch
.eff_db
[dr
] = val
;
718 if (kvm_read_cr4_bits(vcpu
, X86_CR4_DE
))
722 if (val
& 0xffffffff00000000ULL
)
724 vcpu
->arch
.dr6
= (val
& DR6_VOLATILE
) | DR6_FIXED_1
;
727 if (kvm_read_cr4_bits(vcpu
, X86_CR4_DE
))
731 if (val
& 0xffffffff00000000ULL
)
733 vcpu
->arch
.dr7
= (val
& DR7_VOLATILE
) | DR7_FIXED_1
;
734 kvm_update_dr7(vcpu
);
741 int kvm_set_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long val
)
745 res
= __kvm_set_dr(vcpu
, dr
, val
);
747 kvm_queue_exception(vcpu
, UD_VECTOR
);
749 kvm_inject_gp(vcpu
, 0);
753 EXPORT_SYMBOL_GPL(kvm_set_dr
);
755 static int _kvm_get_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long *val
)
759 *val
= vcpu
->arch
.db
[dr
];
762 if (kvm_read_cr4_bits(vcpu
, X86_CR4_DE
))
766 *val
= vcpu
->arch
.dr6
;
769 if (kvm_read_cr4_bits(vcpu
, X86_CR4_DE
))
773 *val
= vcpu
->arch
.dr7
;
780 int kvm_get_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long *val
)
782 if (_kvm_get_dr(vcpu
, dr
, val
)) {
783 kvm_queue_exception(vcpu
, UD_VECTOR
);
788 EXPORT_SYMBOL_GPL(kvm_get_dr
);
790 bool kvm_rdpmc(struct kvm_vcpu
*vcpu
)
792 u32 ecx
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
796 err
= kvm_pmu_read_pmc(vcpu
, ecx
, &data
);
799 kvm_register_write(vcpu
, VCPU_REGS_RAX
, (u32
)data
);
800 kvm_register_write(vcpu
, VCPU_REGS_RDX
, data
>> 32);
803 EXPORT_SYMBOL_GPL(kvm_rdpmc
);
806 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
807 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
809 * This list is modified at module load time to reflect the
810 * capabilities of the host cpu. This capabilities test skips MSRs that are
811 * kvm-specific. Those are put in the beginning of the list.
814 #define KVM_SAVE_MSRS_BEGIN 10
815 static u32 msrs_to_save
[] = {
816 MSR_KVM_SYSTEM_TIME
, MSR_KVM_WALL_CLOCK
,
817 MSR_KVM_SYSTEM_TIME_NEW
, MSR_KVM_WALL_CLOCK_NEW
,
818 HV_X64_MSR_GUEST_OS_ID
, HV_X64_MSR_HYPERCALL
,
819 HV_X64_MSR_APIC_ASSIST_PAGE
, MSR_KVM_ASYNC_PF_EN
, MSR_KVM_STEAL_TIME
,
821 MSR_IA32_SYSENTER_CS
, MSR_IA32_SYSENTER_ESP
, MSR_IA32_SYSENTER_EIP
,
824 MSR_CSTAR
, MSR_KERNEL_GS_BASE
, MSR_SYSCALL_MASK
, MSR_LSTAR
,
826 MSR_IA32_TSC
, MSR_IA32_CR_PAT
, MSR_VM_HSAVE_PA
829 static unsigned num_msrs_to_save
;
831 static const u32 emulated_msrs
[] = {
832 MSR_IA32_TSCDEADLINE
,
833 MSR_IA32_MISC_ENABLE
,
838 static int set_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
840 u64 old_efer
= vcpu
->arch
.efer
;
842 if (efer
& efer_reserved_bits
)
846 && (vcpu
->arch
.efer
& EFER_LME
) != (efer
& EFER_LME
))
849 if (efer
& EFER_FFXSR
) {
850 struct kvm_cpuid_entry2
*feat
;
852 feat
= kvm_find_cpuid_entry(vcpu
, 0x80000001, 0);
853 if (!feat
|| !(feat
->edx
& bit(X86_FEATURE_FXSR_OPT
)))
857 if (efer
& EFER_SVME
) {
858 struct kvm_cpuid_entry2
*feat
;
860 feat
= kvm_find_cpuid_entry(vcpu
, 0x80000001, 0);
861 if (!feat
|| !(feat
->ecx
& bit(X86_FEATURE_SVM
)))
866 efer
|= vcpu
->arch
.efer
& EFER_LMA
;
868 kvm_x86_ops
->set_efer(vcpu
, efer
);
870 vcpu
->arch
.mmu
.base_role
.nxe
= (efer
& EFER_NX
) && !tdp_enabled
;
872 /* Update reserved bits */
873 if ((efer
^ old_efer
) & EFER_NX
)
874 kvm_mmu_reset_context(vcpu
);
879 void kvm_enable_efer_bits(u64 mask
)
881 efer_reserved_bits
&= ~mask
;
883 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits
);
887 * Writes msr value into into the appropriate "register".
888 * Returns 0 on success, non-0 otherwise.
889 * Assumes vcpu_load() was already called.
891 int kvm_set_msr(struct kvm_vcpu
*vcpu
, u32 msr_index
, u64 data
)
893 return kvm_x86_ops
->set_msr(vcpu
, msr_index
, data
);
897 * Adapt set_msr() to msr_io()'s calling convention
899 static int do_set_msr(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
901 return kvm_set_msr(vcpu
, index
, *data
);
904 static void kvm_write_wall_clock(struct kvm
*kvm
, gpa_t wall_clock
)
908 struct pvclock_wall_clock wc
;
909 struct timespec boot
;
914 r
= kvm_read_guest(kvm
, wall_clock
, &version
, sizeof(version
));
919 ++version
; /* first time write, random junk */
923 kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
));
926 * The guest calculates current wall clock time by adding
927 * system time (updated by kvm_guest_time_update below) to the
928 * wall clock specified here. guest system time equals host
929 * system time for us, thus we must fill in host boot time here.
933 if (kvm
->arch
.kvmclock_offset
) {
934 struct timespec ts
= ns_to_timespec(kvm
->arch
.kvmclock_offset
);
935 boot
= timespec_sub(boot
, ts
);
937 wc
.sec
= boot
.tv_sec
;
938 wc
.nsec
= boot
.tv_nsec
;
939 wc
.version
= version
;
941 kvm_write_guest(kvm
, wall_clock
, &wc
, sizeof(wc
));
944 kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
));
947 static uint32_t div_frac(uint32_t dividend
, uint32_t divisor
)
949 uint32_t quotient
, remainder
;
951 /* Don't try to replace with do_div(), this one calculates
952 * "(dividend << 32) / divisor" */
954 : "=a" (quotient
), "=d" (remainder
)
955 : "0" (0), "1" (dividend
), "r" (divisor
) );
959 static void kvm_get_time_scale(uint32_t scaled_khz
, uint32_t base_khz
,
960 s8
*pshift
, u32
*pmultiplier
)
967 tps64
= base_khz
* 1000LL;
968 scaled64
= scaled_khz
* 1000LL;
969 while (tps64
> scaled64
*2 || tps64
& 0xffffffff00000000ULL
) {
974 tps32
= (uint32_t)tps64
;
975 while (tps32
<= scaled64
|| scaled64
& 0xffffffff00000000ULL
) {
976 if (scaled64
& 0xffffffff00000000ULL
|| tps32
& 0x80000000)
984 *pmultiplier
= div_frac(scaled64
, tps32
);
986 pr_debug("%s: base_khz %u => %u, shift %d, mul %u\n",
987 __func__
, base_khz
, scaled_khz
, shift
, *pmultiplier
);
990 static inline u64
get_kernel_ns(void)
994 WARN_ON(preemptible());
996 monotonic_to_bootbased(&ts
);
997 return timespec_to_ns(&ts
);
1000 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz
);
1001 unsigned long max_tsc_khz
;
1003 static inline u64
nsec_to_cycles(struct kvm_vcpu
*vcpu
, u64 nsec
)
1005 return pvclock_scale_delta(nsec
, vcpu
->arch
.virtual_tsc_mult
,
1006 vcpu
->arch
.virtual_tsc_shift
);
1009 static u32
adjust_tsc_khz(u32 khz
, s32 ppm
)
1011 u64 v
= (u64
)khz
* (1000000 + ppm
);
1016 static void kvm_set_tsc_khz(struct kvm_vcpu
*vcpu
, u32 this_tsc_khz
)
1018 u32 thresh_lo
, thresh_hi
;
1019 int use_scaling
= 0;
1021 /* Compute a scale to convert nanoseconds in TSC cycles */
1022 kvm_get_time_scale(this_tsc_khz
, NSEC_PER_SEC
/ 1000,
1023 &vcpu
->arch
.virtual_tsc_shift
,
1024 &vcpu
->arch
.virtual_tsc_mult
);
1025 vcpu
->arch
.virtual_tsc_khz
= this_tsc_khz
;
1028 * Compute the variation in TSC rate which is acceptable
1029 * within the range of tolerance and decide if the
1030 * rate being applied is within that bounds of the hardware
1031 * rate. If so, no scaling or compensation need be done.
1033 thresh_lo
= adjust_tsc_khz(tsc_khz
, -tsc_tolerance_ppm
);
1034 thresh_hi
= adjust_tsc_khz(tsc_khz
, tsc_tolerance_ppm
);
1035 if (this_tsc_khz
< thresh_lo
|| this_tsc_khz
> thresh_hi
) {
1036 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", this_tsc_khz
, thresh_lo
, thresh_hi
);
1039 kvm_x86_ops
->set_tsc_khz(vcpu
, this_tsc_khz
, use_scaling
);
1042 static u64
compute_guest_tsc(struct kvm_vcpu
*vcpu
, s64 kernel_ns
)
1044 u64 tsc
= pvclock_scale_delta(kernel_ns
-vcpu
->arch
.this_tsc_nsec
,
1045 vcpu
->arch
.virtual_tsc_mult
,
1046 vcpu
->arch
.virtual_tsc_shift
);
1047 tsc
+= vcpu
->arch
.this_tsc_write
;
1051 void kvm_write_tsc(struct kvm_vcpu
*vcpu
, u64 data
)
1053 struct kvm
*kvm
= vcpu
->kvm
;
1054 u64 offset
, ns
, elapsed
;
1055 unsigned long flags
;
1058 raw_spin_lock_irqsave(&kvm
->arch
.tsc_write_lock
, flags
);
1059 offset
= kvm_x86_ops
->compute_tsc_offset(vcpu
, data
);
1060 ns
= get_kernel_ns();
1061 elapsed
= ns
- kvm
->arch
.last_tsc_nsec
;
1063 /* n.b - signed multiplication and division required */
1064 usdiff
= data
- kvm
->arch
.last_tsc_write
;
1065 #ifdef CONFIG_X86_64
1066 usdiff
= (usdiff
* 1000) / vcpu
->arch
.virtual_tsc_khz
;
1068 /* do_div() only does unsigned */
1069 asm("idivl %2; xor %%edx, %%edx"
1071 : "A"(usdiff
* 1000), "rm"(vcpu
->arch
.virtual_tsc_khz
));
1073 do_div(elapsed
, 1000);
1079 * Special case: TSC write with a small delta (1 second) of virtual
1080 * cycle time against real time is interpreted as an attempt to
1081 * synchronize the CPU.
1083 * For a reliable TSC, we can match TSC offsets, and for an unstable
1084 * TSC, we add elapsed time in this computation. We could let the
1085 * compensation code attempt to catch up if we fall behind, but
1086 * it's better to try to match offsets from the beginning.
1088 if (usdiff
< USEC_PER_SEC
&&
1089 vcpu
->arch
.virtual_tsc_khz
== kvm
->arch
.last_tsc_khz
) {
1090 if (!check_tsc_unstable()) {
1091 offset
= kvm
->arch
.cur_tsc_offset
;
1092 pr_debug("kvm: matched tsc offset for %llu\n", data
);
1094 u64 delta
= nsec_to_cycles(vcpu
, elapsed
);
1096 offset
= kvm_x86_ops
->compute_tsc_offset(vcpu
, data
);
1097 pr_debug("kvm: adjusted tsc offset by %llu\n", delta
);
1101 * We split periods of matched TSC writes into generations.
1102 * For each generation, we track the original measured
1103 * nanosecond time, offset, and write, so if TSCs are in
1104 * sync, we can match exact offset, and if not, we can match
1105 * exact software computation in compute_guest_tsc()
1107 * These values are tracked in kvm->arch.cur_xxx variables.
1109 kvm
->arch
.cur_tsc_generation
++;
1110 kvm
->arch
.cur_tsc_nsec
= ns
;
1111 kvm
->arch
.cur_tsc_write
= data
;
1112 kvm
->arch
.cur_tsc_offset
= offset
;
1113 pr_debug("kvm: new tsc generation %u, clock %llu\n",
1114 kvm
->arch
.cur_tsc_generation
, data
);
1118 * We also track th most recent recorded KHZ, write and time to
1119 * allow the matching interval to be extended at each write.
1121 kvm
->arch
.last_tsc_nsec
= ns
;
1122 kvm
->arch
.last_tsc_write
= data
;
1123 kvm
->arch
.last_tsc_khz
= vcpu
->arch
.virtual_tsc_khz
;
1125 /* Reset of TSC must disable overshoot protection below */
1126 vcpu
->arch
.hv_clock
.tsc_timestamp
= 0;
1127 vcpu
->arch
.last_guest_tsc
= data
;
1129 /* Keep track of which generation this VCPU has synchronized to */
1130 vcpu
->arch
.this_tsc_generation
= kvm
->arch
.cur_tsc_generation
;
1131 vcpu
->arch
.this_tsc_nsec
= kvm
->arch
.cur_tsc_nsec
;
1132 vcpu
->arch
.this_tsc_write
= kvm
->arch
.cur_tsc_write
;
1134 kvm_x86_ops
->write_tsc_offset(vcpu
, offset
);
1135 raw_spin_unlock_irqrestore(&kvm
->arch
.tsc_write_lock
, flags
);
1138 EXPORT_SYMBOL_GPL(kvm_write_tsc
);
1140 static int kvm_guest_time_update(struct kvm_vcpu
*v
)
1142 unsigned long flags
;
1143 struct kvm_vcpu_arch
*vcpu
= &v
->arch
;
1145 unsigned long this_tsc_khz
;
1146 s64 kernel_ns
, max_kernel_ns
;
1150 /* Keep irq disabled to prevent changes to the clock */
1151 local_irq_save(flags
);
1152 tsc_timestamp
= kvm_x86_ops
->read_l1_tsc(v
);
1153 kernel_ns
= get_kernel_ns();
1154 this_tsc_khz
= __get_cpu_var(cpu_tsc_khz
);
1155 if (unlikely(this_tsc_khz
== 0)) {
1156 local_irq_restore(flags
);
1157 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, v
);
1162 * We may have to catch up the TSC to match elapsed wall clock
1163 * time for two reasons, even if kvmclock is used.
1164 * 1) CPU could have been running below the maximum TSC rate
1165 * 2) Broken TSC compensation resets the base at each VCPU
1166 * entry to avoid unknown leaps of TSC even when running
1167 * again on the same CPU. This may cause apparent elapsed
1168 * time to disappear, and the guest to stand still or run
1171 if (vcpu
->tsc_catchup
) {
1172 u64 tsc
= compute_guest_tsc(v
, kernel_ns
);
1173 if (tsc
> tsc_timestamp
) {
1174 adjust_tsc_offset_guest(v
, tsc
- tsc_timestamp
);
1175 tsc_timestamp
= tsc
;
1179 local_irq_restore(flags
);
1181 if (!vcpu
->time_page
)
1185 * Time as measured by the TSC may go backwards when resetting the base
1186 * tsc_timestamp. The reason for this is that the TSC resolution is
1187 * higher than the resolution of the other clock scales. Thus, many
1188 * possible measurments of the TSC correspond to one measurement of any
1189 * other clock, and so a spread of values is possible. This is not a
1190 * problem for the computation of the nanosecond clock; with TSC rates
1191 * around 1GHZ, there can only be a few cycles which correspond to one
1192 * nanosecond value, and any path through this code will inevitably
1193 * take longer than that. However, with the kernel_ns value itself,
1194 * the precision may be much lower, down to HZ granularity. If the
1195 * first sampling of TSC against kernel_ns ends in the low part of the
1196 * range, and the second in the high end of the range, we can get:
1198 * (TSC - offset_low) * S + kns_old > (TSC - offset_high) * S + kns_new
1200 * As the sampling errors potentially range in the thousands of cycles,
1201 * it is possible such a time value has already been observed by the
1202 * guest. To protect against this, we must compute the system time as
1203 * observed by the guest and ensure the new system time is greater.
1206 if (vcpu
->hv_clock
.tsc_timestamp
) {
1207 max_kernel_ns
= vcpu
->last_guest_tsc
-
1208 vcpu
->hv_clock
.tsc_timestamp
;
1209 max_kernel_ns
= pvclock_scale_delta(max_kernel_ns
,
1210 vcpu
->hv_clock
.tsc_to_system_mul
,
1211 vcpu
->hv_clock
.tsc_shift
);
1212 max_kernel_ns
+= vcpu
->last_kernel_ns
;
1215 if (unlikely(vcpu
->hw_tsc_khz
!= this_tsc_khz
)) {
1216 kvm_get_time_scale(NSEC_PER_SEC
/ 1000, this_tsc_khz
,
1217 &vcpu
->hv_clock
.tsc_shift
,
1218 &vcpu
->hv_clock
.tsc_to_system_mul
);
1219 vcpu
->hw_tsc_khz
= this_tsc_khz
;
1222 if (max_kernel_ns
> kernel_ns
)
1223 kernel_ns
= max_kernel_ns
;
1225 /* With all the info we got, fill in the values */
1226 vcpu
->hv_clock
.tsc_timestamp
= tsc_timestamp
;
1227 vcpu
->hv_clock
.system_time
= kernel_ns
+ v
->kvm
->arch
.kvmclock_offset
;
1228 vcpu
->last_kernel_ns
= kernel_ns
;
1229 vcpu
->last_guest_tsc
= tsc_timestamp
;
1232 if (vcpu
->pvclock_set_guest_stopped_request
) {
1233 pvclock_flags
|= PVCLOCK_GUEST_STOPPED
;
1234 vcpu
->pvclock_set_guest_stopped_request
= false;
1237 vcpu
->hv_clock
.flags
= pvclock_flags
;
1240 * The interface expects us to write an even number signaling that the
1241 * update is finished. Since the guest won't see the intermediate
1242 * state, we just increase by 2 at the end.
1244 vcpu
->hv_clock
.version
+= 2;
1246 shared_kaddr
= kmap_atomic(vcpu
->time_page
);
1248 memcpy(shared_kaddr
+ vcpu
->time_offset
, &vcpu
->hv_clock
,
1249 sizeof(vcpu
->hv_clock
));
1251 kunmap_atomic(shared_kaddr
);
1253 mark_page_dirty(v
->kvm
, vcpu
->time
>> PAGE_SHIFT
);
1257 static bool msr_mtrr_valid(unsigned msr
)
1260 case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR
- 1:
1261 case MSR_MTRRfix64K_00000
:
1262 case MSR_MTRRfix16K_80000
:
1263 case MSR_MTRRfix16K_A0000
:
1264 case MSR_MTRRfix4K_C0000
:
1265 case MSR_MTRRfix4K_C8000
:
1266 case MSR_MTRRfix4K_D0000
:
1267 case MSR_MTRRfix4K_D8000
:
1268 case MSR_MTRRfix4K_E0000
:
1269 case MSR_MTRRfix4K_E8000
:
1270 case MSR_MTRRfix4K_F0000
:
1271 case MSR_MTRRfix4K_F8000
:
1272 case MSR_MTRRdefType
:
1273 case MSR_IA32_CR_PAT
:
1281 static bool valid_pat_type(unsigned t
)
1283 return t
< 8 && (1 << t
) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
1286 static bool valid_mtrr_type(unsigned t
)
1288 return t
< 8 && (1 << t
) & 0x73; /* 0, 1, 4, 5, 6 */
1291 static bool mtrr_valid(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1295 if (!msr_mtrr_valid(msr
))
1298 if (msr
== MSR_IA32_CR_PAT
) {
1299 for (i
= 0; i
< 8; i
++)
1300 if (!valid_pat_type((data
>> (i
* 8)) & 0xff))
1303 } else if (msr
== MSR_MTRRdefType
) {
1306 return valid_mtrr_type(data
& 0xff);
1307 } else if (msr
>= MSR_MTRRfix64K_00000
&& msr
<= MSR_MTRRfix4K_F8000
) {
1308 for (i
= 0; i
< 8 ; i
++)
1309 if (!valid_mtrr_type((data
>> (i
* 8)) & 0xff))
1314 /* variable MTRRs */
1315 return valid_mtrr_type(data
& 0xff);
1318 static int set_msr_mtrr(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1320 u64
*p
= (u64
*)&vcpu
->arch
.mtrr_state
.fixed_ranges
;
1322 if (!mtrr_valid(vcpu
, msr
, data
))
1325 if (msr
== MSR_MTRRdefType
) {
1326 vcpu
->arch
.mtrr_state
.def_type
= data
;
1327 vcpu
->arch
.mtrr_state
.enabled
= (data
& 0xc00) >> 10;
1328 } else if (msr
== MSR_MTRRfix64K_00000
)
1330 else if (msr
== MSR_MTRRfix16K_80000
|| msr
== MSR_MTRRfix16K_A0000
)
1331 p
[1 + msr
- MSR_MTRRfix16K_80000
] = data
;
1332 else if (msr
>= MSR_MTRRfix4K_C0000
&& msr
<= MSR_MTRRfix4K_F8000
)
1333 p
[3 + msr
- MSR_MTRRfix4K_C0000
] = data
;
1334 else if (msr
== MSR_IA32_CR_PAT
)
1335 vcpu
->arch
.pat
= data
;
1336 else { /* Variable MTRRs */
1337 int idx
, is_mtrr_mask
;
1340 idx
= (msr
- 0x200) / 2;
1341 is_mtrr_mask
= msr
- 0x200 - 2 * idx
;
1344 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].base_lo
;
1347 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].mask_lo
;
1351 kvm_mmu_reset_context(vcpu
);
1355 static int set_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1357 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
1358 unsigned bank_num
= mcg_cap
& 0xff;
1361 case MSR_IA32_MCG_STATUS
:
1362 vcpu
->arch
.mcg_status
= data
;
1364 case MSR_IA32_MCG_CTL
:
1365 if (!(mcg_cap
& MCG_CTL_P
))
1367 if (data
!= 0 && data
!= ~(u64
)0)
1369 vcpu
->arch
.mcg_ctl
= data
;
1372 if (msr
>= MSR_IA32_MC0_CTL
&&
1373 msr
< MSR_IA32_MC0_CTL
+ 4 * bank_num
) {
1374 u32 offset
= msr
- MSR_IA32_MC0_CTL
;
1375 /* only 0 or all 1s can be written to IA32_MCi_CTL
1376 * some Linux kernels though clear bit 10 in bank 4 to
1377 * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1378 * this to avoid an uncatched #GP in the guest
1380 if ((offset
& 0x3) == 0 &&
1381 data
!= 0 && (data
| (1 << 10)) != ~(u64
)0)
1383 vcpu
->arch
.mce_banks
[offset
] = data
;
1391 static int xen_hvm_config(struct kvm_vcpu
*vcpu
, u64 data
)
1393 struct kvm
*kvm
= vcpu
->kvm
;
1394 int lm
= is_long_mode(vcpu
);
1395 u8
*blob_addr
= lm
? (u8
*)(long)kvm
->arch
.xen_hvm_config
.blob_addr_64
1396 : (u8
*)(long)kvm
->arch
.xen_hvm_config
.blob_addr_32
;
1397 u8 blob_size
= lm
? kvm
->arch
.xen_hvm_config
.blob_size_64
1398 : kvm
->arch
.xen_hvm_config
.blob_size_32
;
1399 u32 page_num
= data
& ~PAGE_MASK
;
1400 u64 page_addr
= data
& PAGE_MASK
;
1405 if (page_num
>= blob_size
)
1408 page
= memdup_user(blob_addr
+ (page_num
* PAGE_SIZE
), PAGE_SIZE
);
1413 if (kvm_write_guest(kvm
, page_addr
, page
, PAGE_SIZE
))
1422 static bool kvm_hv_hypercall_enabled(struct kvm
*kvm
)
1424 return kvm
->arch
.hv_hypercall
& HV_X64_MSR_HYPERCALL_ENABLE
;
1427 static bool kvm_hv_msr_partition_wide(u32 msr
)
1431 case HV_X64_MSR_GUEST_OS_ID
:
1432 case HV_X64_MSR_HYPERCALL
:
1440 static int set_msr_hyperv_pw(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1442 struct kvm
*kvm
= vcpu
->kvm
;
1445 case HV_X64_MSR_GUEST_OS_ID
:
1446 kvm
->arch
.hv_guest_os_id
= data
;
1447 /* setting guest os id to zero disables hypercall page */
1448 if (!kvm
->arch
.hv_guest_os_id
)
1449 kvm
->arch
.hv_hypercall
&= ~HV_X64_MSR_HYPERCALL_ENABLE
;
1451 case HV_X64_MSR_HYPERCALL
: {
1456 /* if guest os id is not set hypercall should remain disabled */
1457 if (!kvm
->arch
.hv_guest_os_id
)
1459 if (!(data
& HV_X64_MSR_HYPERCALL_ENABLE
)) {
1460 kvm
->arch
.hv_hypercall
= data
;
1463 gfn
= data
>> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT
;
1464 addr
= gfn_to_hva(kvm
, gfn
);
1465 if (kvm_is_error_hva(addr
))
1467 kvm_x86_ops
->patch_hypercall(vcpu
, instructions
);
1468 ((unsigned char *)instructions
)[3] = 0xc3; /* ret */
1469 if (__copy_to_user((void __user
*)addr
, instructions
, 4))
1471 kvm
->arch
.hv_hypercall
= data
;
1475 vcpu_unimpl(vcpu
, "HYPER-V unimplemented wrmsr: 0x%x "
1476 "data 0x%llx\n", msr
, data
);
1482 static int set_msr_hyperv(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1485 case HV_X64_MSR_APIC_ASSIST_PAGE
: {
1488 if (!(data
& HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE
)) {
1489 vcpu
->arch
.hv_vapic
= data
;
1492 addr
= gfn_to_hva(vcpu
->kvm
, data
>>
1493 HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT
);
1494 if (kvm_is_error_hva(addr
))
1496 if (__clear_user((void __user
*)addr
, PAGE_SIZE
))
1498 vcpu
->arch
.hv_vapic
= data
;
1501 case HV_X64_MSR_EOI
:
1502 return kvm_hv_vapic_msr_write(vcpu
, APIC_EOI
, data
);
1503 case HV_X64_MSR_ICR
:
1504 return kvm_hv_vapic_msr_write(vcpu
, APIC_ICR
, data
);
1505 case HV_X64_MSR_TPR
:
1506 return kvm_hv_vapic_msr_write(vcpu
, APIC_TASKPRI
, data
);
1508 vcpu_unimpl(vcpu
, "HYPER-V unimplemented wrmsr: 0x%x "
1509 "data 0x%llx\n", msr
, data
);
1516 static int kvm_pv_enable_async_pf(struct kvm_vcpu
*vcpu
, u64 data
)
1518 gpa_t gpa
= data
& ~0x3f;
1520 /* Bits 2:5 are reserved, Should be zero */
1524 vcpu
->arch
.apf
.msr_val
= data
;
1526 if (!(data
& KVM_ASYNC_PF_ENABLED
)) {
1527 kvm_clear_async_pf_completion_queue(vcpu
);
1528 kvm_async_pf_hash_reset(vcpu
);
1532 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, gpa
))
1535 vcpu
->arch
.apf
.send_user_only
= !(data
& KVM_ASYNC_PF_SEND_ALWAYS
);
1536 kvm_async_pf_wakeup_all(vcpu
);
1540 static void kvmclock_reset(struct kvm_vcpu
*vcpu
)
1542 if (vcpu
->arch
.time_page
) {
1543 kvm_release_page_dirty(vcpu
->arch
.time_page
);
1544 vcpu
->arch
.time_page
= NULL
;
1548 static void accumulate_steal_time(struct kvm_vcpu
*vcpu
)
1552 if (!(vcpu
->arch
.st
.msr_val
& KVM_MSR_ENABLED
))
1555 delta
= current
->sched_info
.run_delay
- vcpu
->arch
.st
.last_steal
;
1556 vcpu
->arch
.st
.last_steal
= current
->sched_info
.run_delay
;
1557 vcpu
->arch
.st
.accum_steal
= delta
;
1560 static void record_steal_time(struct kvm_vcpu
*vcpu
)
1562 if (!(vcpu
->arch
.st
.msr_val
& KVM_MSR_ENABLED
))
1565 if (unlikely(kvm_read_guest_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
1566 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
))))
1569 vcpu
->arch
.st
.steal
.steal
+= vcpu
->arch
.st
.accum_steal
;
1570 vcpu
->arch
.st
.steal
.version
+= 2;
1571 vcpu
->arch
.st
.accum_steal
= 0;
1573 kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
1574 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
));
1577 int kvm_set_msr_common(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1583 return set_efer(vcpu
, data
);
1585 data
&= ~(u64
)0x40; /* ignore flush filter disable */
1586 data
&= ~(u64
)0x100; /* ignore ignne emulation enable */
1587 data
&= ~(u64
)0x8; /* ignore TLB cache disable */
1589 vcpu_unimpl(vcpu
, "unimplemented HWCR wrmsr: 0x%llx\n",
1594 case MSR_FAM10H_MMIO_CONF_BASE
:
1596 vcpu_unimpl(vcpu
, "unimplemented MMIO_CONF_BASE wrmsr: "
1601 case MSR_AMD64_NB_CFG
:
1603 case MSR_IA32_DEBUGCTLMSR
:
1605 /* We support the non-activated case already */
1607 } else if (data
& ~(DEBUGCTLMSR_LBR
| DEBUGCTLMSR_BTF
)) {
1608 /* Values other than LBR and BTF are vendor-specific,
1609 thus reserved and should throw a #GP */
1612 vcpu_unimpl(vcpu
, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
1615 case MSR_IA32_UCODE_REV
:
1616 case MSR_IA32_UCODE_WRITE
:
1617 case MSR_VM_HSAVE_PA
:
1618 case MSR_AMD64_PATCH_LOADER
:
1620 case 0x200 ... 0x2ff:
1621 return set_msr_mtrr(vcpu
, msr
, data
);
1622 case MSR_IA32_APICBASE
:
1623 kvm_set_apic_base(vcpu
, data
);
1625 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0x3ff:
1626 return kvm_x2apic_msr_write(vcpu
, msr
, data
);
1627 case MSR_IA32_TSCDEADLINE
:
1628 kvm_set_lapic_tscdeadline_msr(vcpu
, data
);
1630 case MSR_IA32_MISC_ENABLE
:
1631 vcpu
->arch
.ia32_misc_enable_msr
= data
;
1633 case MSR_KVM_WALL_CLOCK_NEW
:
1634 case MSR_KVM_WALL_CLOCK
:
1635 vcpu
->kvm
->arch
.wall_clock
= data
;
1636 kvm_write_wall_clock(vcpu
->kvm
, data
);
1638 case MSR_KVM_SYSTEM_TIME_NEW
:
1639 case MSR_KVM_SYSTEM_TIME
: {
1640 kvmclock_reset(vcpu
);
1642 vcpu
->arch
.time
= data
;
1643 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
1645 /* we verify if the enable bit is set... */
1649 /* ...but clean it before doing the actual write */
1650 vcpu
->arch
.time_offset
= data
& ~(PAGE_MASK
| 1);
1652 vcpu
->arch
.time_page
=
1653 gfn_to_page(vcpu
->kvm
, data
>> PAGE_SHIFT
);
1655 if (is_error_page(vcpu
->arch
.time_page
))
1656 vcpu
->arch
.time_page
= NULL
;
1660 case MSR_KVM_ASYNC_PF_EN
:
1661 if (kvm_pv_enable_async_pf(vcpu
, data
))
1664 case MSR_KVM_STEAL_TIME
:
1666 if (unlikely(!sched_info_on()))
1669 if (data
& KVM_STEAL_RESERVED_MASK
)
1672 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
1673 data
& KVM_STEAL_VALID_BITS
))
1676 vcpu
->arch
.st
.msr_val
= data
;
1678 if (!(data
& KVM_MSR_ENABLED
))
1681 vcpu
->arch
.st
.last_steal
= current
->sched_info
.run_delay
;
1684 accumulate_steal_time(vcpu
);
1687 kvm_make_request(KVM_REQ_STEAL_UPDATE
, vcpu
);
1690 case MSR_KVM_PV_EOI_EN
:
1691 if (kvm_lapic_enable_pv_eoi(vcpu
, data
))
1695 case MSR_IA32_MCG_CTL
:
1696 case MSR_IA32_MCG_STATUS
:
1697 case MSR_IA32_MC0_CTL
... MSR_IA32_MC0_CTL
+ 4 * KVM_MAX_MCE_BANKS
- 1:
1698 return set_msr_mce(vcpu
, msr
, data
);
1700 /* Performance counters are not protected by a CPUID bit,
1701 * so we should check all of them in the generic path for the sake of
1702 * cross vendor migration.
1703 * Writing a zero into the event select MSRs disables them,
1704 * which we perfectly emulate ;-). Any other value should be at least
1705 * reported, some guests depend on them.
1707 case MSR_K7_EVNTSEL0
:
1708 case MSR_K7_EVNTSEL1
:
1709 case MSR_K7_EVNTSEL2
:
1710 case MSR_K7_EVNTSEL3
:
1712 vcpu_unimpl(vcpu
, "unimplemented perfctr wrmsr: "
1713 "0x%x data 0x%llx\n", msr
, data
);
1715 /* at least RHEL 4 unconditionally writes to the perfctr registers,
1716 * so we ignore writes to make it happy.
1718 case MSR_K7_PERFCTR0
:
1719 case MSR_K7_PERFCTR1
:
1720 case MSR_K7_PERFCTR2
:
1721 case MSR_K7_PERFCTR3
:
1722 vcpu_unimpl(vcpu
, "unimplemented perfctr wrmsr: "
1723 "0x%x data 0x%llx\n", msr
, data
);
1725 case MSR_P6_PERFCTR0
:
1726 case MSR_P6_PERFCTR1
:
1728 case MSR_P6_EVNTSEL0
:
1729 case MSR_P6_EVNTSEL1
:
1730 if (kvm_pmu_msr(vcpu
, msr
))
1731 return kvm_pmu_set_msr(vcpu
, msr
, data
);
1733 if (pr
|| data
!= 0)
1734 vcpu_unimpl(vcpu
, "disabled perfctr wrmsr: "
1735 "0x%x data 0x%llx\n", msr
, data
);
1737 case MSR_K7_CLK_CTL
:
1739 * Ignore all writes to this no longer documented MSR.
1740 * Writes are only relevant for old K7 processors,
1741 * all pre-dating SVM, but a recommended workaround from
1742 * AMD for these chips. It is possible to specify the
1743 * affected processor models on the command line, hence
1744 * the need to ignore the workaround.
1747 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
1748 if (kvm_hv_msr_partition_wide(msr
)) {
1750 mutex_lock(&vcpu
->kvm
->lock
);
1751 r
= set_msr_hyperv_pw(vcpu
, msr
, data
);
1752 mutex_unlock(&vcpu
->kvm
->lock
);
1755 return set_msr_hyperv(vcpu
, msr
, data
);
1757 case MSR_IA32_BBL_CR_CTL3
:
1758 /* Drop writes to this legacy MSR -- see rdmsr
1759 * counterpart for further detail.
1761 vcpu_unimpl(vcpu
, "ignored wrmsr: 0x%x data %llx\n", msr
, data
);
1763 case MSR_AMD64_OSVW_ID_LENGTH
:
1764 if (!guest_cpuid_has_osvw(vcpu
))
1766 vcpu
->arch
.osvw
.length
= data
;
1768 case MSR_AMD64_OSVW_STATUS
:
1769 if (!guest_cpuid_has_osvw(vcpu
))
1771 vcpu
->arch
.osvw
.status
= data
;
1774 if (msr
&& (msr
== vcpu
->kvm
->arch
.xen_hvm_config
.msr
))
1775 return xen_hvm_config(vcpu
, data
);
1776 if (kvm_pmu_msr(vcpu
, msr
))
1777 return kvm_pmu_set_msr(vcpu
, msr
, data
);
1779 vcpu_unimpl(vcpu
, "unhandled wrmsr: 0x%x data %llx\n",
1783 vcpu_unimpl(vcpu
, "ignored wrmsr: 0x%x data %llx\n",
1790 EXPORT_SYMBOL_GPL(kvm_set_msr_common
);
1794 * Reads an msr value (of 'msr_index') into 'pdata'.
1795 * Returns 0 on success, non-0 otherwise.
1796 * Assumes vcpu_load() was already called.
1798 int kvm_get_msr(struct kvm_vcpu
*vcpu
, u32 msr_index
, u64
*pdata
)
1800 return kvm_x86_ops
->get_msr(vcpu
, msr_index
, pdata
);
1803 static int get_msr_mtrr(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
1805 u64
*p
= (u64
*)&vcpu
->arch
.mtrr_state
.fixed_ranges
;
1807 if (!msr_mtrr_valid(msr
))
1810 if (msr
== MSR_MTRRdefType
)
1811 *pdata
= vcpu
->arch
.mtrr_state
.def_type
+
1812 (vcpu
->arch
.mtrr_state
.enabled
<< 10);
1813 else if (msr
== MSR_MTRRfix64K_00000
)
1815 else if (msr
== MSR_MTRRfix16K_80000
|| msr
== MSR_MTRRfix16K_A0000
)
1816 *pdata
= p
[1 + msr
- MSR_MTRRfix16K_80000
];
1817 else if (msr
>= MSR_MTRRfix4K_C0000
&& msr
<= MSR_MTRRfix4K_F8000
)
1818 *pdata
= p
[3 + msr
- MSR_MTRRfix4K_C0000
];
1819 else if (msr
== MSR_IA32_CR_PAT
)
1820 *pdata
= vcpu
->arch
.pat
;
1821 else { /* Variable MTRRs */
1822 int idx
, is_mtrr_mask
;
1825 idx
= (msr
- 0x200) / 2;
1826 is_mtrr_mask
= msr
- 0x200 - 2 * idx
;
1829 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].base_lo
;
1832 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].mask_lo
;
1839 static int get_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
1842 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
1843 unsigned bank_num
= mcg_cap
& 0xff;
1846 case MSR_IA32_P5_MC_ADDR
:
1847 case MSR_IA32_P5_MC_TYPE
:
1850 case MSR_IA32_MCG_CAP
:
1851 data
= vcpu
->arch
.mcg_cap
;
1853 case MSR_IA32_MCG_CTL
:
1854 if (!(mcg_cap
& MCG_CTL_P
))
1856 data
= vcpu
->arch
.mcg_ctl
;
1858 case MSR_IA32_MCG_STATUS
:
1859 data
= vcpu
->arch
.mcg_status
;
1862 if (msr
>= MSR_IA32_MC0_CTL
&&
1863 msr
< MSR_IA32_MC0_CTL
+ 4 * bank_num
) {
1864 u32 offset
= msr
- MSR_IA32_MC0_CTL
;
1865 data
= vcpu
->arch
.mce_banks
[offset
];
1874 static int get_msr_hyperv_pw(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
1877 struct kvm
*kvm
= vcpu
->kvm
;
1880 case HV_X64_MSR_GUEST_OS_ID
:
1881 data
= kvm
->arch
.hv_guest_os_id
;
1883 case HV_X64_MSR_HYPERCALL
:
1884 data
= kvm
->arch
.hv_hypercall
;
1887 vcpu_unimpl(vcpu
, "Hyper-V unhandled rdmsr: 0x%x\n", msr
);
1895 static int get_msr_hyperv(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
1900 case HV_X64_MSR_VP_INDEX
: {
1903 kvm_for_each_vcpu(r
, v
, vcpu
->kvm
)
1908 case HV_X64_MSR_EOI
:
1909 return kvm_hv_vapic_msr_read(vcpu
, APIC_EOI
, pdata
);
1910 case HV_X64_MSR_ICR
:
1911 return kvm_hv_vapic_msr_read(vcpu
, APIC_ICR
, pdata
);
1912 case HV_X64_MSR_TPR
:
1913 return kvm_hv_vapic_msr_read(vcpu
, APIC_TASKPRI
, pdata
);
1914 case HV_X64_MSR_APIC_ASSIST_PAGE
:
1915 data
= vcpu
->arch
.hv_vapic
;
1918 vcpu_unimpl(vcpu
, "Hyper-V unhandled rdmsr: 0x%x\n", msr
);
1925 int kvm_get_msr_common(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
1930 case MSR_IA32_PLATFORM_ID
:
1931 case MSR_IA32_EBL_CR_POWERON
:
1932 case MSR_IA32_DEBUGCTLMSR
:
1933 case MSR_IA32_LASTBRANCHFROMIP
:
1934 case MSR_IA32_LASTBRANCHTOIP
:
1935 case MSR_IA32_LASTINTFROMIP
:
1936 case MSR_IA32_LASTINTTOIP
:
1939 case MSR_VM_HSAVE_PA
:
1940 case MSR_K7_EVNTSEL0
:
1941 case MSR_K7_PERFCTR0
:
1942 case MSR_K8_INT_PENDING_MSG
:
1943 case MSR_AMD64_NB_CFG
:
1944 case MSR_FAM10H_MMIO_CONF_BASE
:
1947 case MSR_P6_PERFCTR0
:
1948 case MSR_P6_PERFCTR1
:
1949 case MSR_P6_EVNTSEL0
:
1950 case MSR_P6_EVNTSEL1
:
1951 if (kvm_pmu_msr(vcpu
, msr
))
1952 return kvm_pmu_get_msr(vcpu
, msr
, pdata
);
1955 case MSR_IA32_UCODE_REV
:
1956 data
= 0x100000000ULL
;
1959 data
= 0x500 | KVM_NR_VAR_MTRR
;
1961 case 0x200 ... 0x2ff:
1962 return get_msr_mtrr(vcpu
, msr
, pdata
);
1963 case 0xcd: /* fsb frequency */
1967 * MSR_EBC_FREQUENCY_ID
1968 * Conservative value valid for even the basic CPU models.
1969 * Models 0,1: 000 in bits 23:21 indicating a bus speed of
1970 * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
1971 * and 266MHz for model 3, or 4. Set Core Clock
1972 * Frequency to System Bus Frequency Ratio to 1 (bits
1973 * 31:24) even though these are only valid for CPU
1974 * models > 2, however guests may end up dividing or
1975 * multiplying by zero otherwise.
1977 case MSR_EBC_FREQUENCY_ID
:
1980 case MSR_IA32_APICBASE
:
1981 data
= kvm_get_apic_base(vcpu
);
1983 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0x3ff:
1984 return kvm_x2apic_msr_read(vcpu
, msr
, pdata
);
1986 case MSR_IA32_TSCDEADLINE
:
1987 data
= kvm_get_lapic_tscdeadline_msr(vcpu
);
1989 case MSR_IA32_MISC_ENABLE
:
1990 data
= vcpu
->arch
.ia32_misc_enable_msr
;
1992 case MSR_IA32_PERF_STATUS
:
1993 /* TSC increment by tick */
1995 /* CPU multiplier */
1996 data
|= (((uint64_t)4ULL) << 40);
1999 data
= vcpu
->arch
.efer
;
2001 case MSR_KVM_WALL_CLOCK
:
2002 case MSR_KVM_WALL_CLOCK_NEW
:
2003 data
= vcpu
->kvm
->arch
.wall_clock
;
2005 case MSR_KVM_SYSTEM_TIME
:
2006 case MSR_KVM_SYSTEM_TIME_NEW
:
2007 data
= vcpu
->arch
.time
;
2009 case MSR_KVM_ASYNC_PF_EN
:
2010 data
= vcpu
->arch
.apf
.msr_val
;
2012 case MSR_KVM_STEAL_TIME
:
2013 data
= vcpu
->arch
.st
.msr_val
;
2015 case MSR_KVM_PV_EOI_EN
:
2016 data
= vcpu
->arch
.pv_eoi
.msr_val
;
2018 case MSR_IA32_P5_MC_ADDR
:
2019 case MSR_IA32_P5_MC_TYPE
:
2020 case MSR_IA32_MCG_CAP
:
2021 case MSR_IA32_MCG_CTL
:
2022 case MSR_IA32_MCG_STATUS
:
2023 case MSR_IA32_MC0_CTL
... MSR_IA32_MC0_CTL
+ 4 * KVM_MAX_MCE_BANKS
- 1:
2024 return get_msr_mce(vcpu
, msr
, pdata
);
2025 case MSR_K7_CLK_CTL
:
2027 * Provide expected ramp-up count for K7. All other
2028 * are set to zero, indicating minimum divisors for
2031 * This prevents guest kernels on AMD host with CPU
2032 * type 6, model 8 and higher from exploding due to
2033 * the rdmsr failing.
2037 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
2038 if (kvm_hv_msr_partition_wide(msr
)) {
2040 mutex_lock(&vcpu
->kvm
->lock
);
2041 r
= get_msr_hyperv_pw(vcpu
, msr
, pdata
);
2042 mutex_unlock(&vcpu
->kvm
->lock
);
2045 return get_msr_hyperv(vcpu
, msr
, pdata
);
2047 case MSR_IA32_BBL_CR_CTL3
:
2048 /* This legacy MSR exists but isn't fully documented in current
2049 * silicon. It is however accessed by winxp in very narrow
2050 * scenarios where it sets bit #19, itself documented as
2051 * a "reserved" bit. Best effort attempt to source coherent
2052 * read data here should the balance of the register be
2053 * interpreted by the guest:
2055 * L2 cache control register 3: 64GB range, 256KB size,
2056 * enabled, latency 0x1, configured
2060 case MSR_AMD64_OSVW_ID_LENGTH
:
2061 if (!guest_cpuid_has_osvw(vcpu
))
2063 data
= vcpu
->arch
.osvw
.length
;
2065 case MSR_AMD64_OSVW_STATUS
:
2066 if (!guest_cpuid_has_osvw(vcpu
))
2068 data
= vcpu
->arch
.osvw
.status
;
2071 if (kvm_pmu_msr(vcpu
, msr
))
2072 return kvm_pmu_get_msr(vcpu
, msr
, pdata
);
2074 vcpu_unimpl(vcpu
, "unhandled rdmsr: 0x%x\n", msr
);
2077 vcpu_unimpl(vcpu
, "ignored rdmsr: 0x%x\n", msr
);
2085 EXPORT_SYMBOL_GPL(kvm_get_msr_common
);
2088 * Read or write a bunch of msrs. All parameters are kernel addresses.
2090 * @return number of msrs set successfully.
2092 static int __msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs
*msrs
,
2093 struct kvm_msr_entry
*entries
,
2094 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
2095 unsigned index
, u64
*data
))
2099 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
2100 for (i
= 0; i
< msrs
->nmsrs
; ++i
)
2101 if (do_msr(vcpu
, entries
[i
].index
, &entries
[i
].data
))
2103 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
2109 * Read or write a bunch of msrs. Parameters are user addresses.
2111 * @return number of msrs set successfully.
2113 static int msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs __user
*user_msrs
,
2114 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
2115 unsigned index
, u64
*data
),
2118 struct kvm_msrs msrs
;
2119 struct kvm_msr_entry
*entries
;
2124 if (copy_from_user(&msrs
, user_msrs
, sizeof msrs
))
2128 if (msrs
.nmsrs
>= MAX_IO_MSRS
)
2131 size
= sizeof(struct kvm_msr_entry
) * msrs
.nmsrs
;
2132 entries
= memdup_user(user_msrs
->entries
, size
);
2133 if (IS_ERR(entries
)) {
2134 r
= PTR_ERR(entries
);
2138 r
= n
= __msr_io(vcpu
, &msrs
, entries
, do_msr
);
2143 if (writeback
&& copy_to_user(user_msrs
->entries
, entries
, size
))
2154 int kvm_dev_ioctl_check_extension(long ext
)
2159 case KVM_CAP_IRQCHIP
:
2161 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL
:
2162 case KVM_CAP_SET_TSS_ADDR
:
2163 case KVM_CAP_EXT_CPUID
:
2164 case KVM_CAP_CLOCKSOURCE
:
2166 case KVM_CAP_NOP_IO_DELAY
:
2167 case KVM_CAP_MP_STATE
:
2168 case KVM_CAP_SYNC_MMU
:
2169 case KVM_CAP_USER_NMI
:
2170 case KVM_CAP_REINJECT_CONTROL
:
2171 case KVM_CAP_IRQ_INJECT_STATUS
:
2172 case KVM_CAP_ASSIGN_DEV_IRQ
:
2174 case KVM_CAP_IOEVENTFD
:
2176 case KVM_CAP_PIT_STATE2
:
2177 case KVM_CAP_SET_IDENTITY_MAP_ADDR
:
2178 case KVM_CAP_XEN_HVM
:
2179 case KVM_CAP_ADJUST_CLOCK
:
2180 case KVM_CAP_VCPU_EVENTS
:
2181 case KVM_CAP_HYPERV
:
2182 case KVM_CAP_HYPERV_VAPIC
:
2183 case KVM_CAP_HYPERV_SPIN
:
2184 case KVM_CAP_PCI_SEGMENT
:
2185 case KVM_CAP_DEBUGREGS
:
2186 case KVM_CAP_X86_ROBUST_SINGLESTEP
:
2188 case KVM_CAP_ASYNC_PF
:
2189 case KVM_CAP_GET_TSC_KHZ
:
2190 case KVM_CAP_PCI_2_3
:
2191 case KVM_CAP_KVMCLOCK_CTRL
:
2192 case KVM_CAP_READONLY_MEM
:
2193 case KVM_CAP_IRQFD_RESAMPLE
:
2196 case KVM_CAP_COALESCED_MMIO
:
2197 r
= KVM_COALESCED_MMIO_PAGE_OFFSET
;
2200 r
= !kvm_x86_ops
->cpu_has_accelerated_tpr();
2202 case KVM_CAP_NR_VCPUS
:
2203 r
= KVM_SOFT_MAX_VCPUS
;
2205 case KVM_CAP_MAX_VCPUS
:
2208 case KVM_CAP_NR_MEMSLOTS
:
2209 r
= KVM_MEMORY_SLOTS
;
2211 case KVM_CAP_PV_MMU
: /* obsolete */
2215 r
= iommu_present(&pci_bus_type
);
2218 r
= KVM_MAX_MCE_BANKS
;
2223 case KVM_CAP_TSC_CONTROL
:
2224 r
= kvm_has_tsc_control
;
2226 case KVM_CAP_TSC_DEADLINE_TIMER
:
2227 r
= boot_cpu_has(X86_FEATURE_TSC_DEADLINE_TIMER
);
2237 long kvm_arch_dev_ioctl(struct file
*filp
,
2238 unsigned int ioctl
, unsigned long arg
)
2240 void __user
*argp
= (void __user
*)arg
;
2244 case KVM_GET_MSR_INDEX_LIST
: {
2245 struct kvm_msr_list __user
*user_msr_list
= argp
;
2246 struct kvm_msr_list msr_list
;
2250 if (copy_from_user(&msr_list
, user_msr_list
, sizeof msr_list
))
2253 msr_list
.nmsrs
= num_msrs_to_save
+ ARRAY_SIZE(emulated_msrs
);
2254 if (copy_to_user(user_msr_list
, &msr_list
, sizeof msr_list
))
2257 if (n
< msr_list
.nmsrs
)
2260 if (copy_to_user(user_msr_list
->indices
, &msrs_to_save
,
2261 num_msrs_to_save
* sizeof(u32
)))
2263 if (copy_to_user(user_msr_list
->indices
+ num_msrs_to_save
,
2265 ARRAY_SIZE(emulated_msrs
) * sizeof(u32
)))
2270 case KVM_GET_SUPPORTED_CPUID
: {
2271 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
2272 struct kvm_cpuid2 cpuid
;
2275 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
2277 r
= kvm_dev_ioctl_get_supported_cpuid(&cpuid
,
2278 cpuid_arg
->entries
);
2283 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof cpuid
))
2288 case KVM_X86_GET_MCE_CAP_SUPPORTED
: {
2291 mce_cap
= KVM_MCE_CAP_SUPPORTED
;
2293 if (copy_to_user(argp
, &mce_cap
, sizeof mce_cap
))
2305 static void wbinvd_ipi(void *garbage
)
2310 static bool need_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
2312 return vcpu
->kvm
->arch
.iommu_domain
&&
2313 !(vcpu
->kvm
->arch
.iommu_flags
& KVM_IOMMU_CACHE_COHERENCY
);
2316 void kvm_arch_vcpu_load(struct kvm_vcpu
*vcpu
, int cpu
)
2318 /* Address WBINVD may be executed by guest */
2319 if (need_emulate_wbinvd(vcpu
)) {
2320 if (kvm_x86_ops
->has_wbinvd_exit())
2321 cpumask_set_cpu(cpu
, vcpu
->arch
.wbinvd_dirty_mask
);
2322 else if (vcpu
->cpu
!= -1 && vcpu
->cpu
!= cpu
)
2323 smp_call_function_single(vcpu
->cpu
,
2324 wbinvd_ipi
, NULL
, 1);
2327 kvm_x86_ops
->vcpu_load(vcpu
, cpu
);
2329 /* Apply any externally detected TSC adjustments (due to suspend) */
2330 if (unlikely(vcpu
->arch
.tsc_offset_adjustment
)) {
2331 adjust_tsc_offset_host(vcpu
, vcpu
->arch
.tsc_offset_adjustment
);
2332 vcpu
->arch
.tsc_offset_adjustment
= 0;
2333 set_bit(KVM_REQ_CLOCK_UPDATE
, &vcpu
->requests
);
2336 if (unlikely(vcpu
->cpu
!= cpu
) || check_tsc_unstable()) {
2337 s64 tsc_delta
= !vcpu
->arch
.last_host_tsc
? 0 :
2338 native_read_tsc() - vcpu
->arch
.last_host_tsc
;
2340 mark_tsc_unstable("KVM discovered backwards TSC");
2341 if (check_tsc_unstable()) {
2342 u64 offset
= kvm_x86_ops
->compute_tsc_offset(vcpu
,
2343 vcpu
->arch
.last_guest_tsc
);
2344 kvm_x86_ops
->write_tsc_offset(vcpu
, offset
);
2345 vcpu
->arch
.tsc_catchup
= 1;
2347 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
2348 if (vcpu
->cpu
!= cpu
)
2349 kvm_migrate_timers(vcpu
);
2353 accumulate_steal_time(vcpu
);
2354 kvm_make_request(KVM_REQ_STEAL_UPDATE
, vcpu
);
2357 void kvm_arch_vcpu_put(struct kvm_vcpu
*vcpu
)
2359 kvm_x86_ops
->vcpu_put(vcpu
);
2360 kvm_put_guest_fpu(vcpu
);
2361 vcpu
->arch
.last_host_tsc
= native_read_tsc();
2364 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu
*vcpu
,
2365 struct kvm_lapic_state
*s
)
2367 memcpy(s
->regs
, vcpu
->arch
.apic
->regs
, sizeof *s
);
2372 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu
*vcpu
,
2373 struct kvm_lapic_state
*s
)
2375 kvm_apic_post_state_restore(vcpu
, s
);
2376 update_cr8_intercept(vcpu
);
2381 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu
*vcpu
,
2382 struct kvm_interrupt
*irq
)
2384 if (irq
->irq
< 0 || irq
->irq
>= KVM_NR_INTERRUPTS
)
2386 if (irqchip_in_kernel(vcpu
->kvm
))
2389 kvm_queue_interrupt(vcpu
, irq
->irq
, false);
2390 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
2395 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu
*vcpu
)
2397 kvm_inject_nmi(vcpu
);
2402 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu
*vcpu
,
2403 struct kvm_tpr_access_ctl
*tac
)
2407 vcpu
->arch
.tpr_access_reporting
= !!tac
->enabled
;
2411 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu
*vcpu
,
2415 unsigned bank_num
= mcg_cap
& 0xff, bank
;
2418 if (!bank_num
|| bank_num
>= KVM_MAX_MCE_BANKS
)
2420 if (mcg_cap
& ~(KVM_MCE_CAP_SUPPORTED
| 0xff | 0xff0000))
2423 vcpu
->arch
.mcg_cap
= mcg_cap
;
2424 /* Init IA32_MCG_CTL to all 1s */
2425 if (mcg_cap
& MCG_CTL_P
)
2426 vcpu
->arch
.mcg_ctl
= ~(u64
)0;
2427 /* Init IA32_MCi_CTL to all 1s */
2428 for (bank
= 0; bank
< bank_num
; bank
++)
2429 vcpu
->arch
.mce_banks
[bank
*4] = ~(u64
)0;
2434 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu
*vcpu
,
2435 struct kvm_x86_mce
*mce
)
2437 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
2438 unsigned bank_num
= mcg_cap
& 0xff;
2439 u64
*banks
= vcpu
->arch
.mce_banks
;
2441 if (mce
->bank
>= bank_num
|| !(mce
->status
& MCI_STATUS_VAL
))
2444 * if IA32_MCG_CTL is not all 1s, the uncorrected error
2445 * reporting is disabled
2447 if ((mce
->status
& MCI_STATUS_UC
) && (mcg_cap
& MCG_CTL_P
) &&
2448 vcpu
->arch
.mcg_ctl
!= ~(u64
)0)
2450 banks
+= 4 * mce
->bank
;
2452 * if IA32_MCi_CTL is not all 1s, the uncorrected error
2453 * reporting is disabled for the bank
2455 if ((mce
->status
& MCI_STATUS_UC
) && banks
[0] != ~(u64
)0)
2457 if (mce
->status
& MCI_STATUS_UC
) {
2458 if ((vcpu
->arch
.mcg_status
& MCG_STATUS_MCIP
) ||
2459 !kvm_read_cr4_bits(vcpu
, X86_CR4_MCE
)) {
2460 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
2463 if (banks
[1] & MCI_STATUS_VAL
)
2464 mce
->status
|= MCI_STATUS_OVER
;
2465 banks
[2] = mce
->addr
;
2466 banks
[3] = mce
->misc
;
2467 vcpu
->arch
.mcg_status
= mce
->mcg_status
;
2468 banks
[1] = mce
->status
;
2469 kvm_queue_exception(vcpu
, MC_VECTOR
);
2470 } else if (!(banks
[1] & MCI_STATUS_VAL
)
2471 || !(banks
[1] & MCI_STATUS_UC
)) {
2472 if (banks
[1] & MCI_STATUS_VAL
)
2473 mce
->status
|= MCI_STATUS_OVER
;
2474 banks
[2] = mce
->addr
;
2475 banks
[3] = mce
->misc
;
2476 banks
[1] = mce
->status
;
2478 banks
[1] |= MCI_STATUS_OVER
;
2482 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu
*vcpu
,
2483 struct kvm_vcpu_events
*events
)
2486 events
->exception
.injected
=
2487 vcpu
->arch
.exception
.pending
&&
2488 !kvm_exception_is_soft(vcpu
->arch
.exception
.nr
);
2489 events
->exception
.nr
= vcpu
->arch
.exception
.nr
;
2490 events
->exception
.has_error_code
= vcpu
->arch
.exception
.has_error_code
;
2491 events
->exception
.pad
= 0;
2492 events
->exception
.error_code
= vcpu
->arch
.exception
.error_code
;
2494 events
->interrupt
.injected
=
2495 vcpu
->arch
.interrupt
.pending
&& !vcpu
->arch
.interrupt
.soft
;
2496 events
->interrupt
.nr
= vcpu
->arch
.interrupt
.nr
;
2497 events
->interrupt
.soft
= 0;
2498 events
->interrupt
.shadow
=
2499 kvm_x86_ops
->get_interrupt_shadow(vcpu
,
2500 KVM_X86_SHADOW_INT_MOV_SS
| KVM_X86_SHADOW_INT_STI
);
2502 events
->nmi
.injected
= vcpu
->arch
.nmi_injected
;
2503 events
->nmi
.pending
= vcpu
->arch
.nmi_pending
!= 0;
2504 events
->nmi
.masked
= kvm_x86_ops
->get_nmi_mask(vcpu
);
2505 events
->nmi
.pad
= 0;
2507 events
->sipi_vector
= vcpu
->arch
.sipi_vector
;
2509 events
->flags
= (KVM_VCPUEVENT_VALID_NMI_PENDING
2510 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2511 | KVM_VCPUEVENT_VALID_SHADOW
);
2512 memset(&events
->reserved
, 0, sizeof(events
->reserved
));
2515 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu
*vcpu
,
2516 struct kvm_vcpu_events
*events
)
2518 if (events
->flags
& ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2519 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2520 | KVM_VCPUEVENT_VALID_SHADOW
))
2524 vcpu
->arch
.exception
.pending
= events
->exception
.injected
;
2525 vcpu
->arch
.exception
.nr
= events
->exception
.nr
;
2526 vcpu
->arch
.exception
.has_error_code
= events
->exception
.has_error_code
;
2527 vcpu
->arch
.exception
.error_code
= events
->exception
.error_code
;
2529 vcpu
->arch
.interrupt
.pending
= events
->interrupt
.injected
;
2530 vcpu
->arch
.interrupt
.nr
= events
->interrupt
.nr
;
2531 vcpu
->arch
.interrupt
.soft
= events
->interrupt
.soft
;
2532 if (events
->flags
& KVM_VCPUEVENT_VALID_SHADOW
)
2533 kvm_x86_ops
->set_interrupt_shadow(vcpu
,
2534 events
->interrupt
.shadow
);
2536 vcpu
->arch
.nmi_injected
= events
->nmi
.injected
;
2537 if (events
->flags
& KVM_VCPUEVENT_VALID_NMI_PENDING
)
2538 vcpu
->arch
.nmi_pending
= events
->nmi
.pending
;
2539 kvm_x86_ops
->set_nmi_mask(vcpu
, events
->nmi
.masked
);
2541 if (events
->flags
& KVM_VCPUEVENT_VALID_SIPI_VECTOR
)
2542 vcpu
->arch
.sipi_vector
= events
->sipi_vector
;
2544 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
2549 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu
*vcpu
,
2550 struct kvm_debugregs
*dbgregs
)
2552 memcpy(dbgregs
->db
, vcpu
->arch
.db
, sizeof(vcpu
->arch
.db
));
2553 dbgregs
->dr6
= vcpu
->arch
.dr6
;
2554 dbgregs
->dr7
= vcpu
->arch
.dr7
;
2556 memset(&dbgregs
->reserved
, 0, sizeof(dbgregs
->reserved
));
2559 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu
*vcpu
,
2560 struct kvm_debugregs
*dbgregs
)
2565 memcpy(vcpu
->arch
.db
, dbgregs
->db
, sizeof(vcpu
->arch
.db
));
2566 vcpu
->arch
.dr6
= dbgregs
->dr6
;
2567 vcpu
->arch
.dr7
= dbgregs
->dr7
;
2572 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu
*vcpu
,
2573 struct kvm_xsave
*guest_xsave
)
2576 memcpy(guest_xsave
->region
,
2577 &vcpu
->arch
.guest_fpu
.state
->xsave
,
2580 memcpy(guest_xsave
->region
,
2581 &vcpu
->arch
.guest_fpu
.state
->fxsave
,
2582 sizeof(struct i387_fxsave_struct
));
2583 *(u64
*)&guest_xsave
->region
[XSAVE_HDR_OFFSET
/ sizeof(u32
)] =
2588 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu
*vcpu
,
2589 struct kvm_xsave
*guest_xsave
)
2592 *(u64
*)&guest_xsave
->region
[XSAVE_HDR_OFFSET
/ sizeof(u32
)];
2595 memcpy(&vcpu
->arch
.guest_fpu
.state
->xsave
,
2596 guest_xsave
->region
, xstate_size
);
2598 if (xstate_bv
& ~XSTATE_FPSSE
)
2600 memcpy(&vcpu
->arch
.guest_fpu
.state
->fxsave
,
2601 guest_xsave
->region
, sizeof(struct i387_fxsave_struct
));
2606 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu
*vcpu
,
2607 struct kvm_xcrs
*guest_xcrs
)
2609 if (!cpu_has_xsave
) {
2610 guest_xcrs
->nr_xcrs
= 0;
2614 guest_xcrs
->nr_xcrs
= 1;
2615 guest_xcrs
->flags
= 0;
2616 guest_xcrs
->xcrs
[0].xcr
= XCR_XFEATURE_ENABLED_MASK
;
2617 guest_xcrs
->xcrs
[0].value
= vcpu
->arch
.xcr0
;
2620 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu
*vcpu
,
2621 struct kvm_xcrs
*guest_xcrs
)
2628 if (guest_xcrs
->nr_xcrs
> KVM_MAX_XCRS
|| guest_xcrs
->flags
)
2631 for (i
= 0; i
< guest_xcrs
->nr_xcrs
; i
++)
2632 /* Only support XCR0 currently */
2633 if (guest_xcrs
->xcrs
[0].xcr
== XCR_XFEATURE_ENABLED_MASK
) {
2634 r
= __kvm_set_xcr(vcpu
, XCR_XFEATURE_ENABLED_MASK
,
2635 guest_xcrs
->xcrs
[0].value
);
2644 * kvm_set_guest_paused() indicates to the guest kernel that it has been
2645 * stopped by the hypervisor. This function will be called from the host only.
2646 * EINVAL is returned when the host attempts to set the flag for a guest that
2647 * does not support pv clocks.
2649 static int kvm_set_guest_paused(struct kvm_vcpu
*vcpu
)
2651 if (!vcpu
->arch
.time_page
)
2653 vcpu
->arch
.pvclock_set_guest_stopped_request
= true;
2654 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
2658 long kvm_arch_vcpu_ioctl(struct file
*filp
,
2659 unsigned int ioctl
, unsigned long arg
)
2661 struct kvm_vcpu
*vcpu
= filp
->private_data
;
2662 void __user
*argp
= (void __user
*)arg
;
2665 struct kvm_lapic_state
*lapic
;
2666 struct kvm_xsave
*xsave
;
2667 struct kvm_xcrs
*xcrs
;
2673 case KVM_GET_LAPIC
: {
2675 if (!vcpu
->arch
.apic
)
2677 u
.lapic
= kzalloc(sizeof(struct kvm_lapic_state
), GFP_KERNEL
);
2682 r
= kvm_vcpu_ioctl_get_lapic(vcpu
, u
.lapic
);
2686 if (copy_to_user(argp
, u
.lapic
, sizeof(struct kvm_lapic_state
)))
2691 case KVM_SET_LAPIC
: {
2693 if (!vcpu
->arch
.apic
)
2695 u
.lapic
= memdup_user(argp
, sizeof(*u
.lapic
));
2696 if (IS_ERR(u
.lapic
)) {
2697 r
= PTR_ERR(u
.lapic
);
2701 r
= kvm_vcpu_ioctl_set_lapic(vcpu
, u
.lapic
);
2707 case KVM_INTERRUPT
: {
2708 struct kvm_interrupt irq
;
2711 if (copy_from_user(&irq
, argp
, sizeof irq
))
2713 r
= kvm_vcpu_ioctl_interrupt(vcpu
, &irq
);
2720 r
= kvm_vcpu_ioctl_nmi(vcpu
);
2726 case KVM_SET_CPUID
: {
2727 struct kvm_cpuid __user
*cpuid_arg
= argp
;
2728 struct kvm_cpuid cpuid
;
2731 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
2733 r
= kvm_vcpu_ioctl_set_cpuid(vcpu
, &cpuid
, cpuid_arg
->entries
);
2738 case KVM_SET_CPUID2
: {
2739 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
2740 struct kvm_cpuid2 cpuid
;
2743 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
2745 r
= kvm_vcpu_ioctl_set_cpuid2(vcpu
, &cpuid
,
2746 cpuid_arg
->entries
);
2751 case KVM_GET_CPUID2
: {
2752 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
2753 struct kvm_cpuid2 cpuid
;
2756 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
2758 r
= kvm_vcpu_ioctl_get_cpuid2(vcpu
, &cpuid
,
2759 cpuid_arg
->entries
);
2763 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof cpuid
))
2769 r
= msr_io(vcpu
, argp
, kvm_get_msr
, 1);
2772 r
= msr_io(vcpu
, argp
, do_set_msr
, 0);
2774 case KVM_TPR_ACCESS_REPORTING
: {
2775 struct kvm_tpr_access_ctl tac
;
2778 if (copy_from_user(&tac
, argp
, sizeof tac
))
2780 r
= vcpu_ioctl_tpr_access_reporting(vcpu
, &tac
);
2784 if (copy_to_user(argp
, &tac
, sizeof tac
))
2789 case KVM_SET_VAPIC_ADDR
: {
2790 struct kvm_vapic_addr va
;
2793 if (!irqchip_in_kernel(vcpu
->kvm
))
2796 if (copy_from_user(&va
, argp
, sizeof va
))
2799 kvm_lapic_set_vapic_addr(vcpu
, va
.vapic_addr
);
2802 case KVM_X86_SETUP_MCE
: {
2806 if (copy_from_user(&mcg_cap
, argp
, sizeof mcg_cap
))
2808 r
= kvm_vcpu_ioctl_x86_setup_mce(vcpu
, mcg_cap
);
2811 case KVM_X86_SET_MCE
: {
2812 struct kvm_x86_mce mce
;
2815 if (copy_from_user(&mce
, argp
, sizeof mce
))
2817 r
= kvm_vcpu_ioctl_x86_set_mce(vcpu
, &mce
);
2820 case KVM_GET_VCPU_EVENTS
: {
2821 struct kvm_vcpu_events events
;
2823 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu
, &events
);
2826 if (copy_to_user(argp
, &events
, sizeof(struct kvm_vcpu_events
)))
2831 case KVM_SET_VCPU_EVENTS
: {
2832 struct kvm_vcpu_events events
;
2835 if (copy_from_user(&events
, argp
, sizeof(struct kvm_vcpu_events
)))
2838 r
= kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu
, &events
);
2841 case KVM_GET_DEBUGREGS
: {
2842 struct kvm_debugregs dbgregs
;
2844 kvm_vcpu_ioctl_x86_get_debugregs(vcpu
, &dbgregs
);
2847 if (copy_to_user(argp
, &dbgregs
,
2848 sizeof(struct kvm_debugregs
)))
2853 case KVM_SET_DEBUGREGS
: {
2854 struct kvm_debugregs dbgregs
;
2857 if (copy_from_user(&dbgregs
, argp
,
2858 sizeof(struct kvm_debugregs
)))
2861 r
= kvm_vcpu_ioctl_x86_set_debugregs(vcpu
, &dbgregs
);
2864 case KVM_GET_XSAVE
: {
2865 u
.xsave
= kzalloc(sizeof(struct kvm_xsave
), GFP_KERNEL
);
2870 kvm_vcpu_ioctl_x86_get_xsave(vcpu
, u
.xsave
);
2873 if (copy_to_user(argp
, u
.xsave
, sizeof(struct kvm_xsave
)))
2878 case KVM_SET_XSAVE
: {
2879 u
.xsave
= memdup_user(argp
, sizeof(*u
.xsave
));
2880 if (IS_ERR(u
.xsave
)) {
2881 r
= PTR_ERR(u
.xsave
);
2885 r
= kvm_vcpu_ioctl_x86_set_xsave(vcpu
, u
.xsave
);
2888 case KVM_GET_XCRS
: {
2889 u
.xcrs
= kzalloc(sizeof(struct kvm_xcrs
), GFP_KERNEL
);
2894 kvm_vcpu_ioctl_x86_get_xcrs(vcpu
, u
.xcrs
);
2897 if (copy_to_user(argp
, u
.xcrs
,
2898 sizeof(struct kvm_xcrs
)))
2903 case KVM_SET_XCRS
: {
2904 u
.xcrs
= memdup_user(argp
, sizeof(*u
.xcrs
));
2905 if (IS_ERR(u
.xcrs
)) {
2906 r
= PTR_ERR(u
.xcrs
);
2910 r
= kvm_vcpu_ioctl_x86_set_xcrs(vcpu
, u
.xcrs
);
2913 case KVM_SET_TSC_KHZ
: {
2917 user_tsc_khz
= (u32
)arg
;
2919 if (user_tsc_khz
>= kvm_max_guest_tsc_khz
)
2922 if (user_tsc_khz
== 0)
2923 user_tsc_khz
= tsc_khz
;
2925 kvm_set_tsc_khz(vcpu
, user_tsc_khz
);
2930 case KVM_GET_TSC_KHZ
: {
2931 r
= vcpu
->arch
.virtual_tsc_khz
;
2934 case KVM_KVMCLOCK_CTRL
: {
2935 r
= kvm_set_guest_paused(vcpu
);
2946 int kvm_arch_vcpu_fault(struct kvm_vcpu
*vcpu
, struct vm_fault
*vmf
)
2948 return VM_FAULT_SIGBUS
;
2951 static int kvm_vm_ioctl_set_tss_addr(struct kvm
*kvm
, unsigned long addr
)
2955 if (addr
> (unsigned int)(-3 * PAGE_SIZE
))
2957 ret
= kvm_x86_ops
->set_tss_addr(kvm
, addr
);
2961 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm
*kvm
,
2964 kvm
->arch
.ept_identity_map_addr
= ident_addr
;
2968 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm
*kvm
,
2969 u32 kvm_nr_mmu_pages
)
2971 if (kvm_nr_mmu_pages
< KVM_MIN_ALLOC_MMU_PAGES
)
2974 mutex_lock(&kvm
->slots_lock
);
2975 spin_lock(&kvm
->mmu_lock
);
2977 kvm_mmu_change_mmu_pages(kvm
, kvm_nr_mmu_pages
);
2978 kvm
->arch
.n_requested_mmu_pages
= kvm_nr_mmu_pages
;
2980 spin_unlock(&kvm
->mmu_lock
);
2981 mutex_unlock(&kvm
->slots_lock
);
2985 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm
*kvm
)
2987 return kvm
->arch
.n_max_mmu_pages
;
2990 static int kvm_vm_ioctl_get_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
2995 switch (chip
->chip_id
) {
2996 case KVM_IRQCHIP_PIC_MASTER
:
2997 memcpy(&chip
->chip
.pic
,
2998 &pic_irqchip(kvm
)->pics
[0],
2999 sizeof(struct kvm_pic_state
));
3001 case KVM_IRQCHIP_PIC_SLAVE
:
3002 memcpy(&chip
->chip
.pic
,
3003 &pic_irqchip(kvm
)->pics
[1],
3004 sizeof(struct kvm_pic_state
));
3006 case KVM_IRQCHIP_IOAPIC
:
3007 r
= kvm_get_ioapic(kvm
, &chip
->chip
.ioapic
);
3016 static int kvm_vm_ioctl_set_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
3021 switch (chip
->chip_id
) {
3022 case KVM_IRQCHIP_PIC_MASTER
:
3023 spin_lock(&pic_irqchip(kvm
)->lock
);
3024 memcpy(&pic_irqchip(kvm
)->pics
[0],
3026 sizeof(struct kvm_pic_state
));
3027 spin_unlock(&pic_irqchip(kvm
)->lock
);
3029 case KVM_IRQCHIP_PIC_SLAVE
:
3030 spin_lock(&pic_irqchip(kvm
)->lock
);
3031 memcpy(&pic_irqchip(kvm
)->pics
[1],
3033 sizeof(struct kvm_pic_state
));
3034 spin_unlock(&pic_irqchip(kvm
)->lock
);
3036 case KVM_IRQCHIP_IOAPIC
:
3037 r
= kvm_set_ioapic(kvm
, &chip
->chip
.ioapic
);
3043 kvm_pic_update_irq(pic_irqchip(kvm
));
3047 static int kvm_vm_ioctl_get_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
3051 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3052 memcpy(ps
, &kvm
->arch
.vpit
->pit_state
, sizeof(struct kvm_pit_state
));
3053 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3057 static int kvm_vm_ioctl_set_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
3061 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3062 memcpy(&kvm
->arch
.vpit
->pit_state
, ps
, sizeof(struct kvm_pit_state
));
3063 kvm_pit_load_count(kvm
, 0, ps
->channels
[0].count
, 0);
3064 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3068 static int kvm_vm_ioctl_get_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
3072 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3073 memcpy(ps
->channels
, &kvm
->arch
.vpit
->pit_state
.channels
,
3074 sizeof(ps
->channels
));
3075 ps
->flags
= kvm
->arch
.vpit
->pit_state
.flags
;
3076 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3077 memset(&ps
->reserved
, 0, sizeof(ps
->reserved
));
3081 static int kvm_vm_ioctl_set_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
3083 int r
= 0, start
= 0;
3084 u32 prev_legacy
, cur_legacy
;
3085 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3086 prev_legacy
= kvm
->arch
.vpit
->pit_state
.flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
3087 cur_legacy
= ps
->flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
3088 if (!prev_legacy
&& cur_legacy
)
3090 memcpy(&kvm
->arch
.vpit
->pit_state
.channels
, &ps
->channels
,
3091 sizeof(kvm
->arch
.vpit
->pit_state
.channels
));
3092 kvm
->arch
.vpit
->pit_state
.flags
= ps
->flags
;
3093 kvm_pit_load_count(kvm
, 0, kvm
->arch
.vpit
->pit_state
.channels
[0].count
, start
);
3094 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3098 static int kvm_vm_ioctl_reinject(struct kvm
*kvm
,
3099 struct kvm_reinject_control
*control
)
3101 if (!kvm
->arch
.vpit
)
3103 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3104 kvm
->arch
.vpit
->pit_state
.reinject
= control
->pit_reinject
;
3105 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3110 * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
3111 * @kvm: kvm instance
3112 * @log: slot id and address to which we copy the log
3114 * We need to keep it in mind that VCPU threads can write to the bitmap
3115 * concurrently. So, to avoid losing data, we keep the following order for
3118 * 1. Take a snapshot of the bit and clear it if needed.
3119 * 2. Write protect the corresponding page.
3120 * 3. Flush TLB's if needed.
3121 * 4. Copy the snapshot to the userspace.
3123 * Between 2 and 3, the guest may write to the page using the remaining TLB
3124 * entry. This is not a problem because the page will be reported dirty at
3125 * step 4 using the snapshot taken before and step 3 ensures that successive
3126 * writes will be logged for the next call.
3128 int kvm_vm_ioctl_get_dirty_log(struct kvm
*kvm
, struct kvm_dirty_log
*log
)
3131 struct kvm_memory_slot
*memslot
;
3133 unsigned long *dirty_bitmap
;
3134 unsigned long *dirty_bitmap_buffer
;
3135 bool is_dirty
= false;
3137 mutex_lock(&kvm
->slots_lock
);
3140 if (log
->slot
>= KVM_MEMORY_SLOTS
)
3143 memslot
= id_to_memslot(kvm
->memslots
, log
->slot
);
3145 dirty_bitmap
= memslot
->dirty_bitmap
;
3150 n
= kvm_dirty_bitmap_bytes(memslot
);
3152 dirty_bitmap_buffer
= dirty_bitmap
+ n
/ sizeof(long);
3153 memset(dirty_bitmap_buffer
, 0, n
);
3155 spin_lock(&kvm
->mmu_lock
);
3157 for (i
= 0; i
< n
/ sizeof(long); i
++) {
3161 if (!dirty_bitmap
[i
])
3166 mask
= xchg(&dirty_bitmap
[i
], 0);
3167 dirty_bitmap_buffer
[i
] = mask
;
3169 offset
= i
* BITS_PER_LONG
;
3170 kvm_mmu_write_protect_pt_masked(kvm
, memslot
, offset
, mask
);
3173 kvm_flush_remote_tlbs(kvm
);
3175 spin_unlock(&kvm
->mmu_lock
);
3178 if (copy_to_user(log
->dirty_bitmap
, dirty_bitmap_buffer
, n
))
3183 mutex_unlock(&kvm
->slots_lock
);
3187 int kvm_vm_ioctl_irq_line(struct kvm
*kvm
, struct kvm_irq_level
*irq_event
)
3189 if (!irqchip_in_kernel(kvm
))
3192 irq_event
->status
= kvm_set_irq(kvm
, KVM_USERSPACE_IRQ_SOURCE_ID
,
3193 irq_event
->irq
, irq_event
->level
);
3197 long kvm_arch_vm_ioctl(struct file
*filp
,
3198 unsigned int ioctl
, unsigned long arg
)
3200 struct kvm
*kvm
= filp
->private_data
;
3201 void __user
*argp
= (void __user
*)arg
;
3204 * This union makes it completely explicit to gcc-3.x
3205 * that these two variables' stack usage should be
3206 * combined, not added together.
3209 struct kvm_pit_state ps
;
3210 struct kvm_pit_state2 ps2
;
3211 struct kvm_pit_config pit_config
;
3215 case KVM_SET_TSS_ADDR
:
3216 r
= kvm_vm_ioctl_set_tss_addr(kvm
, arg
);
3220 case KVM_SET_IDENTITY_MAP_ADDR
: {
3224 if (copy_from_user(&ident_addr
, argp
, sizeof ident_addr
))
3226 r
= kvm_vm_ioctl_set_identity_map_addr(kvm
, ident_addr
);
3231 case KVM_SET_NR_MMU_PAGES
:
3232 r
= kvm_vm_ioctl_set_nr_mmu_pages(kvm
, arg
);
3236 case KVM_GET_NR_MMU_PAGES
:
3237 r
= kvm_vm_ioctl_get_nr_mmu_pages(kvm
);
3239 case KVM_CREATE_IRQCHIP
: {
3240 struct kvm_pic
*vpic
;
3242 mutex_lock(&kvm
->lock
);
3245 goto create_irqchip_unlock
;
3247 if (atomic_read(&kvm
->online_vcpus
))
3248 goto create_irqchip_unlock
;
3250 vpic
= kvm_create_pic(kvm
);
3252 r
= kvm_ioapic_init(kvm
);
3254 mutex_lock(&kvm
->slots_lock
);
3255 kvm_io_bus_unregister_dev(kvm
, KVM_PIO_BUS
,
3257 kvm_io_bus_unregister_dev(kvm
, KVM_PIO_BUS
,
3259 kvm_io_bus_unregister_dev(kvm
, KVM_PIO_BUS
,
3261 mutex_unlock(&kvm
->slots_lock
);
3263 goto create_irqchip_unlock
;
3266 goto create_irqchip_unlock
;
3268 kvm
->arch
.vpic
= vpic
;
3270 r
= kvm_setup_default_irq_routing(kvm
);
3272 mutex_lock(&kvm
->slots_lock
);
3273 mutex_lock(&kvm
->irq_lock
);
3274 kvm_ioapic_destroy(kvm
);
3275 kvm_destroy_pic(kvm
);
3276 mutex_unlock(&kvm
->irq_lock
);
3277 mutex_unlock(&kvm
->slots_lock
);
3279 create_irqchip_unlock
:
3280 mutex_unlock(&kvm
->lock
);
3283 case KVM_CREATE_PIT
:
3284 u
.pit_config
.flags
= KVM_PIT_SPEAKER_DUMMY
;
3286 case KVM_CREATE_PIT2
:
3288 if (copy_from_user(&u
.pit_config
, argp
,
3289 sizeof(struct kvm_pit_config
)))
3292 mutex_lock(&kvm
->slots_lock
);
3295 goto create_pit_unlock
;
3297 kvm
->arch
.vpit
= kvm_create_pit(kvm
, u
.pit_config
.flags
);
3301 mutex_unlock(&kvm
->slots_lock
);
3303 case KVM_GET_IRQCHIP
: {
3304 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3305 struct kvm_irqchip
*chip
;
3307 chip
= memdup_user(argp
, sizeof(*chip
));
3314 if (!irqchip_in_kernel(kvm
))
3315 goto get_irqchip_out
;
3316 r
= kvm_vm_ioctl_get_irqchip(kvm
, chip
);
3318 goto get_irqchip_out
;
3320 if (copy_to_user(argp
, chip
, sizeof *chip
))
3321 goto get_irqchip_out
;
3329 case KVM_SET_IRQCHIP
: {
3330 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3331 struct kvm_irqchip
*chip
;
3333 chip
= memdup_user(argp
, sizeof(*chip
));
3340 if (!irqchip_in_kernel(kvm
))
3341 goto set_irqchip_out
;
3342 r
= kvm_vm_ioctl_set_irqchip(kvm
, chip
);
3344 goto set_irqchip_out
;
3354 if (copy_from_user(&u
.ps
, argp
, sizeof(struct kvm_pit_state
)))
3357 if (!kvm
->arch
.vpit
)
3359 r
= kvm_vm_ioctl_get_pit(kvm
, &u
.ps
);
3363 if (copy_to_user(argp
, &u
.ps
, sizeof(struct kvm_pit_state
)))
3370 if (copy_from_user(&u
.ps
, argp
, sizeof u
.ps
))
3373 if (!kvm
->arch
.vpit
)
3375 r
= kvm_vm_ioctl_set_pit(kvm
, &u
.ps
);
3381 case KVM_GET_PIT2
: {
3383 if (!kvm
->arch
.vpit
)
3385 r
= kvm_vm_ioctl_get_pit2(kvm
, &u
.ps2
);
3389 if (copy_to_user(argp
, &u
.ps2
, sizeof(u
.ps2
)))
3394 case KVM_SET_PIT2
: {
3396 if (copy_from_user(&u
.ps2
, argp
, sizeof(u
.ps2
)))
3399 if (!kvm
->arch
.vpit
)
3401 r
= kvm_vm_ioctl_set_pit2(kvm
, &u
.ps2
);
3407 case KVM_REINJECT_CONTROL
: {
3408 struct kvm_reinject_control control
;
3410 if (copy_from_user(&control
, argp
, sizeof(control
)))
3412 r
= kvm_vm_ioctl_reinject(kvm
, &control
);
3418 case KVM_XEN_HVM_CONFIG
: {
3420 if (copy_from_user(&kvm
->arch
.xen_hvm_config
, argp
,
3421 sizeof(struct kvm_xen_hvm_config
)))
3424 if (kvm
->arch
.xen_hvm_config
.flags
)
3429 case KVM_SET_CLOCK
: {
3430 struct kvm_clock_data user_ns
;
3435 if (copy_from_user(&user_ns
, argp
, sizeof(user_ns
)))
3443 local_irq_disable();
3444 now_ns
= get_kernel_ns();
3445 delta
= user_ns
.clock
- now_ns
;
3447 kvm
->arch
.kvmclock_offset
= delta
;
3450 case KVM_GET_CLOCK
: {
3451 struct kvm_clock_data user_ns
;
3454 local_irq_disable();
3455 now_ns
= get_kernel_ns();
3456 user_ns
.clock
= kvm
->arch
.kvmclock_offset
+ now_ns
;
3459 memset(&user_ns
.pad
, 0, sizeof(user_ns
.pad
));
3462 if (copy_to_user(argp
, &user_ns
, sizeof(user_ns
)))
3475 static void kvm_init_msr_list(void)
3480 /* skip the first msrs in the list. KVM-specific */
3481 for (i
= j
= KVM_SAVE_MSRS_BEGIN
; i
< ARRAY_SIZE(msrs_to_save
); i
++) {
3482 if (rdmsr_safe(msrs_to_save
[i
], &dummy
[0], &dummy
[1]) < 0)
3485 msrs_to_save
[j
] = msrs_to_save
[i
];
3488 num_msrs_to_save
= j
;
3491 static int vcpu_mmio_write(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
,
3499 if (!(vcpu
->arch
.apic
&&
3500 !kvm_iodevice_write(&vcpu
->arch
.apic
->dev
, addr
, n
, v
))
3501 && kvm_io_bus_write(vcpu
->kvm
, KVM_MMIO_BUS
, addr
, n
, v
))
3512 static int vcpu_mmio_read(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
, void *v
)
3519 if (!(vcpu
->arch
.apic
&&
3520 !kvm_iodevice_read(&vcpu
->arch
.apic
->dev
, addr
, n
, v
))
3521 && kvm_io_bus_read(vcpu
->kvm
, KVM_MMIO_BUS
, addr
, n
, v
))
3523 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, n
, addr
, *(u64
*)v
);
3533 static void kvm_set_segment(struct kvm_vcpu
*vcpu
,
3534 struct kvm_segment
*var
, int seg
)
3536 kvm_x86_ops
->set_segment(vcpu
, var
, seg
);
3539 void kvm_get_segment(struct kvm_vcpu
*vcpu
,
3540 struct kvm_segment
*var
, int seg
)
3542 kvm_x86_ops
->get_segment(vcpu
, var
, seg
);
3545 gpa_t
translate_nested_gpa(struct kvm_vcpu
*vcpu
, gpa_t gpa
, u32 access
)
3548 struct x86_exception exception
;
3550 BUG_ON(!mmu_is_nested(vcpu
));
3552 /* NPT walks are always user-walks */
3553 access
|= PFERR_USER_MASK
;
3554 t_gpa
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, gpa
, access
, &exception
);
3559 gpa_t
kvm_mmu_gva_to_gpa_read(struct kvm_vcpu
*vcpu
, gva_t gva
,
3560 struct x86_exception
*exception
)
3562 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
3563 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
3566 gpa_t
kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu
*vcpu
, gva_t gva
,
3567 struct x86_exception
*exception
)
3569 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
3570 access
|= PFERR_FETCH_MASK
;
3571 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
3574 gpa_t
kvm_mmu_gva_to_gpa_write(struct kvm_vcpu
*vcpu
, gva_t gva
,
3575 struct x86_exception
*exception
)
3577 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
3578 access
|= PFERR_WRITE_MASK
;
3579 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
3582 /* uses this to access any guest's mapped memory without checking CPL */
3583 gpa_t
kvm_mmu_gva_to_gpa_system(struct kvm_vcpu
*vcpu
, gva_t gva
,
3584 struct x86_exception
*exception
)
3586 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, 0, exception
);
3589 static int kvm_read_guest_virt_helper(gva_t addr
, void *val
, unsigned int bytes
,
3590 struct kvm_vcpu
*vcpu
, u32 access
,
3591 struct x86_exception
*exception
)
3594 int r
= X86EMUL_CONTINUE
;
3597 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
, access
,
3599 unsigned offset
= addr
& (PAGE_SIZE
-1);
3600 unsigned toread
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
3603 if (gpa
== UNMAPPED_GVA
)
3604 return X86EMUL_PROPAGATE_FAULT
;
3605 ret
= kvm_read_guest(vcpu
->kvm
, gpa
, data
, toread
);
3607 r
= X86EMUL_IO_NEEDED
;
3619 /* used for instruction fetching */
3620 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt
*ctxt
,
3621 gva_t addr
, void *val
, unsigned int bytes
,
3622 struct x86_exception
*exception
)
3624 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
3625 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
3627 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
,
3628 access
| PFERR_FETCH_MASK
,
3632 int kvm_read_guest_virt(struct x86_emulate_ctxt
*ctxt
,
3633 gva_t addr
, void *val
, unsigned int bytes
,
3634 struct x86_exception
*exception
)
3636 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
3637 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
3639 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, access
,
3642 EXPORT_SYMBOL_GPL(kvm_read_guest_virt
);
3644 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt
*ctxt
,
3645 gva_t addr
, void *val
, unsigned int bytes
,
3646 struct x86_exception
*exception
)
3648 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
3649 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, 0, exception
);
3652 int kvm_write_guest_virt_system(struct x86_emulate_ctxt
*ctxt
,
3653 gva_t addr
, void *val
,
3655 struct x86_exception
*exception
)
3657 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
3659 int r
= X86EMUL_CONTINUE
;
3662 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
,
3665 unsigned offset
= addr
& (PAGE_SIZE
-1);
3666 unsigned towrite
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
3669 if (gpa
== UNMAPPED_GVA
)
3670 return X86EMUL_PROPAGATE_FAULT
;
3671 ret
= kvm_write_guest(vcpu
->kvm
, gpa
, data
, towrite
);
3673 r
= X86EMUL_IO_NEEDED
;
3684 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system
);
3686 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu
*vcpu
, unsigned long gva
,
3687 gpa_t
*gpa
, struct x86_exception
*exception
,
3690 u32 access
= ((kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0)
3691 | (write
? PFERR_WRITE_MASK
: 0);
3693 if (vcpu_match_mmio_gva(vcpu
, gva
)
3694 && !permission_fault(vcpu
->arch
.walk_mmu
, vcpu
->arch
.access
, access
)) {
3695 *gpa
= vcpu
->arch
.mmio_gfn
<< PAGE_SHIFT
|
3696 (gva
& (PAGE_SIZE
- 1));
3697 trace_vcpu_match_mmio(gva
, *gpa
, write
, false);
3701 *gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
3703 if (*gpa
== UNMAPPED_GVA
)
3706 /* For APIC access vmexit */
3707 if ((*gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
3710 if (vcpu_match_mmio_gpa(vcpu
, *gpa
)) {
3711 trace_vcpu_match_mmio(gva
, *gpa
, write
, true);
3718 int emulator_write_phys(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
3719 const void *val
, int bytes
)
3723 ret
= kvm_write_guest(vcpu
->kvm
, gpa
, val
, bytes
);
3726 kvm_mmu_pte_write(vcpu
, gpa
, val
, bytes
);
3730 struct read_write_emulator_ops
{
3731 int (*read_write_prepare
)(struct kvm_vcpu
*vcpu
, void *val
,
3733 int (*read_write_emulate
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
3734 void *val
, int bytes
);
3735 int (*read_write_mmio
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
3736 int bytes
, void *val
);
3737 int (*read_write_exit_mmio
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
3738 void *val
, int bytes
);
3742 static int read_prepare(struct kvm_vcpu
*vcpu
, void *val
, int bytes
)
3744 if (vcpu
->mmio_read_completed
) {
3745 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, bytes
,
3746 vcpu
->mmio_fragments
[0].gpa
, *(u64
*)val
);
3747 vcpu
->mmio_read_completed
= 0;
3754 static int read_emulate(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
3755 void *val
, int bytes
)
3757 return !kvm_read_guest(vcpu
->kvm
, gpa
, val
, bytes
);
3760 static int write_emulate(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
3761 void *val
, int bytes
)
3763 return emulator_write_phys(vcpu
, gpa
, val
, bytes
);
3766 static int write_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
, int bytes
, void *val
)
3768 trace_kvm_mmio(KVM_TRACE_MMIO_WRITE
, bytes
, gpa
, *(u64
*)val
);
3769 return vcpu_mmio_write(vcpu
, gpa
, bytes
, val
);
3772 static int read_exit_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
3773 void *val
, int bytes
)
3775 trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED
, bytes
, gpa
, 0);
3776 return X86EMUL_IO_NEEDED
;
3779 static int write_exit_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
3780 void *val
, int bytes
)
3782 struct kvm_mmio_fragment
*frag
= &vcpu
->mmio_fragments
[0];
3784 memcpy(vcpu
->run
->mmio
.data
, frag
->data
, frag
->len
);
3785 return X86EMUL_CONTINUE
;
3788 static const struct read_write_emulator_ops read_emultor
= {
3789 .read_write_prepare
= read_prepare
,
3790 .read_write_emulate
= read_emulate
,
3791 .read_write_mmio
= vcpu_mmio_read
,
3792 .read_write_exit_mmio
= read_exit_mmio
,
3795 static const struct read_write_emulator_ops write_emultor
= {
3796 .read_write_emulate
= write_emulate
,
3797 .read_write_mmio
= write_mmio
,
3798 .read_write_exit_mmio
= write_exit_mmio
,
3802 static int emulator_read_write_onepage(unsigned long addr
, void *val
,
3804 struct x86_exception
*exception
,
3805 struct kvm_vcpu
*vcpu
,
3806 const struct read_write_emulator_ops
*ops
)
3810 bool write
= ops
->write
;
3811 struct kvm_mmio_fragment
*frag
;
3813 ret
= vcpu_mmio_gva_to_gpa(vcpu
, addr
, &gpa
, exception
, write
);
3816 return X86EMUL_PROPAGATE_FAULT
;
3818 /* For APIC access vmexit */
3822 if (ops
->read_write_emulate(vcpu
, gpa
, val
, bytes
))
3823 return X86EMUL_CONTINUE
;
3827 * Is this MMIO handled locally?
3829 handled
= ops
->read_write_mmio(vcpu
, gpa
, bytes
, val
);
3830 if (handled
== bytes
)
3831 return X86EMUL_CONTINUE
;
3838 unsigned now
= min(bytes
, 8U);
3840 frag
= &vcpu
->mmio_fragments
[vcpu
->mmio_nr_fragments
++];
3849 return X86EMUL_CONTINUE
;
3852 int emulator_read_write(struct x86_emulate_ctxt
*ctxt
, unsigned long addr
,
3853 void *val
, unsigned int bytes
,
3854 struct x86_exception
*exception
,
3855 const struct read_write_emulator_ops
*ops
)
3857 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
3861 if (ops
->read_write_prepare
&&
3862 ops
->read_write_prepare(vcpu
, val
, bytes
))
3863 return X86EMUL_CONTINUE
;
3865 vcpu
->mmio_nr_fragments
= 0;
3867 /* Crossing a page boundary? */
3868 if (((addr
+ bytes
- 1) ^ addr
) & PAGE_MASK
) {
3871 now
= -addr
& ~PAGE_MASK
;
3872 rc
= emulator_read_write_onepage(addr
, val
, now
, exception
,
3875 if (rc
!= X86EMUL_CONTINUE
)
3882 rc
= emulator_read_write_onepage(addr
, val
, bytes
, exception
,
3884 if (rc
!= X86EMUL_CONTINUE
)
3887 if (!vcpu
->mmio_nr_fragments
)
3890 gpa
= vcpu
->mmio_fragments
[0].gpa
;
3892 vcpu
->mmio_needed
= 1;
3893 vcpu
->mmio_cur_fragment
= 0;
3895 vcpu
->run
->mmio
.len
= vcpu
->mmio_fragments
[0].len
;
3896 vcpu
->run
->mmio
.is_write
= vcpu
->mmio_is_write
= ops
->write
;
3897 vcpu
->run
->exit_reason
= KVM_EXIT_MMIO
;
3898 vcpu
->run
->mmio
.phys_addr
= gpa
;
3900 return ops
->read_write_exit_mmio(vcpu
, gpa
, val
, bytes
);
3903 static int emulator_read_emulated(struct x86_emulate_ctxt
*ctxt
,
3907 struct x86_exception
*exception
)
3909 return emulator_read_write(ctxt
, addr
, val
, bytes
,
3910 exception
, &read_emultor
);
3913 int emulator_write_emulated(struct x86_emulate_ctxt
*ctxt
,
3917 struct x86_exception
*exception
)
3919 return emulator_read_write(ctxt
, addr
, (void *)val
, bytes
,
3920 exception
, &write_emultor
);
3923 #define CMPXCHG_TYPE(t, ptr, old, new) \
3924 (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
3926 #ifdef CONFIG_X86_64
3927 # define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
3929 # define CMPXCHG64(ptr, old, new) \
3930 (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
3933 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt
*ctxt
,
3938 struct x86_exception
*exception
)
3940 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
3946 /* guests cmpxchg8b have to be emulated atomically */
3947 if (bytes
> 8 || (bytes
& (bytes
- 1)))
3950 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, addr
, NULL
);
3952 if (gpa
== UNMAPPED_GVA
||
3953 (gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
3956 if (((gpa
+ bytes
- 1) & PAGE_MASK
) != (gpa
& PAGE_MASK
))
3959 page
= gfn_to_page(vcpu
->kvm
, gpa
>> PAGE_SHIFT
);
3960 if (is_error_page(page
))
3963 kaddr
= kmap_atomic(page
);
3964 kaddr
+= offset_in_page(gpa
);
3967 exchanged
= CMPXCHG_TYPE(u8
, kaddr
, old
, new);
3970 exchanged
= CMPXCHG_TYPE(u16
, kaddr
, old
, new);
3973 exchanged
= CMPXCHG_TYPE(u32
, kaddr
, old
, new);
3976 exchanged
= CMPXCHG64(kaddr
, old
, new);
3981 kunmap_atomic(kaddr
);
3982 kvm_release_page_dirty(page
);
3985 return X86EMUL_CMPXCHG_FAILED
;
3987 kvm_mmu_pte_write(vcpu
, gpa
, new, bytes
);
3989 return X86EMUL_CONTINUE
;
3992 printk_once(KERN_WARNING
"kvm: emulating exchange as write\n");
3994 return emulator_write_emulated(ctxt
, addr
, new, bytes
, exception
);
3997 static int kernel_pio(struct kvm_vcpu
*vcpu
, void *pd
)
3999 /* TODO: String I/O for in kernel device */
4002 if (vcpu
->arch
.pio
.in
)
4003 r
= kvm_io_bus_read(vcpu
->kvm
, KVM_PIO_BUS
, vcpu
->arch
.pio
.port
,
4004 vcpu
->arch
.pio
.size
, pd
);
4006 r
= kvm_io_bus_write(vcpu
->kvm
, KVM_PIO_BUS
,
4007 vcpu
->arch
.pio
.port
, vcpu
->arch
.pio
.size
,
4012 static int emulator_pio_in_out(struct kvm_vcpu
*vcpu
, int size
,
4013 unsigned short port
, void *val
,
4014 unsigned int count
, bool in
)
4016 trace_kvm_pio(!in
, port
, size
, count
);
4018 vcpu
->arch
.pio
.port
= port
;
4019 vcpu
->arch
.pio
.in
= in
;
4020 vcpu
->arch
.pio
.count
= count
;
4021 vcpu
->arch
.pio
.size
= size
;
4023 if (!kernel_pio(vcpu
, vcpu
->arch
.pio_data
)) {
4024 vcpu
->arch
.pio
.count
= 0;
4028 vcpu
->run
->exit_reason
= KVM_EXIT_IO
;
4029 vcpu
->run
->io
.direction
= in
? KVM_EXIT_IO_IN
: KVM_EXIT_IO_OUT
;
4030 vcpu
->run
->io
.size
= size
;
4031 vcpu
->run
->io
.data_offset
= KVM_PIO_PAGE_OFFSET
* PAGE_SIZE
;
4032 vcpu
->run
->io
.count
= count
;
4033 vcpu
->run
->io
.port
= port
;
4038 static int emulator_pio_in_emulated(struct x86_emulate_ctxt
*ctxt
,
4039 int size
, unsigned short port
, void *val
,
4042 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4045 if (vcpu
->arch
.pio
.count
)
4048 ret
= emulator_pio_in_out(vcpu
, size
, port
, val
, count
, true);
4051 memcpy(val
, vcpu
->arch
.pio_data
, size
* count
);
4052 vcpu
->arch
.pio
.count
= 0;
4059 static int emulator_pio_out_emulated(struct x86_emulate_ctxt
*ctxt
,
4060 int size
, unsigned short port
,
4061 const void *val
, unsigned int count
)
4063 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4065 memcpy(vcpu
->arch
.pio_data
, val
, size
* count
);
4066 return emulator_pio_in_out(vcpu
, size
, port
, (void *)val
, count
, false);
4069 static unsigned long get_segment_base(struct kvm_vcpu
*vcpu
, int seg
)
4071 return kvm_x86_ops
->get_segment_base(vcpu
, seg
);
4074 static void emulator_invlpg(struct x86_emulate_ctxt
*ctxt
, ulong address
)
4076 kvm_mmu_invlpg(emul_to_vcpu(ctxt
), address
);
4079 int kvm_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
4081 if (!need_emulate_wbinvd(vcpu
))
4082 return X86EMUL_CONTINUE
;
4084 if (kvm_x86_ops
->has_wbinvd_exit()) {
4085 int cpu
= get_cpu();
4087 cpumask_set_cpu(cpu
, vcpu
->arch
.wbinvd_dirty_mask
);
4088 smp_call_function_many(vcpu
->arch
.wbinvd_dirty_mask
,
4089 wbinvd_ipi
, NULL
, 1);
4091 cpumask_clear(vcpu
->arch
.wbinvd_dirty_mask
);
4094 return X86EMUL_CONTINUE
;
4096 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd
);
4098 static void emulator_wbinvd(struct x86_emulate_ctxt
*ctxt
)
4100 kvm_emulate_wbinvd(emul_to_vcpu(ctxt
));
4103 int emulator_get_dr(struct x86_emulate_ctxt
*ctxt
, int dr
, unsigned long *dest
)
4105 return _kvm_get_dr(emul_to_vcpu(ctxt
), dr
, dest
);
4108 int emulator_set_dr(struct x86_emulate_ctxt
*ctxt
, int dr
, unsigned long value
)
4111 return __kvm_set_dr(emul_to_vcpu(ctxt
), dr
, value
);
4114 static u64
mk_cr_64(u64 curr_cr
, u32 new_val
)
4116 return (curr_cr
& ~((1ULL << 32) - 1)) | new_val
;
4119 static unsigned long emulator_get_cr(struct x86_emulate_ctxt
*ctxt
, int cr
)
4121 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4122 unsigned long value
;
4126 value
= kvm_read_cr0(vcpu
);
4129 value
= vcpu
->arch
.cr2
;
4132 value
= kvm_read_cr3(vcpu
);
4135 value
= kvm_read_cr4(vcpu
);
4138 value
= kvm_get_cr8(vcpu
);
4141 kvm_err("%s: unexpected cr %u\n", __func__
, cr
);
4148 static int emulator_set_cr(struct x86_emulate_ctxt
*ctxt
, int cr
, ulong val
)
4150 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4155 res
= kvm_set_cr0(vcpu
, mk_cr_64(kvm_read_cr0(vcpu
), val
));
4158 vcpu
->arch
.cr2
= val
;
4161 res
= kvm_set_cr3(vcpu
, val
);
4164 res
= kvm_set_cr4(vcpu
, mk_cr_64(kvm_read_cr4(vcpu
), val
));
4167 res
= kvm_set_cr8(vcpu
, val
);
4170 kvm_err("%s: unexpected cr %u\n", __func__
, cr
);
4177 static void emulator_set_rflags(struct x86_emulate_ctxt
*ctxt
, ulong val
)
4179 kvm_set_rflags(emul_to_vcpu(ctxt
), val
);
4182 static int emulator_get_cpl(struct x86_emulate_ctxt
*ctxt
)
4184 return kvm_x86_ops
->get_cpl(emul_to_vcpu(ctxt
));
4187 static void emulator_get_gdt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
4189 kvm_x86_ops
->get_gdt(emul_to_vcpu(ctxt
), dt
);
4192 static void emulator_get_idt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
4194 kvm_x86_ops
->get_idt(emul_to_vcpu(ctxt
), dt
);
4197 static void emulator_set_gdt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
4199 kvm_x86_ops
->set_gdt(emul_to_vcpu(ctxt
), dt
);
4202 static void emulator_set_idt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
4204 kvm_x86_ops
->set_idt(emul_to_vcpu(ctxt
), dt
);
4207 static unsigned long emulator_get_cached_segment_base(
4208 struct x86_emulate_ctxt
*ctxt
, int seg
)
4210 return get_segment_base(emul_to_vcpu(ctxt
), seg
);
4213 static bool emulator_get_segment(struct x86_emulate_ctxt
*ctxt
, u16
*selector
,
4214 struct desc_struct
*desc
, u32
*base3
,
4217 struct kvm_segment var
;
4219 kvm_get_segment(emul_to_vcpu(ctxt
), &var
, seg
);
4220 *selector
= var
.selector
;
4227 set_desc_limit(desc
, var
.limit
);
4228 set_desc_base(desc
, (unsigned long)var
.base
);
4229 #ifdef CONFIG_X86_64
4231 *base3
= var
.base
>> 32;
4233 desc
->type
= var
.type
;
4235 desc
->dpl
= var
.dpl
;
4236 desc
->p
= var
.present
;
4237 desc
->avl
= var
.avl
;
4245 static void emulator_set_segment(struct x86_emulate_ctxt
*ctxt
, u16 selector
,
4246 struct desc_struct
*desc
, u32 base3
,
4249 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4250 struct kvm_segment var
;
4252 var
.selector
= selector
;
4253 var
.base
= get_desc_base(desc
);
4254 #ifdef CONFIG_X86_64
4255 var
.base
|= ((u64
)base3
) << 32;
4257 var
.limit
= get_desc_limit(desc
);
4259 var
.limit
= (var
.limit
<< 12) | 0xfff;
4260 var
.type
= desc
->type
;
4261 var
.present
= desc
->p
;
4262 var
.dpl
= desc
->dpl
;
4267 var
.avl
= desc
->avl
;
4268 var
.present
= desc
->p
;
4269 var
.unusable
= !var
.present
;
4272 kvm_set_segment(vcpu
, &var
, seg
);
4276 static int emulator_get_msr(struct x86_emulate_ctxt
*ctxt
,
4277 u32 msr_index
, u64
*pdata
)
4279 return kvm_get_msr(emul_to_vcpu(ctxt
), msr_index
, pdata
);
4282 static int emulator_set_msr(struct x86_emulate_ctxt
*ctxt
,
4283 u32 msr_index
, u64 data
)
4285 return kvm_set_msr(emul_to_vcpu(ctxt
), msr_index
, data
);
4288 static int emulator_read_pmc(struct x86_emulate_ctxt
*ctxt
,
4289 u32 pmc
, u64
*pdata
)
4291 return kvm_pmu_read_pmc(emul_to_vcpu(ctxt
), pmc
, pdata
);
4294 static void emulator_halt(struct x86_emulate_ctxt
*ctxt
)
4296 emul_to_vcpu(ctxt
)->arch
.halt_request
= 1;
4299 static void emulator_get_fpu(struct x86_emulate_ctxt
*ctxt
)
4302 kvm_load_guest_fpu(emul_to_vcpu(ctxt
));
4304 * CR0.TS may reference the host fpu state, not the guest fpu state,
4305 * so it may be clear at this point.
4310 static void emulator_put_fpu(struct x86_emulate_ctxt
*ctxt
)
4315 static int emulator_intercept(struct x86_emulate_ctxt
*ctxt
,
4316 struct x86_instruction_info
*info
,
4317 enum x86_intercept_stage stage
)
4319 return kvm_x86_ops
->check_intercept(emul_to_vcpu(ctxt
), info
, stage
);
4322 static void emulator_get_cpuid(struct x86_emulate_ctxt
*ctxt
,
4323 u32
*eax
, u32
*ebx
, u32
*ecx
, u32
*edx
)
4325 kvm_cpuid(emul_to_vcpu(ctxt
), eax
, ebx
, ecx
, edx
);
4328 static ulong
emulator_read_gpr(struct x86_emulate_ctxt
*ctxt
, unsigned reg
)
4330 return kvm_register_read(emul_to_vcpu(ctxt
), reg
);
4333 static void emulator_write_gpr(struct x86_emulate_ctxt
*ctxt
, unsigned reg
, ulong val
)
4335 kvm_register_write(emul_to_vcpu(ctxt
), reg
, val
);
4338 static const struct x86_emulate_ops emulate_ops
= {
4339 .read_gpr
= emulator_read_gpr
,
4340 .write_gpr
= emulator_write_gpr
,
4341 .read_std
= kvm_read_guest_virt_system
,
4342 .write_std
= kvm_write_guest_virt_system
,
4343 .fetch
= kvm_fetch_guest_virt
,
4344 .read_emulated
= emulator_read_emulated
,
4345 .write_emulated
= emulator_write_emulated
,
4346 .cmpxchg_emulated
= emulator_cmpxchg_emulated
,
4347 .invlpg
= emulator_invlpg
,
4348 .pio_in_emulated
= emulator_pio_in_emulated
,
4349 .pio_out_emulated
= emulator_pio_out_emulated
,
4350 .get_segment
= emulator_get_segment
,
4351 .set_segment
= emulator_set_segment
,
4352 .get_cached_segment_base
= emulator_get_cached_segment_base
,
4353 .get_gdt
= emulator_get_gdt
,
4354 .get_idt
= emulator_get_idt
,
4355 .set_gdt
= emulator_set_gdt
,
4356 .set_idt
= emulator_set_idt
,
4357 .get_cr
= emulator_get_cr
,
4358 .set_cr
= emulator_set_cr
,
4359 .set_rflags
= emulator_set_rflags
,
4360 .cpl
= emulator_get_cpl
,
4361 .get_dr
= emulator_get_dr
,
4362 .set_dr
= emulator_set_dr
,
4363 .set_msr
= emulator_set_msr
,
4364 .get_msr
= emulator_get_msr
,
4365 .read_pmc
= emulator_read_pmc
,
4366 .halt
= emulator_halt
,
4367 .wbinvd
= emulator_wbinvd
,
4368 .fix_hypercall
= emulator_fix_hypercall
,
4369 .get_fpu
= emulator_get_fpu
,
4370 .put_fpu
= emulator_put_fpu
,
4371 .intercept
= emulator_intercept
,
4372 .get_cpuid
= emulator_get_cpuid
,
4375 static void toggle_interruptibility(struct kvm_vcpu
*vcpu
, u32 mask
)
4377 u32 int_shadow
= kvm_x86_ops
->get_interrupt_shadow(vcpu
, mask
);
4379 * an sti; sti; sequence only disable interrupts for the first
4380 * instruction. So, if the last instruction, be it emulated or
4381 * not, left the system with the INT_STI flag enabled, it
4382 * means that the last instruction is an sti. We should not
4383 * leave the flag on in this case. The same goes for mov ss
4385 if (!(int_shadow
& mask
))
4386 kvm_x86_ops
->set_interrupt_shadow(vcpu
, mask
);
4389 static void inject_emulated_exception(struct kvm_vcpu
*vcpu
)
4391 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
4392 if (ctxt
->exception
.vector
== PF_VECTOR
)
4393 kvm_propagate_fault(vcpu
, &ctxt
->exception
);
4394 else if (ctxt
->exception
.error_code_valid
)
4395 kvm_queue_exception_e(vcpu
, ctxt
->exception
.vector
,
4396 ctxt
->exception
.error_code
);
4398 kvm_queue_exception(vcpu
, ctxt
->exception
.vector
);
4401 static void init_decode_cache(struct x86_emulate_ctxt
*ctxt
)
4403 memset(&ctxt
->twobyte
, 0,
4404 (void *)&ctxt
->_regs
- (void *)&ctxt
->twobyte
);
4406 ctxt
->fetch
.start
= 0;
4407 ctxt
->fetch
.end
= 0;
4408 ctxt
->io_read
.pos
= 0;
4409 ctxt
->io_read
.end
= 0;
4410 ctxt
->mem_read
.pos
= 0;
4411 ctxt
->mem_read
.end
= 0;
4414 static void init_emulate_ctxt(struct kvm_vcpu
*vcpu
)
4416 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
4419 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
4421 ctxt
->eflags
= kvm_get_rflags(vcpu
);
4422 ctxt
->eip
= kvm_rip_read(vcpu
);
4423 ctxt
->mode
= (!is_protmode(vcpu
)) ? X86EMUL_MODE_REAL
:
4424 (ctxt
->eflags
& X86_EFLAGS_VM
) ? X86EMUL_MODE_VM86
:
4425 cs_l
? X86EMUL_MODE_PROT64
:
4426 cs_db
? X86EMUL_MODE_PROT32
:
4427 X86EMUL_MODE_PROT16
;
4428 ctxt
->guest_mode
= is_guest_mode(vcpu
);
4430 init_decode_cache(ctxt
);
4431 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= false;
4434 int kvm_inject_realmode_interrupt(struct kvm_vcpu
*vcpu
, int irq
, int inc_eip
)
4436 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
4439 init_emulate_ctxt(vcpu
);
4443 ctxt
->_eip
= ctxt
->eip
+ inc_eip
;
4444 ret
= emulate_int_real(ctxt
, irq
);
4446 if (ret
!= X86EMUL_CONTINUE
)
4447 return EMULATE_FAIL
;
4449 ctxt
->eip
= ctxt
->_eip
;
4450 kvm_rip_write(vcpu
, ctxt
->eip
);
4451 kvm_set_rflags(vcpu
, ctxt
->eflags
);
4453 if (irq
== NMI_VECTOR
)
4454 vcpu
->arch
.nmi_pending
= 0;
4456 vcpu
->arch
.interrupt
.pending
= false;
4458 return EMULATE_DONE
;
4460 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt
);
4462 static int handle_emulation_failure(struct kvm_vcpu
*vcpu
)
4464 int r
= EMULATE_DONE
;
4466 ++vcpu
->stat
.insn_emulation_fail
;
4467 trace_kvm_emulate_insn_failed(vcpu
);
4468 if (!is_guest_mode(vcpu
)) {
4469 vcpu
->run
->exit_reason
= KVM_EXIT_INTERNAL_ERROR
;
4470 vcpu
->run
->internal
.suberror
= KVM_INTERNAL_ERROR_EMULATION
;
4471 vcpu
->run
->internal
.ndata
= 0;
4474 kvm_queue_exception(vcpu
, UD_VECTOR
);
4479 static bool reexecute_instruction(struct kvm_vcpu
*vcpu
, gva_t gva
)
4488 * if emulation was due to access to shadowed page table
4489 * and it failed try to unshadow page and re-enter the
4490 * guest to let CPU execute the instruction.
4492 if (kvm_mmu_unprotect_page_virt(vcpu
, gva
))
4495 gpa
= kvm_mmu_gva_to_gpa_system(vcpu
, gva
, NULL
);
4497 if (gpa
== UNMAPPED_GVA
)
4498 return true; /* let cpu generate fault */
4501 * Do not retry the unhandleable instruction if it faults on the
4502 * readonly host memory, otherwise it will goto a infinite loop:
4503 * retry instruction -> write #PF -> emulation fail -> retry
4504 * instruction -> ...
4506 pfn
= gfn_to_pfn(vcpu
->kvm
, gpa_to_gfn(gpa
));
4507 if (!is_error_pfn(pfn
)) {
4508 kvm_release_pfn_clean(pfn
);
4515 static bool retry_instruction(struct x86_emulate_ctxt
*ctxt
,
4516 unsigned long cr2
, int emulation_type
)
4518 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4519 unsigned long last_retry_eip
, last_retry_addr
, gpa
= cr2
;
4521 last_retry_eip
= vcpu
->arch
.last_retry_eip
;
4522 last_retry_addr
= vcpu
->arch
.last_retry_addr
;
4525 * If the emulation is caused by #PF and it is non-page_table
4526 * writing instruction, it means the VM-EXIT is caused by shadow
4527 * page protected, we can zap the shadow page and retry this
4528 * instruction directly.
4530 * Note: if the guest uses a non-page-table modifying instruction
4531 * on the PDE that points to the instruction, then we will unmap
4532 * the instruction and go to an infinite loop. So, we cache the
4533 * last retried eip and the last fault address, if we meet the eip
4534 * and the address again, we can break out of the potential infinite
4537 vcpu
->arch
.last_retry_eip
= vcpu
->arch
.last_retry_addr
= 0;
4539 if (!(emulation_type
& EMULTYPE_RETRY
))
4542 if (x86_page_table_writing_insn(ctxt
))
4545 if (ctxt
->eip
== last_retry_eip
&& last_retry_addr
== cr2
)
4548 vcpu
->arch
.last_retry_eip
= ctxt
->eip
;
4549 vcpu
->arch
.last_retry_addr
= cr2
;
4551 if (!vcpu
->arch
.mmu
.direct_map
)
4552 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, cr2
, NULL
);
4554 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa
>> PAGE_SHIFT
);
4559 static int complete_emulated_mmio(struct kvm_vcpu
*vcpu
);
4560 static int complete_emulated_pio(struct kvm_vcpu
*vcpu
);
4562 int x86_emulate_instruction(struct kvm_vcpu
*vcpu
,
4569 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
4570 bool writeback
= true;
4572 kvm_clear_exception_queue(vcpu
);
4574 if (!(emulation_type
& EMULTYPE_NO_DECODE
)) {
4575 init_emulate_ctxt(vcpu
);
4576 ctxt
->interruptibility
= 0;
4577 ctxt
->have_exception
= false;
4578 ctxt
->perm_ok
= false;
4580 ctxt
->only_vendor_specific_insn
4581 = emulation_type
& EMULTYPE_TRAP_UD
;
4583 r
= x86_decode_insn(ctxt
, insn
, insn_len
);
4585 trace_kvm_emulate_insn_start(vcpu
);
4586 ++vcpu
->stat
.insn_emulation
;
4587 if (r
!= EMULATION_OK
) {
4588 if (emulation_type
& EMULTYPE_TRAP_UD
)
4589 return EMULATE_FAIL
;
4590 if (reexecute_instruction(vcpu
, cr2
))
4591 return EMULATE_DONE
;
4592 if (emulation_type
& EMULTYPE_SKIP
)
4593 return EMULATE_FAIL
;
4594 return handle_emulation_failure(vcpu
);
4598 if (emulation_type
& EMULTYPE_SKIP
) {
4599 kvm_rip_write(vcpu
, ctxt
->_eip
);
4600 return EMULATE_DONE
;
4603 if (retry_instruction(ctxt
, cr2
, emulation_type
))
4604 return EMULATE_DONE
;
4606 /* this is needed for vmware backdoor interface to work since it
4607 changes registers values during IO operation */
4608 if (vcpu
->arch
.emulate_regs_need_sync_from_vcpu
) {
4609 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= false;
4610 emulator_invalidate_register_cache(ctxt
);
4614 r
= x86_emulate_insn(ctxt
);
4616 if (r
== EMULATION_INTERCEPTED
)
4617 return EMULATE_DONE
;
4619 if (r
== EMULATION_FAILED
) {
4620 if (reexecute_instruction(vcpu
, cr2
))
4621 return EMULATE_DONE
;
4623 return handle_emulation_failure(vcpu
);
4626 if (ctxt
->have_exception
) {
4627 inject_emulated_exception(vcpu
);
4629 } else if (vcpu
->arch
.pio
.count
) {
4630 if (!vcpu
->arch
.pio
.in
)
4631 vcpu
->arch
.pio
.count
= 0;
4634 vcpu
->arch
.complete_userspace_io
= complete_emulated_pio
;
4636 r
= EMULATE_DO_MMIO
;
4637 } else if (vcpu
->mmio_needed
) {
4638 if (!vcpu
->mmio_is_write
)
4640 r
= EMULATE_DO_MMIO
;
4641 vcpu
->arch
.complete_userspace_io
= complete_emulated_mmio
;
4642 } else if (r
== EMULATION_RESTART
)
4648 toggle_interruptibility(vcpu
, ctxt
->interruptibility
);
4649 kvm_set_rflags(vcpu
, ctxt
->eflags
);
4650 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
4651 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
4652 kvm_rip_write(vcpu
, ctxt
->eip
);
4654 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= true;
4658 EXPORT_SYMBOL_GPL(x86_emulate_instruction
);
4660 int kvm_fast_pio_out(struct kvm_vcpu
*vcpu
, int size
, unsigned short port
)
4662 unsigned long val
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
4663 int ret
= emulator_pio_out_emulated(&vcpu
->arch
.emulate_ctxt
,
4664 size
, port
, &val
, 1);
4665 /* do not return to emulator after return from userspace */
4666 vcpu
->arch
.pio
.count
= 0;
4669 EXPORT_SYMBOL_GPL(kvm_fast_pio_out
);
4671 static void tsc_bad(void *info
)
4673 __this_cpu_write(cpu_tsc_khz
, 0);
4676 static void tsc_khz_changed(void *data
)
4678 struct cpufreq_freqs
*freq
= data
;
4679 unsigned long khz
= 0;
4683 else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
4684 khz
= cpufreq_quick_get(raw_smp_processor_id());
4687 __this_cpu_write(cpu_tsc_khz
, khz
);
4690 static int kvmclock_cpufreq_notifier(struct notifier_block
*nb
, unsigned long val
,
4693 struct cpufreq_freqs
*freq
= data
;
4695 struct kvm_vcpu
*vcpu
;
4696 int i
, send_ipi
= 0;
4699 * We allow guests to temporarily run on slowing clocks,
4700 * provided we notify them after, or to run on accelerating
4701 * clocks, provided we notify them before. Thus time never
4704 * However, we have a problem. We can't atomically update
4705 * the frequency of a given CPU from this function; it is
4706 * merely a notifier, which can be called from any CPU.
4707 * Changing the TSC frequency at arbitrary points in time
4708 * requires a recomputation of local variables related to
4709 * the TSC for each VCPU. We must flag these local variables
4710 * to be updated and be sure the update takes place with the
4711 * new frequency before any guests proceed.
4713 * Unfortunately, the combination of hotplug CPU and frequency
4714 * change creates an intractable locking scenario; the order
4715 * of when these callouts happen is undefined with respect to
4716 * CPU hotplug, and they can race with each other. As such,
4717 * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
4718 * undefined; you can actually have a CPU frequency change take
4719 * place in between the computation of X and the setting of the
4720 * variable. To protect against this problem, all updates of
4721 * the per_cpu tsc_khz variable are done in an interrupt
4722 * protected IPI, and all callers wishing to update the value
4723 * must wait for a synchronous IPI to complete (which is trivial
4724 * if the caller is on the CPU already). This establishes the
4725 * necessary total order on variable updates.
4727 * Note that because a guest time update may take place
4728 * anytime after the setting of the VCPU's request bit, the
4729 * correct TSC value must be set before the request. However,
4730 * to ensure the update actually makes it to any guest which
4731 * starts running in hardware virtualization between the set
4732 * and the acquisition of the spinlock, we must also ping the
4733 * CPU after setting the request bit.
4737 if (val
== CPUFREQ_PRECHANGE
&& freq
->old
> freq
->new)
4739 if (val
== CPUFREQ_POSTCHANGE
&& freq
->old
< freq
->new)
4742 smp_call_function_single(freq
->cpu
, tsc_khz_changed
, freq
, 1);
4744 raw_spin_lock(&kvm_lock
);
4745 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
4746 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
4747 if (vcpu
->cpu
!= freq
->cpu
)
4749 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
4750 if (vcpu
->cpu
!= smp_processor_id())
4754 raw_spin_unlock(&kvm_lock
);
4756 if (freq
->old
< freq
->new && send_ipi
) {
4758 * We upscale the frequency. Must make the guest
4759 * doesn't see old kvmclock values while running with
4760 * the new frequency, otherwise we risk the guest sees
4761 * time go backwards.
4763 * In case we update the frequency for another cpu
4764 * (which might be in guest context) send an interrupt
4765 * to kick the cpu out of guest context. Next time
4766 * guest context is entered kvmclock will be updated,
4767 * so the guest will not see stale values.
4769 smp_call_function_single(freq
->cpu
, tsc_khz_changed
, freq
, 1);
4774 static struct notifier_block kvmclock_cpufreq_notifier_block
= {
4775 .notifier_call
= kvmclock_cpufreq_notifier
4778 static int kvmclock_cpu_notifier(struct notifier_block
*nfb
,
4779 unsigned long action
, void *hcpu
)
4781 unsigned int cpu
= (unsigned long)hcpu
;
4785 case CPU_DOWN_FAILED
:
4786 smp_call_function_single(cpu
, tsc_khz_changed
, NULL
, 1);
4788 case CPU_DOWN_PREPARE
:
4789 smp_call_function_single(cpu
, tsc_bad
, NULL
, 1);
4795 static struct notifier_block kvmclock_cpu_notifier_block
= {
4796 .notifier_call
= kvmclock_cpu_notifier
,
4797 .priority
= -INT_MAX
4800 static void kvm_timer_init(void)
4804 max_tsc_khz
= tsc_khz
;
4805 register_hotcpu_notifier(&kvmclock_cpu_notifier_block
);
4806 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
)) {
4807 #ifdef CONFIG_CPU_FREQ
4808 struct cpufreq_policy policy
;
4809 memset(&policy
, 0, sizeof(policy
));
4811 cpufreq_get_policy(&policy
, cpu
);
4812 if (policy
.cpuinfo
.max_freq
)
4813 max_tsc_khz
= policy
.cpuinfo
.max_freq
;
4816 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block
,
4817 CPUFREQ_TRANSITION_NOTIFIER
);
4819 pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz
);
4820 for_each_online_cpu(cpu
)
4821 smp_call_function_single(cpu
, tsc_khz_changed
, NULL
, 1);
4824 static DEFINE_PER_CPU(struct kvm_vcpu
*, current_vcpu
);
4826 int kvm_is_in_guest(void)
4828 return __this_cpu_read(current_vcpu
) != NULL
;
4831 static int kvm_is_user_mode(void)
4835 if (__this_cpu_read(current_vcpu
))
4836 user_mode
= kvm_x86_ops
->get_cpl(__this_cpu_read(current_vcpu
));
4838 return user_mode
!= 0;
4841 static unsigned long kvm_get_guest_ip(void)
4843 unsigned long ip
= 0;
4845 if (__this_cpu_read(current_vcpu
))
4846 ip
= kvm_rip_read(__this_cpu_read(current_vcpu
));
4851 static struct perf_guest_info_callbacks kvm_guest_cbs
= {
4852 .is_in_guest
= kvm_is_in_guest
,
4853 .is_user_mode
= kvm_is_user_mode
,
4854 .get_guest_ip
= kvm_get_guest_ip
,
4857 void kvm_before_handle_nmi(struct kvm_vcpu
*vcpu
)
4859 __this_cpu_write(current_vcpu
, vcpu
);
4861 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi
);
4863 void kvm_after_handle_nmi(struct kvm_vcpu
*vcpu
)
4865 __this_cpu_write(current_vcpu
, NULL
);
4867 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi
);
4869 static void kvm_set_mmio_spte_mask(void)
4872 int maxphyaddr
= boot_cpu_data
.x86_phys_bits
;
4875 * Set the reserved bits and the present bit of an paging-structure
4876 * entry to generate page fault with PFER.RSV = 1.
4878 mask
= ((1ull << (62 - maxphyaddr
+ 1)) - 1) << maxphyaddr
;
4881 #ifdef CONFIG_X86_64
4883 * If reserved bit is not supported, clear the present bit to disable
4886 if (maxphyaddr
== 52)
4890 kvm_mmu_set_mmio_spte_mask(mask
);
4893 int kvm_arch_init(void *opaque
)
4896 struct kvm_x86_ops
*ops
= (struct kvm_x86_ops
*)opaque
;
4899 printk(KERN_ERR
"kvm: already loaded the other module\n");
4904 if (!ops
->cpu_has_kvm_support()) {
4905 printk(KERN_ERR
"kvm: no hardware support\n");
4909 if (ops
->disabled_by_bios()) {
4910 printk(KERN_ERR
"kvm: disabled by bios\n");
4915 r
= kvm_mmu_module_init();
4919 kvm_set_mmio_spte_mask();
4920 kvm_init_msr_list();
4923 kvm_mmu_set_mask_ptes(PT_USER_MASK
, PT_ACCESSED_MASK
,
4924 PT_DIRTY_MASK
, PT64_NX_MASK
, 0);
4928 perf_register_guest_info_callbacks(&kvm_guest_cbs
);
4931 host_xcr0
= xgetbv(XCR_XFEATURE_ENABLED_MASK
);
4940 void kvm_arch_exit(void)
4942 perf_unregister_guest_info_callbacks(&kvm_guest_cbs
);
4944 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
4945 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block
,
4946 CPUFREQ_TRANSITION_NOTIFIER
);
4947 unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block
);
4949 kvm_mmu_module_exit();
4952 int kvm_emulate_halt(struct kvm_vcpu
*vcpu
)
4954 ++vcpu
->stat
.halt_exits
;
4955 if (irqchip_in_kernel(vcpu
->kvm
)) {
4956 vcpu
->arch
.mp_state
= KVM_MP_STATE_HALTED
;
4959 vcpu
->run
->exit_reason
= KVM_EXIT_HLT
;
4963 EXPORT_SYMBOL_GPL(kvm_emulate_halt
);
4965 int kvm_hv_hypercall(struct kvm_vcpu
*vcpu
)
4967 u64 param
, ingpa
, outgpa
, ret
;
4968 uint16_t code
, rep_idx
, rep_cnt
, res
= HV_STATUS_SUCCESS
, rep_done
= 0;
4969 bool fast
, longmode
;
4973 * hypercall generates UD from non zero cpl and real mode
4976 if (kvm_x86_ops
->get_cpl(vcpu
) != 0 || !is_protmode(vcpu
)) {
4977 kvm_queue_exception(vcpu
, UD_VECTOR
);
4981 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
4982 longmode
= is_long_mode(vcpu
) && cs_l
== 1;
4985 param
= ((u64
)kvm_register_read(vcpu
, VCPU_REGS_RDX
) << 32) |
4986 (kvm_register_read(vcpu
, VCPU_REGS_RAX
) & 0xffffffff);
4987 ingpa
= ((u64
)kvm_register_read(vcpu
, VCPU_REGS_RBX
) << 32) |
4988 (kvm_register_read(vcpu
, VCPU_REGS_RCX
) & 0xffffffff);
4989 outgpa
= ((u64
)kvm_register_read(vcpu
, VCPU_REGS_RDI
) << 32) |
4990 (kvm_register_read(vcpu
, VCPU_REGS_RSI
) & 0xffffffff);
4992 #ifdef CONFIG_X86_64
4994 param
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
4995 ingpa
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
4996 outgpa
= kvm_register_read(vcpu
, VCPU_REGS_R8
);
5000 code
= param
& 0xffff;
5001 fast
= (param
>> 16) & 0x1;
5002 rep_cnt
= (param
>> 32) & 0xfff;
5003 rep_idx
= (param
>> 48) & 0xfff;
5005 trace_kvm_hv_hypercall(code
, fast
, rep_cnt
, rep_idx
, ingpa
, outgpa
);
5008 case HV_X64_HV_NOTIFY_LONG_SPIN_WAIT
:
5009 kvm_vcpu_on_spin(vcpu
);
5012 res
= HV_STATUS_INVALID_HYPERCALL_CODE
;
5016 ret
= res
| (((u64
)rep_done
& 0xfff) << 32);
5018 kvm_register_write(vcpu
, VCPU_REGS_RAX
, ret
);
5020 kvm_register_write(vcpu
, VCPU_REGS_RDX
, ret
>> 32);
5021 kvm_register_write(vcpu
, VCPU_REGS_RAX
, ret
& 0xffffffff);
5027 int kvm_emulate_hypercall(struct kvm_vcpu
*vcpu
)
5029 unsigned long nr
, a0
, a1
, a2
, a3
, ret
;
5032 if (kvm_hv_hypercall_enabled(vcpu
->kvm
))
5033 return kvm_hv_hypercall(vcpu
);
5035 nr
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
5036 a0
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
5037 a1
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
5038 a2
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
5039 a3
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
5041 trace_kvm_hypercall(nr
, a0
, a1
, a2
, a3
);
5043 if (!is_long_mode(vcpu
)) {
5051 if (kvm_x86_ops
->get_cpl(vcpu
) != 0) {
5057 case KVM_HC_VAPIC_POLL_IRQ
:
5065 kvm_register_write(vcpu
, VCPU_REGS_RAX
, ret
);
5066 ++vcpu
->stat
.hypercalls
;
5069 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall
);
5071 int emulator_fix_hypercall(struct x86_emulate_ctxt
*ctxt
)
5073 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5074 char instruction
[3];
5075 unsigned long rip
= kvm_rip_read(vcpu
);
5078 * Blow out the MMU to ensure that no other VCPU has an active mapping
5079 * to ensure that the updated hypercall appears atomically across all
5082 kvm_mmu_zap_all(vcpu
->kvm
);
5084 kvm_x86_ops
->patch_hypercall(vcpu
, instruction
);
5086 return emulator_write_emulated(ctxt
, rip
, instruction
, 3, NULL
);
5090 * Check if userspace requested an interrupt window, and that the
5091 * interrupt window is open.
5093 * No need to exit to userspace if we already have an interrupt queued.
5095 static int dm_request_for_irq_injection(struct kvm_vcpu
*vcpu
)
5097 return (!irqchip_in_kernel(vcpu
->kvm
) && !kvm_cpu_has_interrupt(vcpu
) &&
5098 vcpu
->run
->request_interrupt_window
&&
5099 kvm_arch_interrupt_allowed(vcpu
));
5102 static void post_kvm_run_save(struct kvm_vcpu
*vcpu
)
5104 struct kvm_run
*kvm_run
= vcpu
->run
;
5106 kvm_run
->if_flag
= (kvm_get_rflags(vcpu
) & X86_EFLAGS_IF
) != 0;
5107 kvm_run
->cr8
= kvm_get_cr8(vcpu
);
5108 kvm_run
->apic_base
= kvm_get_apic_base(vcpu
);
5109 if (irqchip_in_kernel(vcpu
->kvm
))
5110 kvm_run
->ready_for_interrupt_injection
= 1;
5112 kvm_run
->ready_for_interrupt_injection
=
5113 kvm_arch_interrupt_allowed(vcpu
) &&
5114 !kvm_cpu_has_interrupt(vcpu
) &&
5115 !kvm_event_needs_reinjection(vcpu
);
5118 static int vapic_enter(struct kvm_vcpu
*vcpu
)
5120 struct kvm_lapic
*apic
= vcpu
->arch
.apic
;
5123 if (!apic
|| !apic
->vapic_addr
)
5126 page
= gfn_to_page(vcpu
->kvm
, apic
->vapic_addr
>> PAGE_SHIFT
);
5127 if (is_error_page(page
))
5130 vcpu
->arch
.apic
->vapic_page
= page
;
5134 static void vapic_exit(struct kvm_vcpu
*vcpu
)
5136 struct kvm_lapic
*apic
= vcpu
->arch
.apic
;
5139 if (!apic
|| !apic
->vapic_addr
)
5142 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
5143 kvm_release_page_dirty(apic
->vapic_page
);
5144 mark_page_dirty(vcpu
->kvm
, apic
->vapic_addr
>> PAGE_SHIFT
);
5145 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
5148 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
)
5152 if (!kvm_x86_ops
->update_cr8_intercept
)
5155 if (!vcpu
->arch
.apic
)
5158 if (!vcpu
->arch
.apic
->vapic_addr
)
5159 max_irr
= kvm_lapic_find_highest_irr(vcpu
);
5166 tpr
= kvm_lapic_get_cr8(vcpu
);
5168 kvm_x86_ops
->update_cr8_intercept(vcpu
, tpr
, max_irr
);
5171 static void inject_pending_event(struct kvm_vcpu
*vcpu
)
5173 /* try to reinject previous events if any */
5174 if (vcpu
->arch
.exception
.pending
) {
5175 trace_kvm_inj_exception(vcpu
->arch
.exception
.nr
,
5176 vcpu
->arch
.exception
.has_error_code
,
5177 vcpu
->arch
.exception
.error_code
);
5178 kvm_x86_ops
->queue_exception(vcpu
, vcpu
->arch
.exception
.nr
,
5179 vcpu
->arch
.exception
.has_error_code
,
5180 vcpu
->arch
.exception
.error_code
,
5181 vcpu
->arch
.exception
.reinject
);
5185 if (vcpu
->arch
.nmi_injected
) {
5186 kvm_x86_ops
->set_nmi(vcpu
);
5190 if (vcpu
->arch
.interrupt
.pending
) {
5191 kvm_x86_ops
->set_irq(vcpu
);
5195 /* try to inject new event if pending */
5196 if (vcpu
->arch
.nmi_pending
) {
5197 if (kvm_x86_ops
->nmi_allowed(vcpu
)) {
5198 --vcpu
->arch
.nmi_pending
;
5199 vcpu
->arch
.nmi_injected
= true;
5200 kvm_x86_ops
->set_nmi(vcpu
);
5202 } else if (kvm_cpu_has_interrupt(vcpu
)) {
5203 if (kvm_x86_ops
->interrupt_allowed(vcpu
)) {
5204 kvm_queue_interrupt(vcpu
, kvm_cpu_get_interrupt(vcpu
),
5206 kvm_x86_ops
->set_irq(vcpu
);
5211 static void kvm_load_guest_xcr0(struct kvm_vcpu
*vcpu
)
5213 if (kvm_read_cr4_bits(vcpu
, X86_CR4_OSXSAVE
) &&
5214 !vcpu
->guest_xcr0_loaded
) {
5215 /* kvm_set_xcr() also depends on this */
5216 xsetbv(XCR_XFEATURE_ENABLED_MASK
, vcpu
->arch
.xcr0
);
5217 vcpu
->guest_xcr0_loaded
= 1;
5221 static void kvm_put_guest_xcr0(struct kvm_vcpu
*vcpu
)
5223 if (vcpu
->guest_xcr0_loaded
) {
5224 if (vcpu
->arch
.xcr0
!= host_xcr0
)
5225 xsetbv(XCR_XFEATURE_ENABLED_MASK
, host_xcr0
);
5226 vcpu
->guest_xcr0_loaded
= 0;
5230 static void process_nmi(struct kvm_vcpu
*vcpu
)
5235 * x86 is limited to one NMI running, and one NMI pending after it.
5236 * If an NMI is already in progress, limit further NMIs to just one.
5237 * Otherwise, allow two (and we'll inject the first one immediately).
5239 if (kvm_x86_ops
->get_nmi_mask(vcpu
) || vcpu
->arch
.nmi_injected
)
5242 vcpu
->arch
.nmi_pending
+= atomic_xchg(&vcpu
->arch
.nmi_queued
, 0);
5243 vcpu
->arch
.nmi_pending
= min(vcpu
->arch
.nmi_pending
, limit
);
5244 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5247 static int vcpu_enter_guest(struct kvm_vcpu
*vcpu
)
5250 bool req_int_win
= !irqchip_in_kernel(vcpu
->kvm
) &&
5251 vcpu
->run
->request_interrupt_window
;
5252 bool req_immediate_exit
= 0;
5254 if (vcpu
->requests
) {
5255 if (kvm_check_request(KVM_REQ_MMU_RELOAD
, vcpu
))
5256 kvm_mmu_unload(vcpu
);
5257 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER
, vcpu
))
5258 __kvm_migrate_timers(vcpu
);
5259 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE
, vcpu
)) {
5260 r
= kvm_guest_time_update(vcpu
);
5264 if (kvm_check_request(KVM_REQ_MMU_SYNC
, vcpu
))
5265 kvm_mmu_sync_roots(vcpu
);
5266 if (kvm_check_request(KVM_REQ_TLB_FLUSH
, vcpu
))
5267 kvm_x86_ops
->tlb_flush(vcpu
);
5268 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS
, vcpu
)) {
5269 vcpu
->run
->exit_reason
= KVM_EXIT_TPR_ACCESS
;
5273 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT
, vcpu
)) {
5274 vcpu
->run
->exit_reason
= KVM_EXIT_SHUTDOWN
;
5278 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU
, vcpu
)) {
5279 vcpu
->fpu_active
= 0;
5280 kvm_x86_ops
->fpu_deactivate(vcpu
);
5282 if (kvm_check_request(KVM_REQ_APF_HALT
, vcpu
)) {
5283 /* Page is swapped out. Do synthetic halt */
5284 vcpu
->arch
.apf
.halted
= true;
5288 if (kvm_check_request(KVM_REQ_STEAL_UPDATE
, vcpu
))
5289 record_steal_time(vcpu
);
5290 if (kvm_check_request(KVM_REQ_NMI
, vcpu
))
5292 req_immediate_exit
=
5293 kvm_check_request(KVM_REQ_IMMEDIATE_EXIT
, vcpu
);
5294 if (kvm_check_request(KVM_REQ_PMU
, vcpu
))
5295 kvm_handle_pmu_event(vcpu
);
5296 if (kvm_check_request(KVM_REQ_PMI
, vcpu
))
5297 kvm_deliver_pmi(vcpu
);
5300 if (kvm_check_request(KVM_REQ_EVENT
, vcpu
) || req_int_win
) {
5301 inject_pending_event(vcpu
);
5303 /* enable NMI/IRQ window open exits if needed */
5304 if (vcpu
->arch
.nmi_pending
)
5305 kvm_x86_ops
->enable_nmi_window(vcpu
);
5306 else if (kvm_cpu_has_interrupt(vcpu
) || req_int_win
)
5307 kvm_x86_ops
->enable_irq_window(vcpu
);
5309 if (kvm_lapic_enabled(vcpu
)) {
5310 update_cr8_intercept(vcpu
);
5311 kvm_lapic_sync_to_vapic(vcpu
);
5315 r
= kvm_mmu_reload(vcpu
);
5317 goto cancel_injection
;
5322 kvm_x86_ops
->prepare_guest_switch(vcpu
);
5323 if (vcpu
->fpu_active
)
5324 kvm_load_guest_fpu(vcpu
);
5325 kvm_load_guest_xcr0(vcpu
);
5327 vcpu
->mode
= IN_GUEST_MODE
;
5329 /* We should set ->mode before check ->requests,
5330 * see the comment in make_all_cpus_request.
5334 local_irq_disable();
5336 if (vcpu
->mode
== EXITING_GUEST_MODE
|| vcpu
->requests
5337 || need_resched() || signal_pending(current
)) {
5338 vcpu
->mode
= OUTSIDE_GUEST_MODE
;
5343 goto cancel_injection
;
5346 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
5348 if (req_immediate_exit
)
5349 smp_send_reschedule(vcpu
->cpu
);
5353 if (unlikely(vcpu
->arch
.switch_db_regs
)) {
5355 set_debugreg(vcpu
->arch
.eff_db
[0], 0);
5356 set_debugreg(vcpu
->arch
.eff_db
[1], 1);
5357 set_debugreg(vcpu
->arch
.eff_db
[2], 2);
5358 set_debugreg(vcpu
->arch
.eff_db
[3], 3);
5361 trace_kvm_entry(vcpu
->vcpu_id
);
5362 kvm_x86_ops
->run(vcpu
);
5365 * If the guest has used debug registers, at least dr7
5366 * will be disabled while returning to the host.
5367 * If we don't have active breakpoints in the host, we don't
5368 * care about the messed up debug address registers. But if
5369 * we have some of them active, restore the old state.
5371 if (hw_breakpoint_active())
5372 hw_breakpoint_restore();
5374 vcpu
->arch
.last_guest_tsc
= kvm_x86_ops
->read_l1_tsc(vcpu
);
5376 vcpu
->mode
= OUTSIDE_GUEST_MODE
;
5383 * We must have an instruction between local_irq_enable() and
5384 * kvm_guest_exit(), so the timer interrupt isn't delayed by
5385 * the interrupt shadow. The stat.exits increment will do nicely.
5386 * But we need to prevent reordering, hence this barrier():
5394 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
5397 * Profile KVM exit RIPs:
5399 if (unlikely(prof_on
== KVM_PROFILING
)) {
5400 unsigned long rip
= kvm_rip_read(vcpu
);
5401 profile_hit(KVM_PROFILING
, (void *)rip
);
5404 if (unlikely(vcpu
->arch
.tsc_always_catchup
))
5405 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
5407 if (vcpu
->arch
.apic_attention
)
5408 kvm_lapic_sync_from_vapic(vcpu
);
5410 r
= kvm_x86_ops
->handle_exit(vcpu
);
5414 kvm_x86_ops
->cancel_injection(vcpu
);
5415 if (unlikely(vcpu
->arch
.apic_attention
))
5416 kvm_lapic_sync_from_vapic(vcpu
);
5422 static int __vcpu_run(struct kvm_vcpu
*vcpu
)
5425 struct kvm
*kvm
= vcpu
->kvm
;
5427 if (unlikely(vcpu
->arch
.mp_state
== KVM_MP_STATE_SIPI_RECEIVED
)) {
5428 pr_debug("vcpu %d received sipi with vector # %x\n",
5429 vcpu
->vcpu_id
, vcpu
->arch
.sipi_vector
);
5430 kvm_lapic_reset(vcpu
);
5431 r
= kvm_vcpu_reset(vcpu
);
5434 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
5437 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
5438 r
= vapic_enter(vcpu
);
5440 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
5446 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_RUNNABLE
&&
5447 !vcpu
->arch
.apf
.halted
)
5448 r
= vcpu_enter_guest(vcpu
);
5450 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
5451 kvm_vcpu_block(vcpu
);
5452 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
5453 if (kvm_check_request(KVM_REQ_UNHALT
, vcpu
))
5455 switch(vcpu
->arch
.mp_state
) {
5456 case KVM_MP_STATE_HALTED
:
5457 vcpu
->arch
.mp_state
=
5458 KVM_MP_STATE_RUNNABLE
;
5459 case KVM_MP_STATE_RUNNABLE
:
5460 vcpu
->arch
.apf
.halted
= false;
5462 case KVM_MP_STATE_SIPI_RECEIVED
:
5473 clear_bit(KVM_REQ_PENDING_TIMER
, &vcpu
->requests
);
5474 if (kvm_cpu_has_pending_timer(vcpu
))
5475 kvm_inject_pending_timer_irqs(vcpu
);
5477 if (dm_request_for_irq_injection(vcpu
)) {
5479 vcpu
->run
->exit_reason
= KVM_EXIT_INTR
;
5480 ++vcpu
->stat
.request_irq_exits
;
5483 kvm_check_async_pf_completion(vcpu
);
5485 if (signal_pending(current
)) {
5487 vcpu
->run
->exit_reason
= KVM_EXIT_INTR
;
5488 ++vcpu
->stat
.signal_exits
;
5490 if (need_resched()) {
5491 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
5493 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
5497 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
5504 static inline int complete_emulated_io(struct kvm_vcpu
*vcpu
)
5507 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
5508 r
= emulate_instruction(vcpu
, EMULTYPE_NO_DECODE
);
5509 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
5510 if (r
!= EMULATE_DONE
)
5515 static int complete_emulated_pio(struct kvm_vcpu
*vcpu
)
5517 BUG_ON(!vcpu
->arch
.pio
.count
);
5519 return complete_emulated_io(vcpu
);
5523 * Implements the following, as a state machine:
5538 static int complete_emulated_mmio(struct kvm_vcpu
*vcpu
)
5540 struct kvm_run
*run
= vcpu
->run
;
5541 struct kvm_mmio_fragment
*frag
;
5543 BUG_ON(!vcpu
->mmio_needed
);
5545 /* Complete previous fragment */
5546 frag
= &vcpu
->mmio_fragments
[vcpu
->mmio_cur_fragment
++];
5547 if (!vcpu
->mmio_is_write
)
5548 memcpy(frag
->data
, run
->mmio
.data
, frag
->len
);
5549 if (vcpu
->mmio_cur_fragment
== vcpu
->mmio_nr_fragments
) {
5550 vcpu
->mmio_needed
= 0;
5551 if (vcpu
->mmio_is_write
)
5553 vcpu
->mmio_read_completed
= 1;
5554 return complete_emulated_io(vcpu
);
5556 /* Initiate next fragment */
5558 run
->exit_reason
= KVM_EXIT_MMIO
;
5559 run
->mmio
.phys_addr
= frag
->gpa
;
5560 if (vcpu
->mmio_is_write
)
5561 memcpy(run
->mmio
.data
, frag
->data
, frag
->len
);
5562 run
->mmio
.len
= frag
->len
;
5563 run
->mmio
.is_write
= vcpu
->mmio_is_write
;
5564 vcpu
->arch
.complete_userspace_io
= complete_emulated_mmio
;
5569 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
5574 if (!tsk_used_math(current
) && init_fpu(current
))
5577 if (vcpu
->sigset_active
)
5578 sigprocmask(SIG_SETMASK
, &vcpu
->sigset
, &sigsaved
);
5580 if (unlikely(vcpu
->arch
.mp_state
== KVM_MP_STATE_UNINITIALIZED
)) {
5581 kvm_vcpu_block(vcpu
);
5582 clear_bit(KVM_REQ_UNHALT
, &vcpu
->requests
);
5587 /* re-sync apic's tpr */
5588 if (!irqchip_in_kernel(vcpu
->kvm
)) {
5589 if (kvm_set_cr8(vcpu
, kvm_run
->cr8
) != 0) {
5595 if (unlikely(vcpu
->arch
.complete_userspace_io
)) {
5596 int (*cui
)(struct kvm_vcpu
*) = vcpu
->arch
.complete_userspace_io
;
5597 vcpu
->arch
.complete_userspace_io
= NULL
;
5602 WARN_ON(vcpu
->arch
.pio
.count
|| vcpu
->mmio_needed
);
5604 r
= __vcpu_run(vcpu
);
5607 post_kvm_run_save(vcpu
);
5608 if (vcpu
->sigset_active
)
5609 sigprocmask(SIG_SETMASK
, &sigsaved
, NULL
);
5614 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
5616 if (vcpu
->arch
.emulate_regs_need_sync_to_vcpu
) {
5618 * We are here if userspace calls get_regs() in the middle of
5619 * instruction emulation. Registers state needs to be copied
5620 * back from emulation context to vcpu. Userspace shouldn't do
5621 * that usually, but some bad designed PV devices (vmware
5622 * backdoor interface) need this to work
5624 emulator_writeback_register_cache(&vcpu
->arch
.emulate_ctxt
);
5625 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
5627 regs
->rax
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
5628 regs
->rbx
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
5629 regs
->rcx
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
5630 regs
->rdx
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
5631 regs
->rsi
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
5632 regs
->rdi
= kvm_register_read(vcpu
, VCPU_REGS_RDI
);
5633 regs
->rsp
= kvm_register_read(vcpu
, VCPU_REGS_RSP
);
5634 regs
->rbp
= kvm_register_read(vcpu
, VCPU_REGS_RBP
);
5635 #ifdef CONFIG_X86_64
5636 regs
->r8
= kvm_register_read(vcpu
, VCPU_REGS_R8
);
5637 regs
->r9
= kvm_register_read(vcpu
, VCPU_REGS_R9
);
5638 regs
->r10
= kvm_register_read(vcpu
, VCPU_REGS_R10
);
5639 regs
->r11
= kvm_register_read(vcpu
, VCPU_REGS_R11
);
5640 regs
->r12
= kvm_register_read(vcpu
, VCPU_REGS_R12
);
5641 regs
->r13
= kvm_register_read(vcpu
, VCPU_REGS_R13
);
5642 regs
->r14
= kvm_register_read(vcpu
, VCPU_REGS_R14
);
5643 regs
->r15
= kvm_register_read(vcpu
, VCPU_REGS_R15
);
5646 regs
->rip
= kvm_rip_read(vcpu
);
5647 regs
->rflags
= kvm_get_rflags(vcpu
);
5652 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
5654 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= true;
5655 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
5657 kvm_register_write(vcpu
, VCPU_REGS_RAX
, regs
->rax
);
5658 kvm_register_write(vcpu
, VCPU_REGS_RBX
, regs
->rbx
);
5659 kvm_register_write(vcpu
, VCPU_REGS_RCX
, regs
->rcx
);
5660 kvm_register_write(vcpu
, VCPU_REGS_RDX
, regs
->rdx
);
5661 kvm_register_write(vcpu
, VCPU_REGS_RSI
, regs
->rsi
);
5662 kvm_register_write(vcpu
, VCPU_REGS_RDI
, regs
->rdi
);
5663 kvm_register_write(vcpu
, VCPU_REGS_RSP
, regs
->rsp
);
5664 kvm_register_write(vcpu
, VCPU_REGS_RBP
, regs
->rbp
);
5665 #ifdef CONFIG_X86_64
5666 kvm_register_write(vcpu
, VCPU_REGS_R8
, regs
->r8
);
5667 kvm_register_write(vcpu
, VCPU_REGS_R9
, regs
->r9
);
5668 kvm_register_write(vcpu
, VCPU_REGS_R10
, regs
->r10
);
5669 kvm_register_write(vcpu
, VCPU_REGS_R11
, regs
->r11
);
5670 kvm_register_write(vcpu
, VCPU_REGS_R12
, regs
->r12
);
5671 kvm_register_write(vcpu
, VCPU_REGS_R13
, regs
->r13
);
5672 kvm_register_write(vcpu
, VCPU_REGS_R14
, regs
->r14
);
5673 kvm_register_write(vcpu
, VCPU_REGS_R15
, regs
->r15
);
5676 kvm_rip_write(vcpu
, regs
->rip
);
5677 kvm_set_rflags(vcpu
, regs
->rflags
);
5679 vcpu
->arch
.exception
.pending
= false;
5681 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5686 void kvm_get_cs_db_l_bits(struct kvm_vcpu
*vcpu
, int *db
, int *l
)
5688 struct kvm_segment cs
;
5690 kvm_get_segment(vcpu
, &cs
, VCPU_SREG_CS
);
5694 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits
);
5696 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu
*vcpu
,
5697 struct kvm_sregs
*sregs
)
5701 kvm_get_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
5702 kvm_get_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
5703 kvm_get_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
5704 kvm_get_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
5705 kvm_get_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
5706 kvm_get_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
5708 kvm_get_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
5709 kvm_get_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
5711 kvm_x86_ops
->get_idt(vcpu
, &dt
);
5712 sregs
->idt
.limit
= dt
.size
;
5713 sregs
->idt
.base
= dt
.address
;
5714 kvm_x86_ops
->get_gdt(vcpu
, &dt
);
5715 sregs
->gdt
.limit
= dt
.size
;
5716 sregs
->gdt
.base
= dt
.address
;
5718 sregs
->cr0
= kvm_read_cr0(vcpu
);
5719 sregs
->cr2
= vcpu
->arch
.cr2
;
5720 sregs
->cr3
= kvm_read_cr3(vcpu
);
5721 sregs
->cr4
= kvm_read_cr4(vcpu
);
5722 sregs
->cr8
= kvm_get_cr8(vcpu
);
5723 sregs
->efer
= vcpu
->arch
.efer
;
5724 sregs
->apic_base
= kvm_get_apic_base(vcpu
);
5726 memset(sregs
->interrupt_bitmap
, 0, sizeof sregs
->interrupt_bitmap
);
5728 if (vcpu
->arch
.interrupt
.pending
&& !vcpu
->arch
.interrupt
.soft
)
5729 set_bit(vcpu
->arch
.interrupt
.nr
,
5730 (unsigned long *)sregs
->interrupt_bitmap
);
5735 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu
*vcpu
,
5736 struct kvm_mp_state
*mp_state
)
5738 mp_state
->mp_state
= vcpu
->arch
.mp_state
;
5742 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu
*vcpu
,
5743 struct kvm_mp_state
*mp_state
)
5745 vcpu
->arch
.mp_state
= mp_state
->mp_state
;
5746 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5750 int kvm_task_switch(struct kvm_vcpu
*vcpu
, u16 tss_selector
, int idt_index
,
5751 int reason
, bool has_error_code
, u32 error_code
)
5753 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5756 init_emulate_ctxt(vcpu
);
5758 ret
= emulator_task_switch(ctxt
, tss_selector
, idt_index
, reason
,
5759 has_error_code
, error_code
);
5762 return EMULATE_FAIL
;
5764 kvm_rip_write(vcpu
, ctxt
->eip
);
5765 kvm_set_rflags(vcpu
, ctxt
->eflags
);
5766 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5767 return EMULATE_DONE
;
5769 EXPORT_SYMBOL_GPL(kvm_task_switch
);
5771 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu
*vcpu
,
5772 struct kvm_sregs
*sregs
)
5774 int mmu_reset_needed
= 0;
5775 int pending_vec
, max_bits
, idx
;
5778 dt
.size
= sregs
->idt
.limit
;
5779 dt
.address
= sregs
->idt
.base
;
5780 kvm_x86_ops
->set_idt(vcpu
, &dt
);
5781 dt
.size
= sregs
->gdt
.limit
;
5782 dt
.address
= sregs
->gdt
.base
;
5783 kvm_x86_ops
->set_gdt(vcpu
, &dt
);
5785 vcpu
->arch
.cr2
= sregs
->cr2
;
5786 mmu_reset_needed
|= kvm_read_cr3(vcpu
) != sregs
->cr3
;
5787 vcpu
->arch
.cr3
= sregs
->cr3
;
5788 __set_bit(VCPU_EXREG_CR3
, (ulong
*)&vcpu
->arch
.regs_avail
);
5790 kvm_set_cr8(vcpu
, sregs
->cr8
);
5792 mmu_reset_needed
|= vcpu
->arch
.efer
!= sregs
->efer
;
5793 kvm_x86_ops
->set_efer(vcpu
, sregs
->efer
);
5794 kvm_set_apic_base(vcpu
, sregs
->apic_base
);
5796 mmu_reset_needed
|= kvm_read_cr0(vcpu
) != sregs
->cr0
;
5797 kvm_x86_ops
->set_cr0(vcpu
, sregs
->cr0
);
5798 vcpu
->arch
.cr0
= sregs
->cr0
;
5800 mmu_reset_needed
|= kvm_read_cr4(vcpu
) != sregs
->cr4
;
5801 kvm_x86_ops
->set_cr4(vcpu
, sregs
->cr4
);
5802 if (sregs
->cr4
& X86_CR4_OSXSAVE
)
5803 kvm_update_cpuid(vcpu
);
5805 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
5806 if (!is_long_mode(vcpu
) && is_pae(vcpu
)) {
5807 load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, kvm_read_cr3(vcpu
));
5808 mmu_reset_needed
= 1;
5810 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
5812 if (mmu_reset_needed
)
5813 kvm_mmu_reset_context(vcpu
);
5815 max_bits
= KVM_NR_INTERRUPTS
;
5816 pending_vec
= find_first_bit(
5817 (const unsigned long *)sregs
->interrupt_bitmap
, max_bits
);
5818 if (pending_vec
< max_bits
) {
5819 kvm_queue_interrupt(vcpu
, pending_vec
, false);
5820 pr_debug("Set back pending irq %d\n", pending_vec
);
5823 kvm_set_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
5824 kvm_set_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
5825 kvm_set_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
5826 kvm_set_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
5827 kvm_set_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
5828 kvm_set_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
5830 kvm_set_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
5831 kvm_set_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
5833 update_cr8_intercept(vcpu
);
5835 /* Older userspace won't unhalt the vcpu on reset. */
5836 if (kvm_vcpu_is_bsp(vcpu
) && kvm_rip_read(vcpu
) == 0xfff0 &&
5837 sregs
->cs
.selector
== 0xf000 && sregs
->cs
.base
== 0xffff0000 &&
5839 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
5841 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5846 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu
*vcpu
,
5847 struct kvm_guest_debug
*dbg
)
5849 unsigned long rflags
;
5852 if (dbg
->control
& (KVM_GUESTDBG_INJECT_DB
| KVM_GUESTDBG_INJECT_BP
)) {
5854 if (vcpu
->arch
.exception
.pending
)
5856 if (dbg
->control
& KVM_GUESTDBG_INJECT_DB
)
5857 kvm_queue_exception(vcpu
, DB_VECTOR
);
5859 kvm_queue_exception(vcpu
, BP_VECTOR
);
5863 * Read rflags as long as potentially injected trace flags are still
5866 rflags
= kvm_get_rflags(vcpu
);
5868 vcpu
->guest_debug
= dbg
->control
;
5869 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_ENABLE
))
5870 vcpu
->guest_debug
= 0;
5872 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
) {
5873 for (i
= 0; i
< KVM_NR_DB_REGS
; ++i
)
5874 vcpu
->arch
.eff_db
[i
] = dbg
->arch
.debugreg
[i
];
5875 vcpu
->arch
.guest_debug_dr7
= dbg
->arch
.debugreg
[7];
5877 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
5878 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
5880 kvm_update_dr7(vcpu
);
5882 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
5883 vcpu
->arch
.singlestep_rip
= kvm_rip_read(vcpu
) +
5884 get_segment_base(vcpu
, VCPU_SREG_CS
);
5887 * Trigger an rflags update that will inject or remove the trace
5890 kvm_set_rflags(vcpu
, rflags
);
5892 kvm_x86_ops
->update_db_bp_intercept(vcpu
);
5902 * Translate a guest virtual address to a guest physical address.
5904 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu
*vcpu
,
5905 struct kvm_translation
*tr
)
5907 unsigned long vaddr
= tr
->linear_address
;
5911 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
5912 gpa
= kvm_mmu_gva_to_gpa_system(vcpu
, vaddr
, NULL
);
5913 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
5914 tr
->physical_address
= gpa
;
5915 tr
->valid
= gpa
!= UNMAPPED_GVA
;
5922 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
5924 struct i387_fxsave_struct
*fxsave
=
5925 &vcpu
->arch
.guest_fpu
.state
->fxsave
;
5927 memcpy(fpu
->fpr
, fxsave
->st_space
, 128);
5928 fpu
->fcw
= fxsave
->cwd
;
5929 fpu
->fsw
= fxsave
->swd
;
5930 fpu
->ftwx
= fxsave
->twd
;
5931 fpu
->last_opcode
= fxsave
->fop
;
5932 fpu
->last_ip
= fxsave
->rip
;
5933 fpu
->last_dp
= fxsave
->rdp
;
5934 memcpy(fpu
->xmm
, fxsave
->xmm_space
, sizeof fxsave
->xmm_space
);
5939 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
5941 struct i387_fxsave_struct
*fxsave
=
5942 &vcpu
->arch
.guest_fpu
.state
->fxsave
;
5944 memcpy(fxsave
->st_space
, fpu
->fpr
, 128);
5945 fxsave
->cwd
= fpu
->fcw
;
5946 fxsave
->swd
= fpu
->fsw
;
5947 fxsave
->twd
= fpu
->ftwx
;
5948 fxsave
->fop
= fpu
->last_opcode
;
5949 fxsave
->rip
= fpu
->last_ip
;
5950 fxsave
->rdp
= fpu
->last_dp
;
5951 memcpy(fxsave
->xmm_space
, fpu
->xmm
, sizeof fxsave
->xmm_space
);
5956 int fx_init(struct kvm_vcpu
*vcpu
)
5960 err
= fpu_alloc(&vcpu
->arch
.guest_fpu
);
5964 fpu_finit(&vcpu
->arch
.guest_fpu
);
5967 * Ensure guest xcr0 is valid for loading
5969 vcpu
->arch
.xcr0
= XSTATE_FP
;
5971 vcpu
->arch
.cr0
|= X86_CR0_ET
;
5975 EXPORT_SYMBOL_GPL(fx_init
);
5977 static void fx_free(struct kvm_vcpu
*vcpu
)
5979 fpu_free(&vcpu
->arch
.guest_fpu
);
5982 void kvm_load_guest_fpu(struct kvm_vcpu
*vcpu
)
5984 if (vcpu
->guest_fpu_loaded
)
5988 * Restore all possible states in the guest,
5989 * and assume host would use all available bits.
5990 * Guest xcr0 would be loaded later.
5992 kvm_put_guest_xcr0(vcpu
);
5993 vcpu
->guest_fpu_loaded
= 1;
5994 __kernel_fpu_begin();
5995 fpu_restore_checking(&vcpu
->arch
.guest_fpu
);
5999 void kvm_put_guest_fpu(struct kvm_vcpu
*vcpu
)
6001 kvm_put_guest_xcr0(vcpu
);
6003 if (!vcpu
->guest_fpu_loaded
)
6006 vcpu
->guest_fpu_loaded
= 0;
6007 fpu_save_init(&vcpu
->arch
.guest_fpu
);
6009 ++vcpu
->stat
.fpu_reload
;
6010 kvm_make_request(KVM_REQ_DEACTIVATE_FPU
, vcpu
);
6014 void kvm_arch_vcpu_free(struct kvm_vcpu
*vcpu
)
6016 kvmclock_reset(vcpu
);
6018 free_cpumask_var(vcpu
->arch
.wbinvd_dirty_mask
);
6020 kvm_x86_ops
->vcpu_free(vcpu
);
6023 struct kvm_vcpu
*kvm_arch_vcpu_create(struct kvm
*kvm
,
6026 if (check_tsc_unstable() && atomic_read(&kvm
->online_vcpus
) != 0)
6027 printk_once(KERN_WARNING
6028 "kvm: SMP vm created on host with unstable TSC; "
6029 "guest TSC will not be reliable\n");
6030 return kvm_x86_ops
->vcpu_create(kvm
, id
);
6033 int kvm_arch_vcpu_setup(struct kvm_vcpu
*vcpu
)
6037 vcpu
->arch
.mtrr_state
.have_fixed
= 1;
6038 r
= vcpu_load(vcpu
);
6041 r
= kvm_vcpu_reset(vcpu
);
6043 r
= kvm_mmu_setup(vcpu
);
6049 void kvm_arch_vcpu_destroy(struct kvm_vcpu
*vcpu
)
6052 vcpu
->arch
.apf
.msr_val
= 0;
6054 r
= vcpu_load(vcpu
);
6056 kvm_mmu_unload(vcpu
);
6060 kvm_x86_ops
->vcpu_free(vcpu
);
6063 static int kvm_vcpu_reset(struct kvm_vcpu
*vcpu
)
6065 atomic_set(&vcpu
->arch
.nmi_queued
, 0);
6066 vcpu
->arch
.nmi_pending
= 0;
6067 vcpu
->arch
.nmi_injected
= false;
6069 memset(vcpu
->arch
.db
, 0, sizeof(vcpu
->arch
.db
));
6070 vcpu
->arch
.dr6
= DR6_FIXED_1
;
6071 vcpu
->arch
.dr7
= DR7_FIXED_1
;
6072 kvm_update_dr7(vcpu
);
6074 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6075 vcpu
->arch
.apf
.msr_val
= 0;
6076 vcpu
->arch
.st
.msr_val
= 0;
6078 kvmclock_reset(vcpu
);
6080 kvm_clear_async_pf_completion_queue(vcpu
);
6081 kvm_async_pf_hash_reset(vcpu
);
6082 vcpu
->arch
.apf
.halted
= false;
6084 kvm_pmu_reset(vcpu
);
6086 return kvm_x86_ops
->vcpu_reset(vcpu
);
6089 int kvm_arch_hardware_enable(void *garbage
)
6092 struct kvm_vcpu
*vcpu
;
6097 bool stable
, backwards_tsc
= false;
6099 kvm_shared_msr_cpu_online();
6100 ret
= kvm_x86_ops
->hardware_enable(garbage
);
6104 local_tsc
= native_read_tsc();
6105 stable
= !check_tsc_unstable();
6106 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
6107 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
6108 if (!stable
&& vcpu
->cpu
== smp_processor_id())
6109 set_bit(KVM_REQ_CLOCK_UPDATE
, &vcpu
->requests
);
6110 if (stable
&& vcpu
->arch
.last_host_tsc
> local_tsc
) {
6111 backwards_tsc
= true;
6112 if (vcpu
->arch
.last_host_tsc
> max_tsc
)
6113 max_tsc
= vcpu
->arch
.last_host_tsc
;
6119 * Sometimes, even reliable TSCs go backwards. This happens on
6120 * platforms that reset TSC during suspend or hibernate actions, but
6121 * maintain synchronization. We must compensate. Fortunately, we can
6122 * detect that condition here, which happens early in CPU bringup,
6123 * before any KVM threads can be running. Unfortunately, we can't
6124 * bring the TSCs fully up to date with real time, as we aren't yet far
6125 * enough into CPU bringup that we know how much real time has actually
6126 * elapsed; our helper function, get_kernel_ns() will be using boot
6127 * variables that haven't been updated yet.
6129 * So we simply find the maximum observed TSC above, then record the
6130 * adjustment to TSC in each VCPU. When the VCPU later gets loaded,
6131 * the adjustment will be applied. Note that we accumulate
6132 * adjustments, in case multiple suspend cycles happen before some VCPU
6133 * gets a chance to run again. In the event that no KVM threads get a
6134 * chance to run, we will miss the entire elapsed period, as we'll have
6135 * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
6136 * loose cycle time. This isn't too big a deal, since the loss will be
6137 * uniform across all VCPUs (not to mention the scenario is extremely
6138 * unlikely). It is possible that a second hibernate recovery happens
6139 * much faster than a first, causing the observed TSC here to be
6140 * smaller; this would require additional padding adjustment, which is
6141 * why we set last_host_tsc to the local tsc observed here.
6143 * N.B. - this code below runs only on platforms with reliable TSC,
6144 * as that is the only way backwards_tsc is set above. Also note
6145 * that this runs for ALL vcpus, which is not a bug; all VCPUs should
6146 * have the same delta_cyc adjustment applied if backwards_tsc
6147 * is detected. Note further, this adjustment is only done once,
6148 * as we reset last_host_tsc on all VCPUs to stop this from being
6149 * called multiple times (one for each physical CPU bringup).
6151 * Platforms with unreliable TSCs don't have to deal with this, they
6152 * will be compensated by the logic in vcpu_load, which sets the TSC to
6153 * catchup mode. This will catchup all VCPUs to real time, but cannot
6154 * guarantee that they stay in perfect synchronization.
6156 if (backwards_tsc
) {
6157 u64 delta_cyc
= max_tsc
- local_tsc
;
6158 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
6159 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
6160 vcpu
->arch
.tsc_offset_adjustment
+= delta_cyc
;
6161 vcpu
->arch
.last_host_tsc
= local_tsc
;
6165 * We have to disable TSC offset matching.. if you were
6166 * booting a VM while issuing an S4 host suspend....
6167 * you may have some problem. Solving this issue is
6168 * left as an exercise to the reader.
6170 kvm
->arch
.last_tsc_nsec
= 0;
6171 kvm
->arch
.last_tsc_write
= 0;
6178 void kvm_arch_hardware_disable(void *garbage
)
6180 kvm_x86_ops
->hardware_disable(garbage
);
6181 drop_user_return_notifiers(garbage
);
6184 int kvm_arch_hardware_setup(void)
6186 return kvm_x86_ops
->hardware_setup();
6189 void kvm_arch_hardware_unsetup(void)
6191 kvm_x86_ops
->hardware_unsetup();
6194 void kvm_arch_check_processor_compat(void *rtn
)
6196 kvm_x86_ops
->check_processor_compatibility(rtn
);
6199 bool kvm_vcpu_compatible(struct kvm_vcpu
*vcpu
)
6201 return irqchip_in_kernel(vcpu
->kvm
) == (vcpu
->arch
.apic
!= NULL
);
6204 struct static_key kvm_no_apic_vcpu __read_mostly
;
6206 int kvm_arch_vcpu_init(struct kvm_vcpu
*vcpu
)
6212 BUG_ON(vcpu
->kvm
== NULL
);
6215 vcpu
->arch
.emulate_ctxt
.ops
= &emulate_ops
;
6216 if (!irqchip_in_kernel(kvm
) || kvm_vcpu_is_bsp(vcpu
))
6217 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
6219 vcpu
->arch
.mp_state
= KVM_MP_STATE_UNINITIALIZED
;
6221 page
= alloc_page(GFP_KERNEL
| __GFP_ZERO
);
6226 vcpu
->arch
.pio_data
= page_address(page
);
6228 kvm_set_tsc_khz(vcpu
, max_tsc_khz
);
6230 r
= kvm_mmu_create(vcpu
);
6232 goto fail_free_pio_data
;
6234 if (irqchip_in_kernel(kvm
)) {
6235 r
= kvm_create_lapic(vcpu
);
6237 goto fail_mmu_destroy
;
6239 static_key_slow_inc(&kvm_no_apic_vcpu
);
6241 vcpu
->arch
.mce_banks
= kzalloc(KVM_MAX_MCE_BANKS
* sizeof(u64
) * 4,
6243 if (!vcpu
->arch
.mce_banks
) {
6245 goto fail_free_lapic
;
6247 vcpu
->arch
.mcg_cap
= KVM_MAX_MCE_BANKS
;
6249 if (!zalloc_cpumask_var(&vcpu
->arch
.wbinvd_dirty_mask
, GFP_KERNEL
))
6250 goto fail_free_mce_banks
;
6252 kvm_async_pf_hash_reset(vcpu
);
6256 fail_free_mce_banks
:
6257 kfree(vcpu
->arch
.mce_banks
);
6259 kvm_free_lapic(vcpu
);
6261 kvm_mmu_destroy(vcpu
);
6263 free_page((unsigned long)vcpu
->arch
.pio_data
);
6268 void kvm_arch_vcpu_uninit(struct kvm_vcpu
*vcpu
)
6272 kvm_pmu_destroy(vcpu
);
6273 kfree(vcpu
->arch
.mce_banks
);
6274 kvm_free_lapic(vcpu
);
6275 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
6276 kvm_mmu_destroy(vcpu
);
6277 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
6278 free_page((unsigned long)vcpu
->arch
.pio_data
);
6279 if (!irqchip_in_kernel(vcpu
->kvm
))
6280 static_key_slow_dec(&kvm_no_apic_vcpu
);
6283 int kvm_arch_init_vm(struct kvm
*kvm
, unsigned long type
)
6288 INIT_LIST_HEAD(&kvm
->arch
.active_mmu_pages
);
6289 INIT_LIST_HEAD(&kvm
->arch
.assigned_dev_head
);
6291 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
6292 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID
, &kvm
->arch
.irq_sources_bitmap
);
6293 /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
6294 set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID
,
6295 &kvm
->arch
.irq_sources_bitmap
);
6297 raw_spin_lock_init(&kvm
->arch
.tsc_write_lock
);
6298 mutex_init(&kvm
->arch
.apic_map_lock
);
6303 static void kvm_unload_vcpu_mmu(struct kvm_vcpu
*vcpu
)
6306 r
= vcpu_load(vcpu
);
6308 kvm_mmu_unload(vcpu
);
6312 static void kvm_free_vcpus(struct kvm
*kvm
)
6315 struct kvm_vcpu
*vcpu
;
6318 * Unpin any mmu pages first.
6320 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
6321 kvm_clear_async_pf_completion_queue(vcpu
);
6322 kvm_unload_vcpu_mmu(vcpu
);
6324 kvm_for_each_vcpu(i
, vcpu
, kvm
)
6325 kvm_arch_vcpu_free(vcpu
);
6327 mutex_lock(&kvm
->lock
);
6328 for (i
= 0; i
< atomic_read(&kvm
->online_vcpus
); i
++)
6329 kvm
->vcpus
[i
] = NULL
;
6331 atomic_set(&kvm
->online_vcpus
, 0);
6332 mutex_unlock(&kvm
->lock
);
6335 void kvm_arch_sync_events(struct kvm
*kvm
)
6337 kvm_free_all_assigned_devices(kvm
);
6341 void kvm_arch_destroy_vm(struct kvm
*kvm
)
6343 kvm_iommu_unmap_guest(kvm
);
6344 kfree(kvm
->arch
.vpic
);
6345 kfree(kvm
->arch
.vioapic
);
6346 kvm_free_vcpus(kvm
);
6347 if (kvm
->arch
.apic_access_page
)
6348 put_page(kvm
->arch
.apic_access_page
);
6349 if (kvm
->arch
.ept_identity_pagetable
)
6350 put_page(kvm
->arch
.ept_identity_pagetable
);
6351 kfree(rcu_dereference_check(kvm
->arch
.apic_map
, 1));
6354 void kvm_arch_free_memslot(struct kvm_memory_slot
*free
,
6355 struct kvm_memory_slot
*dont
)
6359 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
6360 if (!dont
|| free
->arch
.rmap
[i
] != dont
->arch
.rmap
[i
]) {
6361 kvm_kvfree(free
->arch
.rmap
[i
]);
6362 free
->arch
.rmap
[i
] = NULL
;
6367 if (!dont
|| free
->arch
.lpage_info
[i
- 1] !=
6368 dont
->arch
.lpage_info
[i
- 1]) {
6369 kvm_kvfree(free
->arch
.lpage_info
[i
- 1]);
6370 free
->arch
.lpage_info
[i
- 1] = NULL
;
6375 int kvm_arch_create_memslot(struct kvm_memory_slot
*slot
, unsigned long npages
)
6379 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
6384 lpages
= gfn_to_index(slot
->base_gfn
+ npages
- 1,
6385 slot
->base_gfn
, level
) + 1;
6387 slot
->arch
.rmap
[i
] =
6388 kvm_kvzalloc(lpages
* sizeof(*slot
->arch
.rmap
[i
]));
6389 if (!slot
->arch
.rmap
[i
])
6394 slot
->arch
.lpage_info
[i
- 1] = kvm_kvzalloc(lpages
*
6395 sizeof(*slot
->arch
.lpage_info
[i
- 1]));
6396 if (!slot
->arch
.lpage_info
[i
- 1])
6399 if (slot
->base_gfn
& (KVM_PAGES_PER_HPAGE(level
) - 1))
6400 slot
->arch
.lpage_info
[i
- 1][0].write_count
= 1;
6401 if ((slot
->base_gfn
+ npages
) & (KVM_PAGES_PER_HPAGE(level
) - 1))
6402 slot
->arch
.lpage_info
[i
- 1][lpages
- 1].write_count
= 1;
6403 ugfn
= slot
->userspace_addr
>> PAGE_SHIFT
;
6405 * If the gfn and userspace address are not aligned wrt each
6406 * other, or if explicitly asked to, disable large page
6407 * support for this slot
6409 if ((slot
->base_gfn
^ ugfn
) & (KVM_PAGES_PER_HPAGE(level
) - 1) ||
6410 !kvm_largepages_enabled()) {
6413 for (j
= 0; j
< lpages
; ++j
)
6414 slot
->arch
.lpage_info
[i
- 1][j
].write_count
= 1;
6421 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
6422 kvm_kvfree(slot
->arch
.rmap
[i
]);
6423 slot
->arch
.rmap
[i
] = NULL
;
6427 kvm_kvfree(slot
->arch
.lpage_info
[i
- 1]);
6428 slot
->arch
.lpage_info
[i
- 1] = NULL
;
6433 int kvm_arch_prepare_memory_region(struct kvm
*kvm
,
6434 struct kvm_memory_slot
*memslot
,
6435 struct kvm_memory_slot old
,
6436 struct kvm_userspace_memory_region
*mem
,
6439 int npages
= memslot
->npages
;
6440 int map_flags
= MAP_PRIVATE
| MAP_ANONYMOUS
;
6442 /* Prevent internal slot pages from being moved by fork()/COW. */
6443 if (memslot
->id
>= KVM_MEMORY_SLOTS
)
6444 map_flags
= MAP_SHARED
| MAP_ANONYMOUS
;
6446 /*To keep backward compatibility with older userspace,
6447 *x86 needs to handle !user_alloc case.
6450 if (npages
&& !old
.npages
) {
6451 unsigned long userspace_addr
;
6453 userspace_addr
= vm_mmap(NULL
, 0,
6455 PROT_READ
| PROT_WRITE
,
6459 if (IS_ERR((void *)userspace_addr
))
6460 return PTR_ERR((void *)userspace_addr
);
6462 memslot
->userspace_addr
= userspace_addr
;
6470 void kvm_arch_commit_memory_region(struct kvm
*kvm
,
6471 struct kvm_userspace_memory_region
*mem
,
6472 struct kvm_memory_slot old
,
6476 int nr_mmu_pages
= 0, npages
= mem
->memory_size
>> PAGE_SHIFT
;
6478 if (!user_alloc
&& !old
.user_alloc
&& old
.npages
&& !npages
) {
6481 ret
= vm_munmap(old
.userspace_addr
,
6482 old
.npages
* PAGE_SIZE
);
6485 "kvm_vm_ioctl_set_memory_region: "
6486 "failed to munmap memory\n");
6489 if (!kvm
->arch
.n_requested_mmu_pages
)
6490 nr_mmu_pages
= kvm_mmu_calculate_mmu_pages(kvm
);
6492 spin_lock(&kvm
->mmu_lock
);
6494 kvm_mmu_change_mmu_pages(kvm
, nr_mmu_pages
);
6495 kvm_mmu_slot_remove_write_access(kvm
, mem
->slot
);
6496 spin_unlock(&kvm
->mmu_lock
);
6498 * If memory slot is created, or moved, we need to clear all
6501 if (npages
&& old
.base_gfn
!= mem
->guest_phys_addr
>> PAGE_SHIFT
) {
6502 kvm_mmu_zap_all(kvm
);
6503 kvm_reload_remote_mmus(kvm
);
6507 void kvm_arch_flush_shadow_all(struct kvm
*kvm
)
6509 kvm_mmu_zap_all(kvm
);
6510 kvm_reload_remote_mmus(kvm
);
6513 void kvm_arch_flush_shadow_memslot(struct kvm
*kvm
,
6514 struct kvm_memory_slot
*slot
)
6516 kvm_arch_flush_shadow_all(kvm
);
6519 int kvm_arch_vcpu_runnable(struct kvm_vcpu
*vcpu
)
6521 return (vcpu
->arch
.mp_state
== KVM_MP_STATE_RUNNABLE
&&
6522 !vcpu
->arch
.apf
.halted
)
6523 || !list_empty_careful(&vcpu
->async_pf
.done
)
6524 || vcpu
->arch
.mp_state
== KVM_MP_STATE_SIPI_RECEIVED
6525 || atomic_read(&vcpu
->arch
.nmi_queued
) ||
6526 (kvm_arch_interrupt_allowed(vcpu
) &&
6527 kvm_cpu_has_interrupt(vcpu
));
6530 int kvm_arch_vcpu_should_kick(struct kvm_vcpu
*vcpu
)
6532 return kvm_vcpu_exiting_guest_mode(vcpu
) == IN_GUEST_MODE
;
6535 int kvm_arch_interrupt_allowed(struct kvm_vcpu
*vcpu
)
6537 return kvm_x86_ops
->interrupt_allowed(vcpu
);
6540 bool kvm_is_linear_rip(struct kvm_vcpu
*vcpu
, unsigned long linear_rip
)
6542 unsigned long current_rip
= kvm_rip_read(vcpu
) +
6543 get_segment_base(vcpu
, VCPU_SREG_CS
);
6545 return current_rip
== linear_rip
;
6547 EXPORT_SYMBOL_GPL(kvm_is_linear_rip
);
6549 unsigned long kvm_get_rflags(struct kvm_vcpu
*vcpu
)
6551 unsigned long rflags
;
6553 rflags
= kvm_x86_ops
->get_rflags(vcpu
);
6554 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
6555 rflags
&= ~X86_EFLAGS_TF
;
6558 EXPORT_SYMBOL_GPL(kvm_get_rflags
);
6560 void kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
6562 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
&&
6563 kvm_is_linear_rip(vcpu
, vcpu
->arch
.singlestep_rip
))
6564 rflags
|= X86_EFLAGS_TF
;
6565 kvm_x86_ops
->set_rflags(vcpu
, rflags
);
6566 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6568 EXPORT_SYMBOL_GPL(kvm_set_rflags
);
6570 void kvm_arch_async_page_ready(struct kvm_vcpu
*vcpu
, struct kvm_async_pf
*work
)
6574 if ((vcpu
->arch
.mmu
.direct_map
!= work
->arch
.direct_map
) ||
6575 is_error_page(work
->page
))
6578 r
= kvm_mmu_reload(vcpu
);
6582 if (!vcpu
->arch
.mmu
.direct_map
&&
6583 work
->arch
.cr3
!= vcpu
->arch
.mmu
.get_cr3(vcpu
))
6586 vcpu
->arch
.mmu
.page_fault(vcpu
, work
->gva
, 0, true);
6589 static inline u32
kvm_async_pf_hash_fn(gfn_t gfn
)
6591 return hash_32(gfn
& 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU
));
6594 static inline u32
kvm_async_pf_next_probe(u32 key
)
6596 return (key
+ 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU
) - 1);
6599 static void kvm_add_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
6601 u32 key
= kvm_async_pf_hash_fn(gfn
);
6603 while (vcpu
->arch
.apf
.gfns
[key
] != ~0)
6604 key
= kvm_async_pf_next_probe(key
);
6606 vcpu
->arch
.apf
.gfns
[key
] = gfn
;
6609 static u32
kvm_async_pf_gfn_slot(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
6612 u32 key
= kvm_async_pf_hash_fn(gfn
);
6614 for (i
= 0; i
< roundup_pow_of_two(ASYNC_PF_PER_VCPU
) &&
6615 (vcpu
->arch
.apf
.gfns
[key
] != gfn
&&
6616 vcpu
->arch
.apf
.gfns
[key
] != ~0); i
++)
6617 key
= kvm_async_pf_next_probe(key
);
6622 bool kvm_find_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
6624 return vcpu
->arch
.apf
.gfns
[kvm_async_pf_gfn_slot(vcpu
, gfn
)] == gfn
;
6627 static void kvm_del_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
6631 i
= j
= kvm_async_pf_gfn_slot(vcpu
, gfn
);
6633 vcpu
->arch
.apf
.gfns
[i
] = ~0;
6635 j
= kvm_async_pf_next_probe(j
);
6636 if (vcpu
->arch
.apf
.gfns
[j
] == ~0)
6638 k
= kvm_async_pf_hash_fn(vcpu
->arch
.apf
.gfns
[j
]);
6640 * k lies cyclically in ]i,j]
6642 * |....j i.k.| or |.k..j i...|
6644 } while ((i
<= j
) ? (i
< k
&& k
<= j
) : (i
< k
|| k
<= j
));
6645 vcpu
->arch
.apf
.gfns
[i
] = vcpu
->arch
.apf
.gfns
[j
];
6650 static int apf_put_user(struct kvm_vcpu
*vcpu
, u32 val
)
6653 return kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, &val
,
6657 void kvm_arch_async_page_not_present(struct kvm_vcpu
*vcpu
,
6658 struct kvm_async_pf
*work
)
6660 struct x86_exception fault
;
6662 trace_kvm_async_pf_not_present(work
->arch
.token
, work
->gva
);
6663 kvm_add_async_pf_gfn(vcpu
, work
->arch
.gfn
);
6665 if (!(vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
) ||
6666 (vcpu
->arch
.apf
.send_user_only
&&
6667 kvm_x86_ops
->get_cpl(vcpu
) == 0))
6668 kvm_make_request(KVM_REQ_APF_HALT
, vcpu
);
6669 else if (!apf_put_user(vcpu
, KVM_PV_REASON_PAGE_NOT_PRESENT
)) {
6670 fault
.vector
= PF_VECTOR
;
6671 fault
.error_code_valid
= true;
6672 fault
.error_code
= 0;
6673 fault
.nested_page_fault
= false;
6674 fault
.address
= work
->arch
.token
;
6675 kvm_inject_page_fault(vcpu
, &fault
);
6679 void kvm_arch_async_page_present(struct kvm_vcpu
*vcpu
,
6680 struct kvm_async_pf
*work
)
6682 struct x86_exception fault
;
6684 trace_kvm_async_pf_ready(work
->arch
.token
, work
->gva
);
6685 if (is_error_page(work
->page
))
6686 work
->arch
.token
= ~0; /* broadcast wakeup */
6688 kvm_del_async_pf_gfn(vcpu
, work
->arch
.gfn
);
6690 if ((vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
) &&
6691 !apf_put_user(vcpu
, KVM_PV_REASON_PAGE_READY
)) {
6692 fault
.vector
= PF_VECTOR
;
6693 fault
.error_code_valid
= true;
6694 fault
.error_code
= 0;
6695 fault
.nested_page_fault
= false;
6696 fault
.address
= work
->arch
.token
;
6697 kvm_inject_page_fault(vcpu
, &fault
);
6699 vcpu
->arch
.apf
.halted
= false;
6700 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
6703 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu
*vcpu
)
6705 if (!(vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
))
6708 return !kvm_event_needs_reinjection(vcpu
) &&
6709 kvm_x86_ops
->interrupt_allowed(vcpu
);
6712 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit
);
6713 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq
);
6714 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault
);
6715 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr
);
6716 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr
);
6717 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun
);
6718 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit
);
6719 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject
);
6720 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit
);
6721 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga
);
6722 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit
);
6723 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts
);