2 * Kernel-based Virtual Machine driver for Linux
4 * derived from drivers/kvm/kvm_main.c
6 * Copyright (C) 2006 Qumranet, Inc.
7 * Copyright (C) 2008 Qumranet, Inc.
8 * Copyright IBM Corporation, 2008
9 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
12 * Avi Kivity <avi@qumranet.com>
13 * Yaniv Kamay <yaniv@qumranet.com>
14 * Amit Shah <amit.shah@qumranet.com>
15 * Ben-Ami Yassour <benami@il.ibm.com>
17 * This work is licensed under the terms of the GNU GPL, version 2. See
18 * the COPYING file in the top-level directory.
22 #include <linux/kvm_host.h>
27 #include "kvm_cache_regs.h"
30 #include "assigned-dev.h"
34 #include <linux/clocksource.h>
35 #include <linux/interrupt.h>
36 #include <linux/kvm.h>
38 #include <linux/vmalloc.h>
39 #include <linux/module.h>
40 #include <linux/mman.h>
41 #include <linux/highmem.h>
42 #include <linux/iommu.h>
43 #include <linux/intel-iommu.h>
44 #include <linux/cpufreq.h>
45 #include <linux/user-return-notifier.h>
46 #include <linux/srcu.h>
47 #include <linux/slab.h>
48 #include <linux/perf_event.h>
49 #include <linux/uaccess.h>
50 #include <linux/hash.h>
51 #include <linux/pci.h>
52 #include <linux/timekeeper_internal.h>
53 #include <linux/pvclock_gtod.h>
54 #include <linux/kvm_irqfd.h>
55 #include <linux/irqbypass.h>
56 #include <trace/events/kvm.h>
58 #define CREATE_TRACE_POINTS
61 #include <asm/debugreg.h>
65 #include <linux/kernel_stat.h>
66 #include <asm/fpu/internal.h> /* Ugh! */
67 #include <asm/pvclock.h>
68 #include <asm/div64.h>
69 #include <asm/irq_remapping.h>
71 #define MAX_IO_MSRS 256
72 #define KVM_MAX_MCE_BANKS 32
73 #define KVM_MCE_CAP_SUPPORTED (MCG_CTL_P | MCG_SER_P)
75 #define emul_to_vcpu(ctxt) \
76 container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
79 * - enable syscall per default because its emulated by KVM
80 * - enable LME and LMA per default on 64 bit KVM
84 u64 __read_mostly efer_reserved_bits
= ~((u64
)(EFER_SCE
| EFER_LME
| EFER_LMA
));
86 static u64 __read_mostly efer_reserved_bits
= ~((u64
)EFER_SCE
);
89 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
90 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
92 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
);
93 static void process_nmi(struct kvm_vcpu
*vcpu
);
94 static void __kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
);
96 struct kvm_x86_ops
*kvm_x86_ops __read_mostly
;
97 EXPORT_SYMBOL_GPL(kvm_x86_ops
);
99 static bool __read_mostly ignore_msrs
= 0;
100 module_param(ignore_msrs
, bool, S_IRUGO
| S_IWUSR
);
102 unsigned int min_timer_period_us
= 500;
103 module_param(min_timer_period_us
, uint
, S_IRUGO
| S_IWUSR
);
105 static bool __read_mostly kvmclock_periodic_sync
= true;
106 module_param(kvmclock_periodic_sync
, bool, S_IRUGO
);
108 bool __read_mostly kvm_has_tsc_control
;
109 EXPORT_SYMBOL_GPL(kvm_has_tsc_control
);
110 u32 __read_mostly kvm_max_guest_tsc_khz
;
111 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz
);
112 u8 __read_mostly kvm_tsc_scaling_ratio_frac_bits
;
113 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits
);
114 u64 __read_mostly kvm_max_tsc_scaling_ratio
;
115 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio
);
116 static u64 __read_mostly kvm_default_tsc_scaling_ratio
;
118 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
119 static u32 __read_mostly tsc_tolerance_ppm
= 250;
120 module_param(tsc_tolerance_ppm
, uint
, S_IRUGO
| S_IWUSR
);
122 /* lapic timer advance (tscdeadline mode only) in nanoseconds */
123 unsigned int __read_mostly lapic_timer_advance_ns
= 0;
124 module_param(lapic_timer_advance_ns
, uint
, S_IRUGO
| S_IWUSR
);
126 static bool __read_mostly backwards_tsc_observed
= false;
128 #define KVM_NR_SHARED_MSRS 16
130 struct kvm_shared_msrs_global
{
132 u32 msrs
[KVM_NR_SHARED_MSRS
];
135 struct kvm_shared_msrs
{
136 struct user_return_notifier urn
;
138 struct kvm_shared_msr_values
{
141 } values
[KVM_NR_SHARED_MSRS
];
144 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global
;
145 static struct kvm_shared_msrs __percpu
*shared_msrs
;
147 struct kvm_stats_debugfs_item debugfs_entries
[] = {
148 { "pf_fixed", VCPU_STAT(pf_fixed
) },
149 { "pf_guest", VCPU_STAT(pf_guest
) },
150 { "tlb_flush", VCPU_STAT(tlb_flush
) },
151 { "invlpg", VCPU_STAT(invlpg
) },
152 { "exits", VCPU_STAT(exits
) },
153 { "io_exits", VCPU_STAT(io_exits
) },
154 { "mmio_exits", VCPU_STAT(mmio_exits
) },
155 { "signal_exits", VCPU_STAT(signal_exits
) },
156 { "irq_window", VCPU_STAT(irq_window_exits
) },
157 { "nmi_window", VCPU_STAT(nmi_window_exits
) },
158 { "halt_exits", VCPU_STAT(halt_exits
) },
159 { "halt_successful_poll", VCPU_STAT(halt_successful_poll
) },
160 { "halt_attempted_poll", VCPU_STAT(halt_attempted_poll
) },
161 { "halt_wakeup", VCPU_STAT(halt_wakeup
) },
162 { "hypercalls", VCPU_STAT(hypercalls
) },
163 { "request_irq", VCPU_STAT(request_irq_exits
) },
164 { "irq_exits", VCPU_STAT(irq_exits
) },
165 { "host_state_reload", VCPU_STAT(host_state_reload
) },
166 { "efer_reload", VCPU_STAT(efer_reload
) },
167 { "fpu_reload", VCPU_STAT(fpu_reload
) },
168 { "insn_emulation", VCPU_STAT(insn_emulation
) },
169 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail
) },
170 { "irq_injections", VCPU_STAT(irq_injections
) },
171 { "nmi_injections", VCPU_STAT(nmi_injections
) },
172 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped
) },
173 { "mmu_pte_write", VM_STAT(mmu_pte_write
) },
174 { "mmu_pte_updated", VM_STAT(mmu_pte_updated
) },
175 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped
) },
176 { "mmu_flooded", VM_STAT(mmu_flooded
) },
177 { "mmu_recycled", VM_STAT(mmu_recycled
) },
178 { "mmu_cache_miss", VM_STAT(mmu_cache_miss
) },
179 { "mmu_unsync", VM_STAT(mmu_unsync
) },
180 { "remote_tlb_flush", VM_STAT(remote_tlb_flush
) },
181 { "largepages", VM_STAT(lpages
) },
185 u64 __read_mostly host_xcr0
;
187 static int emulator_fix_hypercall(struct x86_emulate_ctxt
*ctxt
);
189 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu
*vcpu
)
192 for (i
= 0; i
< roundup_pow_of_two(ASYNC_PF_PER_VCPU
); i
++)
193 vcpu
->arch
.apf
.gfns
[i
] = ~0;
196 static void kvm_on_user_return(struct user_return_notifier
*urn
)
199 struct kvm_shared_msrs
*locals
200 = container_of(urn
, struct kvm_shared_msrs
, urn
);
201 struct kvm_shared_msr_values
*values
;
203 for (slot
= 0; slot
< shared_msrs_global
.nr
; ++slot
) {
204 values
= &locals
->values
[slot
];
205 if (values
->host
!= values
->curr
) {
206 wrmsrl(shared_msrs_global
.msrs
[slot
], values
->host
);
207 values
->curr
= values
->host
;
210 locals
->registered
= false;
211 user_return_notifier_unregister(urn
);
214 static void shared_msr_update(unsigned slot
, u32 msr
)
217 unsigned int cpu
= smp_processor_id();
218 struct kvm_shared_msrs
*smsr
= per_cpu_ptr(shared_msrs
, cpu
);
220 /* only read, and nobody should modify it at this time,
221 * so don't need lock */
222 if (slot
>= shared_msrs_global
.nr
) {
223 printk(KERN_ERR
"kvm: invalid MSR slot!");
226 rdmsrl_safe(msr
, &value
);
227 smsr
->values
[slot
].host
= value
;
228 smsr
->values
[slot
].curr
= value
;
231 void kvm_define_shared_msr(unsigned slot
, u32 msr
)
233 BUG_ON(slot
>= KVM_NR_SHARED_MSRS
);
234 shared_msrs_global
.msrs
[slot
] = msr
;
235 if (slot
>= shared_msrs_global
.nr
)
236 shared_msrs_global
.nr
= slot
+ 1;
238 EXPORT_SYMBOL_GPL(kvm_define_shared_msr
);
240 static void kvm_shared_msr_cpu_online(void)
244 for (i
= 0; i
< shared_msrs_global
.nr
; ++i
)
245 shared_msr_update(i
, shared_msrs_global
.msrs
[i
]);
248 int kvm_set_shared_msr(unsigned slot
, u64 value
, u64 mask
)
250 unsigned int cpu
= smp_processor_id();
251 struct kvm_shared_msrs
*smsr
= per_cpu_ptr(shared_msrs
, cpu
);
254 if (((value
^ smsr
->values
[slot
].curr
) & mask
) == 0)
256 smsr
->values
[slot
].curr
= value
;
257 err
= wrmsrl_safe(shared_msrs_global
.msrs
[slot
], value
);
261 if (!smsr
->registered
) {
262 smsr
->urn
.on_user_return
= kvm_on_user_return
;
263 user_return_notifier_register(&smsr
->urn
);
264 smsr
->registered
= true;
268 EXPORT_SYMBOL_GPL(kvm_set_shared_msr
);
270 static void drop_user_return_notifiers(void)
272 unsigned int cpu
= smp_processor_id();
273 struct kvm_shared_msrs
*smsr
= per_cpu_ptr(shared_msrs
, cpu
);
275 if (smsr
->registered
)
276 kvm_on_user_return(&smsr
->urn
);
279 u64
kvm_get_apic_base(struct kvm_vcpu
*vcpu
)
281 return vcpu
->arch
.apic_base
;
283 EXPORT_SYMBOL_GPL(kvm_get_apic_base
);
285 int kvm_set_apic_base(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
287 u64 old_state
= vcpu
->arch
.apic_base
&
288 (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
);
289 u64 new_state
= msr_info
->data
&
290 (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
);
291 u64 reserved_bits
= ((~0ULL) << cpuid_maxphyaddr(vcpu
)) |
292 0x2ff | (guest_cpuid_has_x2apic(vcpu
) ? 0 : X2APIC_ENABLE
);
294 if (!msr_info
->host_initiated
&&
295 ((msr_info
->data
& reserved_bits
) != 0 ||
296 new_state
== X2APIC_ENABLE
||
297 (new_state
== MSR_IA32_APICBASE_ENABLE
&&
298 old_state
== (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
)) ||
299 (new_state
== (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
) &&
303 kvm_lapic_set_base(vcpu
, msr_info
->data
);
306 EXPORT_SYMBOL_GPL(kvm_set_apic_base
);
308 asmlinkage __visible
void kvm_spurious_fault(void)
310 /* Fault while not rebooting. We want the trace. */
313 EXPORT_SYMBOL_GPL(kvm_spurious_fault
);
315 #define EXCPT_BENIGN 0
316 #define EXCPT_CONTRIBUTORY 1
319 static int exception_class(int vector
)
329 return EXCPT_CONTRIBUTORY
;
336 #define EXCPT_FAULT 0
338 #define EXCPT_ABORT 2
339 #define EXCPT_INTERRUPT 3
341 static int exception_type(int vector
)
345 if (WARN_ON(vector
> 31 || vector
== NMI_VECTOR
))
346 return EXCPT_INTERRUPT
;
350 /* #DB is trap, as instruction watchpoints are handled elsewhere */
351 if (mask
& ((1 << DB_VECTOR
) | (1 << BP_VECTOR
) | (1 << OF_VECTOR
)))
354 if (mask
& ((1 << DF_VECTOR
) | (1 << MC_VECTOR
)))
357 /* Reserved exceptions will result in fault */
361 static void kvm_multiple_exception(struct kvm_vcpu
*vcpu
,
362 unsigned nr
, bool has_error
, u32 error_code
,
368 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
370 if (!vcpu
->arch
.exception
.pending
) {
372 if (has_error
&& !is_protmode(vcpu
))
374 vcpu
->arch
.exception
.pending
= true;
375 vcpu
->arch
.exception
.has_error_code
= has_error
;
376 vcpu
->arch
.exception
.nr
= nr
;
377 vcpu
->arch
.exception
.error_code
= error_code
;
378 vcpu
->arch
.exception
.reinject
= reinject
;
382 /* to check exception */
383 prev_nr
= vcpu
->arch
.exception
.nr
;
384 if (prev_nr
== DF_VECTOR
) {
385 /* triple fault -> shutdown */
386 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
389 class1
= exception_class(prev_nr
);
390 class2
= exception_class(nr
);
391 if ((class1
== EXCPT_CONTRIBUTORY
&& class2
== EXCPT_CONTRIBUTORY
)
392 || (class1
== EXCPT_PF
&& class2
!= EXCPT_BENIGN
)) {
393 /* generate double fault per SDM Table 5-5 */
394 vcpu
->arch
.exception
.pending
= true;
395 vcpu
->arch
.exception
.has_error_code
= true;
396 vcpu
->arch
.exception
.nr
= DF_VECTOR
;
397 vcpu
->arch
.exception
.error_code
= 0;
399 /* replace previous exception with a new one in a hope
400 that instruction re-execution will regenerate lost
405 void kvm_queue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
407 kvm_multiple_exception(vcpu
, nr
, false, 0, false);
409 EXPORT_SYMBOL_GPL(kvm_queue_exception
);
411 void kvm_requeue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
413 kvm_multiple_exception(vcpu
, nr
, false, 0, true);
415 EXPORT_SYMBOL_GPL(kvm_requeue_exception
);
417 void kvm_complete_insn_gp(struct kvm_vcpu
*vcpu
, int err
)
420 kvm_inject_gp(vcpu
, 0);
422 kvm_x86_ops
->skip_emulated_instruction(vcpu
);
424 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp
);
426 void kvm_inject_page_fault(struct kvm_vcpu
*vcpu
, struct x86_exception
*fault
)
428 ++vcpu
->stat
.pf_guest
;
429 vcpu
->arch
.cr2
= fault
->address
;
430 kvm_queue_exception_e(vcpu
, PF_VECTOR
, fault
->error_code
);
432 EXPORT_SYMBOL_GPL(kvm_inject_page_fault
);
434 static bool kvm_propagate_fault(struct kvm_vcpu
*vcpu
, struct x86_exception
*fault
)
436 if (mmu_is_nested(vcpu
) && !fault
->nested_page_fault
)
437 vcpu
->arch
.nested_mmu
.inject_page_fault(vcpu
, fault
);
439 vcpu
->arch
.mmu
.inject_page_fault(vcpu
, fault
);
441 return fault
->nested_page_fault
;
444 void kvm_inject_nmi(struct kvm_vcpu
*vcpu
)
446 atomic_inc(&vcpu
->arch
.nmi_queued
);
447 kvm_make_request(KVM_REQ_NMI
, vcpu
);
449 EXPORT_SYMBOL_GPL(kvm_inject_nmi
);
451 void kvm_queue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
453 kvm_multiple_exception(vcpu
, nr
, true, error_code
, false);
455 EXPORT_SYMBOL_GPL(kvm_queue_exception_e
);
457 void kvm_requeue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
459 kvm_multiple_exception(vcpu
, nr
, true, error_code
, true);
461 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e
);
464 * Checks if cpl <= required_cpl; if true, return true. Otherwise queue
465 * a #GP and return false.
467 bool kvm_require_cpl(struct kvm_vcpu
*vcpu
, int required_cpl
)
469 if (kvm_x86_ops
->get_cpl(vcpu
) <= required_cpl
)
471 kvm_queue_exception_e(vcpu
, GP_VECTOR
, 0);
474 EXPORT_SYMBOL_GPL(kvm_require_cpl
);
476 bool kvm_require_dr(struct kvm_vcpu
*vcpu
, int dr
)
478 if ((dr
!= 4 && dr
!= 5) || !kvm_read_cr4_bits(vcpu
, X86_CR4_DE
))
481 kvm_queue_exception(vcpu
, UD_VECTOR
);
484 EXPORT_SYMBOL_GPL(kvm_require_dr
);
487 * This function will be used to read from the physical memory of the currently
488 * running guest. The difference to kvm_vcpu_read_guest_page is that this function
489 * can read from guest physical or from the guest's guest physical memory.
491 int kvm_read_guest_page_mmu(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
,
492 gfn_t ngfn
, void *data
, int offset
, int len
,
495 struct x86_exception exception
;
499 ngpa
= gfn_to_gpa(ngfn
);
500 real_gfn
= mmu
->translate_gpa(vcpu
, ngpa
, access
, &exception
);
501 if (real_gfn
== UNMAPPED_GVA
)
504 real_gfn
= gpa_to_gfn(real_gfn
);
506 return kvm_vcpu_read_guest_page(vcpu
, real_gfn
, data
, offset
, len
);
508 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu
);
510 static int kvm_read_nested_guest_page(struct kvm_vcpu
*vcpu
, gfn_t gfn
,
511 void *data
, int offset
, int len
, u32 access
)
513 return kvm_read_guest_page_mmu(vcpu
, vcpu
->arch
.walk_mmu
, gfn
,
514 data
, offset
, len
, access
);
518 * Load the pae pdptrs. Return true is they are all valid.
520 int load_pdptrs(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
, unsigned long cr3
)
522 gfn_t pdpt_gfn
= cr3
>> PAGE_SHIFT
;
523 unsigned offset
= ((cr3
& (PAGE_SIZE
-1)) >> 5) << 2;
526 u64 pdpte
[ARRAY_SIZE(mmu
->pdptrs
)];
528 ret
= kvm_read_guest_page_mmu(vcpu
, mmu
, pdpt_gfn
, pdpte
,
529 offset
* sizeof(u64
), sizeof(pdpte
),
530 PFERR_USER_MASK
|PFERR_WRITE_MASK
);
535 for (i
= 0; i
< ARRAY_SIZE(pdpte
); ++i
) {
536 if (is_present_gpte(pdpte
[i
]) &&
538 vcpu
->arch
.mmu
.guest_rsvd_check
.rsvd_bits_mask
[0][2])) {
545 memcpy(mmu
->pdptrs
, pdpte
, sizeof(mmu
->pdptrs
));
546 __set_bit(VCPU_EXREG_PDPTR
,
547 (unsigned long *)&vcpu
->arch
.regs_avail
);
548 __set_bit(VCPU_EXREG_PDPTR
,
549 (unsigned long *)&vcpu
->arch
.regs_dirty
);
554 EXPORT_SYMBOL_GPL(load_pdptrs
);
556 static bool pdptrs_changed(struct kvm_vcpu
*vcpu
)
558 u64 pdpte
[ARRAY_SIZE(vcpu
->arch
.walk_mmu
->pdptrs
)];
564 if (is_long_mode(vcpu
) || !is_pae(vcpu
))
567 if (!test_bit(VCPU_EXREG_PDPTR
,
568 (unsigned long *)&vcpu
->arch
.regs_avail
))
571 gfn
= (kvm_read_cr3(vcpu
) & ~31u) >> PAGE_SHIFT
;
572 offset
= (kvm_read_cr3(vcpu
) & ~31u) & (PAGE_SIZE
- 1);
573 r
= kvm_read_nested_guest_page(vcpu
, gfn
, pdpte
, offset
, sizeof(pdpte
),
574 PFERR_USER_MASK
| PFERR_WRITE_MASK
);
577 changed
= memcmp(pdpte
, vcpu
->arch
.walk_mmu
->pdptrs
, sizeof(pdpte
)) != 0;
583 int kvm_set_cr0(struct kvm_vcpu
*vcpu
, unsigned long cr0
)
585 unsigned long old_cr0
= kvm_read_cr0(vcpu
);
586 unsigned long update_bits
= X86_CR0_PG
| X86_CR0_WP
;
591 if (cr0
& 0xffffffff00000000UL
)
595 cr0
&= ~CR0_RESERVED_BITS
;
597 if ((cr0
& X86_CR0_NW
) && !(cr0
& X86_CR0_CD
))
600 if ((cr0
& X86_CR0_PG
) && !(cr0
& X86_CR0_PE
))
603 if (!is_paging(vcpu
) && (cr0
& X86_CR0_PG
)) {
605 if ((vcpu
->arch
.efer
& EFER_LME
)) {
610 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
615 if (is_pae(vcpu
) && !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
,
620 if (!(cr0
& X86_CR0_PG
) && kvm_read_cr4_bits(vcpu
, X86_CR4_PCIDE
))
623 kvm_x86_ops
->set_cr0(vcpu
, cr0
);
625 if ((cr0
^ old_cr0
) & X86_CR0_PG
) {
626 kvm_clear_async_pf_completion_queue(vcpu
);
627 kvm_async_pf_hash_reset(vcpu
);
630 if ((cr0
^ old_cr0
) & update_bits
)
631 kvm_mmu_reset_context(vcpu
);
633 if (((cr0
^ old_cr0
) & X86_CR0_CD
) &&
634 kvm_arch_has_noncoherent_dma(vcpu
->kvm
) &&
635 !kvm_check_has_quirk(vcpu
->kvm
, KVM_X86_QUIRK_CD_NW_CLEARED
))
636 kvm_zap_gfn_range(vcpu
->kvm
, 0, ~0ULL);
640 EXPORT_SYMBOL_GPL(kvm_set_cr0
);
642 void kvm_lmsw(struct kvm_vcpu
*vcpu
, unsigned long msw
)
644 (void)kvm_set_cr0(vcpu
, kvm_read_cr0_bits(vcpu
, ~0x0eul
) | (msw
& 0x0f));
646 EXPORT_SYMBOL_GPL(kvm_lmsw
);
648 static void kvm_load_guest_xcr0(struct kvm_vcpu
*vcpu
)
650 if (kvm_read_cr4_bits(vcpu
, X86_CR4_OSXSAVE
) &&
651 !vcpu
->guest_xcr0_loaded
) {
652 /* kvm_set_xcr() also depends on this */
653 xsetbv(XCR_XFEATURE_ENABLED_MASK
, vcpu
->arch
.xcr0
);
654 vcpu
->guest_xcr0_loaded
= 1;
658 static void kvm_put_guest_xcr0(struct kvm_vcpu
*vcpu
)
660 if (vcpu
->guest_xcr0_loaded
) {
661 if (vcpu
->arch
.xcr0
!= host_xcr0
)
662 xsetbv(XCR_XFEATURE_ENABLED_MASK
, host_xcr0
);
663 vcpu
->guest_xcr0_loaded
= 0;
667 static int __kvm_set_xcr(struct kvm_vcpu
*vcpu
, u32 index
, u64 xcr
)
670 u64 old_xcr0
= vcpu
->arch
.xcr0
;
673 /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now */
674 if (index
!= XCR_XFEATURE_ENABLED_MASK
)
676 if (!(xcr0
& XSTATE_FP
))
678 if ((xcr0
& XSTATE_YMM
) && !(xcr0
& XSTATE_SSE
))
682 * Do not allow the guest to set bits that we do not support
683 * saving. However, xcr0 bit 0 is always set, even if the
684 * emulated CPU does not support XSAVE (see fx_init).
686 valid_bits
= vcpu
->arch
.guest_supported_xcr0
| XSTATE_FP
;
687 if (xcr0
& ~valid_bits
)
690 if ((!(xcr0
& XSTATE_BNDREGS
)) != (!(xcr0
& XSTATE_BNDCSR
)))
693 if (xcr0
& XSTATE_AVX512
) {
694 if (!(xcr0
& XSTATE_YMM
))
696 if ((xcr0
& XSTATE_AVX512
) != XSTATE_AVX512
)
699 kvm_put_guest_xcr0(vcpu
);
700 vcpu
->arch
.xcr0
= xcr0
;
702 if ((xcr0
^ old_xcr0
) & XSTATE_EXTEND_MASK
)
703 kvm_update_cpuid(vcpu
);
707 int kvm_set_xcr(struct kvm_vcpu
*vcpu
, u32 index
, u64 xcr
)
709 if (kvm_x86_ops
->get_cpl(vcpu
) != 0 ||
710 __kvm_set_xcr(vcpu
, index
, xcr
)) {
711 kvm_inject_gp(vcpu
, 0);
716 EXPORT_SYMBOL_GPL(kvm_set_xcr
);
718 int kvm_set_cr4(struct kvm_vcpu
*vcpu
, unsigned long cr4
)
720 unsigned long old_cr4
= kvm_read_cr4(vcpu
);
721 unsigned long pdptr_bits
= X86_CR4_PGE
| X86_CR4_PSE
| X86_CR4_PAE
|
722 X86_CR4_SMEP
| X86_CR4_SMAP
;
724 if (cr4
& CR4_RESERVED_BITS
)
727 if (!guest_cpuid_has_xsave(vcpu
) && (cr4
& X86_CR4_OSXSAVE
))
730 if (!guest_cpuid_has_smep(vcpu
) && (cr4
& X86_CR4_SMEP
))
733 if (!guest_cpuid_has_smap(vcpu
) && (cr4
& X86_CR4_SMAP
))
736 if (!guest_cpuid_has_fsgsbase(vcpu
) && (cr4
& X86_CR4_FSGSBASE
))
739 if (is_long_mode(vcpu
)) {
740 if (!(cr4
& X86_CR4_PAE
))
742 } else if (is_paging(vcpu
) && (cr4
& X86_CR4_PAE
)
743 && ((cr4
^ old_cr4
) & pdptr_bits
)
744 && !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
,
748 if ((cr4
& X86_CR4_PCIDE
) && !(old_cr4
& X86_CR4_PCIDE
)) {
749 if (!guest_cpuid_has_pcid(vcpu
))
752 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
753 if ((kvm_read_cr3(vcpu
) & X86_CR3_PCID_MASK
) || !is_long_mode(vcpu
))
757 if (kvm_x86_ops
->set_cr4(vcpu
, cr4
))
760 if (((cr4
^ old_cr4
) & pdptr_bits
) ||
761 (!(cr4
& X86_CR4_PCIDE
) && (old_cr4
& X86_CR4_PCIDE
)))
762 kvm_mmu_reset_context(vcpu
);
764 if ((cr4
^ old_cr4
) & X86_CR4_OSXSAVE
)
765 kvm_update_cpuid(vcpu
);
769 EXPORT_SYMBOL_GPL(kvm_set_cr4
);
771 int kvm_set_cr3(struct kvm_vcpu
*vcpu
, unsigned long cr3
)
774 cr3
&= ~CR3_PCID_INVD
;
777 if (cr3
== kvm_read_cr3(vcpu
) && !pdptrs_changed(vcpu
)) {
778 kvm_mmu_sync_roots(vcpu
);
779 kvm_make_request(KVM_REQ_TLB_FLUSH
, vcpu
);
783 if (is_long_mode(vcpu
)) {
784 if (cr3
& CR3_L_MODE_RESERVED_BITS
)
786 } else if (is_pae(vcpu
) && is_paging(vcpu
) &&
787 !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, cr3
))
790 vcpu
->arch
.cr3
= cr3
;
791 __set_bit(VCPU_EXREG_CR3
, (ulong
*)&vcpu
->arch
.regs_avail
);
792 kvm_mmu_new_cr3(vcpu
);
795 EXPORT_SYMBOL_GPL(kvm_set_cr3
);
797 int kvm_set_cr8(struct kvm_vcpu
*vcpu
, unsigned long cr8
)
799 if (cr8
& CR8_RESERVED_BITS
)
801 if (lapic_in_kernel(vcpu
))
802 kvm_lapic_set_tpr(vcpu
, cr8
);
804 vcpu
->arch
.cr8
= cr8
;
807 EXPORT_SYMBOL_GPL(kvm_set_cr8
);
809 unsigned long kvm_get_cr8(struct kvm_vcpu
*vcpu
)
811 if (lapic_in_kernel(vcpu
))
812 return kvm_lapic_get_cr8(vcpu
);
814 return vcpu
->arch
.cr8
;
816 EXPORT_SYMBOL_GPL(kvm_get_cr8
);
818 static void kvm_update_dr0123(struct kvm_vcpu
*vcpu
)
822 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)) {
823 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
824 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
825 vcpu
->arch
.switch_db_regs
|= KVM_DEBUGREG_RELOAD
;
829 static void kvm_update_dr6(struct kvm_vcpu
*vcpu
)
831 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
))
832 kvm_x86_ops
->set_dr6(vcpu
, vcpu
->arch
.dr6
);
835 static void kvm_update_dr7(struct kvm_vcpu
*vcpu
)
839 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)
840 dr7
= vcpu
->arch
.guest_debug_dr7
;
842 dr7
= vcpu
->arch
.dr7
;
843 kvm_x86_ops
->set_dr7(vcpu
, dr7
);
844 vcpu
->arch
.switch_db_regs
&= ~KVM_DEBUGREG_BP_ENABLED
;
845 if (dr7
& DR7_BP_EN_MASK
)
846 vcpu
->arch
.switch_db_regs
|= KVM_DEBUGREG_BP_ENABLED
;
849 static u64
kvm_dr6_fixed(struct kvm_vcpu
*vcpu
)
851 u64 fixed
= DR6_FIXED_1
;
853 if (!guest_cpuid_has_rtm(vcpu
))
858 static int __kvm_set_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long val
)
862 vcpu
->arch
.db
[dr
] = val
;
863 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
))
864 vcpu
->arch
.eff_db
[dr
] = val
;
869 if (val
& 0xffffffff00000000ULL
)
871 vcpu
->arch
.dr6
= (val
& DR6_VOLATILE
) | kvm_dr6_fixed(vcpu
);
872 kvm_update_dr6(vcpu
);
877 if (val
& 0xffffffff00000000ULL
)
879 vcpu
->arch
.dr7
= (val
& DR7_VOLATILE
) | DR7_FIXED_1
;
880 kvm_update_dr7(vcpu
);
887 int kvm_set_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long val
)
889 if (__kvm_set_dr(vcpu
, dr
, val
)) {
890 kvm_inject_gp(vcpu
, 0);
895 EXPORT_SYMBOL_GPL(kvm_set_dr
);
897 int kvm_get_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long *val
)
901 *val
= vcpu
->arch
.db
[dr
];
906 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)
907 *val
= vcpu
->arch
.dr6
;
909 *val
= kvm_x86_ops
->get_dr6(vcpu
);
914 *val
= vcpu
->arch
.dr7
;
919 EXPORT_SYMBOL_GPL(kvm_get_dr
);
921 bool kvm_rdpmc(struct kvm_vcpu
*vcpu
)
923 u32 ecx
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
927 err
= kvm_pmu_rdpmc(vcpu
, ecx
, &data
);
930 kvm_register_write(vcpu
, VCPU_REGS_RAX
, (u32
)data
);
931 kvm_register_write(vcpu
, VCPU_REGS_RDX
, data
>> 32);
934 EXPORT_SYMBOL_GPL(kvm_rdpmc
);
937 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
938 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
940 * This list is modified at module load time to reflect the
941 * capabilities of the host cpu. This capabilities test skips MSRs that are
942 * kvm-specific. Those are put in emulated_msrs; filtering of emulated_msrs
943 * may depend on host virtualization features rather than host cpu features.
946 static u32 msrs_to_save
[] = {
947 MSR_IA32_SYSENTER_CS
, MSR_IA32_SYSENTER_ESP
, MSR_IA32_SYSENTER_EIP
,
950 MSR_CSTAR
, MSR_KERNEL_GS_BASE
, MSR_SYSCALL_MASK
, MSR_LSTAR
,
952 MSR_IA32_TSC
, MSR_IA32_CR_PAT
, MSR_VM_HSAVE_PA
,
953 MSR_IA32_FEATURE_CONTROL
, MSR_IA32_BNDCFGS
956 static unsigned num_msrs_to_save
;
958 static u32 emulated_msrs
[] = {
959 MSR_KVM_SYSTEM_TIME
, MSR_KVM_WALL_CLOCK
,
960 MSR_KVM_SYSTEM_TIME_NEW
, MSR_KVM_WALL_CLOCK_NEW
,
961 HV_X64_MSR_GUEST_OS_ID
, HV_X64_MSR_HYPERCALL
,
962 HV_X64_MSR_TIME_REF_COUNT
, HV_X64_MSR_REFERENCE_TSC
,
963 HV_X64_MSR_CRASH_P0
, HV_X64_MSR_CRASH_P1
, HV_X64_MSR_CRASH_P2
,
964 HV_X64_MSR_CRASH_P3
, HV_X64_MSR_CRASH_P4
, HV_X64_MSR_CRASH_CTL
,
967 HV_X64_MSR_VP_RUNTIME
,
968 HV_X64_MSR_APIC_ASSIST_PAGE
, MSR_KVM_ASYNC_PF_EN
, MSR_KVM_STEAL_TIME
,
972 MSR_IA32_TSCDEADLINE
,
973 MSR_IA32_MISC_ENABLE
,
979 static unsigned num_emulated_msrs
;
981 bool kvm_valid_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
983 if (efer
& efer_reserved_bits
)
986 if (efer
& EFER_FFXSR
) {
987 struct kvm_cpuid_entry2
*feat
;
989 feat
= kvm_find_cpuid_entry(vcpu
, 0x80000001, 0);
990 if (!feat
|| !(feat
->edx
& bit(X86_FEATURE_FXSR_OPT
)))
994 if (efer
& EFER_SVME
) {
995 struct kvm_cpuid_entry2
*feat
;
997 feat
= kvm_find_cpuid_entry(vcpu
, 0x80000001, 0);
998 if (!feat
|| !(feat
->ecx
& bit(X86_FEATURE_SVM
)))
1004 EXPORT_SYMBOL_GPL(kvm_valid_efer
);
1006 static int set_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
1008 u64 old_efer
= vcpu
->arch
.efer
;
1010 if (!kvm_valid_efer(vcpu
, efer
))
1014 && (vcpu
->arch
.efer
& EFER_LME
) != (efer
& EFER_LME
))
1018 efer
|= vcpu
->arch
.efer
& EFER_LMA
;
1020 kvm_x86_ops
->set_efer(vcpu
, efer
);
1022 /* Update reserved bits */
1023 if ((efer
^ old_efer
) & EFER_NX
)
1024 kvm_mmu_reset_context(vcpu
);
1029 void kvm_enable_efer_bits(u64 mask
)
1031 efer_reserved_bits
&= ~mask
;
1033 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits
);
1036 * Writes msr value into into the appropriate "register".
1037 * Returns 0 on success, non-0 otherwise.
1038 * Assumes vcpu_load() was already called.
1040 int kvm_set_msr(struct kvm_vcpu
*vcpu
, struct msr_data
*msr
)
1042 switch (msr
->index
) {
1045 case MSR_KERNEL_GS_BASE
:
1048 if (is_noncanonical_address(msr
->data
))
1051 case MSR_IA32_SYSENTER_EIP
:
1052 case MSR_IA32_SYSENTER_ESP
:
1054 * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1055 * non-canonical address is written on Intel but not on
1056 * AMD (which ignores the top 32-bits, because it does
1057 * not implement 64-bit SYSENTER).
1059 * 64-bit code should hence be able to write a non-canonical
1060 * value on AMD. Making the address canonical ensures that
1061 * vmentry does not fail on Intel after writing a non-canonical
1062 * value, and that something deterministic happens if the guest
1063 * invokes 64-bit SYSENTER.
1065 msr
->data
= get_canonical(msr
->data
);
1067 return kvm_x86_ops
->set_msr(vcpu
, msr
);
1069 EXPORT_SYMBOL_GPL(kvm_set_msr
);
1072 * Adapt set_msr() to msr_io()'s calling convention
1074 static int do_get_msr(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
1076 struct msr_data msr
;
1080 msr
.host_initiated
= true;
1081 r
= kvm_get_msr(vcpu
, &msr
);
1089 static int do_set_msr(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
1091 struct msr_data msr
;
1095 msr
.host_initiated
= true;
1096 return kvm_set_msr(vcpu
, &msr
);
1099 #ifdef CONFIG_X86_64
1100 struct pvclock_gtod_data
{
1103 struct { /* extract of a clocksource struct */
1115 static struct pvclock_gtod_data pvclock_gtod_data
;
1117 static void update_pvclock_gtod(struct timekeeper
*tk
)
1119 struct pvclock_gtod_data
*vdata
= &pvclock_gtod_data
;
1122 boot_ns
= ktime_to_ns(ktime_add(tk
->tkr_mono
.base
, tk
->offs_boot
));
1124 write_seqcount_begin(&vdata
->seq
);
1126 /* copy pvclock gtod data */
1127 vdata
->clock
.vclock_mode
= tk
->tkr_mono
.clock
->archdata
.vclock_mode
;
1128 vdata
->clock
.cycle_last
= tk
->tkr_mono
.cycle_last
;
1129 vdata
->clock
.mask
= tk
->tkr_mono
.mask
;
1130 vdata
->clock
.mult
= tk
->tkr_mono
.mult
;
1131 vdata
->clock
.shift
= tk
->tkr_mono
.shift
;
1133 vdata
->boot_ns
= boot_ns
;
1134 vdata
->nsec_base
= tk
->tkr_mono
.xtime_nsec
;
1136 write_seqcount_end(&vdata
->seq
);
1140 void kvm_set_pending_timer(struct kvm_vcpu
*vcpu
)
1143 * Note: KVM_REQ_PENDING_TIMER is implicitly checked in
1144 * vcpu_enter_guest. This function is only called from
1145 * the physical CPU that is running vcpu.
1147 kvm_make_request(KVM_REQ_PENDING_TIMER
, vcpu
);
1150 static void kvm_write_wall_clock(struct kvm
*kvm
, gpa_t wall_clock
)
1154 struct pvclock_wall_clock wc
;
1155 struct timespec boot
;
1160 r
= kvm_read_guest(kvm
, wall_clock
, &version
, sizeof(version
));
1165 ++version
; /* first time write, random junk */
1169 kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
));
1172 * The guest calculates current wall clock time by adding
1173 * system time (updated by kvm_guest_time_update below) to the
1174 * wall clock specified here. guest system time equals host
1175 * system time for us, thus we must fill in host boot time here.
1179 if (kvm
->arch
.kvmclock_offset
) {
1180 struct timespec ts
= ns_to_timespec(kvm
->arch
.kvmclock_offset
);
1181 boot
= timespec_sub(boot
, ts
);
1183 wc
.sec
= boot
.tv_sec
;
1184 wc
.nsec
= boot
.tv_nsec
;
1185 wc
.version
= version
;
1187 kvm_write_guest(kvm
, wall_clock
, &wc
, sizeof(wc
));
1190 kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
));
1193 static uint32_t div_frac(uint32_t dividend
, uint32_t divisor
)
1195 uint32_t quotient
, remainder
;
1197 /* Don't try to replace with do_div(), this one calculates
1198 * "(dividend << 32) / divisor" */
1200 : "=a" (quotient
), "=d" (remainder
)
1201 : "0" (0), "1" (dividend
), "r" (divisor
) );
1205 static void kvm_get_time_scale(uint32_t scaled_khz
, uint32_t base_khz
,
1206 s8
*pshift
, u32
*pmultiplier
)
1213 tps64
= base_khz
* 1000LL;
1214 scaled64
= scaled_khz
* 1000LL;
1215 while (tps64
> scaled64
*2 || tps64
& 0xffffffff00000000ULL
) {
1220 tps32
= (uint32_t)tps64
;
1221 while (tps32
<= scaled64
|| scaled64
& 0xffffffff00000000ULL
) {
1222 if (scaled64
& 0xffffffff00000000ULL
|| tps32
& 0x80000000)
1230 *pmultiplier
= div_frac(scaled64
, tps32
);
1232 pr_debug("%s: base_khz %u => %u, shift %d, mul %u\n",
1233 __func__
, base_khz
, scaled_khz
, shift
, *pmultiplier
);
1236 #ifdef CONFIG_X86_64
1237 static atomic_t kvm_guest_has_master_clock
= ATOMIC_INIT(0);
1240 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz
);
1241 static unsigned long max_tsc_khz
;
1243 static inline u64
nsec_to_cycles(struct kvm_vcpu
*vcpu
, u64 nsec
)
1245 return pvclock_scale_delta(nsec
, vcpu
->arch
.virtual_tsc_mult
,
1246 vcpu
->arch
.virtual_tsc_shift
);
1249 static u32
adjust_tsc_khz(u32 khz
, s32 ppm
)
1251 u64 v
= (u64
)khz
* (1000000 + ppm
);
1256 static void kvm_set_tsc_khz(struct kvm_vcpu
*vcpu
, u32 this_tsc_khz
)
1258 u32 thresh_lo
, thresh_hi
;
1259 int use_scaling
= 0;
1261 /* tsc_khz can be zero if TSC calibration fails */
1262 if (this_tsc_khz
== 0) {
1263 /* set tsc_scaling_ratio to a safe value */
1264 vcpu
->arch
.tsc_scaling_ratio
= kvm_default_tsc_scaling_ratio
;
1268 /* Compute a scale to convert nanoseconds in TSC cycles */
1269 kvm_get_time_scale(this_tsc_khz
, NSEC_PER_SEC
/ 1000,
1270 &vcpu
->arch
.virtual_tsc_shift
,
1271 &vcpu
->arch
.virtual_tsc_mult
);
1272 vcpu
->arch
.virtual_tsc_khz
= this_tsc_khz
;
1275 * Compute the variation in TSC rate which is acceptable
1276 * within the range of tolerance and decide if the
1277 * rate being applied is within that bounds of the hardware
1278 * rate. If so, no scaling or compensation need be done.
1280 thresh_lo
= adjust_tsc_khz(tsc_khz
, -tsc_tolerance_ppm
);
1281 thresh_hi
= adjust_tsc_khz(tsc_khz
, tsc_tolerance_ppm
);
1282 if (this_tsc_khz
< thresh_lo
|| this_tsc_khz
> thresh_hi
) {
1283 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", this_tsc_khz
, thresh_lo
, thresh_hi
);
1286 kvm_x86_ops
->set_tsc_khz(vcpu
, this_tsc_khz
, use_scaling
);
1289 static u64
compute_guest_tsc(struct kvm_vcpu
*vcpu
, s64 kernel_ns
)
1291 u64 tsc
= pvclock_scale_delta(kernel_ns
-vcpu
->arch
.this_tsc_nsec
,
1292 vcpu
->arch
.virtual_tsc_mult
,
1293 vcpu
->arch
.virtual_tsc_shift
);
1294 tsc
+= vcpu
->arch
.this_tsc_write
;
1298 static void kvm_track_tsc_matching(struct kvm_vcpu
*vcpu
)
1300 #ifdef CONFIG_X86_64
1302 struct kvm_arch
*ka
= &vcpu
->kvm
->arch
;
1303 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1305 vcpus_matched
= (ka
->nr_vcpus_matched_tsc
+ 1 ==
1306 atomic_read(&vcpu
->kvm
->online_vcpus
));
1309 * Once the masterclock is enabled, always perform request in
1310 * order to update it.
1312 * In order to enable masterclock, the host clocksource must be TSC
1313 * and the vcpus need to have matched TSCs. When that happens,
1314 * perform request to enable masterclock.
1316 if (ka
->use_master_clock
||
1317 (gtod
->clock
.vclock_mode
== VCLOCK_TSC
&& vcpus_matched
))
1318 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
1320 trace_kvm_track_tsc(vcpu
->vcpu_id
, ka
->nr_vcpus_matched_tsc
,
1321 atomic_read(&vcpu
->kvm
->online_vcpus
),
1322 ka
->use_master_clock
, gtod
->clock
.vclock_mode
);
1326 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu
*vcpu
, s64 offset
)
1328 u64 curr_offset
= kvm_x86_ops
->read_tsc_offset(vcpu
);
1329 vcpu
->arch
.ia32_tsc_adjust_msr
+= offset
- curr_offset
;
1332 void kvm_write_tsc(struct kvm_vcpu
*vcpu
, struct msr_data
*msr
)
1334 struct kvm
*kvm
= vcpu
->kvm
;
1335 u64 offset
, ns
, elapsed
;
1336 unsigned long flags
;
1339 bool already_matched
;
1340 u64 data
= msr
->data
;
1342 raw_spin_lock_irqsave(&kvm
->arch
.tsc_write_lock
, flags
);
1343 offset
= kvm_x86_ops
->compute_tsc_offset(vcpu
, data
);
1344 ns
= get_kernel_ns();
1345 elapsed
= ns
- kvm
->arch
.last_tsc_nsec
;
1347 if (vcpu
->arch
.virtual_tsc_khz
) {
1350 /* n.b - signed multiplication and division required */
1351 usdiff
= data
- kvm
->arch
.last_tsc_write
;
1352 #ifdef CONFIG_X86_64
1353 usdiff
= (usdiff
* 1000) / vcpu
->arch
.virtual_tsc_khz
;
1355 /* do_div() only does unsigned */
1356 asm("1: idivl %[divisor]\n"
1357 "2: xor %%edx, %%edx\n"
1358 " movl $0, %[faulted]\n"
1360 ".section .fixup,\"ax\"\n"
1361 "4: movl $1, %[faulted]\n"
1365 _ASM_EXTABLE(1b
, 4b
)
1367 : "=A"(usdiff
), [faulted
] "=r" (faulted
)
1368 : "A"(usdiff
* 1000), [divisor
] "rm"(vcpu
->arch
.virtual_tsc_khz
));
1371 do_div(elapsed
, 1000);
1376 /* idivl overflow => difference is larger than USEC_PER_SEC */
1378 usdiff
= USEC_PER_SEC
;
1380 usdiff
= USEC_PER_SEC
; /* disable TSC match window below */
1383 * Special case: TSC write with a small delta (1 second) of virtual
1384 * cycle time against real time is interpreted as an attempt to
1385 * synchronize the CPU.
1387 * For a reliable TSC, we can match TSC offsets, and for an unstable
1388 * TSC, we add elapsed time in this computation. We could let the
1389 * compensation code attempt to catch up if we fall behind, but
1390 * it's better to try to match offsets from the beginning.
1392 if (usdiff
< USEC_PER_SEC
&&
1393 vcpu
->arch
.virtual_tsc_khz
== kvm
->arch
.last_tsc_khz
) {
1394 if (!check_tsc_unstable()) {
1395 offset
= kvm
->arch
.cur_tsc_offset
;
1396 pr_debug("kvm: matched tsc offset for %llu\n", data
);
1398 u64 delta
= nsec_to_cycles(vcpu
, elapsed
);
1400 offset
= kvm_x86_ops
->compute_tsc_offset(vcpu
, data
);
1401 pr_debug("kvm: adjusted tsc offset by %llu\n", delta
);
1404 already_matched
= (vcpu
->arch
.this_tsc_generation
== kvm
->arch
.cur_tsc_generation
);
1407 * We split periods of matched TSC writes into generations.
1408 * For each generation, we track the original measured
1409 * nanosecond time, offset, and write, so if TSCs are in
1410 * sync, we can match exact offset, and if not, we can match
1411 * exact software computation in compute_guest_tsc()
1413 * These values are tracked in kvm->arch.cur_xxx variables.
1415 kvm
->arch
.cur_tsc_generation
++;
1416 kvm
->arch
.cur_tsc_nsec
= ns
;
1417 kvm
->arch
.cur_tsc_write
= data
;
1418 kvm
->arch
.cur_tsc_offset
= offset
;
1420 pr_debug("kvm: new tsc generation %llu, clock %llu\n",
1421 kvm
->arch
.cur_tsc_generation
, data
);
1425 * We also track th most recent recorded KHZ, write and time to
1426 * allow the matching interval to be extended at each write.
1428 kvm
->arch
.last_tsc_nsec
= ns
;
1429 kvm
->arch
.last_tsc_write
= data
;
1430 kvm
->arch
.last_tsc_khz
= vcpu
->arch
.virtual_tsc_khz
;
1432 vcpu
->arch
.last_guest_tsc
= data
;
1434 /* Keep track of which generation this VCPU has synchronized to */
1435 vcpu
->arch
.this_tsc_generation
= kvm
->arch
.cur_tsc_generation
;
1436 vcpu
->arch
.this_tsc_nsec
= kvm
->arch
.cur_tsc_nsec
;
1437 vcpu
->arch
.this_tsc_write
= kvm
->arch
.cur_tsc_write
;
1439 if (guest_cpuid_has_tsc_adjust(vcpu
) && !msr
->host_initiated
)
1440 update_ia32_tsc_adjust_msr(vcpu
, offset
);
1441 kvm_x86_ops
->write_tsc_offset(vcpu
, offset
);
1442 raw_spin_unlock_irqrestore(&kvm
->arch
.tsc_write_lock
, flags
);
1444 spin_lock(&kvm
->arch
.pvclock_gtod_sync_lock
);
1446 kvm
->arch
.nr_vcpus_matched_tsc
= 0;
1447 } else if (!already_matched
) {
1448 kvm
->arch
.nr_vcpus_matched_tsc
++;
1451 kvm_track_tsc_matching(vcpu
);
1452 spin_unlock(&kvm
->arch
.pvclock_gtod_sync_lock
);
1455 EXPORT_SYMBOL_GPL(kvm_write_tsc
);
1457 #ifdef CONFIG_X86_64
1459 static cycle_t
read_tsc(void)
1461 cycle_t ret
= (cycle_t
)rdtsc_ordered();
1462 u64 last
= pvclock_gtod_data
.clock
.cycle_last
;
1464 if (likely(ret
>= last
))
1468 * GCC likes to generate cmov here, but this branch is extremely
1469 * predictable (it's just a funciton of time and the likely is
1470 * very likely) and there's a data dependence, so force GCC
1471 * to generate a branch instead. I don't barrier() because
1472 * we don't actually need a barrier, and if this function
1473 * ever gets inlined it will generate worse code.
1479 static inline u64
vgettsc(cycle_t
*cycle_now
)
1482 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1484 *cycle_now
= read_tsc();
1486 v
= (*cycle_now
- gtod
->clock
.cycle_last
) & gtod
->clock
.mask
;
1487 return v
* gtod
->clock
.mult
;
1490 static int do_monotonic_boot(s64
*t
, cycle_t
*cycle_now
)
1492 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1498 seq
= read_seqcount_begin(>od
->seq
);
1499 mode
= gtod
->clock
.vclock_mode
;
1500 ns
= gtod
->nsec_base
;
1501 ns
+= vgettsc(cycle_now
);
1502 ns
>>= gtod
->clock
.shift
;
1503 ns
+= gtod
->boot_ns
;
1504 } while (unlikely(read_seqcount_retry(>od
->seq
, seq
)));
1510 /* returns true if host is using tsc clocksource */
1511 static bool kvm_get_time_and_clockread(s64
*kernel_ns
, cycle_t
*cycle_now
)
1513 /* checked again under seqlock below */
1514 if (pvclock_gtod_data
.clock
.vclock_mode
!= VCLOCK_TSC
)
1517 return do_monotonic_boot(kernel_ns
, cycle_now
) == VCLOCK_TSC
;
1523 * Assuming a stable TSC across physical CPUS, and a stable TSC
1524 * across virtual CPUs, the following condition is possible.
1525 * Each numbered line represents an event visible to both
1526 * CPUs at the next numbered event.
1528 * "timespecX" represents host monotonic time. "tscX" represents
1531 * VCPU0 on CPU0 | VCPU1 on CPU1
1533 * 1. read timespec0,tsc0
1534 * 2. | timespec1 = timespec0 + N
1536 * 3. transition to guest | transition to guest
1537 * 4. ret0 = timespec0 + (rdtsc - tsc0) |
1538 * 5. | ret1 = timespec1 + (rdtsc - tsc1)
1539 * | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
1541 * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
1544 * - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
1546 * - 0 < N - M => M < N
1548 * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
1549 * always the case (the difference between two distinct xtime instances
1550 * might be smaller then the difference between corresponding TSC reads,
1551 * when updating guest vcpus pvclock areas).
1553 * To avoid that problem, do not allow visibility of distinct
1554 * system_timestamp/tsc_timestamp values simultaneously: use a master
1555 * copy of host monotonic time values. Update that master copy
1558 * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
1562 static void pvclock_update_vm_gtod_copy(struct kvm
*kvm
)
1564 #ifdef CONFIG_X86_64
1565 struct kvm_arch
*ka
= &kvm
->arch
;
1567 bool host_tsc_clocksource
, vcpus_matched
;
1569 vcpus_matched
= (ka
->nr_vcpus_matched_tsc
+ 1 ==
1570 atomic_read(&kvm
->online_vcpus
));
1573 * If the host uses TSC clock, then passthrough TSC as stable
1576 host_tsc_clocksource
= kvm_get_time_and_clockread(
1577 &ka
->master_kernel_ns
,
1578 &ka
->master_cycle_now
);
1580 ka
->use_master_clock
= host_tsc_clocksource
&& vcpus_matched
1581 && !backwards_tsc_observed
1582 && !ka
->boot_vcpu_runs_old_kvmclock
;
1584 if (ka
->use_master_clock
)
1585 atomic_set(&kvm_guest_has_master_clock
, 1);
1587 vclock_mode
= pvclock_gtod_data
.clock
.vclock_mode
;
1588 trace_kvm_update_master_clock(ka
->use_master_clock
, vclock_mode
,
1593 static void kvm_gen_update_masterclock(struct kvm
*kvm
)
1595 #ifdef CONFIG_X86_64
1597 struct kvm_vcpu
*vcpu
;
1598 struct kvm_arch
*ka
= &kvm
->arch
;
1600 spin_lock(&ka
->pvclock_gtod_sync_lock
);
1601 kvm_make_mclock_inprogress_request(kvm
);
1602 /* no guest entries from this point */
1603 pvclock_update_vm_gtod_copy(kvm
);
1605 kvm_for_each_vcpu(i
, vcpu
, kvm
)
1606 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
1608 /* guest entries allowed */
1609 kvm_for_each_vcpu(i
, vcpu
, kvm
)
1610 clear_bit(KVM_REQ_MCLOCK_INPROGRESS
, &vcpu
->requests
);
1612 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
1616 static int kvm_guest_time_update(struct kvm_vcpu
*v
)
1618 unsigned long flags
, this_tsc_khz
;
1619 struct kvm_vcpu_arch
*vcpu
= &v
->arch
;
1620 struct kvm_arch
*ka
= &v
->kvm
->arch
;
1622 u64 tsc_timestamp
, host_tsc
;
1623 struct pvclock_vcpu_time_info guest_hv_clock
;
1625 bool use_master_clock
;
1631 * If the host uses TSC clock, then passthrough TSC as stable
1634 spin_lock(&ka
->pvclock_gtod_sync_lock
);
1635 use_master_clock
= ka
->use_master_clock
;
1636 if (use_master_clock
) {
1637 host_tsc
= ka
->master_cycle_now
;
1638 kernel_ns
= ka
->master_kernel_ns
;
1640 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
1642 /* Keep irq disabled to prevent changes to the clock */
1643 local_irq_save(flags
);
1644 this_tsc_khz
= __this_cpu_read(cpu_tsc_khz
);
1645 if (unlikely(this_tsc_khz
== 0)) {
1646 local_irq_restore(flags
);
1647 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, v
);
1650 if (!use_master_clock
) {
1652 kernel_ns
= get_kernel_ns();
1655 tsc_timestamp
= kvm_x86_ops
->read_l1_tsc(v
, host_tsc
);
1658 * We may have to catch up the TSC to match elapsed wall clock
1659 * time for two reasons, even if kvmclock is used.
1660 * 1) CPU could have been running below the maximum TSC rate
1661 * 2) Broken TSC compensation resets the base at each VCPU
1662 * entry to avoid unknown leaps of TSC even when running
1663 * again on the same CPU. This may cause apparent elapsed
1664 * time to disappear, and the guest to stand still or run
1667 if (vcpu
->tsc_catchup
) {
1668 u64 tsc
= compute_guest_tsc(v
, kernel_ns
);
1669 if (tsc
> tsc_timestamp
) {
1670 adjust_tsc_offset_guest(v
, tsc
- tsc_timestamp
);
1671 tsc_timestamp
= tsc
;
1675 local_irq_restore(flags
);
1677 if (!vcpu
->pv_time_enabled
)
1680 if (unlikely(vcpu
->hw_tsc_khz
!= this_tsc_khz
)) {
1681 kvm_get_time_scale(NSEC_PER_SEC
/ 1000, this_tsc_khz
,
1682 &vcpu
->hv_clock
.tsc_shift
,
1683 &vcpu
->hv_clock
.tsc_to_system_mul
);
1684 vcpu
->hw_tsc_khz
= this_tsc_khz
;
1687 /* With all the info we got, fill in the values */
1688 vcpu
->hv_clock
.tsc_timestamp
= tsc_timestamp
;
1689 vcpu
->hv_clock
.system_time
= kernel_ns
+ v
->kvm
->arch
.kvmclock_offset
;
1690 vcpu
->last_guest_tsc
= tsc_timestamp
;
1692 if (unlikely(kvm_read_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1693 &guest_hv_clock
, sizeof(guest_hv_clock
))))
1696 /* This VCPU is paused, but it's legal for a guest to read another
1697 * VCPU's kvmclock, so we really have to follow the specification where
1698 * it says that version is odd if data is being modified, and even after
1701 * Version field updates must be kept separate. This is because
1702 * kvm_write_guest_cached might use a "rep movs" instruction, and
1703 * writes within a string instruction are weakly ordered. So there
1704 * are three writes overall.
1706 * As a small optimization, only write the version field in the first
1707 * and third write. The vcpu->pv_time cache is still valid, because the
1708 * version field is the first in the struct.
1710 BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info
, version
) != 0);
1712 vcpu
->hv_clock
.version
= guest_hv_clock
.version
+ 1;
1713 kvm_write_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1715 sizeof(vcpu
->hv_clock
.version
));
1719 /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
1720 pvclock_flags
= (guest_hv_clock
.flags
& PVCLOCK_GUEST_STOPPED
);
1722 if (vcpu
->pvclock_set_guest_stopped_request
) {
1723 pvclock_flags
|= PVCLOCK_GUEST_STOPPED
;
1724 vcpu
->pvclock_set_guest_stopped_request
= false;
1727 /* If the host uses TSC clocksource, then it is stable */
1728 if (use_master_clock
)
1729 pvclock_flags
|= PVCLOCK_TSC_STABLE_BIT
;
1731 vcpu
->hv_clock
.flags
= pvclock_flags
;
1733 trace_kvm_pvclock_update(v
->vcpu_id
, &vcpu
->hv_clock
);
1735 kvm_write_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1737 sizeof(vcpu
->hv_clock
));
1741 vcpu
->hv_clock
.version
++;
1742 kvm_write_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1744 sizeof(vcpu
->hv_clock
.version
));
1749 * kvmclock updates which are isolated to a given vcpu, such as
1750 * vcpu->cpu migration, should not allow system_timestamp from
1751 * the rest of the vcpus to remain static. Otherwise ntp frequency
1752 * correction applies to one vcpu's system_timestamp but not
1755 * So in those cases, request a kvmclock update for all vcpus.
1756 * We need to rate-limit these requests though, as they can
1757 * considerably slow guests that have a large number of vcpus.
1758 * The time for a remote vcpu to update its kvmclock is bound
1759 * by the delay we use to rate-limit the updates.
1762 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
1764 static void kvmclock_update_fn(struct work_struct
*work
)
1767 struct delayed_work
*dwork
= to_delayed_work(work
);
1768 struct kvm_arch
*ka
= container_of(dwork
, struct kvm_arch
,
1769 kvmclock_update_work
);
1770 struct kvm
*kvm
= container_of(ka
, struct kvm
, arch
);
1771 struct kvm_vcpu
*vcpu
;
1773 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
1774 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
1775 kvm_vcpu_kick(vcpu
);
1779 static void kvm_gen_kvmclock_update(struct kvm_vcpu
*v
)
1781 struct kvm
*kvm
= v
->kvm
;
1783 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, v
);
1784 schedule_delayed_work(&kvm
->arch
.kvmclock_update_work
,
1785 KVMCLOCK_UPDATE_DELAY
);
1788 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
1790 static void kvmclock_sync_fn(struct work_struct
*work
)
1792 struct delayed_work
*dwork
= to_delayed_work(work
);
1793 struct kvm_arch
*ka
= container_of(dwork
, struct kvm_arch
,
1794 kvmclock_sync_work
);
1795 struct kvm
*kvm
= container_of(ka
, struct kvm
, arch
);
1797 if (!kvmclock_periodic_sync
)
1800 schedule_delayed_work(&kvm
->arch
.kvmclock_update_work
, 0);
1801 schedule_delayed_work(&kvm
->arch
.kvmclock_sync_work
,
1802 KVMCLOCK_SYNC_PERIOD
);
1805 static int set_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1807 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
1808 unsigned bank_num
= mcg_cap
& 0xff;
1811 case MSR_IA32_MCG_STATUS
:
1812 vcpu
->arch
.mcg_status
= data
;
1814 case MSR_IA32_MCG_CTL
:
1815 if (!(mcg_cap
& MCG_CTL_P
))
1817 if (data
!= 0 && data
!= ~(u64
)0)
1819 vcpu
->arch
.mcg_ctl
= data
;
1822 if (msr
>= MSR_IA32_MC0_CTL
&&
1823 msr
< MSR_IA32_MCx_CTL(bank_num
)) {
1824 u32 offset
= msr
- MSR_IA32_MC0_CTL
;
1825 /* only 0 or all 1s can be written to IA32_MCi_CTL
1826 * some Linux kernels though clear bit 10 in bank 4 to
1827 * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1828 * this to avoid an uncatched #GP in the guest
1830 if ((offset
& 0x3) == 0 &&
1831 data
!= 0 && (data
| (1 << 10)) != ~(u64
)0)
1833 vcpu
->arch
.mce_banks
[offset
] = data
;
1841 static int xen_hvm_config(struct kvm_vcpu
*vcpu
, u64 data
)
1843 struct kvm
*kvm
= vcpu
->kvm
;
1844 int lm
= is_long_mode(vcpu
);
1845 u8
*blob_addr
= lm
? (u8
*)(long)kvm
->arch
.xen_hvm_config
.blob_addr_64
1846 : (u8
*)(long)kvm
->arch
.xen_hvm_config
.blob_addr_32
;
1847 u8 blob_size
= lm
? kvm
->arch
.xen_hvm_config
.blob_size_64
1848 : kvm
->arch
.xen_hvm_config
.blob_size_32
;
1849 u32 page_num
= data
& ~PAGE_MASK
;
1850 u64 page_addr
= data
& PAGE_MASK
;
1855 if (page_num
>= blob_size
)
1858 page
= memdup_user(blob_addr
+ (page_num
* PAGE_SIZE
), PAGE_SIZE
);
1863 if (kvm_vcpu_write_guest(vcpu
, page_addr
, page
, PAGE_SIZE
))
1872 static int kvm_pv_enable_async_pf(struct kvm_vcpu
*vcpu
, u64 data
)
1874 gpa_t gpa
= data
& ~0x3f;
1876 /* Bits 2:5 are reserved, Should be zero */
1880 vcpu
->arch
.apf
.msr_val
= data
;
1882 if (!(data
& KVM_ASYNC_PF_ENABLED
)) {
1883 kvm_clear_async_pf_completion_queue(vcpu
);
1884 kvm_async_pf_hash_reset(vcpu
);
1888 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, gpa
,
1892 vcpu
->arch
.apf
.send_user_only
= !(data
& KVM_ASYNC_PF_SEND_ALWAYS
);
1893 kvm_async_pf_wakeup_all(vcpu
);
1897 static void kvmclock_reset(struct kvm_vcpu
*vcpu
)
1899 vcpu
->arch
.pv_time_enabled
= false;
1902 static void accumulate_steal_time(struct kvm_vcpu
*vcpu
)
1906 if (!(vcpu
->arch
.st
.msr_val
& KVM_MSR_ENABLED
))
1909 delta
= current
->sched_info
.run_delay
- vcpu
->arch
.st
.last_steal
;
1910 vcpu
->arch
.st
.last_steal
= current
->sched_info
.run_delay
;
1911 vcpu
->arch
.st
.accum_steal
= delta
;
1914 static void record_steal_time(struct kvm_vcpu
*vcpu
)
1916 accumulate_steal_time(vcpu
);
1918 if (!(vcpu
->arch
.st
.msr_val
& KVM_MSR_ENABLED
))
1921 if (unlikely(kvm_read_guest_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
1922 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
))))
1925 vcpu
->arch
.st
.steal
.steal
+= vcpu
->arch
.st
.accum_steal
;
1926 vcpu
->arch
.st
.steal
.version
+= 2;
1927 vcpu
->arch
.st
.accum_steal
= 0;
1929 kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
1930 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
));
1933 int kvm_set_msr_common(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
1936 u32 msr
= msr_info
->index
;
1937 u64 data
= msr_info
->data
;
1940 case MSR_AMD64_NB_CFG
:
1941 case MSR_IA32_UCODE_REV
:
1942 case MSR_IA32_UCODE_WRITE
:
1943 case MSR_VM_HSAVE_PA
:
1944 case MSR_AMD64_PATCH_LOADER
:
1945 case MSR_AMD64_BU_CFG2
:
1949 return set_efer(vcpu
, data
);
1951 data
&= ~(u64
)0x40; /* ignore flush filter disable */
1952 data
&= ~(u64
)0x100; /* ignore ignne emulation enable */
1953 data
&= ~(u64
)0x8; /* ignore TLB cache disable */
1954 data
&= ~(u64
)0x40000; /* ignore Mc status write enable */
1956 vcpu_unimpl(vcpu
, "unimplemented HWCR wrmsr: 0x%llx\n",
1961 case MSR_FAM10H_MMIO_CONF_BASE
:
1963 vcpu_unimpl(vcpu
, "unimplemented MMIO_CONF_BASE wrmsr: "
1968 case MSR_IA32_DEBUGCTLMSR
:
1970 /* We support the non-activated case already */
1972 } else if (data
& ~(DEBUGCTLMSR_LBR
| DEBUGCTLMSR_BTF
)) {
1973 /* Values other than LBR and BTF are vendor-specific,
1974 thus reserved and should throw a #GP */
1977 vcpu_unimpl(vcpu
, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
1980 case 0x200 ... 0x2ff:
1981 return kvm_mtrr_set_msr(vcpu
, msr
, data
);
1982 case MSR_IA32_APICBASE
:
1983 return kvm_set_apic_base(vcpu
, msr_info
);
1984 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0x3ff:
1985 return kvm_x2apic_msr_write(vcpu
, msr
, data
);
1986 case MSR_IA32_TSCDEADLINE
:
1987 kvm_set_lapic_tscdeadline_msr(vcpu
, data
);
1989 case MSR_IA32_TSC_ADJUST
:
1990 if (guest_cpuid_has_tsc_adjust(vcpu
)) {
1991 if (!msr_info
->host_initiated
) {
1992 s64 adj
= data
- vcpu
->arch
.ia32_tsc_adjust_msr
;
1993 adjust_tsc_offset_guest(vcpu
, adj
);
1995 vcpu
->arch
.ia32_tsc_adjust_msr
= data
;
1998 case MSR_IA32_MISC_ENABLE
:
1999 vcpu
->arch
.ia32_misc_enable_msr
= data
;
2001 case MSR_IA32_SMBASE
:
2002 if (!msr_info
->host_initiated
)
2004 vcpu
->arch
.smbase
= data
;
2006 case MSR_KVM_WALL_CLOCK_NEW
:
2007 case MSR_KVM_WALL_CLOCK
:
2008 vcpu
->kvm
->arch
.wall_clock
= data
;
2009 kvm_write_wall_clock(vcpu
->kvm
, data
);
2011 case MSR_KVM_SYSTEM_TIME_NEW
:
2012 case MSR_KVM_SYSTEM_TIME
: {
2014 struct kvm_arch
*ka
= &vcpu
->kvm
->arch
;
2016 kvmclock_reset(vcpu
);
2018 if (vcpu
->vcpu_id
== 0 && !msr_info
->host_initiated
) {
2019 bool tmp
= (msr
== MSR_KVM_SYSTEM_TIME
);
2021 if (ka
->boot_vcpu_runs_old_kvmclock
!= tmp
)
2022 set_bit(KVM_REQ_MASTERCLOCK_UPDATE
,
2025 ka
->boot_vcpu_runs_old_kvmclock
= tmp
;
2028 vcpu
->arch
.time
= data
;
2029 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
);
2031 /* we verify if the enable bit is set... */
2035 gpa_offset
= data
& ~(PAGE_MASK
| 1);
2037 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
,
2038 &vcpu
->arch
.pv_time
, data
& ~1ULL,
2039 sizeof(struct pvclock_vcpu_time_info
)))
2040 vcpu
->arch
.pv_time_enabled
= false;
2042 vcpu
->arch
.pv_time_enabled
= true;
2046 case MSR_KVM_ASYNC_PF_EN
:
2047 if (kvm_pv_enable_async_pf(vcpu
, data
))
2050 case MSR_KVM_STEAL_TIME
:
2052 if (unlikely(!sched_info_on()))
2055 if (data
& KVM_STEAL_RESERVED_MASK
)
2058 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2059 data
& KVM_STEAL_VALID_BITS
,
2060 sizeof(struct kvm_steal_time
)))
2063 vcpu
->arch
.st
.msr_val
= data
;
2065 if (!(data
& KVM_MSR_ENABLED
))
2068 kvm_make_request(KVM_REQ_STEAL_UPDATE
, vcpu
);
2071 case MSR_KVM_PV_EOI_EN
:
2072 if (kvm_lapic_enable_pv_eoi(vcpu
, data
))
2076 case MSR_IA32_MCG_CTL
:
2077 case MSR_IA32_MCG_STATUS
:
2078 case MSR_IA32_MC0_CTL
... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS
) - 1:
2079 return set_msr_mce(vcpu
, msr
, data
);
2081 case MSR_K7_PERFCTR0
... MSR_K7_PERFCTR3
:
2082 case MSR_P6_PERFCTR0
... MSR_P6_PERFCTR1
:
2083 pr
= true; /* fall through */
2084 case MSR_K7_EVNTSEL0
... MSR_K7_EVNTSEL3
:
2085 case MSR_P6_EVNTSEL0
... MSR_P6_EVNTSEL1
:
2086 if (kvm_pmu_is_valid_msr(vcpu
, msr
))
2087 return kvm_pmu_set_msr(vcpu
, msr_info
);
2089 if (pr
|| data
!= 0)
2090 vcpu_unimpl(vcpu
, "disabled perfctr wrmsr: "
2091 "0x%x data 0x%llx\n", msr
, data
);
2093 case MSR_K7_CLK_CTL
:
2095 * Ignore all writes to this no longer documented MSR.
2096 * Writes are only relevant for old K7 processors,
2097 * all pre-dating SVM, but a recommended workaround from
2098 * AMD for these chips. It is possible to specify the
2099 * affected processor models on the command line, hence
2100 * the need to ignore the workaround.
2103 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
2104 case HV_X64_MSR_CRASH_P0
... HV_X64_MSR_CRASH_P4
:
2105 case HV_X64_MSR_CRASH_CTL
:
2106 return kvm_hv_set_msr_common(vcpu
, msr
, data
,
2107 msr_info
->host_initiated
);
2108 case MSR_IA32_BBL_CR_CTL3
:
2109 /* Drop writes to this legacy MSR -- see rdmsr
2110 * counterpart for further detail.
2112 vcpu_unimpl(vcpu
, "ignored wrmsr: 0x%x data %llx\n", msr
, data
);
2114 case MSR_AMD64_OSVW_ID_LENGTH
:
2115 if (!guest_cpuid_has_osvw(vcpu
))
2117 vcpu
->arch
.osvw
.length
= data
;
2119 case MSR_AMD64_OSVW_STATUS
:
2120 if (!guest_cpuid_has_osvw(vcpu
))
2122 vcpu
->arch
.osvw
.status
= data
;
2125 if (msr
&& (msr
== vcpu
->kvm
->arch
.xen_hvm_config
.msr
))
2126 return xen_hvm_config(vcpu
, data
);
2127 if (kvm_pmu_is_valid_msr(vcpu
, msr
))
2128 return kvm_pmu_set_msr(vcpu
, msr_info
);
2130 vcpu_unimpl(vcpu
, "unhandled wrmsr: 0x%x data %llx\n",
2134 vcpu_unimpl(vcpu
, "ignored wrmsr: 0x%x data %llx\n",
2141 EXPORT_SYMBOL_GPL(kvm_set_msr_common
);
2145 * Reads an msr value (of 'msr_index') into 'pdata'.
2146 * Returns 0 on success, non-0 otherwise.
2147 * Assumes vcpu_load() was already called.
2149 int kvm_get_msr(struct kvm_vcpu
*vcpu
, struct msr_data
*msr
)
2151 return kvm_x86_ops
->get_msr(vcpu
, msr
);
2153 EXPORT_SYMBOL_GPL(kvm_get_msr
);
2155 static int get_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
2158 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
2159 unsigned bank_num
= mcg_cap
& 0xff;
2162 case MSR_IA32_P5_MC_ADDR
:
2163 case MSR_IA32_P5_MC_TYPE
:
2166 case MSR_IA32_MCG_CAP
:
2167 data
= vcpu
->arch
.mcg_cap
;
2169 case MSR_IA32_MCG_CTL
:
2170 if (!(mcg_cap
& MCG_CTL_P
))
2172 data
= vcpu
->arch
.mcg_ctl
;
2174 case MSR_IA32_MCG_STATUS
:
2175 data
= vcpu
->arch
.mcg_status
;
2178 if (msr
>= MSR_IA32_MC0_CTL
&&
2179 msr
< MSR_IA32_MCx_CTL(bank_num
)) {
2180 u32 offset
= msr
- MSR_IA32_MC0_CTL
;
2181 data
= vcpu
->arch
.mce_banks
[offset
];
2190 int kvm_get_msr_common(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
2192 switch (msr_info
->index
) {
2193 case MSR_IA32_PLATFORM_ID
:
2194 case MSR_IA32_EBL_CR_POWERON
:
2195 case MSR_IA32_DEBUGCTLMSR
:
2196 case MSR_IA32_LASTBRANCHFROMIP
:
2197 case MSR_IA32_LASTBRANCHTOIP
:
2198 case MSR_IA32_LASTINTFROMIP
:
2199 case MSR_IA32_LASTINTTOIP
:
2201 case MSR_K8_TSEG_ADDR
:
2202 case MSR_K8_TSEG_MASK
:
2204 case MSR_VM_HSAVE_PA
:
2205 case MSR_K8_INT_PENDING_MSG
:
2206 case MSR_AMD64_NB_CFG
:
2207 case MSR_FAM10H_MMIO_CONF_BASE
:
2208 case MSR_AMD64_BU_CFG2
:
2211 case MSR_K7_EVNTSEL0
... MSR_K7_EVNTSEL3
:
2212 case MSR_K7_PERFCTR0
... MSR_K7_PERFCTR3
:
2213 case MSR_P6_PERFCTR0
... MSR_P6_PERFCTR1
:
2214 case MSR_P6_EVNTSEL0
... MSR_P6_EVNTSEL1
:
2215 if (kvm_pmu_is_valid_msr(vcpu
, msr_info
->index
))
2216 return kvm_pmu_get_msr(vcpu
, msr_info
->index
, &msr_info
->data
);
2219 case MSR_IA32_UCODE_REV
:
2220 msr_info
->data
= 0x100000000ULL
;
2223 case 0x200 ... 0x2ff:
2224 return kvm_mtrr_get_msr(vcpu
, msr_info
->index
, &msr_info
->data
);
2225 case 0xcd: /* fsb frequency */
2229 * MSR_EBC_FREQUENCY_ID
2230 * Conservative value valid for even the basic CPU models.
2231 * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2232 * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2233 * and 266MHz for model 3, or 4. Set Core Clock
2234 * Frequency to System Bus Frequency Ratio to 1 (bits
2235 * 31:24) even though these are only valid for CPU
2236 * models > 2, however guests may end up dividing or
2237 * multiplying by zero otherwise.
2239 case MSR_EBC_FREQUENCY_ID
:
2240 msr_info
->data
= 1 << 24;
2242 case MSR_IA32_APICBASE
:
2243 msr_info
->data
= kvm_get_apic_base(vcpu
);
2245 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0x3ff:
2246 return kvm_x2apic_msr_read(vcpu
, msr_info
->index
, &msr_info
->data
);
2248 case MSR_IA32_TSCDEADLINE
:
2249 msr_info
->data
= kvm_get_lapic_tscdeadline_msr(vcpu
);
2251 case MSR_IA32_TSC_ADJUST
:
2252 msr_info
->data
= (u64
)vcpu
->arch
.ia32_tsc_adjust_msr
;
2254 case MSR_IA32_MISC_ENABLE
:
2255 msr_info
->data
= vcpu
->arch
.ia32_misc_enable_msr
;
2257 case MSR_IA32_SMBASE
:
2258 if (!msr_info
->host_initiated
)
2260 msr_info
->data
= vcpu
->arch
.smbase
;
2262 case MSR_IA32_PERF_STATUS
:
2263 /* TSC increment by tick */
2264 msr_info
->data
= 1000ULL;
2265 /* CPU multiplier */
2266 msr_info
->data
|= (((uint64_t)4ULL) << 40);
2269 msr_info
->data
= vcpu
->arch
.efer
;
2271 case MSR_KVM_WALL_CLOCK
:
2272 case MSR_KVM_WALL_CLOCK_NEW
:
2273 msr_info
->data
= vcpu
->kvm
->arch
.wall_clock
;
2275 case MSR_KVM_SYSTEM_TIME
:
2276 case MSR_KVM_SYSTEM_TIME_NEW
:
2277 msr_info
->data
= vcpu
->arch
.time
;
2279 case MSR_KVM_ASYNC_PF_EN
:
2280 msr_info
->data
= vcpu
->arch
.apf
.msr_val
;
2282 case MSR_KVM_STEAL_TIME
:
2283 msr_info
->data
= vcpu
->arch
.st
.msr_val
;
2285 case MSR_KVM_PV_EOI_EN
:
2286 msr_info
->data
= vcpu
->arch
.pv_eoi
.msr_val
;
2288 case MSR_IA32_P5_MC_ADDR
:
2289 case MSR_IA32_P5_MC_TYPE
:
2290 case MSR_IA32_MCG_CAP
:
2291 case MSR_IA32_MCG_CTL
:
2292 case MSR_IA32_MCG_STATUS
:
2293 case MSR_IA32_MC0_CTL
... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS
) - 1:
2294 return get_msr_mce(vcpu
, msr_info
->index
, &msr_info
->data
);
2295 case MSR_K7_CLK_CTL
:
2297 * Provide expected ramp-up count for K7. All other
2298 * are set to zero, indicating minimum divisors for
2301 * This prevents guest kernels on AMD host with CPU
2302 * type 6, model 8 and higher from exploding due to
2303 * the rdmsr failing.
2305 msr_info
->data
= 0x20000000;
2307 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
2308 case HV_X64_MSR_CRASH_P0
... HV_X64_MSR_CRASH_P4
:
2309 case HV_X64_MSR_CRASH_CTL
:
2310 return kvm_hv_get_msr_common(vcpu
,
2311 msr_info
->index
, &msr_info
->data
);
2313 case MSR_IA32_BBL_CR_CTL3
:
2314 /* This legacy MSR exists but isn't fully documented in current
2315 * silicon. It is however accessed by winxp in very narrow
2316 * scenarios where it sets bit #19, itself documented as
2317 * a "reserved" bit. Best effort attempt to source coherent
2318 * read data here should the balance of the register be
2319 * interpreted by the guest:
2321 * L2 cache control register 3: 64GB range, 256KB size,
2322 * enabled, latency 0x1, configured
2324 msr_info
->data
= 0xbe702111;
2326 case MSR_AMD64_OSVW_ID_LENGTH
:
2327 if (!guest_cpuid_has_osvw(vcpu
))
2329 msr_info
->data
= vcpu
->arch
.osvw
.length
;
2331 case MSR_AMD64_OSVW_STATUS
:
2332 if (!guest_cpuid_has_osvw(vcpu
))
2334 msr_info
->data
= vcpu
->arch
.osvw
.status
;
2337 if (kvm_pmu_is_valid_msr(vcpu
, msr_info
->index
))
2338 return kvm_pmu_get_msr(vcpu
, msr_info
->index
, &msr_info
->data
);
2340 vcpu_unimpl(vcpu
, "unhandled rdmsr: 0x%x\n", msr_info
->index
);
2343 vcpu_unimpl(vcpu
, "ignored rdmsr: 0x%x\n", msr_info
->index
);
2350 EXPORT_SYMBOL_GPL(kvm_get_msr_common
);
2353 * Read or write a bunch of msrs. All parameters are kernel addresses.
2355 * @return number of msrs set successfully.
2357 static int __msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs
*msrs
,
2358 struct kvm_msr_entry
*entries
,
2359 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
2360 unsigned index
, u64
*data
))
2364 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
2365 for (i
= 0; i
< msrs
->nmsrs
; ++i
)
2366 if (do_msr(vcpu
, entries
[i
].index
, &entries
[i
].data
))
2368 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
2374 * Read or write a bunch of msrs. Parameters are user addresses.
2376 * @return number of msrs set successfully.
2378 static int msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs __user
*user_msrs
,
2379 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
2380 unsigned index
, u64
*data
),
2383 struct kvm_msrs msrs
;
2384 struct kvm_msr_entry
*entries
;
2389 if (copy_from_user(&msrs
, user_msrs
, sizeof msrs
))
2393 if (msrs
.nmsrs
>= MAX_IO_MSRS
)
2396 size
= sizeof(struct kvm_msr_entry
) * msrs
.nmsrs
;
2397 entries
= memdup_user(user_msrs
->entries
, size
);
2398 if (IS_ERR(entries
)) {
2399 r
= PTR_ERR(entries
);
2403 r
= n
= __msr_io(vcpu
, &msrs
, entries
, do_msr
);
2408 if (writeback
&& copy_to_user(user_msrs
->entries
, entries
, size
))
2419 int kvm_vm_ioctl_check_extension(struct kvm
*kvm
, long ext
)
2424 case KVM_CAP_IRQCHIP
:
2426 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL
:
2427 case KVM_CAP_SET_TSS_ADDR
:
2428 case KVM_CAP_EXT_CPUID
:
2429 case KVM_CAP_EXT_EMUL_CPUID
:
2430 case KVM_CAP_CLOCKSOURCE
:
2432 case KVM_CAP_NOP_IO_DELAY
:
2433 case KVM_CAP_MP_STATE
:
2434 case KVM_CAP_SYNC_MMU
:
2435 case KVM_CAP_USER_NMI
:
2436 case KVM_CAP_REINJECT_CONTROL
:
2437 case KVM_CAP_IRQ_INJECT_STATUS
:
2438 case KVM_CAP_IOEVENTFD
:
2439 case KVM_CAP_IOEVENTFD_NO_LENGTH
:
2441 case KVM_CAP_PIT_STATE2
:
2442 case KVM_CAP_SET_IDENTITY_MAP_ADDR
:
2443 case KVM_CAP_XEN_HVM
:
2444 case KVM_CAP_ADJUST_CLOCK
:
2445 case KVM_CAP_VCPU_EVENTS
:
2446 case KVM_CAP_HYPERV
:
2447 case KVM_CAP_HYPERV_VAPIC
:
2448 case KVM_CAP_HYPERV_SPIN
:
2449 case KVM_CAP_PCI_SEGMENT
:
2450 case KVM_CAP_DEBUGREGS
:
2451 case KVM_CAP_X86_ROBUST_SINGLESTEP
:
2453 case KVM_CAP_ASYNC_PF
:
2454 case KVM_CAP_GET_TSC_KHZ
:
2455 case KVM_CAP_KVMCLOCK_CTRL
:
2456 case KVM_CAP_READONLY_MEM
:
2457 case KVM_CAP_HYPERV_TIME
:
2458 case KVM_CAP_IOAPIC_POLARITY_IGNORED
:
2459 case KVM_CAP_TSC_DEADLINE_TIMER
:
2460 case KVM_CAP_ENABLE_CAP_VM
:
2461 case KVM_CAP_DISABLE_QUIRKS
:
2462 case KVM_CAP_SET_BOOT_CPU_ID
:
2463 case KVM_CAP_SPLIT_IRQCHIP
:
2464 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2465 case KVM_CAP_ASSIGN_DEV_IRQ
:
2466 case KVM_CAP_PCI_2_3
:
2470 case KVM_CAP_X86_SMM
:
2471 /* SMBASE is usually relocated above 1M on modern chipsets,
2472 * and SMM handlers might indeed rely on 4G segment limits,
2473 * so do not report SMM to be available if real mode is
2474 * emulated via vm86 mode. Still, do not go to great lengths
2475 * to avoid userspace's usage of the feature, because it is a
2476 * fringe case that is not enabled except via specific settings
2477 * of the module parameters.
2479 r
= kvm_x86_ops
->cpu_has_high_real_mode_segbase();
2481 case KVM_CAP_COALESCED_MMIO
:
2482 r
= KVM_COALESCED_MMIO_PAGE_OFFSET
;
2485 r
= !kvm_x86_ops
->cpu_has_accelerated_tpr();
2487 case KVM_CAP_NR_VCPUS
:
2488 r
= KVM_SOFT_MAX_VCPUS
;
2490 case KVM_CAP_MAX_VCPUS
:
2493 case KVM_CAP_NR_MEMSLOTS
:
2494 r
= KVM_USER_MEM_SLOTS
;
2496 case KVM_CAP_PV_MMU
: /* obsolete */
2499 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2501 r
= iommu_present(&pci_bus_type
);
2505 r
= KVM_MAX_MCE_BANKS
;
2510 case KVM_CAP_TSC_CONTROL
:
2511 r
= kvm_has_tsc_control
;
2521 long kvm_arch_dev_ioctl(struct file
*filp
,
2522 unsigned int ioctl
, unsigned long arg
)
2524 void __user
*argp
= (void __user
*)arg
;
2528 case KVM_GET_MSR_INDEX_LIST
: {
2529 struct kvm_msr_list __user
*user_msr_list
= argp
;
2530 struct kvm_msr_list msr_list
;
2534 if (copy_from_user(&msr_list
, user_msr_list
, sizeof msr_list
))
2537 msr_list
.nmsrs
= num_msrs_to_save
+ num_emulated_msrs
;
2538 if (copy_to_user(user_msr_list
, &msr_list
, sizeof msr_list
))
2541 if (n
< msr_list
.nmsrs
)
2544 if (copy_to_user(user_msr_list
->indices
, &msrs_to_save
,
2545 num_msrs_to_save
* sizeof(u32
)))
2547 if (copy_to_user(user_msr_list
->indices
+ num_msrs_to_save
,
2549 num_emulated_msrs
* sizeof(u32
)))
2554 case KVM_GET_SUPPORTED_CPUID
:
2555 case KVM_GET_EMULATED_CPUID
: {
2556 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
2557 struct kvm_cpuid2 cpuid
;
2560 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
2563 r
= kvm_dev_ioctl_get_cpuid(&cpuid
, cpuid_arg
->entries
,
2569 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof cpuid
))
2574 case KVM_X86_GET_MCE_CAP_SUPPORTED
: {
2577 mce_cap
= KVM_MCE_CAP_SUPPORTED
;
2579 if (copy_to_user(argp
, &mce_cap
, sizeof mce_cap
))
2591 static void wbinvd_ipi(void *garbage
)
2596 static bool need_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
2598 return kvm_arch_has_noncoherent_dma(vcpu
->kvm
);
2601 void kvm_arch_vcpu_load(struct kvm_vcpu
*vcpu
, int cpu
)
2603 /* Address WBINVD may be executed by guest */
2604 if (need_emulate_wbinvd(vcpu
)) {
2605 if (kvm_x86_ops
->has_wbinvd_exit())
2606 cpumask_set_cpu(cpu
, vcpu
->arch
.wbinvd_dirty_mask
);
2607 else if (vcpu
->cpu
!= -1 && vcpu
->cpu
!= cpu
)
2608 smp_call_function_single(vcpu
->cpu
,
2609 wbinvd_ipi
, NULL
, 1);
2612 kvm_x86_ops
->vcpu_load(vcpu
, cpu
);
2614 /* Apply any externally detected TSC adjustments (due to suspend) */
2615 if (unlikely(vcpu
->arch
.tsc_offset_adjustment
)) {
2616 adjust_tsc_offset_host(vcpu
, vcpu
->arch
.tsc_offset_adjustment
);
2617 vcpu
->arch
.tsc_offset_adjustment
= 0;
2618 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
2621 if (unlikely(vcpu
->cpu
!= cpu
) || check_tsc_unstable()) {
2622 s64 tsc_delta
= !vcpu
->arch
.last_host_tsc
? 0 :
2623 rdtsc() - vcpu
->arch
.last_host_tsc
;
2625 mark_tsc_unstable("KVM discovered backwards TSC");
2626 if (check_tsc_unstable()) {
2627 u64 offset
= kvm_x86_ops
->compute_tsc_offset(vcpu
,
2628 vcpu
->arch
.last_guest_tsc
);
2629 kvm_x86_ops
->write_tsc_offset(vcpu
, offset
);
2630 vcpu
->arch
.tsc_catchup
= 1;
2633 * On a host with synchronized TSC, there is no need to update
2634 * kvmclock on vcpu->cpu migration
2636 if (!vcpu
->kvm
->arch
.use_master_clock
|| vcpu
->cpu
== -1)
2637 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
);
2638 if (vcpu
->cpu
!= cpu
)
2639 kvm_migrate_timers(vcpu
);
2643 kvm_make_request(KVM_REQ_STEAL_UPDATE
, vcpu
);
2646 void kvm_arch_vcpu_put(struct kvm_vcpu
*vcpu
)
2648 kvm_x86_ops
->vcpu_put(vcpu
);
2649 kvm_put_guest_fpu(vcpu
);
2650 vcpu
->arch
.last_host_tsc
= rdtsc();
2653 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu
*vcpu
,
2654 struct kvm_lapic_state
*s
)
2656 kvm_x86_ops
->sync_pir_to_irr(vcpu
);
2657 memcpy(s
->regs
, vcpu
->arch
.apic
->regs
, sizeof *s
);
2662 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu
*vcpu
,
2663 struct kvm_lapic_state
*s
)
2665 kvm_apic_post_state_restore(vcpu
, s
);
2666 update_cr8_intercept(vcpu
);
2671 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu
*vcpu
,
2672 struct kvm_interrupt
*irq
)
2674 if (irq
->irq
>= KVM_NR_INTERRUPTS
)
2677 if (!irqchip_in_kernel(vcpu
->kvm
)) {
2678 kvm_queue_interrupt(vcpu
, irq
->irq
, false);
2679 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
2684 * With in-kernel LAPIC, we only use this to inject EXTINT, so
2685 * fail for in-kernel 8259.
2687 if (pic_in_kernel(vcpu
->kvm
))
2690 if (vcpu
->arch
.pending_external_vector
!= -1)
2693 vcpu
->arch
.pending_external_vector
= irq
->irq
;
2697 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu
*vcpu
)
2699 kvm_inject_nmi(vcpu
);
2704 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu
*vcpu
)
2706 kvm_make_request(KVM_REQ_SMI
, vcpu
);
2711 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu
*vcpu
,
2712 struct kvm_tpr_access_ctl
*tac
)
2716 vcpu
->arch
.tpr_access_reporting
= !!tac
->enabled
;
2720 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu
*vcpu
,
2724 unsigned bank_num
= mcg_cap
& 0xff, bank
;
2727 if (!bank_num
|| bank_num
>= KVM_MAX_MCE_BANKS
)
2729 if (mcg_cap
& ~(KVM_MCE_CAP_SUPPORTED
| 0xff | 0xff0000))
2732 vcpu
->arch
.mcg_cap
= mcg_cap
;
2733 /* Init IA32_MCG_CTL to all 1s */
2734 if (mcg_cap
& MCG_CTL_P
)
2735 vcpu
->arch
.mcg_ctl
= ~(u64
)0;
2736 /* Init IA32_MCi_CTL to all 1s */
2737 for (bank
= 0; bank
< bank_num
; bank
++)
2738 vcpu
->arch
.mce_banks
[bank
*4] = ~(u64
)0;
2743 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu
*vcpu
,
2744 struct kvm_x86_mce
*mce
)
2746 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
2747 unsigned bank_num
= mcg_cap
& 0xff;
2748 u64
*banks
= vcpu
->arch
.mce_banks
;
2750 if (mce
->bank
>= bank_num
|| !(mce
->status
& MCI_STATUS_VAL
))
2753 * if IA32_MCG_CTL is not all 1s, the uncorrected error
2754 * reporting is disabled
2756 if ((mce
->status
& MCI_STATUS_UC
) && (mcg_cap
& MCG_CTL_P
) &&
2757 vcpu
->arch
.mcg_ctl
!= ~(u64
)0)
2759 banks
+= 4 * mce
->bank
;
2761 * if IA32_MCi_CTL is not all 1s, the uncorrected error
2762 * reporting is disabled for the bank
2764 if ((mce
->status
& MCI_STATUS_UC
) && banks
[0] != ~(u64
)0)
2766 if (mce
->status
& MCI_STATUS_UC
) {
2767 if ((vcpu
->arch
.mcg_status
& MCG_STATUS_MCIP
) ||
2768 !kvm_read_cr4_bits(vcpu
, X86_CR4_MCE
)) {
2769 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
2772 if (banks
[1] & MCI_STATUS_VAL
)
2773 mce
->status
|= MCI_STATUS_OVER
;
2774 banks
[2] = mce
->addr
;
2775 banks
[3] = mce
->misc
;
2776 vcpu
->arch
.mcg_status
= mce
->mcg_status
;
2777 banks
[1] = mce
->status
;
2778 kvm_queue_exception(vcpu
, MC_VECTOR
);
2779 } else if (!(banks
[1] & MCI_STATUS_VAL
)
2780 || !(banks
[1] & MCI_STATUS_UC
)) {
2781 if (banks
[1] & MCI_STATUS_VAL
)
2782 mce
->status
|= MCI_STATUS_OVER
;
2783 banks
[2] = mce
->addr
;
2784 banks
[3] = mce
->misc
;
2785 banks
[1] = mce
->status
;
2787 banks
[1] |= MCI_STATUS_OVER
;
2791 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu
*vcpu
,
2792 struct kvm_vcpu_events
*events
)
2795 events
->exception
.injected
=
2796 vcpu
->arch
.exception
.pending
&&
2797 !kvm_exception_is_soft(vcpu
->arch
.exception
.nr
);
2798 events
->exception
.nr
= vcpu
->arch
.exception
.nr
;
2799 events
->exception
.has_error_code
= vcpu
->arch
.exception
.has_error_code
;
2800 events
->exception
.pad
= 0;
2801 events
->exception
.error_code
= vcpu
->arch
.exception
.error_code
;
2803 events
->interrupt
.injected
=
2804 vcpu
->arch
.interrupt
.pending
&& !vcpu
->arch
.interrupt
.soft
;
2805 events
->interrupt
.nr
= vcpu
->arch
.interrupt
.nr
;
2806 events
->interrupt
.soft
= 0;
2807 events
->interrupt
.shadow
= kvm_x86_ops
->get_interrupt_shadow(vcpu
);
2809 events
->nmi
.injected
= vcpu
->arch
.nmi_injected
;
2810 events
->nmi
.pending
= vcpu
->arch
.nmi_pending
!= 0;
2811 events
->nmi
.masked
= kvm_x86_ops
->get_nmi_mask(vcpu
);
2812 events
->nmi
.pad
= 0;
2814 events
->sipi_vector
= 0; /* never valid when reporting to user space */
2816 events
->smi
.smm
= is_smm(vcpu
);
2817 events
->smi
.pending
= vcpu
->arch
.smi_pending
;
2818 events
->smi
.smm_inside_nmi
=
2819 !!(vcpu
->arch
.hflags
& HF_SMM_INSIDE_NMI_MASK
);
2820 events
->smi
.latched_init
= kvm_lapic_latched_init(vcpu
);
2822 events
->flags
= (KVM_VCPUEVENT_VALID_NMI_PENDING
2823 | KVM_VCPUEVENT_VALID_SHADOW
2824 | KVM_VCPUEVENT_VALID_SMM
);
2825 memset(&events
->reserved
, 0, sizeof(events
->reserved
));
2828 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu
*vcpu
,
2829 struct kvm_vcpu_events
*events
)
2831 if (events
->flags
& ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2832 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2833 | KVM_VCPUEVENT_VALID_SHADOW
2834 | KVM_VCPUEVENT_VALID_SMM
))
2838 vcpu
->arch
.exception
.pending
= events
->exception
.injected
;
2839 vcpu
->arch
.exception
.nr
= events
->exception
.nr
;
2840 vcpu
->arch
.exception
.has_error_code
= events
->exception
.has_error_code
;
2841 vcpu
->arch
.exception
.error_code
= events
->exception
.error_code
;
2843 vcpu
->arch
.interrupt
.pending
= events
->interrupt
.injected
;
2844 vcpu
->arch
.interrupt
.nr
= events
->interrupt
.nr
;
2845 vcpu
->arch
.interrupt
.soft
= events
->interrupt
.soft
;
2846 if (events
->flags
& KVM_VCPUEVENT_VALID_SHADOW
)
2847 kvm_x86_ops
->set_interrupt_shadow(vcpu
,
2848 events
->interrupt
.shadow
);
2850 vcpu
->arch
.nmi_injected
= events
->nmi
.injected
;
2851 if (events
->flags
& KVM_VCPUEVENT_VALID_NMI_PENDING
)
2852 vcpu
->arch
.nmi_pending
= events
->nmi
.pending
;
2853 kvm_x86_ops
->set_nmi_mask(vcpu
, events
->nmi
.masked
);
2855 if (events
->flags
& KVM_VCPUEVENT_VALID_SIPI_VECTOR
&&
2856 kvm_vcpu_has_lapic(vcpu
))
2857 vcpu
->arch
.apic
->sipi_vector
= events
->sipi_vector
;
2859 if (events
->flags
& KVM_VCPUEVENT_VALID_SMM
) {
2860 if (events
->smi
.smm
)
2861 vcpu
->arch
.hflags
|= HF_SMM_MASK
;
2863 vcpu
->arch
.hflags
&= ~HF_SMM_MASK
;
2864 vcpu
->arch
.smi_pending
= events
->smi
.pending
;
2865 if (events
->smi
.smm_inside_nmi
)
2866 vcpu
->arch
.hflags
|= HF_SMM_INSIDE_NMI_MASK
;
2868 vcpu
->arch
.hflags
&= ~HF_SMM_INSIDE_NMI_MASK
;
2869 if (kvm_vcpu_has_lapic(vcpu
)) {
2870 if (events
->smi
.latched_init
)
2871 set_bit(KVM_APIC_INIT
, &vcpu
->arch
.apic
->pending_events
);
2873 clear_bit(KVM_APIC_INIT
, &vcpu
->arch
.apic
->pending_events
);
2877 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
2882 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu
*vcpu
,
2883 struct kvm_debugregs
*dbgregs
)
2887 memcpy(dbgregs
->db
, vcpu
->arch
.db
, sizeof(vcpu
->arch
.db
));
2888 kvm_get_dr(vcpu
, 6, &val
);
2890 dbgregs
->dr7
= vcpu
->arch
.dr7
;
2892 memset(&dbgregs
->reserved
, 0, sizeof(dbgregs
->reserved
));
2895 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu
*vcpu
,
2896 struct kvm_debugregs
*dbgregs
)
2901 memcpy(vcpu
->arch
.db
, dbgregs
->db
, sizeof(vcpu
->arch
.db
));
2902 kvm_update_dr0123(vcpu
);
2903 vcpu
->arch
.dr6
= dbgregs
->dr6
;
2904 kvm_update_dr6(vcpu
);
2905 vcpu
->arch
.dr7
= dbgregs
->dr7
;
2906 kvm_update_dr7(vcpu
);
2911 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
2913 static void fill_xsave(u8
*dest
, struct kvm_vcpu
*vcpu
)
2915 struct xregs_state
*xsave
= &vcpu
->arch
.guest_fpu
.state
.xsave
;
2916 u64 xstate_bv
= xsave
->header
.xfeatures
;
2920 * Copy legacy XSAVE area, to avoid complications with CPUID
2921 * leaves 0 and 1 in the loop below.
2923 memcpy(dest
, xsave
, XSAVE_HDR_OFFSET
);
2926 *(u64
*)(dest
+ XSAVE_HDR_OFFSET
) = xstate_bv
;
2929 * Copy each region from the possibly compacted offset to the
2930 * non-compacted offset.
2932 valid
= xstate_bv
& ~XSTATE_FPSSE
;
2934 u64 feature
= valid
& -valid
;
2935 int index
= fls64(feature
) - 1;
2936 void *src
= get_xsave_addr(xsave
, feature
);
2939 u32 size
, offset
, ecx
, edx
;
2940 cpuid_count(XSTATE_CPUID
, index
,
2941 &size
, &offset
, &ecx
, &edx
);
2942 memcpy(dest
+ offset
, src
, size
);
2949 static void load_xsave(struct kvm_vcpu
*vcpu
, u8
*src
)
2951 struct xregs_state
*xsave
= &vcpu
->arch
.guest_fpu
.state
.xsave
;
2952 u64 xstate_bv
= *(u64
*)(src
+ XSAVE_HDR_OFFSET
);
2956 * Copy legacy XSAVE area, to avoid complications with CPUID
2957 * leaves 0 and 1 in the loop below.
2959 memcpy(xsave
, src
, XSAVE_HDR_OFFSET
);
2961 /* Set XSTATE_BV and possibly XCOMP_BV. */
2962 xsave
->header
.xfeatures
= xstate_bv
;
2964 xsave
->header
.xcomp_bv
= host_xcr0
| XSTATE_COMPACTION_ENABLED
;
2967 * Copy each region from the non-compacted offset to the
2968 * possibly compacted offset.
2970 valid
= xstate_bv
& ~XSTATE_FPSSE
;
2972 u64 feature
= valid
& -valid
;
2973 int index
= fls64(feature
) - 1;
2974 void *dest
= get_xsave_addr(xsave
, feature
);
2977 u32 size
, offset
, ecx
, edx
;
2978 cpuid_count(XSTATE_CPUID
, index
,
2979 &size
, &offset
, &ecx
, &edx
);
2980 memcpy(dest
, src
+ offset
, size
);
2987 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu
*vcpu
,
2988 struct kvm_xsave
*guest_xsave
)
2990 if (cpu_has_xsave
) {
2991 memset(guest_xsave
, 0, sizeof(struct kvm_xsave
));
2992 fill_xsave((u8
*) guest_xsave
->region
, vcpu
);
2994 memcpy(guest_xsave
->region
,
2995 &vcpu
->arch
.guest_fpu
.state
.fxsave
,
2996 sizeof(struct fxregs_state
));
2997 *(u64
*)&guest_xsave
->region
[XSAVE_HDR_OFFSET
/ sizeof(u32
)] =
3002 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu
*vcpu
,
3003 struct kvm_xsave
*guest_xsave
)
3006 *(u64
*)&guest_xsave
->region
[XSAVE_HDR_OFFSET
/ sizeof(u32
)];
3008 if (cpu_has_xsave
) {
3010 * Here we allow setting states that are not present in
3011 * CPUID leaf 0xD, index 0, EDX:EAX. This is for compatibility
3012 * with old userspace.
3014 if (xstate_bv
& ~kvm_supported_xcr0())
3016 load_xsave(vcpu
, (u8
*)guest_xsave
->region
);
3018 if (xstate_bv
& ~XSTATE_FPSSE
)
3020 memcpy(&vcpu
->arch
.guest_fpu
.state
.fxsave
,
3021 guest_xsave
->region
, sizeof(struct fxregs_state
));
3026 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu
*vcpu
,
3027 struct kvm_xcrs
*guest_xcrs
)
3029 if (!cpu_has_xsave
) {
3030 guest_xcrs
->nr_xcrs
= 0;
3034 guest_xcrs
->nr_xcrs
= 1;
3035 guest_xcrs
->flags
= 0;
3036 guest_xcrs
->xcrs
[0].xcr
= XCR_XFEATURE_ENABLED_MASK
;
3037 guest_xcrs
->xcrs
[0].value
= vcpu
->arch
.xcr0
;
3040 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu
*vcpu
,
3041 struct kvm_xcrs
*guest_xcrs
)
3048 if (guest_xcrs
->nr_xcrs
> KVM_MAX_XCRS
|| guest_xcrs
->flags
)
3051 for (i
= 0; i
< guest_xcrs
->nr_xcrs
; i
++)
3052 /* Only support XCR0 currently */
3053 if (guest_xcrs
->xcrs
[i
].xcr
== XCR_XFEATURE_ENABLED_MASK
) {
3054 r
= __kvm_set_xcr(vcpu
, XCR_XFEATURE_ENABLED_MASK
,
3055 guest_xcrs
->xcrs
[i
].value
);
3064 * kvm_set_guest_paused() indicates to the guest kernel that it has been
3065 * stopped by the hypervisor. This function will be called from the host only.
3066 * EINVAL is returned when the host attempts to set the flag for a guest that
3067 * does not support pv clocks.
3069 static int kvm_set_guest_paused(struct kvm_vcpu
*vcpu
)
3071 if (!vcpu
->arch
.pv_time_enabled
)
3073 vcpu
->arch
.pvclock_set_guest_stopped_request
= true;
3074 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
3078 long kvm_arch_vcpu_ioctl(struct file
*filp
,
3079 unsigned int ioctl
, unsigned long arg
)
3081 struct kvm_vcpu
*vcpu
= filp
->private_data
;
3082 void __user
*argp
= (void __user
*)arg
;
3085 struct kvm_lapic_state
*lapic
;
3086 struct kvm_xsave
*xsave
;
3087 struct kvm_xcrs
*xcrs
;
3093 case KVM_GET_LAPIC
: {
3095 if (!vcpu
->arch
.apic
)
3097 u
.lapic
= kzalloc(sizeof(struct kvm_lapic_state
), GFP_KERNEL
);
3102 r
= kvm_vcpu_ioctl_get_lapic(vcpu
, u
.lapic
);
3106 if (copy_to_user(argp
, u
.lapic
, sizeof(struct kvm_lapic_state
)))
3111 case KVM_SET_LAPIC
: {
3113 if (!vcpu
->arch
.apic
)
3115 u
.lapic
= memdup_user(argp
, sizeof(*u
.lapic
));
3116 if (IS_ERR(u
.lapic
))
3117 return PTR_ERR(u
.lapic
);
3119 r
= kvm_vcpu_ioctl_set_lapic(vcpu
, u
.lapic
);
3122 case KVM_INTERRUPT
: {
3123 struct kvm_interrupt irq
;
3126 if (copy_from_user(&irq
, argp
, sizeof irq
))
3128 r
= kvm_vcpu_ioctl_interrupt(vcpu
, &irq
);
3132 r
= kvm_vcpu_ioctl_nmi(vcpu
);
3136 r
= kvm_vcpu_ioctl_smi(vcpu
);
3139 case KVM_SET_CPUID
: {
3140 struct kvm_cpuid __user
*cpuid_arg
= argp
;
3141 struct kvm_cpuid cpuid
;
3144 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
3146 r
= kvm_vcpu_ioctl_set_cpuid(vcpu
, &cpuid
, cpuid_arg
->entries
);
3149 case KVM_SET_CPUID2
: {
3150 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
3151 struct kvm_cpuid2 cpuid
;
3154 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
3156 r
= kvm_vcpu_ioctl_set_cpuid2(vcpu
, &cpuid
,
3157 cpuid_arg
->entries
);
3160 case KVM_GET_CPUID2
: {
3161 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
3162 struct kvm_cpuid2 cpuid
;
3165 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
3167 r
= kvm_vcpu_ioctl_get_cpuid2(vcpu
, &cpuid
,
3168 cpuid_arg
->entries
);
3172 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof cpuid
))
3178 r
= msr_io(vcpu
, argp
, do_get_msr
, 1);
3181 r
= msr_io(vcpu
, argp
, do_set_msr
, 0);
3183 case KVM_TPR_ACCESS_REPORTING
: {
3184 struct kvm_tpr_access_ctl tac
;
3187 if (copy_from_user(&tac
, argp
, sizeof tac
))
3189 r
= vcpu_ioctl_tpr_access_reporting(vcpu
, &tac
);
3193 if (copy_to_user(argp
, &tac
, sizeof tac
))
3198 case KVM_SET_VAPIC_ADDR
: {
3199 struct kvm_vapic_addr va
;
3202 if (!lapic_in_kernel(vcpu
))
3205 if (copy_from_user(&va
, argp
, sizeof va
))
3207 r
= kvm_lapic_set_vapic_addr(vcpu
, va
.vapic_addr
);
3210 case KVM_X86_SETUP_MCE
: {
3214 if (copy_from_user(&mcg_cap
, argp
, sizeof mcg_cap
))
3216 r
= kvm_vcpu_ioctl_x86_setup_mce(vcpu
, mcg_cap
);
3219 case KVM_X86_SET_MCE
: {
3220 struct kvm_x86_mce mce
;
3223 if (copy_from_user(&mce
, argp
, sizeof mce
))
3225 r
= kvm_vcpu_ioctl_x86_set_mce(vcpu
, &mce
);
3228 case KVM_GET_VCPU_EVENTS
: {
3229 struct kvm_vcpu_events events
;
3231 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu
, &events
);
3234 if (copy_to_user(argp
, &events
, sizeof(struct kvm_vcpu_events
)))
3239 case KVM_SET_VCPU_EVENTS
: {
3240 struct kvm_vcpu_events events
;
3243 if (copy_from_user(&events
, argp
, sizeof(struct kvm_vcpu_events
)))
3246 r
= kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu
, &events
);
3249 case KVM_GET_DEBUGREGS
: {
3250 struct kvm_debugregs dbgregs
;
3252 kvm_vcpu_ioctl_x86_get_debugregs(vcpu
, &dbgregs
);
3255 if (copy_to_user(argp
, &dbgregs
,
3256 sizeof(struct kvm_debugregs
)))
3261 case KVM_SET_DEBUGREGS
: {
3262 struct kvm_debugregs dbgregs
;
3265 if (copy_from_user(&dbgregs
, argp
,
3266 sizeof(struct kvm_debugregs
)))
3269 r
= kvm_vcpu_ioctl_x86_set_debugregs(vcpu
, &dbgregs
);
3272 case KVM_GET_XSAVE
: {
3273 u
.xsave
= kzalloc(sizeof(struct kvm_xsave
), GFP_KERNEL
);
3278 kvm_vcpu_ioctl_x86_get_xsave(vcpu
, u
.xsave
);
3281 if (copy_to_user(argp
, u
.xsave
, sizeof(struct kvm_xsave
)))
3286 case KVM_SET_XSAVE
: {
3287 u
.xsave
= memdup_user(argp
, sizeof(*u
.xsave
));
3288 if (IS_ERR(u
.xsave
))
3289 return PTR_ERR(u
.xsave
);
3291 r
= kvm_vcpu_ioctl_x86_set_xsave(vcpu
, u
.xsave
);
3294 case KVM_GET_XCRS
: {
3295 u
.xcrs
= kzalloc(sizeof(struct kvm_xcrs
), GFP_KERNEL
);
3300 kvm_vcpu_ioctl_x86_get_xcrs(vcpu
, u
.xcrs
);
3303 if (copy_to_user(argp
, u
.xcrs
,
3304 sizeof(struct kvm_xcrs
)))
3309 case KVM_SET_XCRS
: {
3310 u
.xcrs
= memdup_user(argp
, sizeof(*u
.xcrs
));
3312 return PTR_ERR(u
.xcrs
);
3314 r
= kvm_vcpu_ioctl_x86_set_xcrs(vcpu
, u
.xcrs
);
3317 case KVM_SET_TSC_KHZ
: {
3321 user_tsc_khz
= (u32
)arg
;
3323 if (user_tsc_khz
>= kvm_max_guest_tsc_khz
)
3326 if (user_tsc_khz
== 0)
3327 user_tsc_khz
= tsc_khz
;
3329 kvm_set_tsc_khz(vcpu
, user_tsc_khz
);
3334 case KVM_GET_TSC_KHZ
: {
3335 r
= vcpu
->arch
.virtual_tsc_khz
;
3338 case KVM_KVMCLOCK_CTRL
: {
3339 r
= kvm_set_guest_paused(vcpu
);
3350 int kvm_arch_vcpu_fault(struct kvm_vcpu
*vcpu
, struct vm_fault
*vmf
)
3352 return VM_FAULT_SIGBUS
;
3355 static int kvm_vm_ioctl_set_tss_addr(struct kvm
*kvm
, unsigned long addr
)
3359 if (addr
> (unsigned int)(-3 * PAGE_SIZE
))
3361 ret
= kvm_x86_ops
->set_tss_addr(kvm
, addr
);
3365 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm
*kvm
,
3368 kvm
->arch
.ept_identity_map_addr
= ident_addr
;
3372 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm
*kvm
,
3373 u32 kvm_nr_mmu_pages
)
3375 if (kvm_nr_mmu_pages
< KVM_MIN_ALLOC_MMU_PAGES
)
3378 mutex_lock(&kvm
->slots_lock
);
3380 kvm_mmu_change_mmu_pages(kvm
, kvm_nr_mmu_pages
);
3381 kvm
->arch
.n_requested_mmu_pages
= kvm_nr_mmu_pages
;
3383 mutex_unlock(&kvm
->slots_lock
);
3387 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm
*kvm
)
3389 return kvm
->arch
.n_max_mmu_pages
;
3392 static int kvm_vm_ioctl_get_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
3397 switch (chip
->chip_id
) {
3398 case KVM_IRQCHIP_PIC_MASTER
:
3399 memcpy(&chip
->chip
.pic
,
3400 &pic_irqchip(kvm
)->pics
[0],
3401 sizeof(struct kvm_pic_state
));
3403 case KVM_IRQCHIP_PIC_SLAVE
:
3404 memcpy(&chip
->chip
.pic
,
3405 &pic_irqchip(kvm
)->pics
[1],
3406 sizeof(struct kvm_pic_state
));
3408 case KVM_IRQCHIP_IOAPIC
:
3409 r
= kvm_get_ioapic(kvm
, &chip
->chip
.ioapic
);
3418 static int kvm_vm_ioctl_set_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
3423 switch (chip
->chip_id
) {
3424 case KVM_IRQCHIP_PIC_MASTER
:
3425 spin_lock(&pic_irqchip(kvm
)->lock
);
3426 memcpy(&pic_irqchip(kvm
)->pics
[0],
3428 sizeof(struct kvm_pic_state
));
3429 spin_unlock(&pic_irqchip(kvm
)->lock
);
3431 case KVM_IRQCHIP_PIC_SLAVE
:
3432 spin_lock(&pic_irqchip(kvm
)->lock
);
3433 memcpy(&pic_irqchip(kvm
)->pics
[1],
3435 sizeof(struct kvm_pic_state
));
3436 spin_unlock(&pic_irqchip(kvm
)->lock
);
3438 case KVM_IRQCHIP_IOAPIC
:
3439 r
= kvm_set_ioapic(kvm
, &chip
->chip
.ioapic
);
3445 kvm_pic_update_irq(pic_irqchip(kvm
));
3449 static int kvm_vm_ioctl_get_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
3451 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3452 memcpy(ps
, &kvm
->arch
.vpit
->pit_state
, sizeof(struct kvm_pit_state
));
3453 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3457 static int kvm_vm_ioctl_set_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
3459 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3460 memcpy(&kvm
->arch
.vpit
->pit_state
, ps
, sizeof(struct kvm_pit_state
));
3461 kvm_pit_load_count(kvm
, 0, ps
->channels
[0].count
, 0);
3462 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3466 static int kvm_vm_ioctl_get_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
3468 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3469 memcpy(ps
->channels
, &kvm
->arch
.vpit
->pit_state
.channels
,
3470 sizeof(ps
->channels
));
3471 ps
->flags
= kvm
->arch
.vpit
->pit_state
.flags
;
3472 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3473 memset(&ps
->reserved
, 0, sizeof(ps
->reserved
));
3477 static int kvm_vm_ioctl_set_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
3480 u32 prev_legacy
, cur_legacy
;
3481 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3482 prev_legacy
= kvm
->arch
.vpit
->pit_state
.flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
3483 cur_legacy
= ps
->flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
3484 if (!prev_legacy
&& cur_legacy
)
3486 memcpy(&kvm
->arch
.vpit
->pit_state
.channels
, &ps
->channels
,
3487 sizeof(kvm
->arch
.vpit
->pit_state
.channels
));
3488 kvm
->arch
.vpit
->pit_state
.flags
= ps
->flags
;
3489 kvm_pit_load_count(kvm
, 0, kvm
->arch
.vpit
->pit_state
.channels
[0].count
, start
);
3490 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3494 static int kvm_vm_ioctl_reinject(struct kvm
*kvm
,
3495 struct kvm_reinject_control
*control
)
3497 if (!kvm
->arch
.vpit
)
3499 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3500 kvm
->arch
.vpit
->pit_state
.reinject
= control
->pit_reinject
;
3501 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3506 * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
3507 * @kvm: kvm instance
3508 * @log: slot id and address to which we copy the log
3510 * Steps 1-4 below provide general overview of dirty page logging. See
3511 * kvm_get_dirty_log_protect() function description for additional details.
3513 * We call kvm_get_dirty_log_protect() to handle steps 1-3, upon return we
3514 * always flush the TLB (step 4) even if previous step failed and the dirty
3515 * bitmap may be corrupt. Regardless of previous outcome the KVM logging API
3516 * does not preclude user space subsequent dirty log read. Flushing TLB ensures
3517 * writes will be marked dirty for next log read.
3519 * 1. Take a snapshot of the bit and clear it if needed.
3520 * 2. Write protect the corresponding page.
3521 * 3. Copy the snapshot to the userspace.
3522 * 4. Flush TLB's if needed.
3524 int kvm_vm_ioctl_get_dirty_log(struct kvm
*kvm
, struct kvm_dirty_log
*log
)
3526 bool is_dirty
= false;
3529 mutex_lock(&kvm
->slots_lock
);
3532 * Flush potentially hardware-cached dirty pages to dirty_bitmap.
3534 if (kvm_x86_ops
->flush_log_dirty
)
3535 kvm_x86_ops
->flush_log_dirty(kvm
);
3537 r
= kvm_get_dirty_log_protect(kvm
, log
, &is_dirty
);
3540 * All the TLBs can be flushed out of mmu lock, see the comments in
3541 * kvm_mmu_slot_remove_write_access().
3543 lockdep_assert_held(&kvm
->slots_lock
);
3545 kvm_flush_remote_tlbs(kvm
);
3547 mutex_unlock(&kvm
->slots_lock
);
3551 int kvm_vm_ioctl_irq_line(struct kvm
*kvm
, struct kvm_irq_level
*irq_event
,
3554 if (!irqchip_in_kernel(kvm
))
3557 irq_event
->status
= kvm_set_irq(kvm
, KVM_USERSPACE_IRQ_SOURCE_ID
,
3558 irq_event
->irq
, irq_event
->level
,
3563 static int kvm_vm_ioctl_enable_cap(struct kvm
*kvm
,
3564 struct kvm_enable_cap
*cap
)
3572 case KVM_CAP_DISABLE_QUIRKS
:
3573 kvm
->arch
.disabled_quirks
= cap
->args
[0];
3576 case KVM_CAP_SPLIT_IRQCHIP
: {
3577 mutex_lock(&kvm
->lock
);
3579 if (cap
->args
[0] > MAX_NR_RESERVED_IOAPIC_PINS
)
3580 goto split_irqchip_unlock
;
3582 if (irqchip_in_kernel(kvm
))
3583 goto split_irqchip_unlock
;
3584 if (atomic_read(&kvm
->online_vcpus
))
3585 goto split_irqchip_unlock
;
3586 r
= kvm_setup_empty_irq_routing(kvm
);
3588 goto split_irqchip_unlock
;
3589 /* Pairs with irqchip_in_kernel. */
3591 kvm
->arch
.irqchip_split
= true;
3592 kvm
->arch
.nr_reserved_ioapic_pins
= cap
->args
[0];
3594 split_irqchip_unlock
:
3595 mutex_unlock(&kvm
->lock
);
3605 long kvm_arch_vm_ioctl(struct file
*filp
,
3606 unsigned int ioctl
, unsigned long arg
)
3608 struct kvm
*kvm
= filp
->private_data
;
3609 void __user
*argp
= (void __user
*)arg
;
3612 * This union makes it completely explicit to gcc-3.x
3613 * that these two variables' stack usage should be
3614 * combined, not added together.
3617 struct kvm_pit_state ps
;
3618 struct kvm_pit_state2 ps2
;
3619 struct kvm_pit_config pit_config
;
3623 case KVM_SET_TSS_ADDR
:
3624 r
= kvm_vm_ioctl_set_tss_addr(kvm
, arg
);
3626 case KVM_SET_IDENTITY_MAP_ADDR
: {
3630 if (copy_from_user(&ident_addr
, argp
, sizeof ident_addr
))
3632 r
= kvm_vm_ioctl_set_identity_map_addr(kvm
, ident_addr
);
3635 case KVM_SET_NR_MMU_PAGES
:
3636 r
= kvm_vm_ioctl_set_nr_mmu_pages(kvm
, arg
);
3638 case KVM_GET_NR_MMU_PAGES
:
3639 r
= kvm_vm_ioctl_get_nr_mmu_pages(kvm
);
3641 case KVM_CREATE_IRQCHIP
: {
3642 struct kvm_pic
*vpic
;
3644 mutex_lock(&kvm
->lock
);
3647 goto create_irqchip_unlock
;
3649 if (atomic_read(&kvm
->online_vcpus
))
3650 goto create_irqchip_unlock
;
3652 vpic
= kvm_create_pic(kvm
);
3654 r
= kvm_ioapic_init(kvm
);
3656 mutex_lock(&kvm
->slots_lock
);
3657 kvm_destroy_pic(vpic
);
3658 mutex_unlock(&kvm
->slots_lock
);
3659 goto create_irqchip_unlock
;
3662 goto create_irqchip_unlock
;
3663 r
= kvm_setup_default_irq_routing(kvm
);
3665 mutex_lock(&kvm
->slots_lock
);
3666 mutex_lock(&kvm
->irq_lock
);
3667 kvm_ioapic_destroy(kvm
);
3668 kvm_destroy_pic(vpic
);
3669 mutex_unlock(&kvm
->irq_lock
);
3670 mutex_unlock(&kvm
->slots_lock
);
3671 goto create_irqchip_unlock
;
3673 /* Write kvm->irq_routing before kvm->arch.vpic. */
3675 kvm
->arch
.vpic
= vpic
;
3676 create_irqchip_unlock
:
3677 mutex_unlock(&kvm
->lock
);
3680 case KVM_CREATE_PIT
:
3681 u
.pit_config
.flags
= KVM_PIT_SPEAKER_DUMMY
;
3683 case KVM_CREATE_PIT2
:
3685 if (copy_from_user(&u
.pit_config
, argp
,
3686 sizeof(struct kvm_pit_config
)))
3689 mutex_lock(&kvm
->slots_lock
);
3692 goto create_pit_unlock
;
3694 kvm
->arch
.vpit
= kvm_create_pit(kvm
, u
.pit_config
.flags
);
3698 mutex_unlock(&kvm
->slots_lock
);
3700 case KVM_GET_IRQCHIP
: {
3701 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3702 struct kvm_irqchip
*chip
;
3704 chip
= memdup_user(argp
, sizeof(*chip
));
3711 if (!irqchip_in_kernel(kvm
) || irqchip_split(kvm
))
3712 goto get_irqchip_out
;
3713 r
= kvm_vm_ioctl_get_irqchip(kvm
, chip
);
3715 goto get_irqchip_out
;
3717 if (copy_to_user(argp
, chip
, sizeof *chip
))
3718 goto get_irqchip_out
;
3724 case KVM_SET_IRQCHIP
: {
3725 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3726 struct kvm_irqchip
*chip
;
3728 chip
= memdup_user(argp
, sizeof(*chip
));
3735 if (!irqchip_in_kernel(kvm
) || irqchip_split(kvm
))
3736 goto set_irqchip_out
;
3737 r
= kvm_vm_ioctl_set_irqchip(kvm
, chip
);
3739 goto set_irqchip_out
;
3747 if (copy_from_user(&u
.ps
, argp
, sizeof(struct kvm_pit_state
)))
3750 if (!kvm
->arch
.vpit
)
3752 r
= kvm_vm_ioctl_get_pit(kvm
, &u
.ps
);
3756 if (copy_to_user(argp
, &u
.ps
, sizeof(struct kvm_pit_state
)))
3763 if (copy_from_user(&u
.ps
, argp
, sizeof u
.ps
))
3766 if (!kvm
->arch
.vpit
)
3768 r
= kvm_vm_ioctl_set_pit(kvm
, &u
.ps
);
3771 case KVM_GET_PIT2
: {
3773 if (!kvm
->arch
.vpit
)
3775 r
= kvm_vm_ioctl_get_pit2(kvm
, &u
.ps2
);
3779 if (copy_to_user(argp
, &u
.ps2
, sizeof(u
.ps2
)))
3784 case KVM_SET_PIT2
: {
3786 if (copy_from_user(&u
.ps2
, argp
, sizeof(u
.ps2
)))
3789 if (!kvm
->arch
.vpit
)
3791 r
= kvm_vm_ioctl_set_pit2(kvm
, &u
.ps2
);
3794 case KVM_REINJECT_CONTROL
: {
3795 struct kvm_reinject_control control
;
3797 if (copy_from_user(&control
, argp
, sizeof(control
)))
3799 r
= kvm_vm_ioctl_reinject(kvm
, &control
);
3802 case KVM_SET_BOOT_CPU_ID
:
3804 mutex_lock(&kvm
->lock
);
3805 if (atomic_read(&kvm
->online_vcpus
) != 0)
3808 kvm
->arch
.bsp_vcpu_id
= arg
;
3809 mutex_unlock(&kvm
->lock
);
3811 case KVM_XEN_HVM_CONFIG
: {
3813 if (copy_from_user(&kvm
->arch
.xen_hvm_config
, argp
,
3814 sizeof(struct kvm_xen_hvm_config
)))
3817 if (kvm
->arch
.xen_hvm_config
.flags
)
3822 case KVM_SET_CLOCK
: {
3823 struct kvm_clock_data user_ns
;
3828 if (copy_from_user(&user_ns
, argp
, sizeof(user_ns
)))
3836 local_irq_disable();
3837 now_ns
= get_kernel_ns();
3838 delta
= user_ns
.clock
- now_ns
;
3840 kvm
->arch
.kvmclock_offset
= delta
;
3841 kvm_gen_update_masterclock(kvm
);
3844 case KVM_GET_CLOCK
: {
3845 struct kvm_clock_data user_ns
;
3848 local_irq_disable();
3849 now_ns
= get_kernel_ns();
3850 user_ns
.clock
= kvm
->arch
.kvmclock_offset
+ now_ns
;
3853 memset(&user_ns
.pad
, 0, sizeof(user_ns
.pad
));
3856 if (copy_to_user(argp
, &user_ns
, sizeof(user_ns
)))
3861 case KVM_ENABLE_CAP
: {
3862 struct kvm_enable_cap cap
;
3865 if (copy_from_user(&cap
, argp
, sizeof(cap
)))
3867 r
= kvm_vm_ioctl_enable_cap(kvm
, &cap
);
3871 r
= kvm_vm_ioctl_assigned_device(kvm
, ioctl
, arg
);
3877 static void kvm_init_msr_list(void)
3882 for (i
= j
= 0; i
< ARRAY_SIZE(msrs_to_save
); i
++) {
3883 if (rdmsr_safe(msrs_to_save
[i
], &dummy
[0], &dummy
[1]) < 0)
3887 * Even MSRs that are valid in the host may not be exposed
3888 * to the guests in some cases. We could work around this
3889 * in VMX with the generic MSR save/load machinery, but it
3890 * is not really worthwhile since it will really only
3891 * happen with nested virtualization.
3893 switch (msrs_to_save
[i
]) {
3894 case MSR_IA32_BNDCFGS
:
3895 if (!kvm_x86_ops
->mpx_supported())
3903 msrs_to_save
[j
] = msrs_to_save
[i
];
3906 num_msrs_to_save
= j
;
3908 for (i
= j
= 0; i
< ARRAY_SIZE(emulated_msrs
); i
++) {
3909 switch (emulated_msrs
[i
]) {
3910 case MSR_IA32_SMBASE
:
3911 if (!kvm_x86_ops
->cpu_has_high_real_mode_segbase())
3919 emulated_msrs
[j
] = emulated_msrs
[i
];
3922 num_emulated_msrs
= j
;
3925 static int vcpu_mmio_write(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
,
3933 if (!(vcpu
->arch
.apic
&&
3934 !kvm_iodevice_write(vcpu
, &vcpu
->arch
.apic
->dev
, addr
, n
, v
))
3935 && kvm_io_bus_write(vcpu
, KVM_MMIO_BUS
, addr
, n
, v
))
3946 static int vcpu_mmio_read(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
, void *v
)
3953 if (!(vcpu
->arch
.apic
&&
3954 !kvm_iodevice_read(vcpu
, &vcpu
->arch
.apic
->dev
,
3956 && kvm_io_bus_read(vcpu
, KVM_MMIO_BUS
, addr
, n
, v
))
3958 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, n
, addr
, *(u64
*)v
);
3968 static void kvm_set_segment(struct kvm_vcpu
*vcpu
,
3969 struct kvm_segment
*var
, int seg
)
3971 kvm_x86_ops
->set_segment(vcpu
, var
, seg
);
3974 void kvm_get_segment(struct kvm_vcpu
*vcpu
,
3975 struct kvm_segment
*var
, int seg
)
3977 kvm_x86_ops
->get_segment(vcpu
, var
, seg
);
3980 gpa_t
translate_nested_gpa(struct kvm_vcpu
*vcpu
, gpa_t gpa
, u32 access
,
3981 struct x86_exception
*exception
)
3985 BUG_ON(!mmu_is_nested(vcpu
));
3987 /* NPT walks are always user-walks */
3988 access
|= PFERR_USER_MASK
;
3989 t_gpa
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, gpa
, access
, exception
);
3994 gpa_t
kvm_mmu_gva_to_gpa_read(struct kvm_vcpu
*vcpu
, gva_t gva
,
3995 struct x86_exception
*exception
)
3997 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
3998 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4001 gpa_t
kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu
*vcpu
, gva_t gva
,
4002 struct x86_exception
*exception
)
4004 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4005 access
|= PFERR_FETCH_MASK
;
4006 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4009 gpa_t
kvm_mmu_gva_to_gpa_write(struct kvm_vcpu
*vcpu
, gva_t gva
,
4010 struct x86_exception
*exception
)
4012 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4013 access
|= PFERR_WRITE_MASK
;
4014 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4017 /* uses this to access any guest's mapped memory without checking CPL */
4018 gpa_t
kvm_mmu_gva_to_gpa_system(struct kvm_vcpu
*vcpu
, gva_t gva
,
4019 struct x86_exception
*exception
)
4021 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, 0, exception
);
4024 static int kvm_read_guest_virt_helper(gva_t addr
, void *val
, unsigned int bytes
,
4025 struct kvm_vcpu
*vcpu
, u32 access
,
4026 struct x86_exception
*exception
)
4029 int r
= X86EMUL_CONTINUE
;
4032 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
, access
,
4034 unsigned offset
= addr
& (PAGE_SIZE
-1);
4035 unsigned toread
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
4038 if (gpa
== UNMAPPED_GVA
)
4039 return X86EMUL_PROPAGATE_FAULT
;
4040 ret
= kvm_vcpu_read_guest_page(vcpu
, gpa
>> PAGE_SHIFT
, data
,
4043 r
= X86EMUL_IO_NEEDED
;
4055 /* used for instruction fetching */
4056 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt
*ctxt
,
4057 gva_t addr
, void *val
, unsigned int bytes
,
4058 struct x86_exception
*exception
)
4060 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4061 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4065 /* Inline kvm_read_guest_virt_helper for speed. */
4066 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
, access
|PFERR_FETCH_MASK
,
4068 if (unlikely(gpa
== UNMAPPED_GVA
))
4069 return X86EMUL_PROPAGATE_FAULT
;
4071 offset
= addr
& (PAGE_SIZE
-1);
4072 if (WARN_ON(offset
+ bytes
> PAGE_SIZE
))
4073 bytes
= (unsigned)PAGE_SIZE
- offset
;
4074 ret
= kvm_vcpu_read_guest_page(vcpu
, gpa
>> PAGE_SHIFT
, val
,
4076 if (unlikely(ret
< 0))
4077 return X86EMUL_IO_NEEDED
;
4079 return X86EMUL_CONTINUE
;
4082 int kvm_read_guest_virt(struct x86_emulate_ctxt
*ctxt
,
4083 gva_t addr
, void *val
, unsigned int bytes
,
4084 struct x86_exception
*exception
)
4086 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4087 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4089 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, access
,
4092 EXPORT_SYMBOL_GPL(kvm_read_guest_virt
);
4094 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt
*ctxt
,
4095 gva_t addr
, void *val
, unsigned int bytes
,
4096 struct x86_exception
*exception
)
4098 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4099 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, 0, exception
);
4102 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt
*ctxt
,
4103 unsigned long addr
, void *val
, unsigned int bytes
)
4105 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4106 int r
= kvm_vcpu_read_guest(vcpu
, addr
, val
, bytes
);
4108 return r
< 0 ? X86EMUL_IO_NEEDED
: X86EMUL_CONTINUE
;
4111 int kvm_write_guest_virt_system(struct x86_emulate_ctxt
*ctxt
,
4112 gva_t addr
, void *val
,
4114 struct x86_exception
*exception
)
4116 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4118 int r
= X86EMUL_CONTINUE
;
4121 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
,
4124 unsigned offset
= addr
& (PAGE_SIZE
-1);
4125 unsigned towrite
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
4128 if (gpa
== UNMAPPED_GVA
)
4129 return X86EMUL_PROPAGATE_FAULT
;
4130 ret
= kvm_vcpu_write_guest(vcpu
, gpa
, data
, towrite
);
4132 r
= X86EMUL_IO_NEEDED
;
4143 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system
);
4145 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu
*vcpu
, unsigned long gva
,
4146 gpa_t
*gpa
, struct x86_exception
*exception
,
4149 u32 access
= ((kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0)
4150 | (write
? PFERR_WRITE_MASK
: 0);
4152 if (vcpu_match_mmio_gva(vcpu
, gva
)
4153 && !permission_fault(vcpu
, vcpu
->arch
.walk_mmu
,
4154 vcpu
->arch
.access
, access
)) {
4155 *gpa
= vcpu
->arch
.mmio_gfn
<< PAGE_SHIFT
|
4156 (gva
& (PAGE_SIZE
- 1));
4157 trace_vcpu_match_mmio(gva
, *gpa
, write
, false);
4161 *gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4163 if (*gpa
== UNMAPPED_GVA
)
4166 /* For APIC access vmexit */
4167 if ((*gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
4170 if (vcpu_match_mmio_gpa(vcpu
, *gpa
)) {
4171 trace_vcpu_match_mmio(gva
, *gpa
, write
, true);
4178 int emulator_write_phys(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4179 const void *val
, int bytes
)
4183 ret
= kvm_vcpu_write_guest(vcpu
, gpa
, val
, bytes
);
4186 kvm_mmu_pte_write(vcpu
, gpa
, val
, bytes
);
4190 struct read_write_emulator_ops
{
4191 int (*read_write_prepare
)(struct kvm_vcpu
*vcpu
, void *val
,
4193 int (*read_write_emulate
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4194 void *val
, int bytes
);
4195 int (*read_write_mmio
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4196 int bytes
, void *val
);
4197 int (*read_write_exit_mmio
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4198 void *val
, int bytes
);
4202 static int read_prepare(struct kvm_vcpu
*vcpu
, void *val
, int bytes
)
4204 if (vcpu
->mmio_read_completed
) {
4205 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, bytes
,
4206 vcpu
->mmio_fragments
[0].gpa
, *(u64
*)val
);
4207 vcpu
->mmio_read_completed
= 0;
4214 static int read_emulate(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4215 void *val
, int bytes
)
4217 return !kvm_vcpu_read_guest(vcpu
, gpa
, val
, bytes
);
4220 static int write_emulate(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4221 void *val
, int bytes
)
4223 return emulator_write_phys(vcpu
, gpa
, val
, bytes
);
4226 static int write_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
, int bytes
, void *val
)
4228 trace_kvm_mmio(KVM_TRACE_MMIO_WRITE
, bytes
, gpa
, *(u64
*)val
);
4229 return vcpu_mmio_write(vcpu
, gpa
, bytes
, val
);
4232 static int read_exit_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4233 void *val
, int bytes
)
4235 trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED
, bytes
, gpa
, 0);
4236 return X86EMUL_IO_NEEDED
;
4239 static int write_exit_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4240 void *val
, int bytes
)
4242 struct kvm_mmio_fragment
*frag
= &vcpu
->mmio_fragments
[0];
4244 memcpy(vcpu
->run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
4245 return X86EMUL_CONTINUE
;
4248 static const struct read_write_emulator_ops read_emultor
= {
4249 .read_write_prepare
= read_prepare
,
4250 .read_write_emulate
= read_emulate
,
4251 .read_write_mmio
= vcpu_mmio_read
,
4252 .read_write_exit_mmio
= read_exit_mmio
,
4255 static const struct read_write_emulator_ops write_emultor
= {
4256 .read_write_emulate
= write_emulate
,
4257 .read_write_mmio
= write_mmio
,
4258 .read_write_exit_mmio
= write_exit_mmio
,
4262 static int emulator_read_write_onepage(unsigned long addr
, void *val
,
4264 struct x86_exception
*exception
,
4265 struct kvm_vcpu
*vcpu
,
4266 const struct read_write_emulator_ops
*ops
)
4270 bool write
= ops
->write
;
4271 struct kvm_mmio_fragment
*frag
;
4273 ret
= vcpu_mmio_gva_to_gpa(vcpu
, addr
, &gpa
, exception
, write
);
4276 return X86EMUL_PROPAGATE_FAULT
;
4278 /* For APIC access vmexit */
4282 if (ops
->read_write_emulate(vcpu
, gpa
, val
, bytes
))
4283 return X86EMUL_CONTINUE
;
4287 * Is this MMIO handled locally?
4289 handled
= ops
->read_write_mmio(vcpu
, gpa
, bytes
, val
);
4290 if (handled
== bytes
)
4291 return X86EMUL_CONTINUE
;
4297 WARN_ON(vcpu
->mmio_nr_fragments
>= KVM_MAX_MMIO_FRAGMENTS
);
4298 frag
= &vcpu
->mmio_fragments
[vcpu
->mmio_nr_fragments
++];
4302 return X86EMUL_CONTINUE
;
4305 static int emulator_read_write(struct x86_emulate_ctxt
*ctxt
,
4307 void *val
, unsigned int bytes
,
4308 struct x86_exception
*exception
,
4309 const struct read_write_emulator_ops
*ops
)
4311 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4315 if (ops
->read_write_prepare
&&
4316 ops
->read_write_prepare(vcpu
, val
, bytes
))
4317 return X86EMUL_CONTINUE
;
4319 vcpu
->mmio_nr_fragments
= 0;
4321 /* Crossing a page boundary? */
4322 if (((addr
+ bytes
- 1) ^ addr
) & PAGE_MASK
) {
4325 now
= -addr
& ~PAGE_MASK
;
4326 rc
= emulator_read_write_onepage(addr
, val
, now
, exception
,
4329 if (rc
!= X86EMUL_CONTINUE
)
4332 if (ctxt
->mode
!= X86EMUL_MODE_PROT64
)
4338 rc
= emulator_read_write_onepage(addr
, val
, bytes
, exception
,
4340 if (rc
!= X86EMUL_CONTINUE
)
4343 if (!vcpu
->mmio_nr_fragments
)
4346 gpa
= vcpu
->mmio_fragments
[0].gpa
;
4348 vcpu
->mmio_needed
= 1;
4349 vcpu
->mmio_cur_fragment
= 0;
4351 vcpu
->run
->mmio
.len
= min(8u, vcpu
->mmio_fragments
[0].len
);
4352 vcpu
->run
->mmio
.is_write
= vcpu
->mmio_is_write
= ops
->write
;
4353 vcpu
->run
->exit_reason
= KVM_EXIT_MMIO
;
4354 vcpu
->run
->mmio
.phys_addr
= gpa
;
4356 return ops
->read_write_exit_mmio(vcpu
, gpa
, val
, bytes
);
4359 static int emulator_read_emulated(struct x86_emulate_ctxt
*ctxt
,
4363 struct x86_exception
*exception
)
4365 return emulator_read_write(ctxt
, addr
, val
, bytes
,
4366 exception
, &read_emultor
);
4369 static int emulator_write_emulated(struct x86_emulate_ctxt
*ctxt
,
4373 struct x86_exception
*exception
)
4375 return emulator_read_write(ctxt
, addr
, (void *)val
, bytes
,
4376 exception
, &write_emultor
);
4379 #define CMPXCHG_TYPE(t, ptr, old, new) \
4380 (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
4382 #ifdef CONFIG_X86_64
4383 # define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
4385 # define CMPXCHG64(ptr, old, new) \
4386 (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
4389 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt
*ctxt
,
4394 struct x86_exception
*exception
)
4396 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4402 /* guests cmpxchg8b have to be emulated atomically */
4403 if (bytes
> 8 || (bytes
& (bytes
- 1)))
4406 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, addr
, NULL
);
4408 if (gpa
== UNMAPPED_GVA
||
4409 (gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
4412 if (((gpa
+ bytes
- 1) & PAGE_MASK
) != (gpa
& PAGE_MASK
))
4415 page
= kvm_vcpu_gfn_to_page(vcpu
, gpa
>> PAGE_SHIFT
);
4416 if (is_error_page(page
))
4419 kaddr
= kmap_atomic(page
);
4420 kaddr
+= offset_in_page(gpa
);
4423 exchanged
= CMPXCHG_TYPE(u8
, kaddr
, old
, new);
4426 exchanged
= CMPXCHG_TYPE(u16
, kaddr
, old
, new);
4429 exchanged
= CMPXCHG_TYPE(u32
, kaddr
, old
, new);
4432 exchanged
= CMPXCHG64(kaddr
, old
, new);
4437 kunmap_atomic(kaddr
);
4438 kvm_release_page_dirty(page
);
4441 return X86EMUL_CMPXCHG_FAILED
;
4443 kvm_vcpu_mark_page_dirty(vcpu
, gpa
>> PAGE_SHIFT
);
4444 kvm_mmu_pte_write(vcpu
, gpa
, new, bytes
);
4446 return X86EMUL_CONTINUE
;
4449 printk_once(KERN_WARNING
"kvm: emulating exchange as write\n");
4451 return emulator_write_emulated(ctxt
, addr
, new, bytes
, exception
);
4454 static int kernel_pio(struct kvm_vcpu
*vcpu
, void *pd
)
4456 /* TODO: String I/O for in kernel device */
4459 if (vcpu
->arch
.pio
.in
)
4460 r
= kvm_io_bus_read(vcpu
, KVM_PIO_BUS
, vcpu
->arch
.pio
.port
,
4461 vcpu
->arch
.pio
.size
, pd
);
4463 r
= kvm_io_bus_write(vcpu
, KVM_PIO_BUS
,
4464 vcpu
->arch
.pio
.port
, vcpu
->arch
.pio
.size
,
4469 static int emulator_pio_in_out(struct kvm_vcpu
*vcpu
, int size
,
4470 unsigned short port
, void *val
,
4471 unsigned int count
, bool in
)
4473 vcpu
->arch
.pio
.port
= port
;
4474 vcpu
->arch
.pio
.in
= in
;
4475 vcpu
->arch
.pio
.count
= count
;
4476 vcpu
->arch
.pio
.size
= size
;
4478 if (!kernel_pio(vcpu
, vcpu
->arch
.pio_data
)) {
4479 vcpu
->arch
.pio
.count
= 0;
4483 vcpu
->run
->exit_reason
= KVM_EXIT_IO
;
4484 vcpu
->run
->io
.direction
= in
? KVM_EXIT_IO_IN
: KVM_EXIT_IO_OUT
;
4485 vcpu
->run
->io
.size
= size
;
4486 vcpu
->run
->io
.data_offset
= KVM_PIO_PAGE_OFFSET
* PAGE_SIZE
;
4487 vcpu
->run
->io
.count
= count
;
4488 vcpu
->run
->io
.port
= port
;
4493 static int emulator_pio_in_emulated(struct x86_emulate_ctxt
*ctxt
,
4494 int size
, unsigned short port
, void *val
,
4497 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4500 if (vcpu
->arch
.pio
.count
)
4503 ret
= emulator_pio_in_out(vcpu
, size
, port
, val
, count
, true);
4506 memcpy(val
, vcpu
->arch
.pio_data
, size
* count
);
4507 trace_kvm_pio(KVM_PIO_IN
, port
, size
, count
, vcpu
->arch
.pio_data
);
4508 vcpu
->arch
.pio
.count
= 0;
4515 static int emulator_pio_out_emulated(struct x86_emulate_ctxt
*ctxt
,
4516 int size
, unsigned short port
,
4517 const void *val
, unsigned int count
)
4519 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4521 memcpy(vcpu
->arch
.pio_data
, val
, size
* count
);
4522 trace_kvm_pio(KVM_PIO_OUT
, port
, size
, count
, vcpu
->arch
.pio_data
);
4523 return emulator_pio_in_out(vcpu
, size
, port
, (void *)val
, count
, false);
4526 static unsigned long get_segment_base(struct kvm_vcpu
*vcpu
, int seg
)
4528 return kvm_x86_ops
->get_segment_base(vcpu
, seg
);
4531 static void emulator_invlpg(struct x86_emulate_ctxt
*ctxt
, ulong address
)
4533 kvm_mmu_invlpg(emul_to_vcpu(ctxt
), address
);
4536 int kvm_emulate_wbinvd_noskip(struct kvm_vcpu
*vcpu
)
4538 if (!need_emulate_wbinvd(vcpu
))
4539 return X86EMUL_CONTINUE
;
4541 if (kvm_x86_ops
->has_wbinvd_exit()) {
4542 int cpu
= get_cpu();
4544 cpumask_set_cpu(cpu
, vcpu
->arch
.wbinvd_dirty_mask
);
4545 smp_call_function_many(vcpu
->arch
.wbinvd_dirty_mask
,
4546 wbinvd_ipi
, NULL
, 1);
4548 cpumask_clear(vcpu
->arch
.wbinvd_dirty_mask
);
4551 return X86EMUL_CONTINUE
;
4554 int kvm_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
4556 kvm_x86_ops
->skip_emulated_instruction(vcpu
);
4557 return kvm_emulate_wbinvd_noskip(vcpu
);
4559 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd
);
4563 static void emulator_wbinvd(struct x86_emulate_ctxt
*ctxt
)
4565 kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt
));
4568 static int emulator_get_dr(struct x86_emulate_ctxt
*ctxt
, int dr
,
4569 unsigned long *dest
)
4571 return kvm_get_dr(emul_to_vcpu(ctxt
), dr
, dest
);
4574 static int emulator_set_dr(struct x86_emulate_ctxt
*ctxt
, int dr
,
4575 unsigned long value
)
4578 return __kvm_set_dr(emul_to_vcpu(ctxt
), dr
, value
);
4581 static u64
mk_cr_64(u64 curr_cr
, u32 new_val
)
4583 return (curr_cr
& ~((1ULL << 32) - 1)) | new_val
;
4586 static unsigned long emulator_get_cr(struct x86_emulate_ctxt
*ctxt
, int cr
)
4588 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4589 unsigned long value
;
4593 value
= kvm_read_cr0(vcpu
);
4596 value
= vcpu
->arch
.cr2
;
4599 value
= kvm_read_cr3(vcpu
);
4602 value
= kvm_read_cr4(vcpu
);
4605 value
= kvm_get_cr8(vcpu
);
4608 kvm_err("%s: unexpected cr %u\n", __func__
, cr
);
4615 static int emulator_set_cr(struct x86_emulate_ctxt
*ctxt
, int cr
, ulong val
)
4617 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4622 res
= kvm_set_cr0(vcpu
, mk_cr_64(kvm_read_cr0(vcpu
), val
));
4625 vcpu
->arch
.cr2
= val
;
4628 res
= kvm_set_cr3(vcpu
, val
);
4631 res
= kvm_set_cr4(vcpu
, mk_cr_64(kvm_read_cr4(vcpu
), val
));
4634 res
= kvm_set_cr8(vcpu
, val
);
4637 kvm_err("%s: unexpected cr %u\n", __func__
, cr
);
4644 static int emulator_get_cpl(struct x86_emulate_ctxt
*ctxt
)
4646 return kvm_x86_ops
->get_cpl(emul_to_vcpu(ctxt
));
4649 static void emulator_get_gdt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
4651 kvm_x86_ops
->get_gdt(emul_to_vcpu(ctxt
), dt
);
4654 static void emulator_get_idt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
4656 kvm_x86_ops
->get_idt(emul_to_vcpu(ctxt
), dt
);
4659 static void emulator_set_gdt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
4661 kvm_x86_ops
->set_gdt(emul_to_vcpu(ctxt
), dt
);
4664 static void emulator_set_idt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
4666 kvm_x86_ops
->set_idt(emul_to_vcpu(ctxt
), dt
);
4669 static unsigned long emulator_get_cached_segment_base(
4670 struct x86_emulate_ctxt
*ctxt
, int seg
)
4672 return get_segment_base(emul_to_vcpu(ctxt
), seg
);
4675 static bool emulator_get_segment(struct x86_emulate_ctxt
*ctxt
, u16
*selector
,
4676 struct desc_struct
*desc
, u32
*base3
,
4679 struct kvm_segment var
;
4681 kvm_get_segment(emul_to_vcpu(ctxt
), &var
, seg
);
4682 *selector
= var
.selector
;
4685 memset(desc
, 0, sizeof(*desc
));
4691 set_desc_limit(desc
, var
.limit
);
4692 set_desc_base(desc
, (unsigned long)var
.base
);
4693 #ifdef CONFIG_X86_64
4695 *base3
= var
.base
>> 32;
4697 desc
->type
= var
.type
;
4699 desc
->dpl
= var
.dpl
;
4700 desc
->p
= var
.present
;
4701 desc
->avl
= var
.avl
;
4709 static void emulator_set_segment(struct x86_emulate_ctxt
*ctxt
, u16 selector
,
4710 struct desc_struct
*desc
, u32 base3
,
4713 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4714 struct kvm_segment var
;
4716 var
.selector
= selector
;
4717 var
.base
= get_desc_base(desc
);
4718 #ifdef CONFIG_X86_64
4719 var
.base
|= ((u64
)base3
) << 32;
4721 var
.limit
= get_desc_limit(desc
);
4723 var
.limit
= (var
.limit
<< 12) | 0xfff;
4724 var
.type
= desc
->type
;
4725 var
.dpl
= desc
->dpl
;
4730 var
.avl
= desc
->avl
;
4731 var
.present
= desc
->p
;
4732 var
.unusable
= !var
.present
;
4735 kvm_set_segment(vcpu
, &var
, seg
);
4739 static int emulator_get_msr(struct x86_emulate_ctxt
*ctxt
,
4740 u32 msr_index
, u64
*pdata
)
4742 struct msr_data msr
;
4745 msr
.index
= msr_index
;
4746 msr
.host_initiated
= false;
4747 r
= kvm_get_msr(emul_to_vcpu(ctxt
), &msr
);
4755 static int emulator_set_msr(struct x86_emulate_ctxt
*ctxt
,
4756 u32 msr_index
, u64 data
)
4758 struct msr_data msr
;
4761 msr
.index
= msr_index
;
4762 msr
.host_initiated
= false;
4763 return kvm_set_msr(emul_to_vcpu(ctxt
), &msr
);
4766 static u64
emulator_get_smbase(struct x86_emulate_ctxt
*ctxt
)
4768 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4770 return vcpu
->arch
.smbase
;
4773 static void emulator_set_smbase(struct x86_emulate_ctxt
*ctxt
, u64 smbase
)
4775 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4777 vcpu
->arch
.smbase
= smbase
;
4780 static int emulator_check_pmc(struct x86_emulate_ctxt
*ctxt
,
4783 return kvm_pmu_is_valid_msr_idx(emul_to_vcpu(ctxt
), pmc
);
4786 static int emulator_read_pmc(struct x86_emulate_ctxt
*ctxt
,
4787 u32 pmc
, u64
*pdata
)
4789 return kvm_pmu_rdpmc(emul_to_vcpu(ctxt
), pmc
, pdata
);
4792 static void emulator_halt(struct x86_emulate_ctxt
*ctxt
)
4794 emul_to_vcpu(ctxt
)->arch
.halt_request
= 1;
4797 static void emulator_get_fpu(struct x86_emulate_ctxt
*ctxt
)
4800 kvm_load_guest_fpu(emul_to_vcpu(ctxt
));
4802 * CR0.TS may reference the host fpu state, not the guest fpu state,
4803 * so it may be clear at this point.
4808 static void emulator_put_fpu(struct x86_emulate_ctxt
*ctxt
)
4813 static int emulator_intercept(struct x86_emulate_ctxt
*ctxt
,
4814 struct x86_instruction_info
*info
,
4815 enum x86_intercept_stage stage
)
4817 return kvm_x86_ops
->check_intercept(emul_to_vcpu(ctxt
), info
, stage
);
4820 static void emulator_get_cpuid(struct x86_emulate_ctxt
*ctxt
,
4821 u32
*eax
, u32
*ebx
, u32
*ecx
, u32
*edx
)
4823 kvm_cpuid(emul_to_vcpu(ctxt
), eax
, ebx
, ecx
, edx
);
4826 static ulong
emulator_read_gpr(struct x86_emulate_ctxt
*ctxt
, unsigned reg
)
4828 return kvm_register_read(emul_to_vcpu(ctxt
), reg
);
4831 static void emulator_write_gpr(struct x86_emulate_ctxt
*ctxt
, unsigned reg
, ulong val
)
4833 kvm_register_write(emul_to_vcpu(ctxt
), reg
, val
);
4836 static void emulator_set_nmi_mask(struct x86_emulate_ctxt
*ctxt
, bool masked
)
4838 kvm_x86_ops
->set_nmi_mask(emul_to_vcpu(ctxt
), masked
);
4841 static const struct x86_emulate_ops emulate_ops
= {
4842 .read_gpr
= emulator_read_gpr
,
4843 .write_gpr
= emulator_write_gpr
,
4844 .read_std
= kvm_read_guest_virt_system
,
4845 .write_std
= kvm_write_guest_virt_system
,
4846 .read_phys
= kvm_read_guest_phys_system
,
4847 .fetch
= kvm_fetch_guest_virt
,
4848 .read_emulated
= emulator_read_emulated
,
4849 .write_emulated
= emulator_write_emulated
,
4850 .cmpxchg_emulated
= emulator_cmpxchg_emulated
,
4851 .invlpg
= emulator_invlpg
,
4852 .pio_in_emulated
= emulator_pio_in_emulated
,
4853 .pio_out_emulated
= emulator_pio_out_emulated
,
4854 .get_segment
= emulator_get_segment
,
4855 .set_segment
= emulator_set_segment
,
4856 .get_cached_segment_base
= emulator_get_cached_segment_base
,
4857 .get_gdt
= emulator_get_gdt
,
4858 .get_idt
= emulator_get_idt
,
4859 .set_gdt
= emulator_set_gdt
,
4860 .set_idt
= emulator_set_idt
,
4861 .get_cr
= emulator_get_cr
,
4862 .set_cr
= emulator_set_cr
,
4863 .cpl
= emulator_get_cpl
,
4864 .get_dr
= emulator_get_dr
,
4865 .set_dr
= emulator_set_dr
,
4866 .get_smbase
= emulator_get_smbase
,
4867 .set_smbase
= emulator_set_smbase
,
4868 .set_msr
= emulator_set_msr
,
4869 .get_msr
= emulator_get_msr
,
4870 .check_pmc
= emulator_check_pmc
,
4871 .read_pmc
= emulator_read_pmc
,
4872 .halt
= emulator_halt
,
4873 .wbinvd
= emulator_wbinvd
,
4874 .fix_hypercall
= emulator_fix_hypercall
,
4875 .get_fpu
= emulator_get_fpu
,
4876 .put_fpu
= emulator_put_fpu
,
4877 .intercept
= emulator_intercept
,
4878 .get_cpuid
= emulator_get_cpuid
,
4879 .set_nmi_mask
= emulator_set_nmi_mask
,
4882 static void toggle_interruptibility(struct kvm_vcpu
*vcpu
, u32 mask
)
4884 u32 int_shadow
= kvm_x86_ops
->get_interrupt_shadow(vcpu
);
4886 * an sti; sti; sequence only disable interrupts for the first
4887 * instruction. So, if the last instruction, be it emulated or
4888 * not, left the system with the INT_STI flag enabled, it
4889 * means that the last instruction is an sti. We should not
4890 * leave the flag on in this case. The same goes for mov ss
4892 if (int_shadow
& mask
)
4894 if (unlikely(int_shadow
|| mask
)) {
4895 kvm_x86_ops
->set_interrupt_shadow(vcpu
, mask
);
4897 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
4901 static bool inject_emulated_exception(struct kvm_vcpu
*vcpu
)
4903 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
4904 if (ctxt
->exception
.vector
== PF_VECTOR
)
4905 return kvm_propagate_fault(vcpu
, &ctxt
->exception
);
4907 if (ctxt
->exception
.error_code_valid
)
4908 kvm_queue_exception_e(vcpu
, ctxt
->exception
.vector
,
4909 ctxt
->exception
.error_code
);
4911 kvm_queue_exception(vcpu
, ctxt
->exception
.vector
);
4915 static void init_emulate_ctxt(struct kvm_vcpu
*vcpu
)
4917 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
4920 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
4922 ctxt
->eflags
= kvm_get_rflags(vcpu
);
4923 ctxt
->eip
= kvm_rip_read(vcpu
);
4924 ctxt
->mode
= (!is_protmode(vcpu
)) ? X86EMUL_MODE_REAL
:
4925 (ctxt
->eflags
& X86_EFLAGS_VM
) ? X86EMUL_MODE_VM86
:
4926 (cs_l
&& is_long_mode(vcpu
)) ? X86EMUL_MODE_PROT64
:
4927 cs_db
? X86EMUL_MODE_PROT32
:
4928 X86EMUL_MODE_PROT16
;
4929 BUILD_BUG_ON(HF_GUEST_MASK
!= X86EMUL_GUEST_MASK
);
4930 BUILD_BUG_ON(HF_SMM_MASK
!= X86EMUL_SMM_MASK
);
4931 BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK
!= X86EMUL_SMM_INSIDE_NMI_MASK
);
4932 ctxt
->emul_flags
= vcpu
->arch
.hflags
;
4934 init_decode_cache(ctxt
);
4935 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= false;
4938 int kvm_inject_realmode_interrupt(struct kvm_vcpu
*vcpu
, int irq
, int inc_eip
)
4940 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
4943 init_emulate_ctxt(vcpu
);
4947 ctxt
->_eip
= ctxt
->eip
+ inc_eip
;
4948 ret
= emulate_int_real(ctxt
, irq
);
4950 if (ret
!= X86EMUL_CONTINUE
)
4951 return EMULATE_FAIL
;
4953 ctxt
->eip
= ctxt
->_eip
;
4954 kvm_rip_write(vcpu
, ctxt
->eip
);
4955 kvm_set_rflags(vcpu
, ctxt
->eflags
);
4957 if (irq
== NMI_VECTOR
)
4958 vcpu
->arch
.nmi_pending
= 0;
4960 vcpu
->arch
.interrupt
.pending
= false;
4962 return EMULATE_DONE
;
4964 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt
);
4966 static int handle_emulation_failure(struct kvm_vcpu
*vcpu
)
4968 int r
= EMULATE_DONE
;
4970 ++vcpu
->stat
.insn_emulation_fail
;
4971 trace_kvm_emulate_insn_failed(vcpu
);
4972 if (!is_guest_mode(vcpu
) && kvm_x86_ops
->get_cpl(vcpu
) == 0) {
4973 vcpu
->run
->exit_reason
= KVM_EXIT_INTERNAL_ERROR
;
4974 vcpu
->run
->internal
.suberror
= KVM_INTERNAL_ERROR_EMULATION
;
4975 vcpu
->run
->internal
.ndata
= 0;
4978 kvm_queue_exception(vcpu
, UD_VECTOR
);
4983 static bool reexecute_instruction(struct kvm_vcpu
*vcpu
, gva_t cr2
,
4984 bool write_fault_to_shadow_pgtable
,
4990 if (emulation_type
& EMULTYPE_NO_REEXECUTE
)
4993 if (!vcpu
->arch
.mmu
.direct_map
) {
4995 * Write permission should be allowed since only
4996 * write access need to be emulated.
4998 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, cr2
, NULL
);
5001 * If the mapping is invalid in guest, let cpu retry
5002 * it to generate fault.
5004 if (gpa
== UNMAPPED_GVA
)
5009 * Do not retry the unhandleable instruction if it faults on the
5010 * readonly host memory, otherwise it will goto a infinite loop:
5011 * retry instruction -> write #PF -> emulation fail -> retry
5012 * instruction -> ...
5014 pfn
= gfn_to_pfn(vcpu
->kvm
, gpa_to_gfn(gpa
));
5017 * If the instruction failed on the error pfn, it can not be fixed,
5018 * report the error to userspace.
5020 if (is_error_noslot_pfn(pfn
))
5023 kvm_release_pfn_clean(pfn
);
5025 /* The instructions are well-emulated on direct mmu. */
5026 if (vcpu
->arch
.mmu
.direct_map
) {
5027 unsigned int indirect_shadow_pages
;
5029 spin_lock(&vcpu
->kvm
->mmu_lock
);
5030 indirect_shadow_pages
= vcpu
->kvm
->arch
.indirect_shadow_pages
;
5031 spin_unlock(&vcpu
->kvm
->mmu_lock
);
5033 if (indirect_shadow_pages
)
5034 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
5040 * if emulation was due to access to shadowed page table
5041 * and it failed try to unshadow page and re-enter the
5042 * guest to let CPU execute the instruction.
5044 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
5047 * If the access faults on its page table, it can not
5048 * be fixed by unprotecting shadow page and it should
5049 * be reported to userspace.
5051 return !write_fault_to_shadow_pgtable
;
5054 static bool retry_instruction(struct x86_emulate_ctxt
*ctxt
,
5055 unsigned long cr2
, int emulation_type
)
5057 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5058 unsigned long last_retry_eip
, last_retry_addr
, gpa
= cr2
;
5060 last_retry_eip
= vcpu
->arch
.last_retry_eip
;
5061 last_retry_addr
= vcpu
->arch
.last_retry_addr
;
5064 * If the emulation is caused by #PF and it is non-page_table
5065 * writing instruction, it means the VM-EXIT is caused by shadow
5066 * page protected, we can zap the shadow page and retry this
5067 * instruction directly.
5069 * Note: if the guest uses a non-page-table modifying instruction
5070 * on the PDE that points to the instruction, then we will unmap
5071 * the instruction and go to an infinite loop. So, we cache the
5072 * last retried eip and the last fault address, if we meet the eip
5073 * and the address again, we can break out of the potential infinite
5076 vcpu
->arch
.last_retry_eip
= vcpu
->arch
.last_retry_addr
= 0;
5078 if (!(emulation_type
& EMULTYPE_RETRY
))
5081 if (x86_page_table_writing_insn(ctxt
))
5084 if (ctxt
->eip
== last_retry_eip
&& last_retry_addr
== cr2
)
5087 vcpu
->arch
.last_retry_eip
= ctxt
->eip
;
5088 vcpu
->arch
.last_retry_addr
= cr2
;
5090 if (!vcpu
->arch
.mmu
.direct_map
)
5091 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, cr2
, NULL
);
5093 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
5098 static int complete_emulated_mmio(struct kvm_vcpu
*vcpu
);
5099 static int complete_emulated_pio(struct kvm_vcpu
*vcpu
);
5101 static void kvm_smm_changed(struct kvm_vcpu
*vcpu
)
5103 if (!(vcpu
->arch
.hflags
& HF_SMM_MASK
)) {
5104 /* This is a good place to trace that we are exiting SMM. */
5105 trace_kvm_enter_smm(vcpu
->vcpu_id
, vcpu
->arch
.smbase
, false);
5107 if (unlikely(vcpu
->arch
.smi_pending
)) {
5108 kvm_make_request(KVM_REQ_SMI
, vcpu
);
5109 vcpu
->arch
.smi_pending
= 0;
5111 /* Process a latched INIT, if any. */
5112 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5116 kvm_mmu_reset_context(vcpu
);
5119 static void kvm_set_hflags(struct kvm_vcpu
*vcpu
, unsigned emul_flags
)
5121 unsigned changed
= vcpu
->arch
.hflags
^ emul_flags
;
5123 vcpu
->arch
.hflags
= emul_flags
;
5125 if (changed
& HF_SMM_MASK
)
5126 kvm_smm_changed(vcpu
);
5129 static int kvm_vcpu_check_hw_bp(unsigned long addr
, u32 type
, u32 dr7
,
5138 for (i
= 0; i
< 4; i
++, enable
>>= 2, rwlen
>>= 4)
5139 if ((enable
& 3) && (rwlen
& 15) == type
&& db
[i
] == addr
)
5144 static void kvm_vcpu_check_singlestep(struct kvm_vcpu
*vcpu
, unsigned long rflags
, int *r
)
5146 struct kvm_run
*kvm_run
= vcpu
->run
;
5149 * rflags is the old, "raw" value of the flags. The new value has
5150 * not been saved yet.
5152 * This is correct even for TF set by the guest, because "the
5153 * processor will not generate this exception after the instruction
5154 * that sets the TF flag".
5156 if (unlikely(rflags
& X86_EFLAGS_TF
)) {
5157 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
) {
5158 kvm_run
->debug
.arch
.dr6
= DR6_BS
| DR6_FIXED_1
|
5160 kvm_run
->debug
.arch
.pc
= vcpu
->arch
.singlestep_rip
;
5161 kvm_run
->debug
.arch
.exception
= DB_VECTOR
;
5162 kvm_run
->exit_reason
= KVM_EXIT_DEBUG
;
5163 *r
= EMULATE_USER_EXIT
;
5165 vcpu
->arch
.emulate_ctxt
.eflags
&= ~X86_EFLAGS_TF
;
5167 * "Certain debug exceptions may clear bit 0-3. The
5168 * remaining contents of the DR6 register are never
5169 * cleared by the processor".
5171 vcpu
->arch
.dr6
&= ~15;
5172 vcpu
->arch
.dr6
|= DR6_BS
| DR6_RTM
;
5173 kvm_queue_exception(vcpu
, DB_VECTOR
);
5178 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu
*vcpu
, int *r
)
5180 if (unlikely(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
) &&
5181 (vcpu
->arch
.guest_debug_dr7
& DR7_BP_EN_MASK
)) {
5182 struct kvm_run
*kvm_run
= vcpu
->run
;
5183 unsigned long eip
= kvm_get_linear_rip(vcpu
);
5184 u32 dr6
= kvm_vcpu_check_hw_bp(eip
, 0,
5185 vcpu
->arch
.guest_debug_dr7
,
5189 kvm_run
->debug
.arch
.dr6
= dr6
| DR6_FIXED_1
| DR6_RTM
;
5190 kvm_run
->debug
.arch
.pc
= eip
;
5191 kvm_run
->debug
.arch
.exception
= DB_VECTOR
;
5192 kvm_run
->exit_reason
= KVM_EXIT_DEBUG
;
5193 *r
= EMULATE_USER_EXIT
;
5198 if (unlikely(vcpu
->arch
.dr7
& DR7_BP_EN_MASK
) &&
5199 !(kvm_get_rflags(vcpu
) & X86_EFLAGS_RF
)) {
5200 unsigned long eip
= kvm_get_linear_rip(vcpu
);
5201 u32 dr6
= kvm_vcpu_check_hw_bp(eip
, 0,
5206 vcpu
->arch
.dr6
&= ~15;
5207 vcpu
->arch
.dr6
|= dr6
| DR6_RTM
;
5208 kvm_queue_exception(vcpu
, DB_VECTOR
);
5217 int x86_emulate_instruction(struct kvm_vcpu
*vcpu
,
5224 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5225 bool writeback
= true;
5226 bool write_fault_to_spt
= vcpu
->arch
.write_fault_to_shadow_pgtable
;
5229 * Clear write_fault_to_shadow_pgtable here to ensure it is
5232 vcpu
->arch
.write_fault_to_shadow_pgtable
= false;
5233 kvm_clear_exception_queue(vcpu
);
5235 if (!(emulation_type
& EMULTYPE_NO_DECODE
)) {
5236 init_emulate_ctxt(vcpu
);
5239 * We will reenter on the same instruction since
5240 * we do not set complete_userspace_io. This does not
5241 * handle watchpoints yet, those would be handled in
5244 if (kvm_vcpu_check_breakpoint(vcpu
, &r
))
5247 ctxt
->interruptibility
= 0;
5248 ctxt
->have_exception
= false;
5249 ctxt
->exception
.vector
= -1;
5250 ctxt
->perm_ok
= false;
5252 ctxt
->ud
= emulation_type
& EMULTYPE_TRAP_UD
;
5254 r
= x86_decode_insn(ctxt
, insn
, insn_len
);
5256 trace_kvm_emulate_insn_start(vcpu
);
5257 ++vcpu
->stat
.insn_emulation
;
5258 if (r
!= EMULATION_OK
) {
5259 if (emulation_type
& EMULTYPE_TRAP_UD
)
5260 return EMULATE_FAIL
;
5261 if (reexecute_instruction(vcpu
, cr2
, write_fault_to_spt
,
5263 return EMULATE_DONE
;
5264 if (emulation_type
& EMULTYPE_SKIP
)
5265 return EMULATE_FAIL
;
5266 return handle_emulation_failure(vcpu
);
5270 if (emulation_type
& EMULTYPE_SKIP
) {
5271 kvm_rip_write(vcpu
, ctxt
->_eip
);
5272 if (ctxt
->eflags
& X86_EFLAGS_RF
)
5273 kvm_set_rflags(vcpu
, ctxt
->eflags
& ~X86_EFLAGS_RF
);
5274 return EMULATE_DONE
;
5277 if (retry_instruction(ctxt
, cr2
, emulation_type
))
5278 return EMULATE_DONE
;
5280 /* this is needed for vmware backdoor interface to work since it
5281 changes registers values during IO operation */
5282 if (vcpu
->arch
.emulate_regs_need_sync_from_vcpu
) {
5283 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= false;
5284 emulator_invalidate_register_cache(ctxt
);
5288 r
= x86_emulate_insn(ctxt
);
5290 if (r
== EMULATION_INTERCEPTED
)
5291 return EMULATE_DONE
;
5293 if (r
== EMULATION_FAILED
) {
5294 if (reexecute_instruction(vcpu
, cr2
, write_fault_to_spt
,
5296 return EMULATE_DONE
;
5298 return handle_emulation_failure(vcpu
);
5301 if (ctxt
->have_exception
) {
5303 if (inject_emulated_exception(vcpu
))
5305 } else if (vcpu
->arch
.pio
.count
) {
5306 if (!vcpu
->arch
.pio
.in
) {
5307 /* FIXME: return into emulator if single-stepping. */
5308 vcpu
->arch
.pio
.count
= 0;
5311 vcpu
->arch
.complete_userspace_io
= complete_emulated_pio
;
5313 r
= EMULATE_USER_EXIT
;
5314 } else if (vcpu
->mmio_needed
) {
5315 if (!vcpu
->mmio_is_write
)
5317 r
= EMULATE_USER_EXIT
;
5318 vcpu
->arch
.complete_userspace_io
= complete_emulated_mmio
;
5319 } else if (r
== EMULATION_RESTART
)
5325 unsigned long rflags
= kvm_x86_ops
->get_rflags(vcpu
);
5326 toggle_interruptibility(vcpu
, ctxt
->interruptibility
);
5327 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
5328 if (vcpu
->arch
.hflags
!= ctxt
->emul_flags
)
5329 kvm_set_hflags(vcpu
, ctxt
->emul_flags
);
5330 kvm_rip_write(vcpu
, ctxt
->eip
);
5331 if (r
== EMULATE_DONE
)
5332 kvm_vcpu_check_singlestep(vcpu
, rflags
, &r
);
5333 if (!ctxt
->have_exception
||
5334 exception_type(ctxt
->exception
.vector
) == EXCPT_TRAP
)
5335 __kvm_set_rflags(vcpu
, ctxt
->eflags
);
5338 * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
5339 * do nothing, and it will be requested again as soon as
5340 * the shadow expires. But we still need to check here,
5341 * because POPF has no interrupt shadow.
5343 if (unlikely((ctxt
->eflags
& ~rflags
) & X86_EFLAGS_IF
))
5344 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5346 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= true;
5350 EXPORT_SYMBOL_GPL(x86_emulate_instruction
);
5352 int kvm_fast_pio_out(struct kvm_vcpu
*vcpu
, int size
, unsigned short port
)
5354 unsigned long val
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
5355 int ret
= emulator_pio_out_emulated(&vcpu
->arch
.emulate_ctxt
,
5356 size
, port
, &val
, 1);
5357 /* do not return to emulator after return from userspace */
5358 vcpu
->arch
.pio
.count
= 0;
5361 EXPORT_SYMBOL_GPL(kvm_fast_pio_out
);
5363 static void tsc_bad(void *info
)
5365 __this_cpu_write(cpu_tsc_khz
, 0);
5368 static void tsc_khz_changed(void *data
)
5370 struct cpufreq_freqs
*freq
= data
;
5371 unsigned long khz
= 0;
5375 else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
5376 khz
= cpufreq_quick_get(raw_smp_processor_id());
5379 __this_cpu_write(cpu_tsc_khz
, khz
);
5382 static int kvmclock_cpufreq_notifier(struct notifier_block
*nb
, unsigned long val
,
5385 struct cpufreq_freqs
*freq
= data
;
5387 struct kvm_vcpu
*vcpu
;
5388 int i
, send_ipi
= 0;
5391 * We allow guests to temporarily run on slowing clocks,
5392 * provided we notify them after, or to run on accelerating
5393 * clocks, provided we notify them before. Thus time never
5396 * However, we have a problem. We can't atomically update
5397 * the frequency of a given CPU from this function; it is
5398 * merely a notifier, which can be called from any CPU.
5399 * Changing the TSC frequency at arbitrary points in time
5400 * requires a recomputation of local variables related to
5401 * the TSC for each VCPU. We must flag these local variables
5402 * to be updated and be sure the update takes place with the
5403 * new frequency before any guests proceed.
5405 * Unfortunately, the combination of hotplug CPU and frequency
5406 * change creates an intractable locking scenario; the order
5407 * of when these callouts happen is undefined with respect to
5408 * CPU hotplug, and they can race with each other. As such,
5409 * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
5410 * undefined; you can actually have a CPU frequency change take
5411 * place in between the computation of X and the setting of the
5412 * variable. To protect against this problem, all updates of
5413 * the per_cpu tsc_khz variable are done in an interrupt
5414 * protected IPI, and all callers wishing to update the value
5415 * must wait for a synchronous IPI to complete (which is trivial
5416 * if the caller is on the CPU already). This establishes the
5417 * necessary total order on variable updates.
5419 * Note that because a guest time update may take place
5420 * anytime after the setting of the VCPU's request bit, the
5421 * correct TSC value must be set before the request. However,
5422 * to ensure the update actually makes it to any guest which
5423 * starts running in hardware virtualization between the set
5424 * and the acquisition of the spinlock, we must also ping the
5425 * CPU after setting the request bit.
5429 if (val
== CPUFREQ_PRECHANGE
&& freq
->old
> freq
->new)
5431 if (val
== CPUFREQ_POSTCHANGE
&& freq
->old
< freq
->new)
5434 smp_call_function_single(freq
->cpu
, tsc_khz_changed
, freq
, 1);
5436 spin_lock(&kvm_lock
);
5437 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
5438 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
5439 if (vcpu
->cpu
!= freq
->cpu
)
5441 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
5442 if (vcpu
->cpu
!= smp_processor_id())
5446 spin_unlock(&kvm_lock
);
5448 if (freq
->old
< freq
->new && send_ipi
) {
5450 * We upscale the frequency. Must make the guest
5451 * doesn't see old kvmclock values while running with
5452 * the new frequency, otherwise we risk the guest sees
5453 * time go backwards.
5455 * In case we update the frequency for another cpu
5456 * (which might be in guest context) send an interrupt
5457 * to kick the cpu out of guest context. Next time
5458 * guest context is entered kvmclock will be updated,
5459 * so the guest will not see stale values.
5461 smp_call_function_single(freq
->cpu
, tsc_khz_changed
, freq
, 1);
5466 static struct notifier_block kvmclock_cpufreq_notifier_block
= {
5467 .notifier_call
= kvmclock_cpufreq_notifier
5470 static int kvmclock_cpu_notifier(struct notifier_block
*nfb
,
5471 unsigned long action
, void *hcpu
)
5473 unsigned int cpu
= (unsigned long)hcpu
;
5477 case CPU_DOWN_FAILED
:
5478 smp_call_function_single(cpu
, tsc_khz_changed
, NULL
, 1);
5480 case CPU_DOWN_PREPARE
:
5481 smp_call_function_single(cpu
, tsc_bad
, NULL
, 1);
5487 static struct notifier_block kvmclock_cpu_notifier_block
= {
5488 .notifier_call
= kvmclock_cpu_notifier
,
5489 .priority
= -INT_MAX
5492 static void kvm_timer_init(void)
5496 max_tsc_khz
= tsc_khz
;
5498 cpu_notifier_register_begin();
5499 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
)) {
5500 #ifdef CONFIG_CPU_FREQ
5501 struct cpufreq_policy policy
;
5502 memset(&policy
, 0, sizeof(policy
));
5504 cpufreq_get_policy(&policy
, cpu
);
5505 if (policy
.cpuinfo
.max_freq
)
5506 max_tsc_khz
= policy
.cpuinfo
.max_freq
;
5509 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block
,
5510 CPUFREQ_TRANSITION_NOTIFIER
);
5512 pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz
);
5513 for_each_online_cpu(cpu
)
5514 smp_call_function_single(cpu
, tsc_khz_changed
, NULL
, 1);
5516 __register_hotcpu_notifier(&kvmclock_cpu_notifier_block
);
5517 cpu_notifier_register_done();
5521 static DEFINE_PER_CPU(struct kvm_vcpu
*, current_vcpu
);
5523 int kvm_is_in_guest(void)
5525 return __this_cpu_read(current_vcpu
) != NULL
;
5528 static int kvm_is_user_mode(void)
5532 if (__this_cpu_read(current_vcpu
))
5533 user_mode
= kvm_x86_ops
->get_cpl(__this_cpu_read(current_vcpu
));
5535 return user_mode
!= 0;
5538 static unsigned long kvm_get_guest_ip(void)
5540 unsigned long ip
= 0;
5542 if (__this_cpu_read(current_vcpu
))
5543 ip
= kvm_rip_read(__this_cpu_read(current_vcpu
));
5548 static struct perf_guest_info_callbacks kvm_guest_cbs
= {
5549 .is_in_guest
= kvm_is_in_guest
,
5550 .is_user_mode
= kvm_is_user_mode
,
5551 .get_guest_ip
= kvm_get_guest_ip
,
5554 void kvm_before_handle_nmi(struct kvm_vcpu
*vcpu
)
5556 __this_cpu_write(current_vcpu
, vcpu
);
5558 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi
);
5560 void kvm_after_handle_nmi(struct kvm_vcpu
*vcpu
)
5562 __this_cpu_write(current_vcpu
, NULL
);
5564 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi
);
5566 static void kvm_set_mmio_spte_mask(void)
5569 int maxphyaddr
= boot_cpu_data
.x86_phys_bits
;
5572 * Set the reserved bits and the present bit of an paging-structure
5573 * entry to generate page fault with PFER.RSV = 1.
5575 /* Mask the reserved physical address bits. */
5576 mask
= rsvd_bits(maxphyaddr
, 51);
5578 /* Bit 62 is always reserved for 32bit host. */
5579 mask
|= 0x3ull
<< 62;
5581 /* Set the present bit. */
5584 #ifdef CONFIG_X86_64
5586 * If reserved bit is not supported, clear the present bit to disable
5589 if (maxphyaddr
== 52)
5593 kvm_mmu_set_mmio_spte_mask(mask
);
5596 #ifdef CONFIG_X86_64
5597 static void pvclock_gtod_update_fn(struct work_struct
*work
)
5601 struct kvm_vcpu
*vcpu
;
5604 spin_lock(&kvm_lock
);
5605 list_for_each_entry(kvm
, &vm_list
, vm_list
)
5606 kvm_for_each_vcpu(i
, vcpu
, kvm
)
5607 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
5608 atomic_set(&kvm_guest_has_master_clock
, 0);
5609 spin_unlock(&kvm_lock
);
5612 static DECLARE_WORK(pvclock_gtod_work
, pvclock_gtod_update_fn
);
5615 * Notification about pvclock gtod data update.
5617 static int pvclock_gtod_notify(struct notifier_block
*nb
, unsigned long unused
,
5620 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
5621 struct timekeeper
*tk
= priv
;
5623 update_pvclock_gtod(tk
);
5625 /* disable master clock if host does not trust, or does not
5626 * use, TSC clocksource
5628 if (gtod
->clock
.vclock_mode
!= VCLOCK_TSC
&&
5629 atomic_read(&kvm_guest_has_master_clock
) != 0)
5630 queue_work(system_long_wq
, &pvclock_gtod_work
);
5635 static struct notifier_block pvclock_gtod_notifier
= {
5636 .notifier_call
= pvclock_gtod_notify
,
5640 int kvm_arch_init(void *opaque
)
5643 struct kvm_x86_ops
*ops
= opaque
;
5646 printk(KERN_ERR
"kvm: already loaded the other module\n");
5651 if (!ops
->cpu_has_kvm_support()) {
5652 printk(KERN_ERR
"kvm: no hardware support\n");
5656 if (ops
->disabled_by_bios()) {
5657 printk(KERN_ERR
"kvm: disabled by bios\n");
5663 shared_msrs
= alloc_percpu(struct kvm_shared_msrs
);
5665 printk(KERN_ERR
"kvm: failed to allocate percpu kvm_shared_msrs\n");
5669 r
= kvm_mmu_module_init();
5671 goto out_free_percpu
;
5673 kvm_set_mmio_spte_mask();
5677 kvm_mmu_set_mask_ptes(PT_USER_MASK
, PT_ACCESSED_MASK
,
5678 PT_DIRTY_MASK
, PT64_NX_MASK
, 0);
5682 perf_register_guest_info_callbacks(&kvm_guest_cbs
);
5685 host_xcr0
= xgetbv(XCR_XFEATURE_ENABLED_MASK
);
5688 #ifdef CONFIG_X86_64
5689 pvclock_gtod_register_notifier(&pvclock_gtod_notifier
);
5695 free_percpu(shared_msrs
);
5700 void kvm_arch_exit(void)
5702 perf_unregister_guest_info_callbacks(&kvm_guest_cbs
);
5704 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
5705 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block
,
5706 CPUFREQ_TRANSITION_NOTIFIER
);
5707 unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block
);
5708 #ifdef CONFIG_X86_64
5709 pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier
);
5712 kvm_mmu_module_exit();
5713 free_percpu(shared_msrs
);
5716 int kvm_vcpu_halt(struct kvm_vcpu
*vcpu
)
5718 ++vcpu
->stat
.halt_exits
;
5719 if (lapic_in_kernel(vcpu
)) {
5720 vcpu
->arch
.mp_state
= KVM_MP_STATE_HALTED
;
5723 vcpu
->run
->exit_reason
= KVM_EXIT_HLT
;
5727 EXPORT_SYMBOL_GPL(kvm_vcpu_halt
);
5729 int kvm_emulate_halt(struct kvm_vcpu
*vcpu
)
5731 kvm_x86_ops
->skip_emulated_instruction(vcpu
);
5732 return kvm_vcpu_halt(vcpu
);
5734 EXPORT_SYMBOL_GPL(kvm_emulate_halt
);
5737 * kvm_pv_kick_cpu_op: Kick a vcpu.
5739 * @apicid - apicid of vcpu to be kicked.
5741 static void kvm_pv_kick_cpu_op(struct kvm
*kvm
, unsigned long flags
, int apicid
)
5743 struct kvm_lapic_irq lapic_irq
;
5745 lapic_irq
.shorthand
= 0;
5746 lapic_irq
.dest_mode
= 0;
5747 lapic_irq
.dest_id
= apicid
;
5748 lapic_irq
.msi_redir_hint
= false;
5750 lapic_irq
.delivery_mode
= APIC_DM_REMRD
;
5751 kvm_irq_delivery_to_apic(kvm
, NULL
, &lapic_irq
, NULL
);
5754 int kvm_emulate_hypercall(struct kvm_vcpu
*vcpu
)
5756 unsigned long nr
, a0
, a1
, a2
, a3
, ret
;
5757 int op_64_bit
, r
= 1;
5759 kvm_x86_ops
->skip_emulated_instruction(vcpu
);
5761 if (kvm_hv_hypercall_enabled(vcpu
->kvm
))
5762 return kvm_hv_hypercall(vcpu
);
5764 nr
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
5765 a0
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
5766 a1
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
5767 a2
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
5768 a3
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
5770 trace_kvm_hypercall(nr
, a0
, a1
, a2
, a3
);
5772 op_64_bit
= is_64_bit_mode(vcpu
);
5781 if (kvm_x86_ops
->get_cpl(vcpu
) != 0) {
5787 case KVM_HC_VAPIC_POLL_IRQ
:
5790 case KVM_HC_KICK_CPU
:
5791 kvm_pv_kick_cpu_op(vcpu
->kvm
, a0
, a1
);
5801 kvm_register_write(vcpu
, VCPU_REGS_RAX
, ret
);
5802 ++vcpu
->stat
.hypercalls
;
5805 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall
);
5807 static int emulator_fix_hypercall(struct x86_emulate_ctxt
*ctxt
)
5809 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5810 char instruction
[3];
5811 unsigned long rip
= kvm_rip_read(vcpu
);
5813 kvm_x86_ops
->patch_hypercall(vcpu
, instruction
);
5815 return emulator_write_emulated(ctxt
, rip
, instruction
, 3, NULL
);
5819 * Check if userspace requested an interrupt window, and that the
5820 * interrupt window is open.
5822 * No need to exit to userspace if we already have an interrupt queued.
5824 static int dm_request_for_irq_injection(struct kvm_vcpu
*vcpu
)
5826 if (!vcpu
->run
->request_interrupt_window
|| pic_in_kernel(vcpu
->kvm
))
5829 if (kvm_cpu_has_interrupt(vcpu
))
5832 return (irqchip_split(vcpu
->kvm
)
5833 ? kvm_apic_accept_pic_intr(vcpu
)
5834 : kvm_arch_interrupt_allowed(vcpu
));
5837 static void post_kvm_run_save(struct kvm_vcpu
*vcpu
)
5839 struct kvm_run
*kvm_run
= vcpu
->run
;
5841 kvm_run
->if_flag
= (kvm_get_rflags(vcpu
) & X86_EFLAGS_IF
) != 0;
5842 kvm_run
->flags
= is_smm(vcpu
) ? KVM_RUN_X86_SMM
: 0;
5843 kvm_run
->cr8
= kvm_get_cr8(vcpu
);
5844 kvm_run
->apic_base
= kvm_get_apic_base(vcpu
);
5845 if (!irqchip_in_kernel(vcpu
->kvm
))
5846 kvm_run
->ready_for_interrupt_injection
=
5847 kvm_arch_interrupt_allowed(vcpu
) &&
5848 !kvm_cpu_has_interrupt(vcpu
) &&
5849 !kvm_event_needs_reinjection(vcpu
);
5850 else if (!pic_in_kernel(vcpu
->kvm
))
5851 kvm_run
->ready_for_interrupt_injection
=
5852 kvm_apic_accept_pic_intr(vcpu
) &&
5853 !kvm_cpu_has_interrupt(vcpu
);
5855 kvm_run
->ready_for_interrupt_injection
= 1;
5858 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
)
5862 if (!kvm_x86_ops
->update_cr8_intercept
)
5865 if (!vcpu
->arch
.apic
)
5868 if (!vcpu
->arch
.apic
->vapic_addr
)
5869 max_irr
= kvm_lapic_find_highest_irr(vcpu
);
5876 tpr
= kvm_lapic_get_cr8(vcpu
);
5878 kvm_x86_ops
->update_cr8_intercept(vcpu
, tpr
, max_irr
);
5881 static int inject_pending_event(struct kvm_vcpu
*vcpu
, bool req_int_win
)
5885 /* try to reinject previous events if any */
5886 if (vcpu
->arch
.exception
.pending
) {
5887 trace_kvm_inj_exception(vcpu
->arch
.exception
.nr
,
5888 vcpu
->arch
.exception
.has_error_code
,
5889 vcpu
->arch
.exception
.error_code
);
5891 if (exception_type(vcpu
->arch
.exception
.nr
) == EXCPT_FAULT
)
5892 __kvm_set_rflags(vcpu
, kvm_get_rflags(vcpu
) |
5895 if (vcpu
->arch
.exception
.nr
== DB_VECTOR
&&
5896 (vcpu
->arch
.dr7
& DR7_GD
)) {
5897 vcpu
->arch
.dr7
&= ~DR7_GD
;
5898 kvm_update_dr7(vcpu
);
5901 kvm_x86_ops
->queue_exception(vcpu
, vcpu
->arch
.exception
.nr
,
5902 vcpu
->arch
.exception
.has_error_code
,
5903 vcpu
->arch
.exception
.error_code
,
5904 vcpu
->arch
.exception
.reinject
);
5908 if (vcpu
->arch
.nmi_injected
) {
5909 kvm_x86_ops
->set_nmi(vcpu
);
5913 if (vcpu
->arch
.interrupt
.pending
) {
5914 kvm_x86_ops
->set_irq(vcpu
);
5918 if (is_guest_mode(vcpu
) && kvm_x86_ops
->check_nested_events
) {
5919 r
= kvm_x86_ops
->check_nested_events(vcpu
, req_int_win
);
5924 /* try to inject new event if pending */
5925 if (vcpu
->arch
.nmi_pending
) {
5926 if (kvm_x86_ops
->nmi_allowed(vcpu
)) {
5927 --vcpu
->arch
.nmi_pending
;
5928 vcpu
->arch
.nmi_injected
= true;
5929 kvm_x86_ops
->set_nmi(vcpu
);
5931 } else if (kvm_cpu_has_injectable_intr(vcpu
)) {
5933 * Because interrupts can be injected asynchronously, we are
5934 * calling check_nested_events again here to avoid a race condition.
5935 * See https://lkml.org/lkml/2014/7/2/60 for discussion about this
5936 * proposal and current concerns. Perhaps we should be setting
5937 * KVM_REQ_EVENT only on certain events and not unconditionally?
5939 if (is_guest_mode(vcpu
) && kvm_x86_ops
->check_nested_events
) {
5940 r
= kvm_x86_ops
->check_nested_events(vcpu
, req_int_win
);
5944 if (kvm_x86_ops
->interrupt_allowed(vcpu
)) {
5945 kvm_queue_interrupt(vcpu
, kvm_cpu_get_interrupt(vcpu
),
5947 kvm_x86_ops
->set_irq(vcpu
);
5953 static void process_nmi(struct kvm_vcpu
*vcpu
)
5958 * x86 is limited to one NMI running, and one NMI pending after it.
5959 * If an NMI is already in progress, limit further NMIs to just one.
5960 * Otherwise, allow two (and we'll inject the first one immediately).
5962 if (kvm_x86_ops
->get_nmi_mask(vcpu
) || vcpu
->arch
.nmi_injected
)
5965 vcpu
->arch
.nmi_pending
+= atomic_xchg(&vcpu
->arch
.nmi_queued
, 0);
5966 vcpu
->arch
.nmi_pending
= min(vcpu
->arch
.nmi_pending
, limit
);
5967 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5970 #define put_smstate(type, buf, offset, val) \
5971 *(type *)((buf) + (offset) - 0x7e00) = val
5973 static u32
process_smi_get_segment_flags(struct kvm_segment
*seg
)
5976 flags
|= seg
->g
<< 23;
5977 flags
|= seg
->db
<< 22;
5978 flags
|= seg
->l
<< 21;
5979 flags
|= seg
->avl
<< 20;
5980 flags
|= seg
->present
<< 15;
5981 flags
|= seg
->dpl
<< 13;
5982 flags
|= seg
->s
<< 12;
5983 flags
|= seg
->type
<< 8;
5987 static void process_smi_save_seg_32(struct kvm_vcpu
*vcpu
, char *buf
, int n
)
5989 struct kvm_segment seg
;
5992 kvm_get_segment(vcpu
, &seg
, n
);
5993 put_smstate(u32
, buf
, 0x7fa8 + n
* 4, seg
.selector
);
5996 offset
= 0x7f84 + n
* 12;
5998 offset
= 0x7f2c + (n
- 3) * 12;
6000 put_smstate(u32
, buf
, offset
+ 8, seg
.base
);
6001 put_smstate(u32
, buf
, offset
+ 4, seg
.limit
);
6002 put_smstate(u32
, buf
, offset
, process_smi_get_segment_flags(&seg
));
6005 #ifdef CONFIG_X86_64
6006 static void process_smi_save_seg_64(struct kvm_vcpu
*vcpu
, char *buf
, int n
)
6008 struct kvm_segment seg
;
6012 kvm_get_segment(vcpu
, &seg
, n
);
6013 offset
= 0x7e00 + n
* 16;
6015 flags
= process_smi_get_segment_flags(&seg
) >> 8;
6016 put_smstate(u16
, buf
, offset
, seg
.selector
);
6017 put_smstate(u16
, buf
, offset
+ 2, flags
);
6018 put_smstate(u32
, buf
, offset
+ 4, seg
.limit
);
6019 put_smstate(u64
, buf
, offset
+ 8, seg
.base
);
6023 static void process_smi_save_state_32(struct kvm_vcpu
*vcpu
, char *buf
)
6026 struct kvm_segment seg
;
6030 put_smstate(u32
, buf
, 0x7ffc, kvm_read_cr0(vcpu
));
6031 put_smstate(u32
, buf
, 0x7ff8, kvm_read_cr3(vcpu
));
6032 put_smstate(u32
, buf
, 0x7ff4, kvm_get_rflags(vcpu
));
6033 put_smstate(u32
, buf
, 0x7ff0, kvm_rip_read(vcpu
));
6035 for (i
= 0; i
< 8; i
++)
6036 put_smstate(u32
, buf
, 0x7fd0 + i
* 4, kvm_register_read(vcpu
, i
));
6038 kvm_get_dr(vcpu
, 6, &val
);
6039 put_smstate(u32
, buf
, 0x7fcc, (u32
)val
);
6040 kvm_get_dr(vcpu
, 7, &val
);
6041 put_smstate(u32
, buf
, 0x7fc8, (u32
)val
);
6043 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_TR
);
6044 put_smstate(u32
, buf
, 0x7fc4, seg
.selector
);
6045 put_smstate(u32
, buf
, 0x7f64, seg
.base
);
6046 put_smstate(u32
, buf
, 0x7f60, seg
.limit
);
6047 put_smstate(u32
, buf
, 0x7f5c, process_smi_get_segment_flags(&seg
));
6049 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_LDTR
);
6050 put_smstate(u32
, buf
, 0x7fc0, seg
.selector
);
6051 put_smstate(u32
, buf
, 0x7f80, seg
.base
);
6052 put_smstate(u32
, buf
, 0x7f7c, seg
.limit
);
6053 put_smstate(u32
, buf
, 0x7f78, process_smi_get_segment_flags(&seg
));
6055 kvm_x86_ops
->get_gdt(vcpu
, &dt
);
6056 put_smstate(u32
, buf
, 0x7f74, dt
.address
);
6057 put_smstate(u32
, buf
, 0x7f70, dt
.size
);
6059 kvm_x86_ops
->get_idt(vcpu
, &dt
);
6060 put_smstate(u32
, buf
, 0x7f58, dt
.address
);
6061 put_smstate(u32
, buf
, 0x7f54, dt
.size
);
6063 for (i
= 0; i
< 6; i
++)
6064 process_smi_save_seg_32(vcpu
, buf
, i
);
6066 put_smstate(u32
, buf
, 0x7f14, kvm_read_cr4(vcpu
));
6069 put_smstate(u32
, buf
, 0x7efc, 0x00020000);
6070 put_smstate(u32
, buf
, 0x7ef8, vcpu
->arch
.smbase
);
6073 static void process_smi_save_state_64(struct kvm_vcpu
*vcpu
, char *buf
)
6075 #ifdef CONFIG_X86_64
6077 struct kvm_segment seg
;
6081 for (i
= 0; i
< 16; i
++)
6082 put_smstate(u64
, buf
, 0x7ff8 - i
* 8, kvm_register_read(vcpu
, i
));
6084 put_smstate(u64
, buf
, 0x7f78, kvm_rip_read(vcpu
));
6085 put_smstate(u32
, buf
, 0x7f70, kvm_get_rflags(vcpu
));
6087 kvm_get_dr(vcpu
, 6, &val
);
6088 put_smstate(u64
, buf
, 0x7f68, val
);
6089 kvm_get_dr(vcpu
, 7, &val
);
6090 put_smstate(u64
, buf
, 0x7f60, val
);
6092 put_smstate(u64
, buf
, 0x7f58, kvm_read_cr0(vcpu
));
6093 put_smstate(u64
, buf
, 0x7f50, kvm_read_cr3(vcpu
));
6094 put_smstate(u64
, buf
, 0x7f48, kvm_read_cr4(vcpu
));
6096 put_smstate(u32
, buf
, 0x7f00, vcpu
->arch
.smbase
);
6099 put_smstate(u32
, buf
, 0x7efc, 0x00020064);
6101 put_smstate(u64
, buf
, 0x7ed0, vcpu
->arch
.efer
);
6103 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_TR
);
6104 put_smstate(u16
, buf
, 0x7e90, seg
.selector
);
6105 put_smstate(u16
, buf
, 0x7e92, process_smi_get_segment_flags(&seg
) >> 8);
6106 put_smstate(u32
, buf
, 0x7e94, seg
.limit
);
6107 put_smstate(u64
, buf
, 0x7e98, seg
.base
);
6109 kvm_x86_ops
->get_idt(vcpu
, &dt
);
6110 put_smstate(u32
, buf
, 0x7e84, dt
.size
);
6111 put_smstate(u64
, buf
, 0x7e88, dt
.address
);
6113 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_LDTR
);
6114 put_smstate(u16
, buf
, 0x7e70, seg
.selector
);
6115 put_smstate(u16
, buf
, 0x7e72, process_smi_get_segment_flags(&seg
) >> 8);
6116 put_smstate(u32
, buf
, 0x7e74, seg
.limit
);
6117 put_smstate(u64
, buf
, 0x7e78, seg
.base
);
6119 kvm_x86_ops
->get_gdt(vcpu
, &dt
);
6120 put_smstate(u32
, buf
, 0x7e64, dt
.size
);
6121 put_smstate(u64
, buf
, 0x7e68, dt
.address
);
6123 for (i
= 0; i
< 6; i
++)
6124 process_smi_save_seg_64(vcpu
, buf
, i
);
6130 static void process_smi(struct kvm_vcpu
*vcpu
)
6132 struct kvm_segment cs
, ds
;
6138 vcpu
->arch
.smi_pending
= true;
6142 trace_kvm_enter_smm(vcpu
->vcpu_id
, vcpu
->arch
.smbase
, true);
6143 vcpu
->arch
.hflags
|= HF_SMM_MASK
;
6144 memset(buf
, 0, 512);
6145 if (guest_cpuid_has_longmode(vcpu
))
6146 process_smi_save_state_64(vcpu
, buf
);
6148 process_smi_save_state_32(vcpu
, buf
);
6150 kvm_vcpu_write_guest(vcpu
, vcpu
->arch
.smbase
+ 0xfe00, buf
, sizeof(buf
));
6152 if (kvm_x86_ops
->get_nmi_mask(vcpu
))
6153 vcpu
->arch
.hflags
|= HF_SMM_INSIDE_NMI_MASK
;
6155 kvm_x86_ops
->set_nmi_mask(vcpu
, true);
6157 kvm_set_rflags(vcpu
, X86_EFLAGS_FIXED
);
6158 kvm_rip_write(vcpu
, 0x8000);
6160 cr0
= vcpu
->arch
.cr0
& ~(X86_CR0_PE
| X86_CR0_EM
| X86_CR0_TS
| X86_CR0_PG
);
6161 kvm_x86_ops
->set_cr0(vcpu
, cr0
);
6162 vcpu
->arch
.cr0
= cr0
;
6164 kvm_x86_ops
->set_cr4(vcpu
, 0);
6166 /* Undocumented: IDT limit is set to zero on entry to SMM. */
6167 dt
.address
= dt
.size
= 0;
6168 kvm_x86_ops
->set_idt(vcpu
, &dt
);
6170 __kvm_set_dr(vcpu
, 7, DR7_FIXED_1
);
6172 cs
.selector
= (vcpu
->arch
.smbase
>> 4) & 0xffff;
6173 cs
.base
= vcpu
->arch
.smbase
;
6178 cs
.limit
= ds
.limit
= 0xffffffff;
6179 cs
.type
= ds
.type
= 0x3;
6180 cs
.dpl
= ds
.dpl
= 0;
6185 cs
.avl
= ds
.avl
= 0;
6186 cs
.present
= ds
.present
= 1;
6187 cs
.unusable
= ds
.unusable
= 0;
6188 cs
.padding
= ds
.padding
= 0;
6190 kvm_set_segment(vcpu
, &cs
, VCPU_SREG_CS
);
6191 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_DS
);
6192 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_ES
);
6193 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_FS
);
6194 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_GS
);
6195 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_SS
);
6197 if (guest_cpuid_has_longmode(vcpu
))
6198 kvm_x86_ops
->set_efer(vcpu
, 0);
6200 kvm_update_cpuid(vcpu
);
6201 kvm_mmu_reset_context(vcpu
);
6204 static void vcpu_scan_ioapic(struct kvm_vcpu
*vcpu
)
6206 if (!kvm_apic_hw_enabled(vcpu
->arch
.apic
))
6209 memset(vcpu
->arch
.eoi_exit_bitmap
, 0, 256 / 8);
6211 if (irqchip_split(vcpu
->kvm
))
6212 kvm_scan_ioapic_routes(vcpu
, vcpu
->arch
.eoi_exit_bitmap
);
6214 kvm_x86_ops
->sync_pir_to_irr(vcpu
);
6215 kvm_ioapic_scan_entry(vcpu
, vcpu
->arch
.eoi_exit_bitmap
);
6217 kvm_x86_ops
->load_eoi_exitmap(vcpu
);
6220 static void kvm_vcpu_flush_tlb(struct kvm_vcpu
*vcpu
)
6222 ++vcpu
->stat
.tlb_flush
;
6223 kvm_x86_ops
->tlb_flush(vcpu
);
6226 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu
*vcpu
)
6228 struct page
*page
= NULL
;
6230 if (!lapic_in_kernel(vcpu
))
6233 if (!kvm_x86_ops
->set_apic_access_page_addr
)
6236 page
= gfn_to_page(vcpu
->kvm
, APIC_DEFAULT_PHYS_BASE
>> PAGE_SHIFT
);
6237 if (is_error_page(page
))
6239 kvm_x86_ops
->set_apic_access_page_addr(vcpu
, page_to_phys(page
));
6242 * Do not pin apic access page in memory, the MMU notifier
6243 * will call us again if it is migrated or swapped out.
6247 EXPORT_SYMBOL_GPL(kvm_vcpu_reload_apic_access_page
);
6249 void kvm_arch_mmu_notifier_invalidate_page(struct kvm
*kvm
,
6250 unsigned long address
)
6253 * The physical address of apic access page is stored in the VMCS.
6254 * Update it when it becomes invalid.
6256 if (address
== gfn_to_hva(kvm
, APIC_DEFAULT_PHYS_BASE
>> PAGE_SHIFT
))
6257 kvm_make_all_cpus_request(kvm
, KVM_REQ_APIC_PAGE_RELOAD
);
6261 * Returns 1 to let vcpu_run() continue the guest execution loop without
6262 * exiting to the userspace. Otherwise, the value will be returned to the
6265 static int vcpu_enter_guest(struct kvm_vcpu
*vcpu
)
6268 bool req_int_win
= !lapic_in_kernel(vcpu
) &&
6269 vcpu
->run
->request_interrupt_window
;
6270 bool req_immediate_exit
= false;
6272 if (vcpu
->requests
) {
6273 if (kvm_check_request(KVM_REQ_MMU_RELOAD
, vcpu
))
6274 kvm_mmu_unload(vcpu
);
6275 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER
, vcpu
))
6276 __kvm_migrate_timers(vcpu
);
6277 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
))
6278 kvm_gen_update_masterclock(vcpu
->kvm
);
6279 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
))
6280 kvm_gen_kvmclock_update(vcpu
);
6281 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE
, vcpu
)) {
6282 r
= kvm_guest_time_update(vcpu
);
6286 if (kvm_check_request(KVM_REQ_MMU_SYNC
, vcpu
))
6287 kvm_mmu_sync_roots(vcpu
);
6288 if (kvm_check_request(KVM_REQ_TLB_FLUSH
, vcpu
))
6289 kvm_vcpu_flush_tlb(vcpu
);
6290 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS
, vcpu
)) {
6291 vcpu
->run
->exit_reason
= KVM_EXIT_TPR_ACCESS
;
6295 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT
, vcpu
)) {
6296 vcpu
->run
->exit_reason
= KVM_EXIT_SHUTDOWN
;
6300 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU
, vcpu
)) {
6301 vcpu
->fpu_active
= 0;
6302 kvm_x86_ops
->fpu_deactivate(vcpu
);
6304 if (kvm_check_request(KVM_REQ_APF_HALT
, vcpu
)) {
6305 /* Page is swapped out. Do synthetic halt */
6306 vcpu
->arch
.apf
.halted
= true;
6310 if (kvm_check_request(KVM_REQ_STEAL_UPDATE
, vcpu
))
6311 record_steal_time(vcpu
);
6312 if (kvm_check_request(KVM_REQ_SMI
, vcpu
))
6314 if (kvm_check_request(KVM_REQ_NMI
, vcpu
))
6316 if (kvm_check_request(KVM_REQ_PMU
, vcpu
))
6317 kvm_pmu_handle_event(vcpu
);
6318 if (kvm_check_request(KVM_REQ_PMI
, vcpu
))
6319 kvm_pmu_deliver_pmi(vcpu
);
6320 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT
, vcpu
)) {
6321 BUG_ON(vcpu
->arch
.pending_ioapic_eoi
> 255);
6322 if (test_bit(vcpu
->arch
.pending_ioapic_eoi
,
6323 (void *) vcpu
->arch
.eoi_exit_bitmap
)) {
6324 vcpu
->run
->exit_reason
= KVM_EXIT_IOAPIC_EOI
;
6325 vcpu
->run
->eoi
.vector
=
6326 vcpu
->arch
.pending_ioapic_eoi
;
6331 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC
, vcpu
))
6332 vcpu_scan_ioapic(vcpu
);
6333 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD
, vcpu
))
6334 kvm_vcpu_reload_apic_access_page(vcpu
);
6335 if (kvm_check_request(KVM_REQ_HV_CRASH
, vcpu
)) {
6336 vcpu
->run
->exit_reason
= KVM_EXIT_SYSTEM_EVENT
;
6337 vcpu
->run
->system_event
.type
= KVM_SYSTEM_EVENT_CRASH
;
6341 if (kvm_check_request(KVM_REQ_HV_RESET
, vcpu
)) {
6342 vcpu
->run
->exit_reason
= KVM_EXIT_SYSTEM_EVENT
;
6343 vcpu
->run
->system_event
.type
= KVM_SYSTEM_EVENT_RESET
;
6350 * KVM_REQ_EVENT is not set when posted interrupts are set by
6351 * VT-d hardware, so we have to update RVI unconditionally.
6353 if (kvm_lapic_enabled(vcpu
)) {
6355 * Update architecture specific hints for APIC
6356 * virtual interrupt delivery.
6358 if (kvm_x86_ops
->hwapic_irr_update
)
6359 kvm_x86_ops
->hwapic_irr_update(vcpu
,
6360 kvm_lapic_find_highest_irr(vcpu
));
6363 if (kvm_check_request(KVM_REQ_EVENT
, vcpu
) || req_int_win
) {
6364 kvm_apic_accept_events(vcpu
);
6365 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_INIT_RECEIVED
) {
6370 if (inject_pending_event(vcpu
, req_int_win
) != 0)
6371 req_immediate_exit
= true;
6372 /* enable NMI/IRQ window open exits if needed */
6373 else if (vcpu
->arch
.nmi_pending
)
6374 kvm_x86_ops
->enable_nmi_window(vcpu
);
6375 else if (kvm_cpu_has_injectable_intr(vcpu
) || req_int_win
)
6376 kvm_x86_ops
->enable_irq_window(vcpu
);
6378 if (kvm_lapic_enabled(vcpu
)) {
6379 update_cr8_intercept(vcpu
);
6380 kvm_lapic_sync_to_vapic(vcpu
);
6384 r
= kvm_mmu_reload(vcpu
);
6386 goto cancel_injection
;
6391 kvm_x86_ops
->prepare_guest_switch(vcpu
);
6392 if (vcpu
->fpu_active
)
6393 kvm_load_guest_fpu(vcpu
);
6394 kvm_load_guest_xcr0(vcpu
);
6396 vcpu
->mode
= IN_GUEST_MODE
;
6398 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
6400 /* We should set ->mode before check ->requests,
6401 * see the comment in make_all_cpus_request.
6403 smp_mb__after_srcu_read_unlock();
6405 local_irq_disable();
6407 if (vcpu
->mode
== EXITING_GUEST_MODE
|| vcpu
->requests
6408 || need_resched() || signal_pending(current
)) {
6409 vcpu
->mode
= OUTSIDE_GUEST_MODE
;
6413 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
6415 goto cancel_injection
;
6418 if (req_immediate_exit
)
6419 smp_send_reschedule(vcpu
->cpu
);
6421 __kvm_guest_enter();
6423 if (unlikely(vcpu
->arch
.switch_db_regs
)) {
6425 set_debugreg(vcpu
->arch
.eff_db
[0], 0);
6426 set_debugreg(vcpu
->arch
.eff_db
[1], 1);
6427 set_debugreg(vcpu
->arch
.eff_db
[2], 2);
6428 set_debugreg(vcpu
->arch
.eff_db
[3], 3);
6429 set_debugreg(vcpu
->arch
.dr6
, 6);
6430 vcpu
->arch
.switch_db_regs
&= ~KVM_DEBUGREG_RELOAD
;
6433 trace_kvm_entry(vcpu
->vcpu_id
);
6434 wait_lapic_expire(vcpu
);
6435 kvm_x86_ops
->run(vcpu
);
6438 * Do this here before restoring debug registers on the host. And
6439 * since we do this before handling the vmexit, a DR access vmexit
6440 * can (a) read the correct value of the debug registers, (b) set
6441 * KVM_DEBUGREG_WONT_EXIT again.
6443 if (unlikely(vcpu
->arch
.switch_db_regs
& KVM_DEBUGREG_WONT_EXIT
)) {
6446 WARN_ON(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
);
6447 kvm_x86_ops
->sync_dirty_debug_regs(vcpu
);
6448 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
6449 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
6453 * If the guest has used debug registers, at least dr7
6454 * will be disabled while returning to the host.
6455 * If we don't have active breakpoints in the host, we don't
6456 * care about the messed up debug address registers. But if
6457 * we have some of them active, restore the old state.
6459 if (hw_breakpoint_active())
6460 hw_breakpoint_restore();
6462 vcpu
->arch
.last_guest_tsc
= kvm_x86_ops
->read_l1_tsc(vcpu
,
6465 vcpu
->mode
= OUTSIDE_GUEST_MODE
;
6468 /* Interrupt is enabled by handle_external_intr() */
6469 kvm_x86_ops
->handle_external_intr(vcpu
);
6474 * We must have an instruction between local_irq_enable() and
6475 * kvm_guest_exit(), so the timer interrupt isn't delayed by
6476 * the interrupt shadow. The stat.exits increment will do nicely.
6477 * But we need to prevent reordering, hence this barrier():
6485 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
6488 * Profile KVM exit RIPs:
6490 if (unlikely(prof_on
== KVM_PROFILING
)) {
6491 unsigned long rip
= kvm_rip_read(vcpu
);
6492 profile_hit(KVM_PROFILING
, (void *)rip
);
6495 if (unlikely(vcpu
->arch
.tsc_always_catchup
))
6496 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
6498 if (vcpu
->arch
.apic_attention
)
6499 kvm_lapic_sync_from_vapic(vcpu
);
6501 r
= kvm_x86_ops
->handle_exit(vcpu
);
6505 kvm_x86_ops
->cancel_injection(vcpu
);
6506 if (unlikely(vcpu
->arch
.apic_attention
))
6507 kvm_lapic_sync_from_vapic(vcpu
);
6512 static inline int vcpu_block(struct kvm
*kvm
, struct kvm_vcpu
*vcpu
)
6514 if (!kvm_arch_vcpu_runnable(vcpu
) &&
6515 (!kvm_x86_ops
->pre_block
|| kvm_x86_ops
->pre_block(vcpu
) == 0)) {
6516 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
6517 kvm_vcpu_block(vcpu
);
6518 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
6520 if (kvm_x86_ops
->post_block
)
6521 kvm_x86_ops
->post_block(vcpu
);
6523 if (!kvm_check_request(KVM_REQ_UNHALT
, vcpu
))
6527 kvm_apic_accept_events(vcpu
);
6528 switch(vcpu
->arch
.mp_state
) {
6529 case KVM_MP_STATE_HALTED
:
6530 vcpu
->arch
.pv
.pv_unhalted
= false;
6531 vcpu
->arch
.mp_state
=
6532 KVM_MP_STATE_RUNNABLE
;
6533 case KVM_MP_STATE_RUNNABLE
:
6534 vcpu
->arch
.apf
.halted
= false;
6536 case KVM_MP_STATE_INIT_RECEIVED
:
6545 static inline bool kvm_vcpu_running(struct kvm_vcpu
*vcpu
)
6547 return (vcpu
->arch
.mp_state
== KVM_MP_STATE_RUNNABLE
&&
6548 !vcpu
->arch
.apf
.halted
);
6551 static int vcpu_run(struct kvm_vcpu
*vcpu
)
6554 struct kvm
*kvm
= vcpu
->kvm
;
6556 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
6559 if (kvm_vcpu_running(vcpu
)) {
6560 r
= vcpu_enter_guest(vcpu
);
6562 r
= vcpu_block(kvm
, vcpu
);
6568 clear_bit(KVM_REQ_PENDING_TIMER
, &vcpu
->requests
);
6569 if (kvm_cpu_has_pending_timer(vcpu
))
6570 kvm_inject_pending_timer_irqs(vcpu
);
6572 if (dm_request_for_irq_injection(vcpu
)) {
6574 vcpu
->run
->exit_reason
= KVM_EXIT_IRQ_WINDOW_OPEN
;
6575 ++vcpu
->stat
.request_irq_exits
;
6579 kvm_check_async_pf_completion(vcpu
);
6581 if (signal_pending(current
)) {
6583 vcpu
->run
->exit_reason
= KVM_EXIT_INTR
;
6584 ++vcpu
->stat
.signal_exits
;
6587 if (need_resched()) {
6588 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
6590 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
6594 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
6599 static inline int complete_emulated_io(struct kvm_vcpu
*vcpu
)
6602 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
6603 r
= emulate_instruction(vcpu
, EMULTYPE_NO_DECODE
);
6604 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
6605 if (r
!= EMULATE_DONE
)
6610 static int complete_emulated_pio(struct kvm_vcpu
*vcpu
)
6612 BUG_ON(!vcpu
->arch
.pio
.count
);
6614 return complete_emulated_io(vcpu
);
6618 * Implements the following, as a state machine:
6622 * for each mmio piece in the fragment
6630 * for each mmio piece in the fragment
6635 static int complete_emulated_mmio(struct kvm_vcpu
*vcpu
)
6637 struct kvm_run
*run
= vcpu
->run
;
6638 struct kvm_mmio_fragment
*frag
;
6641 BUG_ON(!vcpu
->mmio_needed
);
6643 /* Complete previous fragment */
6644 frag
= &vcpu
->mmio_fragments
[vcpu
->mmio_cur_fragment
];
6645 len
= min(8u, frag
->len
);
6646 if (!vcpu
->mmio_is_write
)
6647 memcpy(frag
->data
, run
->mmio
.data
, len
);
6649 if (frag
->len
<= 8) {
6650 /* Switch to the next fragment. */
6652 vcpu
->mmio_cur_fragment
++;
6654 /* Go forward to the next mmio piece. */
6660 if (vcpu
->mmio_cur_fragment
>= vcpu
->mmio_nr_fragments
) {
6661 vcpu
->mmio_needed
= 0;
6663 /* FIXME: return into emulator if single-stepping. */
6664 if (vcpu
->mmio_is_write
)
6666 vcpu
->mmio_read_completed
= 1;
6667 return complete_emulated_io(vcpu
);
6670 run
->exit_reason
= KVM_EXIT_MMIO
;
6671 run
->mmio
.phys_addr
= frag
->gpa
;
6672 if (vcpu
->mmio_is_write
)
6673 memcpy(run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
6674 run
->mmio
.len
= min(8u, frag
->len
);
6675 run
->mmio
.is_write
= vcpu
->mmio_is_write
;
6676 vcpu
->arch
.complete_userspace_io
= complete_emulated_mmio
;
6681 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
6683 struct fpu
*fpu
= ¤t
->thread
.fpu
;
6687 fpu__activate_curr(fpu
);
6689 if (vcpu
->sigset_active
)
6690 sigprocmask(SIG_SETMASK
, &vcpu
->sigset
, &sigsaved
);
6692 if (unlikely(vcpu
->arch
.mp_state
== KVM_MP_STATE_UNINITIALIZED
)) {
6693 kvm_vcpu_block(vcpu
);
6694 kvm_apic_accept_events(vcpu
);
6695 clear_bit(KVM_REQ_UNHALT
, &vcpu
->requests
);
6700 /* re-sync apic's tpr */
6701 if (!lapic_in_kernel(vcpu
)) {
6702 if (kvm_set_cr8(vcpu
, kvm_run
->cr8
) != 0) {
6708 if (unlikely(vcpu
->arch
.complete_userspace_io
)) {
6709 int (*cui
)(struct kvm_vcpu
*) = vcpu
->arch
.complete_userspace_io
;
6710 vcpu
->arch
.complete_userspace_io
= NULL
;
6715 WARN_ON(vcpu
->arch
.pio
.count
|| vcpu
->mmio_needed
);
6720 post_kvm_run_save(vcpu
);
6721 if (vcpu
->sigset_active
)
6722 sigprocmask(SIG_SETMASK
, &sigsaved
, NULL
);
6727 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
6729 if (vcpu
->arch
.emulate_regs_need_sync_to_vcpu
) {
6731 * We are here if userspace calls get_regs() in the middle of
6732 * instruction emulation. Registers state needs to be copied
6733 * back from emulation context to vcpu. Userspace shouldn't do
6734 * that usually, but some bad designed PV devices (vmware
6735 * backdoor interface) need this to work
6737 emulator_writeback_register_cache(&vcpu
->arch
.emulate_ctxt
);
6738 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
6740 regs
->rax
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
6741 regs
->rbx
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
6742 regs
->rcx
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
6743 regs
->rdx
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
6744 regs
->rsi
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
6745 regs
->rdi
= kvm_register_read(vcpu
, VCPU_REGS_RDI
);
6746 regs
->rsp
= kvm_register_read(vcpu
, VCPU_REGS_RSP
);
6747 regs
->rbp
= kvm_register_read(vcpu
, VCPU_REGS_RBP
);
6748 #ifdef CONFIG_X86_64
6749 regs
->r8
= kvm_register_read(vcpu
, VCPU_REGS_R8
);
6750 regs
->r9
= kvm_register_read(vcpu
, VCPU_REGS_R9
);
6751 regs
->r10
= kvm_register_read(vcpu
, VCPU_REGS_R10
);
6752 regs
->r11
= kvm_register_read(vcpu
, VCPU_REGS_R11
);
6753 regs
->r12
= kvm_register_read(vcpu
, VCPU_REGS_R12
);
6754 regs
->r13
= kvm_register_read(vcpu
, VCPU_REGS_R13
);
6755 regs
->r14
= kvm_register_read(vcpu
, VCPU_REGS_R14
);
6756 regs
->r15
= kvm_register_read(vcpu
, VCPU_REGS_R15
);
6759 regs
->rip
= kvm_rip_read(vcpu
);
6760 regs
->rflags
= kvm_get_rflags(vcpu
);
6765 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
6767 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= true;
6768 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
6770 kvm_register_write(vcpu
, VCPU_REGS_RAX
, regs
->rax
);
6771 kvm_register_write(vcpu
, VCPU_REGS_RBX
, regs
->rbx
);
6772 kvm_register_write(vcpu
, VCPU_REGS_RCX
, regs
->rcx
);
6773 kvm_register_write(vcpu
, VCPU_REGS_RDX
, regs
->rdx
);
6774 kvm_register_write(vcpu
, VCPU_REGS_RSI
, regs
->rsi
);
6775 kvm_register_write(vcpu
, VCPU_REGS_RDI
, regs
->rdi
);
6776 kvm_register_write(vcpu
, VCPU_REGS_RSP
, regs
->rsp
);
6777 kvm_register_write(vcpu
, VCPU_REGS_RBP
, regs
->rbp
);
6778 #ifdef CONFIG_X86_64
6779 kvm_register_write(vcpu
, VCPU_REGS_R8
, regs
->r8
);
6780 kvm_register_write(vcpu
, VCPU_REGS_R9
, regs
->r9
);
6781 kvm_register_write(vcpu
, VCPU_REGS_R10
, regs
->r10
);
6782 kvm_register_write(vcpu
, VCPU_REGS_R11
, regs
->r11
);
6783 kvm_register_write(vcpu
, VCPU_REGS_R12
, regs
->r12
);
6784 kvm_register_write(vcpu
, VCPU_REGS_R13
, regs
->r13
);
6785 kvm_register_write(vcpu
, VCPU_REGS_R14
, regs
->r14
);
6786 kvm_register_write(vcpu
, VCPU_REGS_R15
, regs
->r15
);
6789 kvm_rip_write(vcpu
, regs
->rip
);
6790 kvm_set_rflags(vcpu
, regs
->rflags
);
6792 vcpu
->arch
.exception
.pending
= false;
6794 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6799 void kvm_get_cs_db_l_bits(struct kvm_vcpu
*vcpu
, int *db
, int *l
)
6801 struct kvm_segment cs
;
6803 kvm_get_segment(vcpu
, &cs
, VCPU_SREG_CS
);
6807 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits
);
6809 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu
*vcpu
,
6810 struct kvm_sregs
*sregs
)
6814 kvm_get_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
6815 kvm_get_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
6816 kvm_get_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
6817 kvm_get_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
6818 kvm_get_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
6819 kvm_get_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
6821 kvm_get_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
6822 kvm_get_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
6824 kvm_x86_ops
->get_idt(vcpu
, &dt
);
6825 sregs
->idt
.limit
= dt
.size
;
6826 sregs
->idt
.base
= dt
.address
;
6827 kvm_x86_ops
->get_gdt(vcpu
, &dt
);
6828 sregs
->gdt
.limit
= dt
.size
;
6829 sregs
->gdt
.base
= dt
.address
;
6831 sregs
->cr0
= kvm_read_cr0(vcpu
);
6832 sregs
->cr2
= vcpu
->arch
.cr2
;
6833 sregs
->cr3
= kvm_read_cr3(vcpu
);
6834 sregs
->cr4
= kvm_read_cr4(vcpu
);
6835 sregs
->cr8
= kvm_get_cr8(vcpu
);
6836 sregs
->efer
= vcpu
->arch
.efer
;
6837 sregs
->apic_base
= kvm_get_apic_base(vcpu
);
6839 memset(sregs
->interrupt_bitmap
, 0, sizeof sregs
->interrupt_bitmap
);
6841 if (vcpu
->arch
.interrupt
.pending
&& !vcpu
->arch
.interrupt
.soft
)
6842 set_bit(vcpu
->arch
.interrupt
.nr
,
6843 (unsigned long *)sregs
->interrupt_bitmap
);
6848 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu
*vcpu
,
6849 struct kvm_mp_state
*mp_state
)
6851 kvm_apic_accept_events(vcpu
);
6852 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_HALTED
&&
6853 vcpu
->arch
.pv
.pv_unhalted
)
6854 mp_state
->mp_state
= KVM_MP_STATE_RUNNABLE
;
6856 mp_state
->mp_state
= vcpu
->arch
.mp_state
;
6861 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu
*vcpu
,
6862 struct kvm_mp_state
*mp_state
)
6864 if (!kvm_vcpu_has_lapic(vcpu
) &&
6865 mp_state
->mp_state
!= KVM_MP_STATE_RUNNABLE
)
6868 if (mp_state
->mp_state
== KVM_MP_STATE_SIPI_RECEIVED
) {
6869 vcpu
->arch
.mp_state
= KVM_MP_STATE_INIT_RECEIVED
;
6870 set_bit(KVM_APIC_SIPI
, &vcpu
->arch
.apic
->pending_events
);
6872 vcpu
->arch
.mp_state
= mp_state
->mp_state
;
6873 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6877 int kvm_task_switch(struct kvm_vcpu
*vcpu
, u16 tss_selector
, int idt_index
,
6878 int reason
, bool has_error_code
, u32 error_code
)
6880 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
6883 init_emulate_ctxt(vcpu
);
6885 ret
= emulator_task_switch(ctxt
, tss_selector
, idt_index
, reason
,
6886 has_error_code
, error_code
);
6889 return EMULATE_FAIL
;
6891 kvm_rip_write(vcpu
, ctxt
->eip
);
6892 kvm_set_rflags(vcpu
, ctxt
->eflags
);
6893 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6894 return EMULATE_DONE
;
6896 EXPORT_SYMBOL_GPL(kvm_task_switch
);
6898 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu
*vcpu
,
6899 struct kvm_sregs
*sregs
)
6901 struct msr_data apic_base_msr
;
6902 int mmu_reset_needed
= 0;
6903 int pending_vec
, max_bits
, idx
;
6906 if (!guest_cpuid_has_xsave(vcpu
) && (sregs
->cr4
& X86_CR4_OSXSAVE
))
6909 dt
.size
= sregs
->idt
.limit
;
6910 dt
.address
= sregs
->idt
.base
;
6911 kvm_x86_ops
->set_idt(vcpu
, &dt
);
6912 dt
.size
= sregs
->gdt
.limit
;
6913 dt
.address
= sregs
->gdt
.base
;
6914 kvm_x86_ops
->set_gdt(vcpu
, &dt
);
6916 vcpu
->arch
.cr2
= sregs
->cr2
;
6917 mmu_reset_needed
|= kvm_read_cr3(vcpu
) != sregs
->cr3
;
6918 vcpu
->arch
.cr3
= sregs
->cr3
;
6919 __set_bit(VCPU_EXREG_CR3
, (ulong
*)&vcpu
->arch
.regs_avail
);
6921 kvm_set_cr8(vcpu
, sregs
->cr8
);
6923 mmu_reset_needed
|= vcpu
->arch
.efer
!= sregs
->efer
;
6924 kvm_x86_ops
->set_efer(vcpu
, sregs
->efer
);
6925 apic_base_msr
.data
= sregs
->apic_base
;
6926 apic_base_msr
.host_initiated
= true;
6927 kvm_set_apic_base(vcpu
, &apic_base_msr
);
6929 mmu_reset_needed
|= kvm_read_cr0(vcpu
) != sregs
->cr0
;
6930 kvm_x86_ops
->set_cr0(vcpu
, sregs
->cr0
);
6931 vcpu
->arch
.cr0
= sregs
->cr0
;
6933 mmu_reset_needed
|= kvm_read_cr4(vcpu
) != sregs
->cr4
;
6934 kvm_x86_ops
->set_cr4(vcpu
, sregs
->cr4
);
6935 if (sregs
->cr4
& X86_CR4_OSXSAVE
)
6936 kvm_update_cpuid(vcpu
);
6938 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
6939 if (!is_long_mode(vcpu
) && is_pae(vcpu
)) {
6940 load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, kvm_read_cr3(vcpu
));
6941 mmu_reset_needed
= 1;
6943 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
6945 if (mmu_reset_needed
)
6946 kvm_mmu_reset_context(vcpu
);
6948 max_bits
= KVM_NR_INTERRUPTS
;
6949 pending_vec
= find_first_bit(
6950 (const unsigned long *)sregs
->interrupt_bitmap
, max_bits
);
6951 if (pending_vec
< max_bits
) {
6952 kvm_queue_interrupt(vcpu
, pending_vec
, false);
6953 pr_debug("Set back pending irq %d\n", pending_vec
);
6956 kvm_set_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
6957 kvm_set_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
6958 kvm_set_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
6959 kvm_set_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
6960 kvm_set_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
6961 kvm_set_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
6963 kvm_set_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
6964 kvm_set_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
6966 update_cr8_intercept(vcpu
);
6968 /* Older userspace won't unhalt the vcpu on reset. */
6969 if (kvm_vcpu_is_bsp(vcpu
) && kvm_rip_read(vcpu
) == 0xfff0 &&
6970 sregs
->cs
.selector
== 0xf000 && sregs
->cs
.base
== 0xffff0000 &&
6972 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
6974 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6979 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu
*vcpu
,
6980 struct kvm_guest_debug
*dbg
)
6982 unsigned long rflags
;
6985 if (dbg
->control
& (KVM_GUESTDBG_INJECT_DB
| KVM_GUESTDBG_INJECT_BP
)) {
6987 if (vcpu
->arch
.exception
.pending
)
6989 if (dbg
->control
& KVM_GUESTDBG_INJECT_DB
)
6990 kvm_queue_exception(vcpu
, DB_VECTOR
);
6992 kvm_queue_exception(vcpu
, BP_VECTOR
);
6996 * Read rflags as long as potentially injected trace flags are still
6999 rflags
= kvm_get_rflags(vcpu
);
7001 vcpu
->guest_debug
= dbg
->control
;
7002 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_ENABLE
))
7003 vcpu
->guest_debug
= 0;
7005 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
) {
7006 for (i
= 0; i
< KVM_NR_DB_REGS
; ++i
)
7007 vcpu
->arch
.eff_db
[i
] = dbg
->arch
.debugreg
[i
];
7008 vcpu
->arch
.guest_debug_dr7
= dbg
->arch
.debugreg
[7];
7010 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
7011 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
7013 kvm_update_dr7(vcpu
);
7015 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
7016 vcpu
->arch
.singlestep_rip
= kvm_rip_read(vcpu
) +
7017 get_segment_base(vcpu
, VCPU_SREG_CS
);
7020 * Trigger an rflags update that will inject or remove the trace
7023 kvm_set_rflags(vcpu
, rflags
);
7025 kvm_x86_ops
->update_db_bp_intercept(vcpu
);
7035 * Translate a guest virtual address to a guest physical address.
7037 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu
*vcpu
,
7038 struct kvm_translation
*tr
)
7040 unsigned long vaddr
= tr
->linear_address
;
7044 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
7045 gpa
= kvm_mmu_gva_to_gpa_system(vcpu
, vaddr
, NULL
);
7046 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
7047 tr
->physical_address
= gpa
;
7048 tr
->valid
= gpa
!= UNMAPPED_GVA
;
7055 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
7057 struct fxregs_state
*fxsave
=
7058 &vcpu
->arch
.guest_fpu
.state
.fxsave
;
7060 memcpy(fpu
->fpr
, fxsave
->st_space
, 128);
7061 fpu
->fcw
= fxsave
->cwd
;
7062 fpu
->fsw
= fxsave
->swd
;
7063 fpu
->ftwx
= fxsave
->twd
;
7064 fpu
->last_opcode
= fxsave
->fop
;
7065 fpu
->last_ip
= fxsave
->rip
;
7066 fpu
->last_dp
= fxsave
->rdp
;
7067 memcpy(fpu
->xmm
, fxsave
->xmm_space
, sizeof fxsave
->xmm_space
);
7072 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
7074 struct fxregs_state
*fxsave
=
7075 &vcpu
->arch
.guest_fpu
.state
.fxsave
;
7077 memcpy(fxsave
->st_space
, fpu
->fpr
, 128);
7078 fxsave
->cwd
= fpu
->fcw
;
7079 fxsave
->swd
= fpu
->fsw
;
7080 fxsave
->twd
= fpu
->ftwx
;
7081 fxsave
->fop
= fpu
->last_opcode
;
7082 fxsave
->rip
= fpu
->last_ip
;
7083 fxsave
->rdp
= fpu
->last_dp
;
7084 memcpy(fxsave
->xmm_space
, fpu
->xmm
, sizeof fxsave
->xmm_space
);
7089 static void fx_init(struct kvm_vcpu
*vcpu
)
7091 fpstate_init(&vcpu
->arch
.guest_fpu
.state
);
7093 vcpu
->arch
.guest_fpu
.state
.xsave
.header
.xcomp_bv
=
7094 host_xcr0
| XSTATE_COMPACTION_ENABLED
;
7097 * Ensure guest xcr0 is valid for loading
7099 vcpu
->arch
.xcr0
= XSTATE_FP
;
7101 vcpu
->arch
.cr0
|= X86_CR0_ET
;
7104 void kvm_load_guest_fpu(struct kvm_vcpu
*vcpu
)
7106 if (vcpu
->guest_fpu_loaded
)
7110 * Restore all possible states in the guest,
7111 * and assume host would use all available bits.
7112 * Guest xcr0 would be loaded later.
7114 kvm_put_guest_xcr0(vcpu
);
7115 vcpu
->guest_fpu_loaded
= 1;
7116 __kernel_fpu_begin();
7117 __copy_kernel_to_fpregs(&vcpu
->arch
.guest_fpu
.state
);
7121 void kvm_put_guest_fpu(struct kvm_vcpu
*vcpu
)
7123 kvm_put_guest_xcr0(vcpu
);
7125 if (!vcpu
->guest_fpu_loaded
) {
7126 vcpu
->fpu_counter
= 0;
7130 vcpu
->guest_fpu_loaded
= 0;
7131 copy_fpregs_to_fpstate(&vcpu
->arch
.guest_fpu
);
7133 ++vcpu
->stat
.fpu_reload
;
7135 * If using eager FPU mode, or if the guest is a frequent user
7136 * of the FPU, just leave the FPU active for next time.
7137 * Every 255 times fpu_counter rolls over to 0; a guest that uses
7138 * the FPU in bursts will revert to loading it on demand.
7140 if (!vcpu
->arch
.eager_fpu
) {
7141 if (++vcpu
->fpu_counter
< 5)
7142 kvm_make_request(KVM_REQ_DEACTIVATE_FPU
, vcpu
);
7147 void kvm_arch_vcpu_free(struct kvm_vcpu
*vcpu
)
7149 kvmclock_reset(vcpu
);
7151 free_cpumask_var(vcpu
->arch
.wbinvd_dirty_mask
);
7152 kvm_x86_ops
->vcpu_free(vcpu
);
7155 struct kvm_vcpu
*kvm_arch_vcpu_create(struct kvm
*kvm
,
7158 struct kvm_vcpu
*vcpu
;
7160 if (check_tsc_unstable() && atomic_read(&kvm
->online_vcpus
) != 0)
7161 printk_once(KERN_WARNING
7162 "kvm: SMP vm created on host with unstable TSC; "
7163 "guest TSC will not be reliable\n");
7165 vcpu
= kvm_x86_ops
->vcpu_create(kvm
, id
);
7170 int kvm_arch_vcpu_setup(struct kvm_vcpu
*vcpu
)
7174 kvm_vcpu_mtrr_init(vcpu
);
7175 r
= vcpu_load(vcpu
);
7178 kvm_vcpu_reset(vcpu
, false);
7179 kvm_mmu_setup(vcpu
);
7184 void kvm_arch_vcpu_postcreate(struct kvm_vcpu
*vcpu
)
7186 struct msr_data msr
;
7187 struct kvm
*kvm
= vcpu
->kvm
;
7189 if (vcpu_load(vcpu
))
7192 msr
.index
= MSR_IA32_TSC
;
7193 msr
.host_initiated
= true;
7194 kvm_write_tsc(vcpu
, &msr
);
7197 if (!kvmclock_periodic_sync
)
7200 schedule_delayed_work(&kvm
->arch
.kvmclock_sync_work
,
7201 KVMCLOCK_SYNC_PERIOD
);
7204 void kvm_arch_vcpu_destroy(struct kvm_vcpu
*vcpu
)
7207 vcpu
->arch
.apf
.msr_val
= 0;
7209 r
= vcpu_load(vcpu
);
7211 kvm_mmu_unload(vcpu
);
7214 kvm_x86_ops
->vcpu_free(vcpu
);
7217 void kvm_vcpu_reset(struct kvm_vcpu
*vcpu
, bool init_event
)
7219 vcpu
->arch
.hflags
= 0;
7221 atomic_set(&vcpu
->arch
.nmi_queued
, 0);
7222 vcpu
->arch
.nmi_pending
= 0;
7223 vcpu
->arch
.nmi_injected
= false;
7224 kvm_clear_interrupt_queue(vcpu
);
7225 kvm_clear_exception_queue(vcpu
);
7227 memset(vcpu
->arch
.db
, 0, sizeof(vcpu
->arch
.db
));
7228 kvm_update_dr0123(vcpu
);
7229 vcpu
->arch
.dr6
= DR6_INIT
;
7230 kvm_update_dr6(vcpu
);
7231 vcpu
->arch
.dr7
= DR7_FIXED_1
;
7232 kvm_update_dr7(vcpu
);
7236 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7237 vcpu
->arch
.apf
.msr_val
= 0;
7238 vcpu
->arch
.st
.msr_val
= 0;
7240 kvmclock_reset(vcpu
);
7242 kvm_clear_async_pf_completion_queue(vcpu
);
7243 kvm_async_pf_hash_reset(vcpu
);
7244 vcpu
->arch
.apf
.halted
= false;
7247 kvm_pmu_reset(vcpu
);
7248 vcpu
->arch
.smbase
= 0x30000;
7251 memset(vcpu
->arch
.regs
, 0, sizeof(vcpu
->arch
.regs
));
7252 vcpu
->arch
.regs_avail
= ~0;
7253 vcpu
->arch
.regs_dirty
= ~0;
7255 kvm_x86_ops
->vcpu_reset(vcpu
, init_event
);
7258 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu
*vcpu
, u8 vector
)
7260 struct kvm_segment cs
;
7262 kvm_get_segment(vcpu
, &cs
, VCPU_SREG_CS
);
7263 cs
.selector
= vector
<< 8;
7264 cs
.base
= vector
<< 12;
7265 kvm_set_segment(vcpu
, &cs
, VCPU_SREG_CS
);
7266 kvm_rip_write(vcpu
, 0);
7269 int kvm_arch_hardware_enable(void)
7272 struct kvm_vcpu
*vcpu
;
7277 bool stable
, backwards_tsc
= false;
7279 kvm_shared_msr_cpu_online();
7280 ret
= kvm_x86_ops
->hardware_enable();
7284 local_tsc
= rdtsc();
7285 stable
= !check_tsc_unstable();
7286 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
7287 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
7288 if (!stable
&& vcpu
->cpu
== smp_processor_id())
7289 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
7290 if (stable
&& vcpu
->arch
.last_host_tsc
> local_tsc
) {
7291 backwards_tsc
= true;
7292 if (vcpu
->arch
.last_host_tsc
> max_tsc
)
7293 max_tsc
= vcpu
->arch
.last_host_tsc
;
7299 * Sometimes, even reliable TSCs go backwards. This happens on
7300 * platforms that reset TSC during suspend or hibernate actions, but
7301 * maintain synchronization. We must compensate. Fortunately, we can
7302 * detect that condition here, which happens early in CPU bringup,
7303 * before any KVM threads can be running. Unfortunately, we can't
7304 * bring the TSCs fully up to date with real time, as we aren't yet far
7305 * enough into CPU bringup that we know how much real time has actually
7306 * elapsed; our helper function, get_kernel_ns() will be using boot
7307 * variables that haven't been updated yet.
7309 * So we simply find the maximum observed TSC above, then record the
7310 * adjustment to TSC in each VCPU. When the VCPU later gets loaded,
7311 * the adjustment will be applied. Note that we accumulate
7312 * adjustments, in case multiple suspend cycles happen before some VCPU
7313 * gets a chance to run again. In the event that no KVM threads get a
7314 * chance to run, we will miss the entire elapsed period, as we'll have
7315 * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
7316 * loose cycle time. This isn't too big a deal, since the loss will be
7317 * uniform across all VCPUs (not to mention the scenario is extremely
7318 * unlikely). It is possible that a second hibernate recovery happens
7319 * much faster than a first, causing the observed TSC here to be
7320 * smaller; this would require additional padding adjustment, which is
7321 * why we set last_host_tsc to the local tsc observed here.
7323 * N.B. - this code below runs only on platforms with reliable TSC,
7324 * as that is the only way backwards_tsc is set above. Also note
7325 * that this runs for ALL vcpus, which is not a bug; all VCPUs should
7326 * have the same delta_cyc adjustment applied if backwards_tsc
7327 * is detected. Note further, this adjustment is only done once,
7328 * as we reset last_host_tsc on all VCPUs to stop this from being
7329 * called multiple times (one for each physical CPU bringup).
7331 * Platforms with unreliable TSCs don't have to deal with this, they
7332 * will be compensated by the logic in vcpu_load, which sets the TSC to
7333 * catchup mode. This will catchup all VCPUs to real time, but cannot
7334 * guarantee that they stay in perfect synchronization.
7336 if (backwards_tsc
) {
7337 u64 delta_cyc
= max_tsc
- local_tsc
;
7338 backwards_tsc_observed
= true;
7339 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
7340 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
7341 vcpu
->arch
.tsc_offset_adjustment
+= delta_cyc
;
7342 vcpu
->arch
.last_host_tsc
= local_tsc
;
7343 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
7347 * We have to disable TSC offset matching.. if you were
7348 * booting a VM while issuing an S4 host suspend....
7349 * you may have some problem. Solving this issue is
7350 * left as an exercise to the reader.
7352 kvm
->arch
.last_tsc_nsec
= 0;
7353 kvm
->arch
.last_tsc_write
= 0;
7360 void kvm_arch_hardware_disable(void)
7362 kvm_x86_ops
->hardware_disable();
7363 drop_user_return_notifiers();
7366 int kvm_arch_hardware_setup(void)
7370 r
= kvm_x86_ops
->hardware_setup();
7374 if (kvm_has_tsc_control
)
7375 kvm_default_tsc_scaling_ratio
= 1ULL << kvm_tsc_scaling_ratio_frac_bits
;
7377 kvm_init_msr_list();
7381 void kvm_arch_hardware_unsetup(void)
7383 kvm_x86_ops
->hardware_unsetup();
7386 void kvm_arch_check_processor_compat(void *rtn
)
7388 kvm_x86_ops
->check_processor_compatibility(rtn
);
7391 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu
*vcpu
)
7393 return vcpu
->kvm
->arch
.bsp_vcpu_id
== vcpu
->vcpu_id
;
7395 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp
);
7397 bool kvm_vcpu_is_bsp(struct kvm_vcpu
*vcpu
)
7399 return (vcpu
->arch
.apic_base
& MSR_IA32_APICBASE_BSP
) != 0;
7402 bool kvm_vcpu_compatible(struct kvm_vcpu
*vcpu
)
7404 return irqchip_in_kernel(vcpu
->kvm
) == lapic_in_kernel(vcpu
);
7407 struct static_key kvm_no_apic_vcpu __read_mostly
;
7409 int kvm_arch_vcpu_init(struct kvm_vcpu
*vcpu
)
7415 BUG_ON(vcpu
->kvm
== NULL
);
7418 vcpu
->arch
.pv
.pv_unhalted
= false;
7419 vcpu
->arch
.emulate_ctxt
.ops
= &emulate_ops
;
7420 if (!irqchip_in_kernel(kvm
) || kvm_vcpu_is_reset_bsp(vcpu
))
7421 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
7423 vcpu
->arch
.mp_state
= KVM_MP_STATE_UNINITIALIZED
;
7425 page
= alloc_page(GFP_KERNEL
| __GFP_ZERO
);
7430 vcpu
->arch
.pio_data
= page_address(page
);
7432 kvm_set_tsc_khz(vcpu
, max_tsc_khz
);
7434 r
= kvm_mmu_create(vcpu
);
7436 goto fail_free_pio_data
;
7438 if (irqchip_in_kernel(kvm
)) {
7439 r
= kvm_create_lapic(vcpu
);
7441 goto fail_mmu_destroy
;
7443 static_key_slow_inc(&kvm_no_apic_vcpu
);
7445 vcpu
->arch
.mce_banks
= kzalloc(KVM_MAX_MCE_BANKS
* sizeof(u64
) * 4,
7447 if (!vcpu
->arch
.mce_banks
) {
7449 goto fail_free_lapic
;
7451 vcpu
->arch
.mcg_cap
= KVM_MAX_MCE_BANKS
;
7453 if (!zalloc_cpumask_var(&vcpu
->arch
.wbinvd_dirty_mask
, GFP_KERNEL
)) {
7455 goto fail_free_mce_banks
;
7460 vcpu
->arch
.ia32_tsc_adjust_msr
= 0x0;
7461 vcpu
->arch
.pv_time_enabled
= false;
7463 vcpu
->arch
.guest_supported_xcr0
= 0;
7464 vcpu
->arch
.guest_xstate_size
= XSAVE_HDR_SIZE
+ XSAVE_HDR_OFFSET
;
7466 vcpu
->arch
.maxphyaddr
= cpuid_query_maxphyaddr(vcpu
);
7468 vcpu
->arch
.pat
= MSR_IA32_CR_PAT_DEFAULT
;
7470 kvm_async_pf_hash_reset(vcpu
);
7473 vcpu
->arch
.pending_external_vector
= -1;
7477 fail_free_mce_banks
:
7478 kfree(vcpu
->arch
.mce_banks
);
7480 kvm_free_lapic(vcpu
);
7482 kvm_mmu_destroy(vcpu
);
7484 free_page((unsigned long)vcpu
->arch
.pio_data
);
7489 void kvm_arch_vcpu_uninit(struct kvm_vcpu
*vcpu
)
7493 kvm_pmu_destroy(vcpu
);
7494 kfree(vcpu
->arch
.mce_banks
);
7495 kvm_free_lapic(vcpu
);
7496 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
7497 kvm_mmu_destroy(vcpu
);
7498 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
7499 free_page((unsigned long)vcpu
->arch
.pio_data
);
7500 if (!lapic_in_kernel(vcpu
))
7501 static_key_slow_dec(&kvm_no_apic_vcpu
);
7504 void kvm_arch_sched_in(struct kvm_vcpu
*vcpu
, int cpu
)
7506 kvm_x86_ops
->sched_in(vcpu
, cpu
);
7509 int kvm_arch_init_vm(struct kvm
*kvm
, unsigned long type
)
7514 INIT_HLIST_HEAD(&kvm
->arch
.mask_notifier_list
);
7515 INIT_LIST_HEAD(&kvm
->arch
.active_mmu_pages
);
7516 INIT_LIST_HEAD(&kvm
->arch
.zapped_obsolete_pages
);
7517 INIT_LIST_HEAD(&kvm
->arch
.assigned_dev_head
);
7518 atomic_set(&kvm
->arch
.noncoherent_dma_count
, 0);
7520 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
7521 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID
, &kvm
->arch
.irq_sources_bitmap
);
7522 /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
7523 set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID
,
7524 &kvm
->arch
.irq_sources_bitmap
);
7526 raw_spin_lock_init(&kvm
->arch
.tsc_write_lock
);
7527 mutex_init(&kvm
->arch
.apic_map_lock
);
7528 spin_lock_init(&kvm
->arch
.pvclock_gtod_sync_lock
);
7530 pvclock_update_vm_gtod_copy(kvm
);
7532 INIT_DELAYED_WORK(&kvm
->arch
.kvmclock_update_work
, kvmclock_update_fn
);
7533 INIT_DELAYED_WORK(&kvm
->arch
.kvmclock_sync_work
, kvmclock_sync_fn
);
7538 static void kvm_unload_vcpu_mmu(struct kvm_vcpu
*vcpu
)
7541 r
= vcpu_load(vcpu
);
7543 kvm_mmu_unload(vcpu
);
7547 static void kvm_free_vcpus(struct kvm
*kvm
)
7550 struct kvm_vcpu
*vcpu
;
7553 * Unpin any mmu pages first.
7555 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
7556 kvm_clear_async_pf_completion_queue(vcpu
);
7557 kvm_unload_vcpu_mmu(vcpu
);
7559 kvm_for_each_vcpu(i
, vcpu
, kvm
)
7560 kvm_arch_vcpu_free(vcpu
);
7562 mutex_lock(&kvm
->lock
);
7563 for (i
= 0; i
< atomic_read(&kvm
->online_vcpus
); i
++)
7564 kvm
->vcpus
[i
] = NULL
;
7566 atomic_set(&kvm
->online_vcpus
, 0);
7567 mutex_unlock(&kvm
->lock
);
7570 void kvm_arch_sync_events(struct kvm
*kvm
)
7572 cancel_delayed_work_sync(&kvm
->arch
.kvmclock_sync_work
);
7573 cancel_delayed_work_sync(&kvm
->arch
.kvmclock_update_work
);
7574 kvm_free_all_assigned_devices(kvm
);
7578 int __x86_set_memory_region(struct kvm
*kvm
, int id
, gpa_t gpa
, u32 size
)
7582 struct kvm_memslots
*slots
= kvm_memslots(kvm
);
7583 struct kvm_memory_slot
*slot
, old
;
7585 /* Called with kvm->slots_lock held. */
7586 if (WARN_ON(id
>= KVM_MEM_SLOTS_NUM
))
7589 slot
= id_to_memslot(slots
, id
);
7591 if (WARN_ON(slot
->npages
))
7595 * MAP_SHARED to prevent internal slot pages from being moved
7598 hva
= vm_mmap(NULL
, 0, size
, PROT_READ
| PROT_WRITE
,
7599 MAP_SHARED
| MAP_ANONYMOUS
, 0);
7600 if (IS_ERR((void *)hva
))
7601 return PTR_ERR((void *)hva
);
7610 for (i
= 0; i
< KVM_ADDRESS_SPACE_NUM
; i
++) {
7611 struct kvm_userspace_memory_region m
;
7613 m
.slot
= id
| (i
<< 16);
7615 m
.guest_phys_addr
= gpa
;
7616 m
.userspace_addr
= hva
;
7617 m
.memory_size
= size
;
7618 r
= __kvm_set_memory_region(kvm
, &m
);
7624 r
= vm_munmap(old
.userspace_addr
, old
.npages
* PAGE_SIZE
);
7630 EXPORT_SYMBOL_GPL(__x86_set_memory_region
);
7632 int x86_set_memory_region(struct kvm
*kvm
, int id
, gpa_t gpa
, u32 size
)
7636 mutex_lock(&kvm
->slots_lock
);
7637 r
= __x86_set_memory_region(kvm
, id
, gpa
, size
);
7638 mutex_unlock(&kvm
->slots_lock
);
7642 EXPORT_SYMBOL_GPL(x86_set_memory_region
);
7644 void kvm_arch_destroy_vm(struct kvm
*kvm
)
7646 if (current
->mm
== kvm
->mm
) {
7648 * Free memory regions allocated on behalf of userspace,
7649 * unless the the memory map has changed due to process exit
7652 x86_set_memory_region(kvm
, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT
, 0, 0);
7653 x86_set_memory_region(kvm
, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT
, 0, 0);
7654 x86_set_memory_region(kvm
, TSS_PRIVATE_MEMSLOT
, 0, 0);
7656 kvm_iommu_unmap_guest(kvm
);
7657 kfree(kvm
->arch
.vpic
);
7658 kfree(kvm
->arch
.vioapic
);
7659 kvm_free_vcpus(kvm
);
7660 kfree(rcu_dereference_check(kvm
->arch
.apic_map
, 1));
7663 void kvm_arch_free_memslot(struct kvm
*kvm
, struct kvm_memory_slot
*free
,
7664 struct kvm_memory_slot
*dont
)
7668 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
7669 if (!dont
|| free
->arch
.rmap
[i
] != dont
->arch
.rmap
[i
]) {
7670 kvfree(free
->arch
.rmap
[i
]);
7671 free
->arch
.rmap
[i
] = NULL
;
7676 if (!dont
|| free
->arch
.lpage_info
[i
- 1] !=
7677 dont
->arch
.lpage_info
[i
- 1]) {
7678 kvfree(free
->arch
.lpage_info
[i
- 1]);
7679 free
->arch
.lpage_info
[i
- 1] = NULL
;
7684 int kvm_arch_create_memslot(struct kvm
*kvm
, struct kvm_memory_slot
*slot
,
7685 unsigned long npages
)
7689 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
7694 lpages
= gfn_to_index(slot
->base_gfn
+ npages
- 1,
7695 slot
->base_gfn
, level
) + 1;
7697 slot
->arch
.rmap
[i
] =
7698 kvm_kvzalloc(lpages
* sizeof(*slot
->arch
.rmap
[i
]));
7699 if (!slot
->arch
.rmap
[i
])
7704 slot
->arch
.lpage_info
[i
- 1] = kvm_kvzalloc(lpages
*
7705 sizeof(*slot
->arch
.lpage_info
[i
- 1]));
7706 if (!slot
->arch
.lpage_info
[i
- 1])
7709 if (slot
->base_gfn
& (KVM_PAGES_PER_HPAGE(level
) - 1))
7710 slot
->arch
.lpage_info
[i
- 1][0].write_count
= 1;
7711 if ((slot
->base_gfn
+ npages
) & (KVM_PAGES_PER_HPAGE(level
) - 1))
7712 slot
->arch
.lpage_info
[i
- 1][lpages
- 1].write_count
= 1;
7713 ugfn
= slot
->userspace_addr
>> PAGE_SHIFT
;
7715 * If the gfn and userspace address are not aligned wrt each
7716 * other, or if explicitly asked to, disable large page
7717 * support for this slot
7719 if ((slot
->base_gfn
^ ugfn
) & (KVM_PAGES_PER_HPAGE(level
) - 1) ||
7720 !kvm_largepages_enabled()) {
7723 for (j
= 0; j
< lpages
; ++j
)
7724 slot
->arch
.lpage_info
[i
- 1][j
].write_count
= 1;
7731 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
7732 kvfree(slot
->arch
.rmap
[i
]);
7733 slot
->arch
.rmap
[i
] = NULL
;
7737 kvfree(slot
->arch
.lpage_info
[i
- 1]);
7738 slot
->arch
.lpage_info
[i
- 1] = NULL
;
7743 void kvm_arch_memslots_updated(struct kvm
*kvm
, struct kvm_memslots
*slots
)
7746 * memslots->generation has been incremented.
7747 * mmio generation may have reached its maximum value.
7749 kvm_mmu_invalidate_mmio_sptes(kvm
, slots
);
7752 int kvm_arch_prepare_memory_region(struct kvm
*kvm
,
7753 struct kvm_memory_slot
*memslot
,
7754 const struct kvm_userspace_memory_region
*mem
,
7755 enum kvm_mr_change change
)
7760 static void kvm_mmu_slot_apply_flags(struct kvm
*kvm
,
7761 struct kvm_memory_slot
*new)
7763 /* Still write protect RO slot */
7764 if (new->flags
& KVM_MEM_READONLY
) {
7765 kvm_mmu_slot_remove_write_access(kvm
, new);
7770 * Call kvm_x86_ops dirty logging hooks when they are valid.
7772 * kvm_x86_ops->slot_disable_log_dirty is called when:
7774 * - KVM_MR_CREATE with dirty logging is disabled
7775 * - KVM_MR_FLAGS_ONLY with dirty logging is disabled in new flag
7777 * The reason is, in case of PML, we need to set D-bit for any slots
7778 * with dirty logging disabled in order to eliminate unnecessary GPA
7779 * logging in PML buffer (and potential PML buffer full VMEXT). This
7780 * guarantees leaving PML enabled during guest's lifetime won't have
7781 * any additonal overhead from PML when guest is running with dirty
7782 * logging disabled for memory slots.
7784 * kvm_x86_ops->slot_enable_log_dirty is called when switching new slot
7785 * to dirty logging mode.
7787 * If kvm_x86_ops dirty logging hooks are invalid, use write protect.
7789 * In case of write protect:
7791 * Write protect all pages for dirty logging.
7793 * All the sptes including the large sptes which point to this
7794 * slot are set to readonly. We can not create any new large
7795 * spte on this slot until the end of the logging.
7797 * See the comments in fast_page_fault().
7799 if (new->flags
& KVM_MEM_LOG_DIRTY_PAGES
) {
7800 if (kvm_x86_ops
->slot_enable_log_dirty
)
7801 kvm_x86_ops
->slot_enable_log_dirty(kvm
, new);
7803 kvm_mmu_slot_remove_write_access(kvm
, new);
7805 if (kvm_x86_ops
->slot_disable_log_dirty
)
7806 kvm_x86_ops
->slot_disable_log_dirty(kvm
, new);
7810 void kvm_arch_commit_memory_region(struct kvm
*kvm
,
7811 const struct kvm_userspace_memory_region
*mem
,
7812 const struct kvm_memory_slot
*old
,
7813 const struct kvm_memory_slot
*new,
7814 enum kvm_mr_change change
)
7816 int nr_mmu_pages
= 0;
7818 if (!kvm
->arch
.n_requested_mmu_pages
)
7819 nr_mmu_pages
= kvm_mmu_calculate_mmu_pages(kvm
);
7822 kvm_mmu_change_mmu_pages(kvm
, nr_mmu_pages
);
7825 * Dirty logging tracks sptes in 4k granularity, meaning that large
7826 * sptes have to be split. If live migration is successful, the guest
7827 * in the source machine will be destroyed and large sptes will be
7828 * created in the destination. However, if the guest continues to run
7829 * in the source machine (for example if live migration fails), small
7830 * sptes will remain around and cause bad performance.
7832 * Scan sptes if dirty logging has been stopped, dropping those
7833 * which can be collapsed into a single large-page spte. Later
7834 * page faults will create the large-page sptes.
7836 if ((change
!= KVM_MR_DELETE
) &&
7837 (old
->flags
& KVM_MEM_LOG_DIRTY_PAGES
) &&
7838 !(new->flags
& KVM_MEM_LOG_DIRTY_PAGES
))
7839 kvm_mmu_zap_collapsible_sptes(kvm
, new);
7842 * Set up write protection and/or dirty logging for the new slot.
7844 * For KVM_MR_DELETE and KVM_MR_MOVE, the shadow pages of old slot have
7845 * been zapped so no dirty logging staff is needed for old slot. For
7846 * KVM_MR_FLAGS_ONLY, the old slot is essentially the same one as the
7847 * new and it's also covered when dealing with the new slot.
7849 * FIXME: const-ify all uses of struct kvm_memory_slot.
7851 if (change
!= KVM_MR_DELETE
)
7852 kvm_mmu_slot_apply_flags(kvm
, (struct kvm_memory_slot
*) new);
7855 void kvm_arch_flush_shadow_all(struct kvm
*kvm
)
7857 kvm_mmu_invalidate_zap_all_pages(kvm
);
7860 void kvm_arch_flush_shadow_memslot(struct kvm
*kvm
,
7861 struct kvm_memory_slot
*slot
)
7863 kvm_mmu_invalidate_zap_all_pages(kvm
);
7866 static inline bool kvm_vcpu_has_events(struct kvm_vcpu
*vcpu
)
7868 if (!list_empty_careful(&vcpu
->async_pf
.done
))
7871 if (kvm_apic_has_events(vcpu
))
7874 if (vcpu
->arch
.pv
.pv_unhalted
)
7877 if (atomic_read(&vcpu
->arch
.nmi_queued
))
7880 if (test_bit(KVM_REQ_SMI
, &vcpu
->requests
))
7883 if (kvm_arch_interrupt_allowed(vcpu
) &&
7884 kvm_cpu_has_interrupt(vcpu
))
7890 int kvm_arch_vcpu_runnable(struct kvm_vcpu
*vcpu
)
7892 if (is_guest_mode(vcpu
) && kvm_x86_ops
->check_nested_events
)
7893 kvm_x86_ops
->check_nested_events(vcpu
, false);
7895 return kvm_vcpu_running(vcpu
) || kvm_vcpu_has_events(vcpu
);
7898 int kvm_arch_vcpu_should_kick(struct kvm_vcpu
*vcpu
)
7900 return kvm_vcpu_exiting_guest_mode(vcpu
) == IN_GUEST_MODE
;
7903 int kvm_arch_interrupt_allowed(struct kvm_vcpu
*vcpu
)
7905 return kvm_x86_ops
->interrupt_allowed(vcpu
);
7908 unsigned long kvm_get_linear_rip(struct kvm_vcpu
*vcpu
)
7910 if (is_64_bit_mode(vcpu
))
7911 return kvm_rip_read(vcpu
);
7912 return (u32
)(get_segment_base(vcpu
, VCPU_SREG_CS
) +
7913 kvm_rip_read(vcpu
));
7915 EXPORT_SYMBOL_GPL(kvm_get_linear_rip
);
7917 bool kvm_is_linear_rip(struct kvm_vcpu
*vcpu
, unsigned long linear_rip
)
7919 return kvm_get_linear_rip(vcpu
) == linear_rip
;
7921 EXPORT_SYMBOL_GPL(kvm_is_linear_rip
);
7923 unsigned long kvm_get_rflags(struct kvm_vcpu
*vcpu
)
7925 unsigned long rflags
;
7927 rflags
= kvm_x86_ops
->get_rflags(vcpu
);
7928 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
7929 rflags
&= ~X86_EFLAGS_TF
;
7932 EXPORT_SYMBOL_GPL(kvm_get_rflags
);
7934 static void __kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
7936 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
&&
7937 kvm_is_linear_rip(vcpu
, vcpu
->arch
.singlestep_rip
))
7938 rflags
|= X86_EFLAGS_TF
;
7939 kvm_x86_ops
->set_rflags(vcpu
, rflags
);
7942 void kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
7944 __kvm_set_rflags(vcpu
, rflags
);
7945 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7947 EXPORT_SYMBOL_GPL(kvm_set_rflags
);
7949 void kvm_arch_async_page_ready(struct kvm_vcpu
*vcpu
, struct kvm_async_pf
*work
)
7953 if ((vcpu
->arch
.mmu
.direct_map
!= work
->arch
.direct_map
) ||
7957 r
= kvm_mmu_reload(vcpu
);
7961 if (!vcpu
->arch
.mmu
.direct_map
&&
7962 work
->arch
.cr3
!= vcpu
->arch
.mmu
.get_cr3(vcpu
))
7965 vcpu
->arch
.mmu
.page_fault(vcpu
, work
->gva
, 0, true);
7968 static inline u32
kvm_async_pf_hash_fn(gfn_t gfn
)
7970 return hash_32(gfn
& 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU
));
7973 static inline u32
kvm_async_pf_next_probe(u32 key
)
7975 return (key
+ 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU
) - 1);
7978 static void kvm_add_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
7980 u32 key
= kvm_async_pf_hash_fn(gfn
);
7982 while (vcpu
->arch
.apf
.gfns
[key
] != ~0)
7983 key
= kvm_async_pf_next_probe(key
);
7985 vcpu
->arch
.apf
.gfns
[key
] = gfn
;
7988 static u32
kvm_async_pf_gfn_slot(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
7991 u32 key
= kvm_async_pf_hash_fn(gfn
);
7993 for (i
= 0; i
< roundup_pow_of_two(ASYNC_PF_PER_VCPU
) &&
7994 (vcpu
->arch
.apf
.gfns
[key
] != gfn
&&
7995 vcpu
->arch
.apf
.gfns
[key
] != ~0); i
++)
7996 key
= kvm_async_pf_next_probe(key
);
8001 bool kvm_find_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
8003 return vcpu
->arch
.apf
.gfns
[kvm_async_pf_gfn_slot(vcpu
, gfn
)] == gfn
;
8006 static void kvm_del_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
8010 i
= j
= kvm_async_pf_gfn_slot(vcpu
, gfn
);
8012 vcpu
->arch
.apf
.gfns
[i
] = ~0;
8014 j
= kvm_async_pf_next_probe(j
);
8015 if (vcpu
->arch
.apf
.gfns
[j
] == ~0)
8017 k
= kvm_async_pf_hash_fn(vcpu
->arch
.apf
.gfns
[j
]);
8019 * k lies cyclically in ]i,j]
8021 * |....j i.k.| or |.k..j i...|
8023 } while ((i
<= j
) ? (i
< k
&& k
<= j
) : (i
< k
|| k
<= j
));
8024 vcpu
->arch
.apf
.gfns
[i
] = vcpu
->arch
.apf
.gfns
[j
];
8029 static int apf_put_user(struct kvm_vcpu
*vcpu
, u32 val
)
8032 return kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, &val
,
8036 void kvm_arch_async_page_not_present(struct kvm_vcpu
*vcpu
,
8037 struct kvm_async_pf
*work
)
8039 struct x86_exception fault
;
8041 trace_kvm_async_pf_not_present(work
->arch
.token
, work
->gva
);
8042 kvm_add_async_pf_gfn(vcpu
, work
->arch
.gfn
);
8044 if (!(vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
) ||
8045 (vcpu
->arch
.apf
.send_user_only
&&
8046 kvm_x86_ops
->get_cpl(vcpu
) == 0))
8047 kvm_make_request(KVM_REQ_APF_HALT
, vcpu
);
8048 else if (!apf_put_user(vcpu
, KVM_PV_REASON_PAGE_NOT_PRESENT
)) {
8049 fault
.vector
= PF_VECTOR
;
8050 fault
.error_code_valid
= true;
8051 fault
.error_code
= 0;
8052 fault
.nested_page_fault
= false;
8053 fault
.address
= work
->arch
.token
;
8054 kvm_inject_page_fault(vcpu
, &fault
);
8058 void kvm_arch_async_page_present(struct kvm_vcpu
*vcpu
,
8059 struct kvm_async_pf
*work
)
8061 struct x86_exception fault
;
8063 trace_kvm_async_pf_ready(work
->arch
.token
, work
->gva
);
8064 if (work
->wakeup_all
)
8065 work
->arch
.token
= ~0; /* broadcast wakeup */
8067 kvm_del_async_pf_gfn(vcpu
, work
->arch
.gfn
);
8069 if ((vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
) &&
8070 !apf_put_user(vcpu
, KVM_PV_REASON_PAGE_READY
)) {
8071 fault
.vector
= PF_VECTOR
;
8072 fault
.error_code_valid
= true;
8073 fault
.error_code
= 0;
8074 fault
.nested_page_fault
= false;
8075 fault
.address
= work
->arch
.token
;
8076 kvm_inject_page_fault(vcpu
, &fault
);
8078 vcpu
->arch
.apf
.halted
= false;
8079 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
8082 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu
*vcpu
)
8084 if (!(vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
))
8087 return !kvm_event_needs_reinjection(vcpu
) &&
8088 kvm_x86_ops
->interrupt_allowed(vcpu
);
8091 void kvm_arch_start_assignment(struct kvm
*kvm
)
8093 atomic_inc(&kvm
->arch
.assigned_device_count
);
8095 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment
);
8097 void kvm_arch_end_assignment(struct kvm
*kvm
)
8099 atomic_dec(&kvm
->arch
.assigned_device_count
);
8101 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment
);
8103 bool kvm_arch_has_assigned_device(struct kvm
*kvm
)
8105 return atomic_read(&kvm
->arch
.assigned_device_count
);
8107 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device
);
8109 void kvm_arch_register_noncoherent_dma(struct kvm
*kvm
)
8111 atomic_inc(&kvm
->arch
.noncoherent_dma_count
);
8113 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma
);
8115 void kvm_arch_unregister_noncoherent_dma(struct kvm
*kvm
)
8117 atomic_dec(&kvm
->arch
.noncoherent_dma_count
);
8119 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma
);
8121 bool kvm_arch_has_noncoherent_dma(struct kvm
*kvm
)
8123 return atomic_read(&kvm
->arch
.noncoherent_dma_count
);
8125 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma
);
8127 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer
*cons
,
8128 struct irq_bypass_producer
*prod
)
8130 struct kvm_kernel_irqfd
*irqfd
=
8131 container_of(cons
, struct kvm_kernel_irqfd
, consumer
);
8133 if (kvm_x86_ops
->update_pi_irte
) {
8134 irqfd
->producer
= prod
;
8135 return kvm_x86_ops
->update_pi_irte(irqfd
->kvm
,
8136 prod
->irq
, irqfd
->gsi
, 1);
8142 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer
*cons
,
8143 struct irq_bypass_producer
*prod
)
8146 struct kvm_kernel_irqfd
*irqfd
=
8147 container_of(cons
, struct kvm_kernel_irqfd
, consumer
);
8149 if (!kvm_x86_ops
->update_pi_irte
) {
8150 WARN_ON(irqfd
->producer
!= NULL
);
8154 WARN_ON(irqfd
->producer
!= prod
);
8155 irqfd
->producer
= NULL
;
8158 * When producer of consumer is unregistered, we change back to
8159 * remapped mode, so we can re-use the current implementation
8160 * when the irq is masked/disabed or the consumer side (KVM
8161 * int this case doesn't want to receive the interrupts.
8163 ret
= kvm_x86_ops
->update_pi_irte(irqfd
->kvm
, prod
->irq
, irqfd
->gsi
, 0);
8165 printk(KERN_INFO
"irq bypass consumer (token %p) unregistration"
8166 " fails: %d\n", irqfd
->consumer
.token
, ret
);
8169 int kvm_arch_update_irqfd_routing(struct kvm
*kvm
, unsigned int host_irq
,
8170 uint32_t guest_irq
, bool set
)
8172 if (!kvm_x86_ops
->update_pi_irte
)
8175 return kvm_x86_ops
->update_pi_irte(kvm
, host_irq
, guest_irq
, set
);
8178 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit
);
8179 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio
);
8180 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq
);
8181 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault
);
8182 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr
);
8183 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr
);
8184 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun
);
8185 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit
);
8186 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject
);
8187 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit
);
8188 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga
);
8189 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit
);
8190 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts
);
8191 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset
);
8192 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window
);
8193 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full
);
8194 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update
);