2 * Kernel-based Virtual Machine driver for Linux
4 * derived from drivers/kvm/kvm_main.c
6 * Copyright (C) 2006 Qumranet, Inc.
7 * Copyright (C) 2008 Qumranet, Inc.
8 * Copyright IBM Corporation, 2008
9 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
12 * Avi Kivity <avi@qumranet.com>
13 * Yaniv Kamay <yaniv@qumranet.com>
14 * Amit Shah <amit.shah@qumranet.com>
15 * Ben-Ami Yassour <benami@il.ibm.com>
17 * This work is licensed under the terms of the GNU GPL, version 2. See
18 * the COPYING file in the top-level directory.
22 #include <linux/kvm_host.h>
27 #include "kvm_cache_regs.h"
30 #include <linux/clocksource.h>
31 #include <linux/interrupt.h>
32 #include <linux/kvm.h>
34 #include <linux/vmalloc.h>
35 #include <linux/module.h>
36 #include <linux/mman.h>
37 #include <linux/highmem.h>
38 #include <linux/iommu.h>
39 #include <linux/intel-iommu.h>
40 #include <linux/cpufreq.h>
41 #include <linux/user-return-notifier.h>
42 #include <linux/srcu.h>
43 #include <linux/slab.h>
44 #include <linux/perf_event.h>
45 #include <linux/uaccess.h>
46 #include <linux/hash.h>
47 #include <trace/events/kvm.h>
49 #define CREATE_TRACE_POINTS
52 #include <asm/debugreg.h>
59 #include <asm/pvclock.h>
60 #include <asm/div64.h>
62 #define MAX_IO_MSRS 256
63 #define CR0_RESERVED_BITS \
64 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
65 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
66 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
67 #define CR4_RESERVED_BITS \
68 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
69 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \
70 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR \
72 | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
74 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
76 #define KVM_MAX_MCE_BANKS 32
77 #define KVM_MCE_CAP_SUPPORTED (MCG_CTL_P | MCG_SER_P)
80 * - enable syscall per default because its emulated by KVM
81 * - enable LME and LMA per default on 64 bit KVM
84 static u64 __read_mostly efer_reserved_bits
= 0xfffffffffffffafeULL
;
86 static u64 __read_mostly efer_reserved_bits
= 0xfffffffffffffffeULL
;
89 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
90 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
92 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
);
93 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2
*cpuid
,
94 struct kvm_cpuid_entry2 __user
*entries
);
96 struct kvm_x86_ops
*kvm_x86_ops
;
97 EXPORT_SYMBOL_GPL(kvm_x86_ops
);
100 module_param_named(ignore_msrs
, ignore_msrs
, bool, S_IRUGO
| S_IWUSR
);
102 #define KVM_NR_SHARED_MSRS 16
104 struct kvm_shared_msrs_global
{
106 u32 msrs
[KVM_NR_SHARED_MSRS
];
109 struct kvm_shared_msrs
{
110 struct user_return_notifier urn
;
112 struct kvm_shared_msr_values
{
115 } values
[KVM_NR_SHARED_MSRS
];
118 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global
;
119 static DEFINE_PER_CPU(struct kvm_shared_msrs
, shared_msrs
);
121 struct kvm_stats_debugfs_item debugfs_entries
[] = {
122 { "pf_fixed", VCPU_STAT(pf_fixed
) },
123 { "pf_guest", VCPU_STAT(pf_guest
) },
124 { "tlb_flush", VCPU_STAT(tlb_flush
) },
125 { "invlpg", VCPU_STAT(invlpg
) },
126 { "exits", VCPU_STAT(exits
) },
127 { "io_exits", VCPU_STAT(io_exits
) },
128 { "mmio_exits", VCPU_STAT(mmio_exits
) },
129 { "signal_exits", VCPU_STAT(signal_exits
) },
130 { "irq_window", VCPU_STAT(irq_window_exits
) },
131 { "nmi_window", VCPU_STAT(nmi_window_exits
) },
132 { "halt_exits", VCPU_STAT(halt_exits
) },
133 { "halt_wakeup", VCPU_STAT(halt_wakeup
) },
134 { "hypercalls", VCPU_STAT(hypercalls
) },
135 { "request_irq", VCPU_STAT(request_irq_exits
) },
136 { "irq_exits", VCPU_STAT(irq_exits
) },
137 { "host_state_reload", VCPU_STAT(host_state_reload
) },
138 { "efer_reload", VCPU_STAT(efer_reload
) },
139 { "fpu_reload", VCPU_STAT(fpu_reload
) },
140 { "insn_emulation", VCPU_STAT(insn_emulation
) },
141 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail
) },
142 { "irq_injections", VCPU_STAT(irq_injections
) },
143 { "nmi_injections", VCPU_STAT(nmi_injections
) },
144 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped
) },
145 { "mmu_pte_write", VM_STAT(mmu_pte_write
) },
146 { "mmu_pte_updated", VM_STAT(mmu_pte_updated
) },
147 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped
) },
148 { "mmu_flooded", VM_STAT(mmu_flooded
) },
149 { "mmu_recycled", VM_STAT(mmu_recycled
) },
150 { "mmu_cache_miss", VM_STAT(mmu_cache_miss
) },
151 { "mmu_unsync", VM_STAT(mmu_unsync
) },
152 { "remote_tlb_flush", VM_STAT(remote_tlb_flush
) },
153 { "largepages", VM_STAT(lpages
) },
157 u64 __read_mostly host_xcr0
;
159 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu
*vcpu
)
162 for (i
= 0; i
< roundup_pow_of_two(ASYNC_PF_PER_VCPU
); i
++)
163 vcpu
->arch
.apf
.gfns
[i
] = ~0;
166 static void kvm_on_user_return(struct user_return_notifier
*urn
)
169 struct kvm_shared_msrs
*locals
170 = container_of(urn
, struct kvm_shared_msrs
, urn
);
171 struct kvm_shared_msr_values
*values
;
173 for (slot
= 0; slot
< shared_msrs_global
.nr
; ++slot
) {
174 values
= &locals
->values
[slot
];
175 if (values
->host
!= values
->curr
) {
176 wrmsrl(shared_msrs_global
.msrs
[slot
], values
->host
);
177 values
->curr
= values
->host
;
180 locals
->registered
= false;
181 user_return_notifier_unregister(urn
);
184 static void shared_msr_update(unsigned slot
, u32 msr
)
186 struct kvm_shared_msrs
*smsr
;
189 smsr
= &__get_cpu_var(shared_msrs
);
190 /* only read, and nobody should modify it at this time,
191 * so don't need lock */
192 if (slot
>= shared_msrs_global
.nr
) {
193 printk(KERN_ERR
"kvm: invalid MSR slot!");
196 rdmsrl_safe(msr
, &value
);
197 smsr
->values
[slot
].host
= value
;
198 smsr
->values
[slot
].curr
= value
;
201 void kvm_define_shared_msr(unsigned slot
, u32 msr
)
203 if (slot
>= shared_msrs_global
.nr
)
204 shared_msrs_global
.nr
= slot
+ 1;
205 shared_msrs_global
.msrs
[slot
] = msr
;
206 /* we need ensured the shared_msr_global have been updated */
209 EXPORT_SYMBOL_GPL(kvm_define_shared_msr
);
211 static void kvm_shared_msr_cpu_online(void)
215 for (i
= 0; i
< shared_msrs_global
.nr
; ++i
)
216 shared_msr_update(i
, shared_msrs_global
.msrs
[i
]);
219 void kvm_set_shared_msr(unsigned slot
, u64 value
, u64 mask
)
221 struct kvm_shared_msrs
*smsr
= &__get_cpu_var(shared_msrs
);
223 if (((value
^ smsr
->values
[slot
].curr
) & mask
) == 0)
225 smsr
->values
[slot
].curr
= value
;
226 wrmsrl(shared_msrs_global
.msrs
[slot
], value
);
227 if (!smsr
->registered
) {
228 smsr
->urn
.on_user_return
= kvm_on_user_return
;
229 user_return_notifier_register(&smsr
->urn
);
230 smsr
->registered
= true;
233 EXPORT_SYMBOL_GPL(kvm_set_shared_msr
);
235 static void drop_user_return_notifiers(void *ignore
)
237 struct kvm_shared_msrs
*smsr
= &__get_cpu_var(shared_msrs
);
239 if (smsr
->registered
)
240 kvm_on_user_return(&smsr
->urn
);
243 u64
kvm_get_apic_base(struct kvm_vcpu
*vcpu
)
245 if (irqchip_in_kernel(vcpu
->kvm
))
246 return vcpu
->arch
.apic_base
;
248 return vcpu
->arch
.apic_base
;
250 EXPORT_SYMBOL_GPL(kvm_get_apic_base
);
252 void kvm_set_apic_base(struct kvm_vcpu
*vcpu
, u64 data
)
254 /* TODO: reserve bits check */
255 if (irqchip_in_kernel(vcpu
->kvm
))
256 kvm_lapic_set_base(vcpu
, data
);
258 vcpu
->arch
.apic_base
= data
;
260 EXPORT_SYMBOL_GPL(kvm_set_apic_base
);
262 #define EXCPT_BENIGN 0
263 #define EXCPT_CONTRIBUTORY 1
266 static int exception_class(int vector
)
276 return EXCPT_CONTRIBUTORY
;
283 static void kvm_multiple_exception(struct kvm_vcpu
*vcpu
,
284 unsigned nr
, bool has_error
, u32 error_code
,
290 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
292 if (!vcpu
->arch
.exception
.pending
) {
294 vcpu
->arch
.exception
.pending
= true;
295 vcpu
->arch
.exception
.has_error_code
= has_error
;
296 vcpu
->arch
.exception
.nr
= nr
;
297 vcpu
->arch
.exception
.error_code
= error_code
;
298 vcpu
->arch
.exception
.reinject
= reinject
;
302 /* to check exception */
303 prev_nr
= vcpu
->arch
.exception
.nr
;
304 if (prev_nr
== DF_VECTOR
) {
305 /* triple fault -> shutdown */
306 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
309 class1
= exception_class(prev_nr
);
310 class2
= exception_class(nr
);
311 if ((class1
== EXCPT_CONTRIBUTORY
&& class2
== EXCPT_CONTRIBUTORY
)
312 || (class1
== EXCPT_PF
&& class2
!= EXCPT_BENIGN
)) {
313 /* generate double fault per SDM Table 5-5 */
314 vcpu
->arch
.exception
.pending
= true;
315 vcpu
->arch
.exception
.has_error_code
= true;
316 vcpu
->arch
.exception
.nr
= DF_VECTOR
;
317 vcpu
->arch
.exception
.error_code
= 0;
319 /* replace previous exception with a new one in a hope
320 that instruction re-execution will regenerate lost
325 void kvm_queue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
327 kvm_multiple_exception(vcpu
, nr
, false, 0, false);
329 EXPORT_SYMBOL_GPL(kvm_queue_exception
);
331 void kvm_requeue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
333 kvm_multiple_exception(vcpu
, nr
, false, 0, true);
335 EXPORT_SYMBOL_GPL(kvm_requeue_exception
);
337 void kvm_inject_page_fault(struct kvm_vcpu
*vcpu
)
339 unsigned error_code
= vcpu
->arch
.fault
.error_code
;
341 ++vcpu
->stat
.pf_guest
;
342 vcpu
->arch
.cr2
= vcpu
->arch
.fault
.address
;
343 kvm_queue_exception_e(vcpu
, PF_VECTOR
, error_code
);
346 void kvm_propagate_fault(struct kvm_vcpu
*vcpu
)
348 if (mmu_is_nested(vcpu
) && !vcpu
->arch
.fault
.nested
)
349 vcpu
->arch
.nested_mmu
.inject_page_fault(vcpu
);
351 vcpu
->arch
.mmu
.inject_page_fault(vcpu
);
353 vcpu
->arch
.fault
.nested
= false;
356 void kvm_inject_nmi(struct kvm_vcpu
*vcpu
)
358 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
359 vcpu
->arch
.nmi_pending
= 1;
361 EXPORT_SYMBOL_GPL(kvm_inject_nmi
);
363 void kvm_queue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
365 kvm_multiple_exception(vcpu
, nr
, true, error_code
, false);
367 EXPORT_SYMBOL_GPL(kvm_queue_exception_e
);
369 void kvm_requeue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
371 kvm_multiple_exception(vcpu
, nr
, true, error_code
, true);
373 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e
);
376 * Checks if cpl <= required_cpl; if true, return true. Otherwise queue
377 * a #GP and return false.
379 bool kvm_require_cpl(struct kvm_vcpu
*vcpu
, int required_cpl
)
381 if (kvm_x86_ops
->get_cpl(vcpu
) <= required_cpl
)
383 kvm_queue_exception_e(vcpu
, GP_VECTOR
, 0);
386 EXPORT_SYMBOL_GPL(kvm_require_cpl
);
389 * This function will be used to read from the physical memory of the currently
390 * running guest. The difference to kvm_read_guest_page is that this function
391 * can read from guest physical or from the guest's guest physical memory.
393 int kvm_read_guest_page_mmu(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
,
394 gfn_t ngfn
, void *data
, int offset
, int len
,
400 ngpa
= gfn_to_gpa(ngfn
);
401 real_gfn
= mmu
->translate_gpa(vcpu
, ngpa
, access
);
402 if (real_gfn
== UNMAPPED_GVA
)
405 real_gfn
= gpa_to_gfn(real_gfn
);
407 return kvm_read_guest_page(vcpu
->kvm
, real_gfn
, data
, offset
, len
);
409 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu
);
411 int kvm_read_nested_guest_page(struct kvm_vcpu
*vcpu
, gfn_t gfn
,
412 void *data
, int offset
, int len
, u32 access
)
414 return kvm_read_guest_page_mmu(vcpu
, vcpu
->arch
.walk_mmu
, gfn
,
415 data
, offset
, len
, access
);
419 * Load the pae pdptrs. Return true is they are all valid.
421 int load_pdptrs(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
, unsigned long cr3
)
423 gfn_t pdpt_gfn
= cr3
>> PAGE_SHIFT
;
424 unsigned offset
= ((cr3
& (PAGE_SIZE
-1)) >> 5) << 2;
427 u64 pdpte
[ARRAY_SIZE(mmu
->pdptrs
)];
429 ret
= kvm_read_guest_page_mmu(vcpu
, mmu
, pdpt_gfn
, pdpte
,
430 offset
* sizeof(u64
), sizeof(pdpte
),
431 PFERR_USER_MASK
|PFERR_WRITE_MASK
);
436 for (i
= 0; i
< ARRAY_SIZE(pdpte
); ++i
) {
437 if (is_present_gpte(pdpte
[i
]) &&
438 (pdpte
[i
] & vcpu
->arch
.mmu
.rsvd_bits_mask
[0][2])) {
445 memcpy(mmu
->pdptrs
, pdpte
, sizeof(mmu
->pdptrs
));
446 __set_bit(VCPU_EXREG_PDPTR
,
447 (unsigned long *)&vcpu
->arch
.regs_avail
);
448 __set_bit(VCPU_EXREG_PDPTR
,
449 (unsigned long *)&vcpu
->arch
.regs_dirty
);
454 EXPORT_SYMBOL_GPL(load_pdptrs
);
456 static bool pdptrs_changed(struct kvm_vcpu
*vcpu
)
458 u64 pdpte
[ARRAY_SIZE(vcpu
->arch
.walk_mmu
->pdptrs
)];
464 if (is_long_mode(vcpu
) || !is_pae(vcpu
))
467 if (!test_bit(VCPU_EXREG_PDPTR
,
468 (unsigned long *)&vcpu
->arch
.regs_avail
))
471 gfn
= (vcpu
->arch
.cr3
& ~31u) >> PAGE_SHIFT
;
472 offset
= (vcpu
->arch
.cr3
& ~31u) & (PAGE_SIZE
- 1);
473 r
= kvm_read_nested_guest_page(vcpu
, gfn
, pdpte
, offset
, sizeof(pdpte
),
474 PFERR_USER_MASK
| PFERR_WRITE_MASK
);
477 changed
= memcmp(pdpte
, vcpu
->arch
.walk_mmu
->pdptrs
, sizeof(pdpte
)) != 0;
483 int kvm_set_cr0(struct kvm_vcpu
*vcpu
, unsigned long cr0
)
485 unsigned long old_cr0
= kvm_read_cr0(vcpu
);
486 unsigned long update_bits
= X86_CR0_PG
| X86_CR0_WP
|
487 X86_CR0_CD
| X86_CR0_NW
;
492 if (cr0
& 0xffffffff00000000UL
)
496 cr0
&= ~CR0_RESERVED_BITS
;
498 if ((cr0
& X86_CR0_NW
) && !(cr0
& X86_CR0_CD
))
501 if ((cr0
& X86_CR0_PG
) && !(cr0
& X86_CR0_PE
))
504 if (!is_paging(vcpu
) && (cr0
& X86_CR0_PG
)) {
506 if ((vcpu
->arch
.efer
& EFER_LME
)) {
511 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
516 if (is_pae(vcpu
) && !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
,
521 kvm_x86_ops
->set_cr0(vcpu
, cr0
);
523 if ((cr0
^ old_cr0
) & update_bits
)
524 kvm_mmu_reset_context(vcpu
);
527 EXPORT_SYMBOL_GPL(kvm_set_cr0
);
529 void kvm_lmsw(struct kvm_vcpu
*vcpu
, unsigned long msw
)
531 (void)kvm_set_cr0(vcpu
, kvm_read_cr0_bits(vcpu
, ~0x0eul
) | (msw
& 0x0f));
533 EXPORT_SYMBOL_GPL(kvm_lmsw
);
535 int __kvm_set_xcr(struct kvm_vcpu
*vcpu
, u32 index
, u64 xcr
)
539 /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now */
540 if (index
!= XCR_XFEATURE_ENABLED_MASK
)
543 if (kvm_x86_ops
->get_cpl(vcpu
) != 0)
545 if (!(xcr0
& XSTATE_FP
))
547 if ((xcr0
& XSTATE_YMM
) && !(xcr0
& XSTATE_SSE
))
549 if (xcr0
& ~host_xcr0
)
551 vcpu
->arch
.xcr0
= xcr0
;
552 vcpu
->guest_xcr0_loaded
= 0;
556 int kvm_set_xcr(struct kvm_vcpu
*vcpu
, u32 index
, u64 xcr
)
558 if (__kvm_set_xcr(vcpu
, index
, xcr
)) {
559 kvm_inject_gp(vcpu
, 0);
564 EXPORT_SYMBOL_GPL(kvm_set_xcr
);
566 static bool guest_cpuid_has_xsave(struct kvm_vcpu
*vcpu
)
568 struct kvm_cpuid_entry2
*best
;
570 best
= kvm_find_cpuid_entry(vcpu
, 1, 0);
571 return best
&& (best
->ecx
& bit(X86_FEATURE_XSAVE
));
574 static void update_cpuid(struct kvm_vcpu
*vcpu
)
576 struct kvm_cpuid_entry2
*best
;
578 best
= kvm_find_cpuid_entry(vcpu
, 1, 0);
582 /* Update OSXSAVE bit */
583 if (cpu_has_xsave
&& best
->function
== 0x1) {
584 best
->ecx
&= ~(bit(X86_FEATURE_OSXSAVE
));
585 if (kvm_read_cr4_bits(vcpu
, X86_CR4_OSXSAVE
))
586 best
->ecx
|= bit(X86_FEATURE_OSXSAVE
);
590 int kvm_set_cr4(struct kvm_vcpu
*vcpu
, unsigned long cr4
)
592 unsigned long old_cr4
= kvm_read_cr4(vcpu
);
593 unsigned long pdptr_bits
= X86_CR4_PGE
| X86_CR4_PSE
| X86_CR4_PAE
;
595 if (cr4
& CR4_RESERVED_BITS
)
598 if (!guest_cpuid_has_xsave(vcpu
) && (cr4
& X86_CR4_OSXSAVE
))
601 if (is_long_mode(vcpu
)) {
602 if (!(cr4
& X86_CR4_PAE
))
604 } else if (is_paging(vcpu
) && (cr4
& X86_CR4_PAE
)
605 && ((cr4
^ old_cr4
) & pdptr_bits
)
606 && !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, vcpu
->arch
.cr3
))
609 if (cr4
& X86_CR4_VMXE
)
612 kvm_x86_ops
->set_cr4(vcpu
, cr4
);
614 if ((cr4
^ old_cr4
) & pdptr_bits
)
615 kvm_mmu_reset_context(vcpu
);
617 if ((cr4
^ old_cr4
) & X86_CR4_OSXSAVE
)
622 EXPORT_SYMBOL_GPL(kvm_set_cr4
);
624 int kvm_set_cr3(struct kvm_vcpu
*vcpu
, unsigned long cr3
)
626 if (cr3
== vcpu
->arch
.cr3
&& !pdptrs_changed(vcpu
)) {
627 kvm_mmu_sync_roots(vcpu
);
628 kvm_mmu_flush_tlb(vcpu
);
632 if (is_long_mode(vcpu
)) {
633 if (cr3
& CR3_L_MODE_RESERVED_BITS
)
637 if (cr3
& CR3_PAE_RESERVED_BITS
)
639 if (is_paging(vcpu
) &&
640 !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, cr3
))
644 * We don't check reserved bits in nonpae mode, because
645 * this isn't enforced, and VMware depends on this.
650 * Does the new cr3 value map to physical memory? (Note, we
651 * catch an invalid cr3 even in real-mode, because it would
652 * cause trouble later on when we turn on paging anyway.)
654 * A real CPU would silently accept an invalid cr3 and would
655 * attempt to use it - with largely undefined (and often hard
656 * to debug) behavior on the guest side.
658 if (unlikely(!gfn_to_memslot(vcpu
->kvm
, cr3
>> PAGE_SHIFT
)))
660 vcpu
->arch
.cr3
= cr3
;
661 vcpu
->arch
.mmu
.new_cr3(vcpu
);
664 EXPORT_SYMBOL_GPL(kvm_set_cr3
);
666 int __kvm_set_cr8(struct kvm_vcpu
*vcpu
, unsigned long cr8
)
668 if (cr8
& CR8_RESERVED_BITS
)
670 if (irqchip_in_kernel(vcpu
->kvm
))
671 kvm_lapic_set_tpr(vcpu
, cr8
);
673 vcpu
->arch
.cr8
= cr8
;
677 void kvm_set_cr8(struct kvm_vcpu
*vcpu
, unsigned long cr8
)
679 if (__kvm_set_cr8(vcpu
, cr8
))
680 kvm_inject_gp(vcpu
, 0);
682 EXPORT_SYMBOL_GPL(kvm_set_cr8
);
684 unsigned long kvm_get_cr8(struct kvm_vcpu
*vcpu
)
686 if (irqchip_in_kernel(vcpu
->kvm
))
687 return kvm_lapic_get_cr8(vcpu
);
689 return vcpu
->arch
.cr8
;
691 EXPORT_SYMBOL_GPL(kvm_get_cr8
);
693 static int __kvm_set_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long val
)
697 vcpu
->arch
.db
[dr
] = val
;
698 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
))
699 vcpu
->arch
.eff_db
[dr
] = val
;
702 if (kvm_read_cr4_bits(vcpu
, X86_CR4_DE
))
706 if (val
& 0xffffffff00000000ULL
)
708 vcpu
->arch
.dr6
= (val
& DR6_VOLATILE
) | DR6_FIXED_1
;
711 if (kvm_read_cr4_bits(vcpu
, X86_CR4_DE
))
715 if (val
& 0xffffffff00000000ULL
)
717 vcpu
->arch
.dr7
= (val
& DR7_VOLATILE
) | DR7_FIXED_1
;
718 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)) {
719 kvm_x86_ops
->set_dr7(vcpu
, vcpu
->arch
.dr7
);
720 vcpu
->arch
.switch_db_regs
= (val
& DR7_BP_EN_MASK
);
728 int kvm_set_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long val
)
732 res
= __kvm_set_dr(vcpu
, dr
, val
);
734 kvm_queue_exception(vcpu
, UD_VECTOR
);
736 kvm_inject_gp(vcpu
, 0);
740 EXPORT_SYMBOL_GPL(kvm_set_dr
);
742 static int _kvm_get_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long *val
)
746 *val
= vcpu
->arch
.db
[dr
];
749 if (kvm_read_cr4_bits(vcpu
, X86_CR4_DE
))
753 *val
= vcpu
->arch
.dr6
;
756 if (kvm_read_cr4_bits(vcpu
, X86_CR4_DE
))
760 *val
= vcpu
->arch
.dr7
;
767 int kvm_get_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long *val
)
769 if (_kvm_get_dr(vcpu
, dr
, val
)) {
770 kvm_queue_exception(vcpu
, UD_VECTOR
);
775 EXPORT_SYMBOL_GPL(kvm_get_dr
);
778 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
779 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
781 * This list is modified at module load time to reflect the
782 * capabilities of the host cpu. This capabilities test skips MSRs that are
783 * kvm-specific. Those are put in the beginning of the list.
786 #define KVM_SAVE_MSRS_BEGIN 7
787 static u32 msrs_to_save
[] = {
788 MSR_KVM_SYSTEM_TIME
, MSR_KVM_WALL_CLOCK
,
789 MSR_KVM_SYSTEM_TIME_NEW
, MSR_KVM_WALL_CLOCK_NEW
,
790 HV_X64_MSR_GUEST_OS_ID
, HV_X64_MSR_HYPERCALL
,
791 HV_X64_MSR_APIC_ASSIST_PAGE
,
792 MSR_IA32_SYSENTER_CS
, MSR_IA32_SYSENTER_ESP
, MSR_IA32_SYSENTER_EIP
,
795 MSR_CSTAR
, MSR_KERNEL_GS_BASE
, MSR_SYSCALL_MASK
, MSR_LSTAR
,
797 MSR_IA32_TSC
, MSR_IA32_CR_PAT
, MSR_VM_HSAVE_PA
800 static unsigned num_msrs_to_save
;
802 static u32 emulated_msrs
[] = {
803 MSR_IA32_MISC_ENABLE
,
808 static int set_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
810 u64 old_efer
= vcpu
->arch
.efer
;
812 if (efer
& efer_reserved_bits
)
816 && (vcpu
->arch
.efer
& EFER_LME
) != (efer
& EFER_LME
))
819 if (efer
& EFER_FFXSR
) {
820 struct kvm_cpuid_entry2
*feat
;
822 feat
= kvm_find_cpuid_entry(vcpu
, 0x80000001, 0);
823 if (!feat
|| !(feat
->edx
& bit(X86_FEATURE_FXSR_OPT
)))
827 if (efer
& EFER_SVME
) {
828 struct kvm_cpuid_entry2
*feat
;
830 feat
= kvm_find_cpuid_entry(vcpu
, 0x80000001, 0);
831 if (!feat
|| !(feat
->ecx
& bit(X86_FEATURE_SVM
)))
836 efer
|= vcpu
->arch
.efer
& EFER_LMA
;
838 kvm_x86_ops
->set_efer(vcpu
, efer
);
840 vcpu
->arch
.mmu
.base_role
.nxe
= (efer
& EFER_NX
) && !tdp_enabled
;
842 /* Update reserved bits */
843 if ((efer
^ old_efer
) & EFER_NX
)
844 kvm_mmu_reset_context(vcpu
);
849 void kvm_enable_efer_bits(u64 mask
)
851 efer_reserved_bits
&= ~mask
;
853 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits
);
857 * Writes msr value into into the appropriate "register".
858 * Returns 0 on success, non-0 otherwise.
859 * Assumes vcpu_load() was already called.
861 int kvm_set_msr(struct kvm_vcpu
*vcpu
, u32 msr_index
, u64 data
)
863 return kvm_x86_ops
->set_msr(vcpu
, msr_index
, data
);
867 * Adapt set_msr() to msr_io()'s calling convention
869 static int do_set_msr(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
871 return kvm_set_msr(vcpu
, index
, *data
);
874 static void kvm_write_wall_clock(struct kvm
*kvm
, gpa_t wall_clock
)
878 struct pvclock_wall_clock wc
;
879 struct timespec boot
;
884 r
= kvm_read_guest(kvm
, wall_clock
, &version
, sizeof(version
));
889 ++version
; /* first time write, random junk */
893 kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
));
896 * The guest calculates current wall clock time by adding
897 * system time (updated by kvm_guest_time_update below) to the
898 * wall clock specified here. guest system time equals host
899 * system time for us, thus we must fill in host boot time here.
903 wc
.sec
= boot
.tv_sec
;
904 wc
.nsec
= boot
.tv_nsec
;
905 wc
.version
= version
;
907 kvm_write_guest(kvm
, wall_clock
, &wc
, sizeof(wc
));
910 kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
));
913 static uint32_t div_frac(uint32_t dividend
, uint32_t divisor
)
915 uint32_t quotient
, remainder
;
917 /* Don't try to replace with do_div(), this one calculates
918 * "(dividend << 32) / divisor" */
920 : "=a" (quotient
), "=d" (remainder
)
921 : "0" (0), "1" (dividend
), "r" (divisor
) );
925 static void kvm_get_time_scale(uint32_t scaled_khz
, uint32_t base_khz
,
926 s8
*pshift
, u32
*pmultiplier
)
933 tps64
= base_khz
* 1000LL;
934 scaled64
= scaled_khz
* 1000LL;
935 while (tps64
> scaled64
*2 || tps64
& 0xffffffff00000000ULL
) {
940 tps32
= (uint32_t)tps64
;
941 while (tps32
<= scaled64
|| scaled64
& 0xffffffff00000000ULL
) {
942 if (scaled64
& 0xffffffff00000000ULL
|| tps32
& 0x80000000)
950 *pmultiplier
= div_frac(scaled64
, tps32
);
952 pr_debug("%s: base_khz %u => %u, shift %d, mul %u\n",
953 __func__
, base_khz
, scaled_khz
, shift
, *pmultiplier
);
956 static inline u64
get_kernel_ns(void)
960 WARN_ON(preemptible());
962 monotonic_to_bootbased(&ts
);
963 return timespec_to_ns(&ts
);
966 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz
);
967 unsigned long max_tsc_khz
;
969 static inline int kvm_tsc_changes_freq(void)
972 int ret
= !boot_cpu_has(X86_FEATURE_CONSTANT_TSC
) &&
973 cpufreq_quick_get(cpu
) != 0;
978 static inline u64
nsec_to_cycles(u64 nsec
)
982 WARN_ON(preemptible());
983 if (kvm_tsc_changes_freq())
984 printk_once(KERN_WARNING
985 "kvm: unreliable cycle conversion on adjustable rate TSC\n");
986 ret
= nsec
* __get_cpu_var(cpu_tsc_khz
);
987 do_div(ret
, USEC_PER_SEC
);
991 static void kvm_arch_set_tsc_khz(struct kvm
*kvm
, u32 this_tsc_khz
)
993 /* Compute a scale to convert nanoseconds in TSC cycles */
994 kvm_get_time_scale(this_tsc_khz
, NSEC_PER_SEC
/ 1000,
995 &kvm
->arch
.virtual_tsc_shift
,
996 &kvm
->arch
.virtual_tsc_mult
);
997 kvm
->arch
.virtual_tsc_khz
= this_tsc_khz
;
1000 static u64
compute_guest_tsc(struct kvm_vcpu
*vcpu
, s64 kernel_ns
)
1002 u64 tsc
= pvclock_scale_delta(kernel_ns
-vcpu
->arch
.last_tsc_nsec
,
1003 vcpu
->kvm
->arch
.virtual_tsc_mult
,
1004 vcpu
->kvm
->arch
.virtual_tsc_shift
);
1005 tsc
+= vcpu
->arch
.last_tsc_write
;
1009 void kvm_write_tsc(struct kvm_vcpu
*vcpu
, u64 data
)
1011 struct kvm
*kvm
= vcpu
->kvm
;
1012 u64 offset
, ns
, elapsed
;
1013 unsigned long flags
;
1016 spin_lock_irqsave(&kvm
->arch
.tsc_write_lock
, flags
);
1017 offset
= data
- native_read_tsc();
1018 ns
= get_kernel_ns();
1019 elapsed
= ns
- kvm
->arch
.last_tsc_nsec
;
1020 sdiff
= data
- kvm
->arch
.last_tsc_write
;
1025 * Special case: close write to TSC within 5 seconds of
1026 * another CPU is interpreted as an attempt to synchronize
1027 * The 5 seconds is to accomodate host load / swapping as
1028 * well as any reset of TSC during the boot process.
1030 * In that case, for a reliable TSC, we can match TSC offsets,
1031 * or make a best guest using elapsed value.
1033 if (sdiff
< nsec_to_cycles(5ULL * NSEC_PER_SEC
) &&
1034 elapsed
< 5ULL * NSEC_PER_SEC
) {
1035 if (!check_tsc_unstable()) {
1036 offset
= kvm
->arch
.last_tsc_offset
;
1037 pr_debug("kvm: matched tsc offset for %llu\n", data
);
1039 u64 delta
= nsec_to_cycles(elapsed
);
1041 pr_debug("kvm: adjusted tsc offset by %llu\n", delta
);
1043 ns
= kvm
->arch
.last_tsc_nsec
;
1045 kvm
->arch
.last_tsc_nsec
= ns
;
1046 kvm
->arch
.last_tsc_write
= data
;
1047 kvm
->arch
.last_tsc_offset
= offset
;
1048 kvm_x86_ops
->write_tsc_offset(vcpu
, offset
);
1049 spin_unlock_irqrestore(&kvm
->arch
.tsc_write_lock
, flags
);
1051 /* Reset of TSC must disable overshoot protection below */
1052 vcpu
->arch
.hv_clock
.tsc_timestamp
= 0;
1053 vcpu
->arch
.last_tsc_write
= data
;
1054 vcpu
->arch
.last_tsc_nsec
= ns
;
1056 EXPORT_SYMBOL_GPL(kvm_write_tsc
);
1058 static int kvm_guest_time_update(struct kvm_vcpu
*v
)
1060 unsigned long flags
;
1061 struct kvm_vcpu_arch
*vcpu
= &v
->arch
;
1063 unsigned long this_tsc_khz
;
1064 s64 kernel_ns
, max_kernel_ns
;
1067 /* Keep irq disabled to prevent changes to the clock */
1068 local_irq_save(flags
);
1069 kvm_get_msr(v
, MSR_IA32_TSC
, &tsc_timestamp
);
1070 kernel_ns
= get_kernel_ns();
1071 this_tsc_khz
= __get_cpu_var(cpu_tsc_khz
);
1073 if (unlikely(this_tsc_khz
== 0)) {
1074 local_irq_restore(flags
);
1075 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, v
);
1080 * We may have to catch up the TSC to match elapsed wall clock
1081 * time for two reasons, even if kvmclock is used.
1082 * 1) CPU could have been running below the maximum TSC rate
1083 * 2) Broken TSC compensation resets the base at each VCPU
1084 * entry to avoid unknown leaps of TSC even when running
1085 * again on the same CPU. This may cause apparent elapsed
1086 * time to disappear, and the guest to stand still or run
1089 if (vcpu
->tsc_catchup
) {
1090 u64 tsc
= compute_guest_tsc(v
, kernel_ns
);
1091 if (tsc
> tsc_timestamp
) {
1092 kvm_x86_ops
->adjust_tsc_offset(v
, tsc
- tsc_timestamp
);
1093 tsc_timestamp
= tsc
;
1097 local_irq_restore(flags
);
1099 if (!vcpu
->time_page
)
1103 * Time as measured by the TSC may go backwards when resetting the base
1104 * tsc_timestamp. The reason for this is that the TSC resolution is
1105 * higher than the resolution of the other clock scales. Thus, many
1106 * possible measurments of the TSC correspond to one measurement of any
1107 * other clock, and so a spread of values is possible. This is not a
1108 * problem for the computation of the nanosecond clock; with TSC rates
1109 * around 1GHZ, there can only be a few cycles which correspond to one
1110 * nanosecond value, and any path through this code will inevitably
1111 * take longer than that. However, with the kernel_ns value itself,
1112 * the precision may be much lower, down to HZ granularity. If the
1113 * first sampling of TSC against kernel_ns ends in the low part of the
1114 * range, and the second in the high end of the range, we can get:
1116 * (TSC - offset_low) * S + kns_old > (TSC - offset_high) * S + kns_new
1118 * As the sampling errors potentially range in the thousands of cycles,
1119 * it is possible such a time value has already been observed by the
1120 * guest. To protect against this, we must compute the system time as
1121 * observed by the guest and ensure the new system time is greater.
1124 if (vcpu
->hv_clock
.tsc_timestamp
&& vcpu
->last_guest_tsc
) {
1125 max_kernel_ns
= vcpu
->last_guest_tsc
-
1126 vcpu
->hv_clock
.tsc_timestamp
;
1127 max_kernel_ns
= pvclock_scale_delta(max_kernel_ns
,
1128 vcpu
->hv_clock
.tsc_to_system_mul
,
1129 vcpu
->hv_clock
.tsc_shift
);
1130 max_kernel_ns
+= vcpu
->last_kernel_ns
;
1133 if (unlikely(vcpu
->hw_tsc_khz
!= this_tsc_khz
)) {
1134 kvm_get_time_scale(NSEC_PER_SEC
/ 1000, this_tsc_khz
,
1135 &vcpu
->hv_clock
.tsc_shift
,
1136 &vcpu
->hv_clock
.tsc_to_system_mul
);
1137 vcpu
->hw_tsc_khz
= this_tsc_khz
;
1140 if (max_kernel_ns
> kernel_ns
)
1141 kernel_ns
= max_kernel_ns
;
1143 /* With all the info we got, fill in the values */
1144 vcpu
->hv_clock
.tsc_timestamp
= tsc_timestamp
;
1145 vcpu
->hv_clock
.system_time
= kernel_ns
+ v
->kvm
->arch
.kvmclock_offset
;
1146 vcpu
->last_kernel_ns
= kernel_ns
;
1147 vcpu
->last_guest_tsc
= tsc_timestamp
;
1148 vcpu
->hv_clock
.flags
= 0;
1151 * The interface expects us to write an even number signaling that the
1152 * update is finished. Since the guest won't see the intermediate
1153 * state, we just increase by 2 at the end.
1155 vcpu
->hv_clock
.version
+= 2;
1157 shared_kaddr
= kmap_atomic(vcpu
->time_page
, KM_USER0
);
1159 memcpy(shared_kaddr
+ vcpu
->time_offset
, &vcpu
->hv_clock
,
1160 sizeof(vcpu
->hv_clock
));
1162 kunmap_atomic(shared_kaddr
, KM_USER0
);
1164 mark_page_dirty(v
->kvm
, vcpu
->time
>> PAGE_SHIFT
);
1168 static bool msr_mtrr_valid(unsigned msr
)
1171 case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR
- 1:
1172 case MSR_MTRRfix64K_00000
:
1173 case MSR_MTRRfix16K_80000
:
1174 case MSR_MTRRfix16K_A0000
:
1175 case MSR_MTRRfix4K_C0000
:
1176 case MSR_MTRRfix4K_C8000
:
1177 case MSR_MTRRfix4K_D0000
:
1178 case MSR_MTRRfix4K_D8000
:
1179 case MSR_MTRRfix4K_E0000
:
1180 case MSR_MTRRfix4K_E8000
:
1181 case MSR_MTRRfix4K_F0000
:
1182 case MSR_MTRRfix4K_F8000
:
1183 case MSR_MTRRdefType
:
1184 case MSR_IA32_CR_PAT
:
1192 static bool valid_pat_type(unsigned t
)
1194 return t
< 8 && (1 << t
) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
1197 static bool valid_mtrr_type(unsigned t
)
1199 return t
< 8 && (1 << t
) & 0x73; /* 0, 1, 4, 5, 6 */
1202 static bool mtrr_valid(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1206 if (!msr_mtrr_valid(msr
))
1209 if (msr
== MSR_IA32_CR_PAT
) {
1210 for (i
= 0; i
< 8; i
++)
1211 if (!valid_pat_type((data
>> (i
* 8)) & 0xff))
1214 } else if (msr
== MSR_MTRRdefType
) {
1217 return valid_mtrr_type(data
& 0xff);
1218 } else if (msr
>= MSR_MTRRfix64K_00000
&& msr
<= MSR_MTRRfix4K_F8000
) {
1219 for (i
= 0; i
< 8 ; i
++)
1220 if (!valid_mtrr_type((data
>> (i
* 8)) & 0xff))
1225 /* variable MTRRs */
1226 return valid_mtrr_type(data
& 0xff);
1229 static int set_msr_mtrr(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1231 u64
*p
= (u64
*)&vcpu
->arch
.mtrr_state
.fixed_ranges
;
1233 if (!mtrr_valid(vcpu
, msr
, data
))
1236 if (msr
== MSR_MTRRdefType
) {
1237 vcpu
->arch
.mtrr_state
.def_type
= data
;
1238 vcpu
->arch
.mtrr_state
.enabled
= (data
& 0xc00) >> 10;
1239 } else if (msr
== MSR_MTRRfix64K_00000
)
1241 else if (msr
== MSR_MTRRfix16K_80000
|| msr
== MSR_MTRRfix16K_A0000
)
1242 p
[1 + msr
- MSR_MTRRfix16K_80000
] = data
;
1243 else if (msr
>= MSR_MTRRfix4K_C0000
&& msr
<= MSR_MTRRfix4K_F8000
)
1244 p
[3 + msr
- MSR_MTRRfix4K_C0000
] = data
;
1245 else if (msr
== MSR_IA32_CR_PAT
)
1246 vcpu
->arch
.pat
= data
;
1247 else { /* Variable MTRRs */
1248 int idx
, is_mtrr_mask
;
1251 idx
= (msr
- 0x200) / 2;
1252 is_mtrr_mask
= msr
- 0x200 - 2 * idx
;
1255 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].base_lo
;
1258 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].mask_lo
;
1262 kvm_mmu_reset_context(vcpu
);
1266 static int set_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1268 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
1269 unsigned bank_num
= mcg_cap
& 0xff;
1272 case MSR_IA32_MCG_STATUS
:
1273 vcpu
->arch
.mcg_status
= data
;
1275 case MSR_IA32_MCG_CTL
:
1276 if (!(mcg_cap
& MCG_CTL_P
))
1278 if (data
!= 0 && data
!= ~(u64
)0)
1280 vcpu
->arch
.mcg_ctl
= data
;
1283 if (msr
>= MSR_IA32_MC0_CTL
&&
1284 msr
< MSR_IA32_MC0_CTL
+ 4 * bank_num
) {
1285 u32 offset
= msr
- MSR_IA32_MC0_CTL
;
1286 /* only 0 or all 1s can be written to IA32_MCi_CTL
1287 * some Linux kernels though clear bit 10 in bank 4 to
1288 * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1289 * this to avoid an uncatched #GP in the guest
1291 if ((offset
& 0x3) == 0 &&
1292 data
!= 0 && (data
| (1 << 10)) != ~(u64
)0)
1294 vcpu
->arch
.mce_banks
[offset
] = data
;
1302 static int xen_hvm_config(struct kvm_vcpu
*vcpu
, u64 data
)
1304 struct kvm
*kvm
= vcpu
->kvm
;
1305 int lm
= is_long_mode(vcpu
);
1306 u8
*blob_addr
= lm
? (u8
*)(long)kvm
->arch
.xen_hvm_config
.blob_addr_64
1307 : (u8
*)(long)kvm
->arch
.xen_hvm_config
.blob_addr_32
;
1308 u8 blob_size
= lm
? kvm
->arch
.xen_hvm_config
.blob_size_64
1309 : kvm
->arch
.xen_hvm_config
.blob_size_32
;
1310 u32 page_num
= data
& ~PAGE_MASK
;
1311 u64 page_addr
= data
& PAGE_MASK
;
1316 if (page_num
>= blob_size
)
1319 page
= kzalloc(PAGE_SIZE
, GFP_KERNEL
);
1323 if (copy_from_user(page
, blob_addr
+ (page_num
* PAGE_SIZE
), PAGE_SIZE
))
1325 if (kvm_write_guest(kvm
, page_addr
, page
, PAGE_SIZE
))
1334 static bool kvm_hv_hypercall_enabled(struct kvm
*kvm
)
1336 return kvm
->arch
.hv_hypercall
& HV_X64_MSR_HYPERCALL_ENABLE
;
1339 static bool kvm_hv_msr_partition_wide(u32 msr
)
1343 case HV_X64_MSR_GUEST_OS_ID
:
1344 case HV_X64_MSR_HYPERCALL
:
1352 static int set_msr_hyperv_pw(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1354 struct kvm
*kvm
= vcpu
->kvm
;
1357 case HV_X64_MSR_GUEST_OS_ID
:
1358 kvm
->arch
.hv_guest_os_id
= data
;
1359 /* setting guest os id to zero disables hypercall page */
1360 if (!kvm
->arch
.hv_guest_os_id
)
1361 kvm
->arch
.hv_hypercall
&= ~HV_X64_MSR_HYPERCALL_ENABLE
;
1363 case HV_X64_MSR_HYPERCALL
: {
1368 /* if guest os id is not set hypercall should remain disabled */
1369 if (!kvm
->arch
.hv_guest_os_id
)
1371 if (!(data
& HV_X64_MSR_HYPERCALL_ENABLE
)) {
1372 kvm
->arch
.hv_hypercall
= data
;
1375 gfn
= data
>> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT
;
1376 addr
= gfn_to_hva(kvm
, gfn
);
1377 if (kvm_is_error_hva(addr
))
1379 kvm_x86_ops
->patch_hypercall(vcpu
, instructions
);
1380 ((unsigned char *)instructions
)[3] = 0xc3; /* ret */
1381 if (copy_to_user((void __user
*)addr
, instructions
, 4))
1383 kvm
->arch
.hv_hypercall
= data
;
1387 pr_unimpl(vcpu
, "HYPER-V unimplemented wrmsr: 0x%x "
1388 "data 0x%llx\n", msr
, data
);
1394 static int set_msr_hyperv(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1397 case HV_X64_MSR_APIC_ASSIST_PAGE
: {
1400 if (!(data
& HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE
)) {
1401 vcpu
->arch
.hv_vapic
= data
;
1404 addr
= gfn_to_hva(vcpu
->kvm
, data
>>
1405 HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT
);
1406 if (kvm_is_error_hva(addr
))
1408 if (clear_user((void __user
*)addr
, PAGE_SIZE
))
1410 vcpu
->arch
.hv_vapic
= data
;
1413 case HV_X64_MSR_EOI
:
1414 return kvm_hv_vapic_msr_write(vcpu
, APIC_EOI
, data
);
1415 case HV_X64_MSR_ICR
:
1416 return kvm_hv_vapic_msr_write(vcpu
, APIC_ICR
, data
);
1417 case HV_X64_MSR_TPR
:
1418 return kvm_hv_vapic_msr_write(vcpu
, APIC_TASKPRI
, data
);
1420 pr_unimpl(vcpu
, "HYPER-V unimplemented wrmsr: 0x%x "
1421 "data 0x%llx\n", msr
, data
);
1428 int kvm_set_msr_common(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1432 return set_efer(vcpu
, data
);
1434 data
&= ~(u64
)0x40; /* ignore flush filter disable */
1435 data
&= ~(u64
)0x100; /* ignore ignne emulation enable */
1437 pr_unimpl(vcpu
, "unimplemented HWCR wrmsr: 0x%llx\n",
1442 case MSR_FAM10H_MMIO_CONF_BASE
:
1444 pr_unimpl(vcpu
, "unimplemented MMIO_CONF_BASE wrmsr: "
1449 case MSR_AMD64_NB_CFG
:
1451 case MSR_IA32_DEBUGCTLMSR
:
1453 /* We support the non-activated case already */
1455 } else if (data
& ~(DEBUGCTLMSR_LBR
| DEBUGCTLMSR_BTF
)) {
1456 /* Values other than LBR and BTF are vendor-specific,
1457 thus reserved and should throw a #GP */
1460 pr_unimpl(vcpu
, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
1463 case MSR_IA32_UCODE_REV
:
1464 case MSR_IA32_UCODE_WRITE
:
1465 case MSR_VM_HSAVE_PA
:
1466 case MSR_AMD64_PATCH_LOADER
:
1468 case 0x200 ... 0x2ff:
1469 return set_msr_mtrr(vcpu
, msr
, data
);
1470 case MSR_IA32_APICBASE
:
1471 kvm_set_apic_base(vcpu
, data
);
1473 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0x3ff:
1474 return kvm_x2apic_msr_write(vcpu
, msr
, data
);
1475 case MSR_IA32_MISC_ENABLE
:
1476 vcpu
->arch
.ia32_misc_enable_msr
= data
;
1478 case MSR_KVM_WALL_CLOCK_NEW
:
1479 case MSR_KVM_WALL_CLOCK
:
1480 vcpu
->kvm
->arch
.wall_clock
= data
;
1481 kvm_write_wall_clock(vcpu
->kvm
, data
);
1483 case MSR_KVM_SYSTEM_TIME_NEW
:
1484 case MSR_KVM_SYSTEM_TIME
: {
1485 if (vcpu
->arch
.time_page
) {
1486 kvm_release_page_dirty(vcpu
->arch
.time_page
);
1487 vcpu
->arch
.time_page
= NULL
;
1490 vcpu
->arch
.time
= data
;
1491 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
1493 /* we verify if the enable bit is set... */
1497 /* ...but clean it before doing the actual write */
1498 vcpu
->arch
.time_offset
= data
& ~(PAGE_MASK
| 1);
1500 vcpu
->arch
.time_page
=
1501 gfn_to_page(vcpu
->kvm
, data
>> PAGE_SHIFT
);
1503 if (is_error_page(vcpu
->arch
.time_page
)) {
1504 kvm_release_page_clean(vcpu
->arch
.time_page
);
1505 vcpu
->arch
.time_page
= NULL
;
1509 case MSR_IA32_MCG_CTL
:
1510 case MSR_IA32_MCG_STATUS
:
1511 case MSR_IA32_MC0_CTL
... MSR_IA32_MC0_CTL
+ 4 * KVM_MAX_MCE_BANKS
- 1:
1512 return set_msr_mce(vcpu
, msr
, data
);
1514 /* Performance counters are not protected by a CPUID bit,
1515 * so we should check all of them in the generic path for the sake of
1516 * cross vendor migration.
1517 * Writing a zero into the event select MSRs disables them,
1518 * which we perfectly emulate ;-). Any other value should be at least
1519 * reported, some guests depend on them.
1521 case MSR_P6_EVNTSEL0
:
1522 case MSR_P6_EVNTSEL1
:
1523 case MSR_K7_EVNTSEL0
:
1524 case MSR_K7_EVNTSEL1
:
1525 case MSR_K7_EVNTSEL2
:
1526 case MSR_K7_EVNTSEL3
:
1528 pr_unimpl(vcpu
, "unimplemented perfctr wrmsr: "
1529 "0x%x data 0x%llx\n", msr
, data
);
1531 /* at least RHEL 4 unconditionally writes to the perfctr registers,
1532 * so we ignore writes to make it happy.
1534 case MSR_P6_PERFCTR0
:
1535 case MSR_P6_PERFCTR1
:
1536 case MSR_K7_PERFCTR0
:
1537 case MSR_K7_PERFCTR1
:
1538 case MSR_K7_PERFCTR2
:
1539 case MSR_K7_PERFCTR3
:
1540 pr_unimpl(vcpu
, "unimplemented perfctr wrmsr: "
1541 "0x%x data 0x%llx\n", msr
, data
);
1543 case MSR_K7_CLK_CTL
:
1545 * Ignore all writes to this no longer documented MSR.
1546 * Writes are only relevant for old K7 processors,
1547 * all pre-dating SVM, but a recommended workaround from
1548 * AMD for these chips. It is possible to speicify the
1549 * affected processor models on the command line, hence
1550 * the need to ignore the workaround.
1553 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
1554 if (kvm_hv_msr_partition_wide(msr
)) {
1556 mutex_lock(&vcpu
->kvm
->lock
);
1557 r
= set_msr_hyperv_pw(vcpu
, msr
, data
);
1558 mutex_unlock(&vcpu
->kvm
->lock
);
1561 return set_msr_hyperv(vcpu
, msr
, data
);
1564 if (msr
&& (msr
== vcpu
->kvm
->arch
.xen_hvm_config
.msr
))
1565 return xen_hvm_config(vcpu
, data
);
1567 pr_unimpl(vcpu
, "unhandled wrmsr: 0x%x data %llx\n",
1571 pr_unimpl(vcpu
, "ignored wrmsr: 0x%x data %llx\n",
1578 EXPORT_SYMBOL_GPL(kvm_set_msr_common
);
1582 * Reads an msr value (of 'msr_index') into 'pdata'.
1583 * Returns 0 on success, non-0 otherwise.
1584 * Assumes vcpu_load() was already called.
1586 int kvm_get_msr(struct kvm_vcpu
*vcpu
, u32 msr_index
, u64
*pdata
)
1588 return kvm_x86_ops
->get_msr(vcpu
, msr_index
, pdata
);
1591 static int get_msr_mtrr(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
1593 u64
*p
= (u64
*)&vcpu
->arch
.mtrr_state
.fixed_ranges
;
1595 if (!msr_mtrr_valid(msr
))
1598 if (msr
== MSR_MTRRdefType
)
1599 *pdata
= vcpu
->arch
.mtrr_state
.def_type
+
1600 (vcpu
->arch
.mtrr_state
.enabled
<< 10);
1601 else if (msr
== MSR_MTRRfix64K_00000
)
1603 else if (msr
== MSR_MTRRfix16K_80000
|| msr
== MSR_MTRRfix16K_A0000
)
1604 *pdata
= p
[1 + msr
- MSR_MTRRfix16K_80000
];
1605 else if (msr
>= MSR_MTRRfix4K_C0000
&& msr
<= MSR_MTRRfix4K_F8000
)
1606 *pdata
= p
[3 + msr
- MSR_MTRRfix4K_C0000
];
1607 else if (msr
== MSR_IA32_CR_PAT
)
1608 *pdata
= vcpu
->arch
.pat
;
1609 else { /* Variable MTRRs */
1610 int idx
, is_mtrr_mask
;
1613 idx
= (msr
- 0x200) / 2;
1614 is_mtrr_mask
= msr
- 0x200 - 2 * idx
;
1617 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].base_lo
;
1620 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].mask_lo
;
1627 static int get_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
1630 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
1631 unsigned bank_num
= mcg_cap
& 0xff;
1634 case MSR_IA32_P5_MC_ADDR
:
1635 case MSR_IA32_P5_MC_TYPE
:
1638 case MSR_IA32_MCG_CAP
:
1639 data
= vcpu
->arch
.mcg_cap
;
1641 case MSR_IA32_MCG_CTL
:
1642 if (!(mcg_cap
& MCG_CTL_P
))
1644 data
= vcpu
->arch
.mcg_ctl
;
1646 case MSR_IA32_MCG_STATUS
:
1647 data
= vcpu
->arch
.mcg_status
;
1650 if (msr
>= MSR_IA32_MC0_CTL
&&
1651 msr
< MSR_IA32_MC0_CTL
+ 4 * bank_num
) {
1652 u32 offset
= msr
- MSR_IA32_MC0_CTL
;
1653 data
= vcpu
->arch
.mce_banks
[offset
];
1662 static int get_msr_hyperv_pw(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
1665 struct kvm
*kvm
= vcpu
->kvm
;
1668 case HV_X64_MSR_GUEST_OS_ID
:
1669 data
= kvm
->arch
.hv_guest_os_id
;
1671 case HV_X64_MSR_HYPERCALL
:
1672 data
= kvm
->arch
.hv_hypercall
;
1675 pr_unimpl(vcpu
, "Hyper-V unhandled rdmsr: 0x%x\n", msr
);
1683 static int get_msr_hyperv(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
1688 case HV_X64_MSR_VP_INDEX
: {
1691 kvm_for_each_vcpu(r
, v
, vcpu
->kvm
)
1696 case HV_X64_MSR_EOI
:
1697 return kvm_hv_vapic_msr_read(vcpu
, APIC_EOI
, pdata
);
1698 case HV_X64_MSR_ICR
:
1699 return kvm_hv_vapic_msr_read(vcpu
, APIC_ICR
, pdata
);
1700 case HV_X64_MSR_TPR
:
1701 return kvm_hv_vapic_msr_read(vcpu
, APIC_TASKPRI
, pdata
);
1703 pr_unimpl(vcpu
, "Hyper-V unhandled rdmsr: 0x%x\n", msr
);
1710 int kvm_get_msr_common(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
1715 case MSR_IA32_PLATFORM_ID
:
1716 case MSR_IA32_UCODE_REV
:
1717 case MSR_IA32_EBL_CR_POWERON
:
1718 case MSR_IA32_DEBUGCTLMSR
:
1719 case MSR_IA32_LASTBRANCHFROMIP
:
1720 case MSR_IA32_LASTBRANCHTOIP
:
1721 case MSR_IA32_LASTINTFROMIP
:
1722 case MSR_IA32_LASTINTTOIP
:
1725 case MSR_VM_HSAVE_PA
:
1726 case MSR_P6_PERFCTR0
:
1727 case MSR_P6_PERFCTR1
:
1728 case MSR_P6_EVNTSEL0
:
1729 case MSR_P6_EVNTSEL1
:
1730 case MSR_K7_EVNTSEL0
:
1731 case MSR_K7_PERFCTR0
:
1732 case MSR_K8_INT_PENDING_MSG
:
1733 case MSR_AMD64_NB_CFG
:
1734 case MSR_FAM10H_MMIO_CONF_BASE
:
1738 data
= 0x500 | KVM_NR_VAR_MTRR
;
1740 case 0x200 ... 0x2ff:
1741 return get_msr_mtrr(vcpu
, msr
, pdata
);
1742 case 0xcd: /* fsb frequency */
1746 * MSR_EBC_FREQUENCY_ID
1747 * Conservative value valid for even the basic CPU models.
1748 * Models 0,1: 000 in bits 23:21 indicating a bus speed of
1749 * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
1750 * and 266MHz for model 3, or 4. Set Core Clock
1751 * Frequency to System Bus Frequency Ratio to 1 (bits
1752 * 31:24) even though these are only valid for CPU
1753 * models > 2, however guests may end up dividing or
1754 * multiplying by zero otherwise.
1756 case MSR_EBC_FREQUENCY_ID
:
1759 case MSR_IA32_APICBASE
:
1760 data
= kvm_get_apic_base(vcpu
);
1762 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0x3ff:
1763 return kvm_x2apic_msr_read(vcpu
, msr
, pdata
);
1765 case MSR_IA32_MISC_ENABLE
:
1766 data
= vcpu
->arch
.ia32_misc_enable_msr
;
1768 case MSR_IA32_PERF_STATUS
:
1769 /* TSC increment by tick */
1771 /* CPU multiplier */
1772 data
|= (((uint64_t)4ULL) << 40);
1775 data
= vcpu
->arch
.efer
;
1777 case MSR_KVM_WALL_CLOCK
:
1778 case MSR_KVM_WALL_CLOCK_NEW
:
1779 data
= vcpu
->kvm
->arch
.wall_clock
;
1781 case MSR_KVM_SYSTEM_TIME
:
1782 case MSR_KVM_SYSTEM_TIME_NEW
:
1783 data
= vcpu
->arch
.time
;
1785 case MSR_IA32_P5_MC_ADDR
:
1786 case MSR_IA32_P5_MC_TYPE
:
1787 case MSR_IA32_MCG_CAP
:
1788 case MSR_IA32_MCG_CTL
:
1789 case MSR_IA32_MCG_STATUS
:
1790 case MSR_IA32_MC0_CTL
... MSR_IA32_MC0_CTL
+ 4 * KVM_MAX_MCE_BANKS
- 1:
1791 return get_msr_mce(vcpu
, msr
, pdata
);
1792 case MSR_K7_CLK_CTL
:
1794 * Provide expected ramp-up count for K7. All other
1795 * are set to zero, indicating minimum divisors for
1798 * This prevents guest kernels on AMD host with CPU
1799 * type 6, model 8 and higher from exploding due to
1800 * the rdmsr failing.
1804 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
1805 if (kvm_hv_msr_partition_wide(msr
)) {
1807 mutex_lock(&vcpu
->kvm
->lock
);
1808 r
= get_msr_hyperv_pw(vcpu
, msr
, pdata
);
1809 mutex_unlock(&vcpu
->kvm
->lock
);
1812 return get_msr_hyperv(vcpu
, msr
, pdata
);
1816 pr_unimpl(vcpu
, "unhandled rdmsr: 0x%x\n", msr
);
1819 pr_unimpl(vcpu
, "ignored rdmsr: 0x%x\n", msr
);
1827 EXPORT_SYMBOL_GPL(kvm_get_msr_common
);
1830 * Read or write a bunch of msrs. All parameters are kernel addresses.
1832 * @return number of msrs set successfully.
1834 static int __msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs
*msrs
,
1835 struct kvm_msr_entry
*entries
,
1836 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
1837 unsigned index
, u64
*data
))
1841 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
1842 for (i
= 0; i
< msrs
->nmsrs
; ++i
)
1843 if (do_msr(vcpu
, entries
[i
].index
, &entries
[i
].data
))
1845 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
1851 * Read or write a bunch of msrs. Parameters are user addresses.
1853 * @return number of msrs set successfully.
1855 static int msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs __user
*user_msrs
,
1856 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
1857 unsigned index
, u64
*data
),
1860 struct kvm_msrs msrs
;
1861 struct kvm_msr_entry
*entries
;
1866 if (copy_from_user(&msrs
, user_msrs
, sizeof msrs
))
1870 if (msrs
.nmsrs
>= MAX_IO_MSRS
)
1874 size
= sizeof(struct kvm_msr_entry
) * msrs
.nmsrs
;
1875 entries
= kmalloc(size
, GFP_KERNEL
);
1880 if (copy_from_user(entries
, user_msrs
->entries
, size
))
1883 r
= n
= __msr_io(vcpu
, &msrs
, entries
, do_msr
);
1888 if (writeback
&& copy_to_user(user_msrs
->entries
, entries
, size
))
1899 int kvm_dev_ioctl_check_extension(long ext
)
1904 case KVM_CAP_IRQCHIP
:
1906 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL
:
1907 case KVM_CAP_SET_TSS_ADDR
:
1908 case KVM_CAP_EXT_CPUID
:
1909 case KVM_CAP_CLOCKSOURCE
:
1911 case KVM_CAP_NOP_IO_DELAY
:
1912 case KVM_CAP_MP_STATE
:
1913 case KVM_CAP_SYNC_MMU
:
1914 case KVM_CAP_REINJECT_CONTROL
:
1915 case KVM_CAP_IRQ_INJECT_STATUS
:
1916 case KVM_CAP_ASSIGN_DEV_IRQ
:
1918 case KVM_CAP_IOEVENTFD
:
1920 case KVM_CAP_PIT_STATE2
:
1921 case KVM_CAP_SET_IDENTITY_MAP_ADDR
:
1922 case KVM_CAP_XEN_HVM
:
1923 case KVM_CAP_ADJUST_CLOCK
:
1924 case KVM_CAP_VCPU_EVENTS
:
1925 case KVM_CAP_HYPERV
:
1926 case KVM_CAP_HYPERV_VAPIC
:
1927 case KVM_CAP_HYPERV_SPIN
:
1928 case KVM_CAP_PCI_SEGMENT
:
1929 case KVM_CAP_DEBUGREGS
:
1930 case KVM_CAP_X86_ROBUST_SINGLESTEP
:
1934 case KVM_CAP_COALESCED_MMIO
:
1935 r
= KVM_COALESCED_MMIO_PAGE_OFFSET
;
1938 r
= !kvm_x86_ops
->cpu_has_accelerated_tpr();
1940 case KVM_CAP_NR_VCPUS
:
1943 case KVM_CAP_NR_MEMSLOTS
:
1944 r
= KVM_MEMORY_SLOTS
;
1946 case KVM_CAP_PV_MMU
: /* obsolete */
1953 r
= KVM_MAX_MCE_BANKS
;
1966 long kvm_arch_dev_ioctl(struct file
*filp
,
1967 unsigned int ioctl
, unsigned long arg
)
1969 void __user
*argp
= (void __user
*)arg
;
1973 case KVM_GET_MSR_INDEX_LIST
: {
1974 struct kvm_msr_list __user
*user_msr_list
= argp
;
1975 struct kvm_msr_list msr_list
;
1979 if (copy_from_user(&msr_list
, user_msr_list
, sizeof msr_list
))
1982 msr_list
.nmsrs
= num_msrs_to_save
+ ARRAY_SIZE(emulated_msrs
);
1983 if (copy_to_user(user_msr_list
, &msr_list
, sizeof msr_list
))
1986 if (n
< msr_list
.nmsrs
)
1989 if (copy_to_user(user_msr_list
->indices
, &msrs_to_save
,
1990 num_msrs_to_save
* sizeof(u32
)))
1992 if (copy_to_user(user_msr_list
->indices
+ num_msrs_to_save
,
1994 ARRAY_SIZE(emulated_msrs
) * sizeof(u32
)))
1999 case KVM_GET_SUPPORTED_CPUID
: {
2000 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
2001 struct kvm_cpuid2 cpuid
;
2004 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
2006 r
= kvm_dev_ioctl_get_supported_cpuid(&cpuid
,
2007 cpuid_arg
->entries
);
2012 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof cpuid
))
2017 case KVM_X86_GET_MCE_CAP_SUPPORTED
: {
2020 mce_cap
= KVM_MCE_CAP_SUPPORTED
;
2022 if (copy_to_user(argp
, &mce_cap
, sizeof mce_cap
))
2034 static void wbinvd_ipi(void *garbage
)
2039 static bool need_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
2041 return vcpu
->kvm
->arch
.iommu_domain
&&
2042 !(vcpu
->kvm
->arch
.iommu_flags
& KVM_IOMMU_CACHE_COHERENCY
);
2045 void kvm_arch_vcpu_load(struct kvm_vcpu
*vcpu
, int cpu
)
2047 /* Address WBINVD may be executed by guest */
2048 if (need_emulate_wbinvd(vcpu
)) {
2049 if (kvm_x86_ops
->has_wbinvd_exit())
2050 cpumask_set_cpu(cpu
, vcpu
->arch
.wbinvd_dirty_mask
);
2051 else if (vcpu
->cpu
!= -1 && vcpu
->cpu
!= cpu
)
2052 smp_call_function_single(vcpu
->cpu
,
2053 wbinvd_ipi
, NULL
, 1);
2056 kvm_x86_ops
->vcpu_load(vcpu
, cpu
);
2057 if (unlikely(vcpu
->cpu
!= cpu
) || check_tsc_unstable()) {
2058 /* Make sure TSC doesn't go backwards */
2059 s64 tsc_delta
= !vcpu
->arch
.last_host_tsc
? 0 :
2060 native_read_tsc() - vcpu
->arch
.last_host_tsc
;
2062 mark_tsc_unstable("KVM discovered backwards TSC");
2063 if (check_tsc_unstable()) {
2064 kvm_x86_ops
->adjust_tsc_offset(vcpu
, -tsc_delta
);
2065 vcpu
->arch
.tsc_catchup
= 1;
2066 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
2068 if (vcpu
->cpu
!= cpu
)
2069 kvm_migrate_timers(vcpu
);
2074 void kvm_arch_vcpu_put(struct kvm_vcpu
*vcpu
)
2076 kvm_x86_ops
->vcpu_put(vcpu
);
2077 kvm_put_guest_fpu(vcpu
);
2078 vcpu
->arch
.last_host_tsc
= native_read_tsc();
2081 static int is_efer_nx(void)
2083 unsigned long long efer
= 0;
2085 rdmsrl_safe(MSR_EFER
, &efer
);
2086 return efer
& EFER_NX
;
2089 static void cpuid_fix_nx_cap(struct kvm_vcpu
*vcpu
)
2092 struct kvm_cpuid_entry2
*e
, *entry
;
2095 for (i
= 0; i
< vcpu
->arch
.cpuid_nent
; ++i
) {
2096 e
= &vcpu
->arch
.cpuid_entries
[i
];
2097 if (e
->function
== 0x80000001) {
2102 if (entry
&& (entry
->edx
& (1 << 20)) && !is_efer_nx()) {
2103 entry
->edx
&= ~(1 << 20);
2104 printk(KERN_INFO
"kvm: guest NX capability removed\n");
2108 /* when an old userspace process fills a new kernel module */
2109 static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu
*vcpu
,
2110 struct kvm_cpuid
*cpuid
,
2111 struct kvm_cpuid_entry __user
*entries
)
2114 struct kvm_cpuid_entry
*cpuid_entries
;
2117 if (cpuid
->nent
> KVM_MAX_CPUID_ENTRIES
)
2120 cpuid_entries
= vmalloc(sizeof(struct kvm_cpuid_entry
) * cpuid
->nent
);
2124 if (copy_from_user(cpuid_entries
, entries
,
2125 cpuid
->nent
* sizeof(struct kvm_cpuid_entry
)))
2127 for (i
= 0; i
< cpuid
->nent
; i
++) {
2128 vcpu
->arch
.cpuid_entries
[i
].function
= cpuid_entries
[i
].function
;
2129 vcpu
->arch
.cpuid_entries
[i
].eax
= cpuid_entries
[i
].eax
;
2130 vcpu
->arch
.cpuid_entries
[i
].ebx
= cpuid_entries
[i
].ebx
;
2131 vcpu
->arch
.cpuid_entries
[i
].ecx
= cpuid_entries
[i
].ecx
;
2132 vcpu
->arch
.cpuid_entries
[i
].edx
= cpuid_entries
[i
].edx
;
2133 vcpu
->arch
.cpuid_entries
[i
].index
= 0;
2134 vcpu
->arch
.cpuid_entries
[i
].flags
= 0;
2135 vcpu
->arch
.cpuid_entries
[i
].padding
[0] = 0;
2136 vcpu
->arch
.cpuid_entries
[i
].padding
[1] = 0;
2137 vcpu
->arch
.cpuid_entries
[i
].padding
[2] = 0;
2139 vcpu
->arch
.cpuid_nent
= cpuid
->nent
;
2140 cpuid_fix_nx_cap(vcpu
);
2142 kvm_apic_set_version(vcpu
);
2143 kvm_x86_ops
->cpuid_update(vcpu
);
2147 vfree(cpuid_entries
);
2152 static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu
*vcpu
,
2153 struct kvm_cpuid2
*cpuid
,
2154 struct kvm_cpuid_entry2 __user
*entries
)
2159 if (cpuid
->nent
> KVM_MAX_CPUID_ENTRIES
)
2162 if (copy_from_user(&vcpu
->arch
.cpuid_entries
, entries
,
2163 cpuid
->nent
* sizeof(struct kvm_cpuid_entry2
)))
2165 vcpu
->arch
.cpuid_nent
= cpuid
->nent
;
2166 kvm_apic_set_version(vcpu
);
2167 kvm_x86_ops
->cpuid_update(vcpu
);
2175 static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu
*vcpu
,
2176 struct kvm_cpuid2
*cpuid
,
2177 struct kvm_cpuid_entry2 __user
*entries
)
2182 if (cpuid
->nent
< vcpu
->arch
.cpuid_nent
)
2185 if (copy_to_user(entries
, &vcpu
->arch
.cpuid_entries
,
2186 vcpu
->arch
.cpuid_nent
* sizeof(struct kvm_cpuid_entry2
)))
2191 cpuid
->nent
= vcpu
->arch
.cpuid_nent
;
2195 static void do_cpuid_1_ent(struct kvm_cpuid_entry2
*entry
, u32 function
,
2198 entry
->function
= function
;
2199 entry
->index
= index
;
2200 cpuid_count(entry
->function
, entry
->index
,
2201 &entry
->eax
, &entry
->ebx
, &entry
->ecx
, &entry
->edx
);
2205 #define F(x) bit(X86_FEATURE_##x)
2207 static void do_cpuid_ent(struct kvm_cpuid_entry2
*entry
, u32 function
,
2208 u32 index
, int *nent
, int maxnent
)
2210 unsigned f_nx
= is_efer_nx() ? F(NX
) : 0;
2211 #ifdef CONFIG_X86_64
2212 unsigned f_gbpages
= (kvm_x86_ops
->get_lpage_level() == PT_PDPE_LEVEL
)
2214 unsigned f_lm
= F(LM
);
2216 unsigned f_gbpages
= 0;
2219 unsigned f_rdtscp
= kvm_x86_ops
->rdtscp_supported() ? F(RDTSCP
) : 0;
2222 const u32 kvm_supported_word0_x86_features
=
2223 F(FPU
) | F(VME
) | F(DE
) | F(PSE
) |
2224 F(TSC
) | F(MSR
) | F(PAE
) | F(MCE
) |
2225 F(CX8
) | F(APIC
) | 0 /* Reserved */ | F(SEP
) |
2226 F(MTRR
) | F(PGE
) | F(MCA
) | F(CMOV
) |
2227 F(PAT
) | F(PSE36
) | 0 /* PSN */ | F(CLFLSH
) |
2228 0 /* Reserved, DS, ACPI */ | F(MMX
) |
2229 F(FXSR
) | F(XMM
) | F(XMM2
) | F(SELFSNOOP
) |
2230 0 /* HTT, TM, Reserved, PBE */;
2231 /* cpuid 0x80000001.edx */
2232 const u32 kvm_supported_word1_x86_features
=
2233 F(FPU
) | F(VME
) | F(DE
) | F(PSE
) |
2234 F(TSC
) | F(MSR
) | F(PAE
) | F(MCE
) |
2235 F(CX8
) | F(APIC
) | 0 /* Reserved */ | F(SYSCALL
) |
2236 F(MTRR
) | F(PGE
) | F(MCA
) | F(CMOV
) |
2237 F(PAT
) | F(PSE36
) | 0 /* Reserved */ |
2238 f_nx
| 0 /* Reserved */ | F(MMXEXT
) | F(MMX
) |
2239 F(FXSR
) | F(FXSR_OPT
) | f_gbpages
| f_rdtscp
|
2240 0 /* Reserved */ | f_lm
| F(3DNOWEXT
) | F(3DNOW
);
2242 const u32 kvm_supported_word4_x86_features
=
2243 F(XMM3
) | F(PCLMULQDQ
) | 0 /* DTES64, MONITOR */ |
2244 0 /* DS-CPL, VMX, SMX, EST */ |
2245 0 /* TM2 */ | F(SSSE3
) | 0 /* CNXT-ID */ | 0 /* Reserved */ |
2246 0 /* Reserved */ | F(CX16
) | 0 /* xTPR Update, PDCM */ |
2247 0 /* Reserved, DCA */ | F(XMM4_1
) |
2248 F(XMM4_2
) | F(X2APIC
) | F(MOVBE
) | F(POPCNT
) |
2249 0 /* Reserved*/ | F(AES
) | F(XSAVE
) | 0 /* OSXSAVE */ | F(AVX
) |
2251 /* cpuid 0x80000001.ecx */
2252 const u32 kvm_supported_word6_x86_features
=
2253 F(LAHF_LM
) | F(CMP_LEGACY
) | 0 /*SVM*/ | 0 /* ExtApicSpace */ |
2254 F(CR8_LEGACY
) | F(ABM
) | F(SSE4A
) | F(MISALIGNSSE
) |
2255 F(3DNOWPREFETCH
) | 0 /* OSVW */ | 0 /* IBS */ | F(XOP
) |
2256 0 /* SKINIT, WDT, LWP */ | F(FMA4
) | F(TBM
);
2258 /* all calls to cpuid_count() should be made on the same cpu */
2260 do_cpuid_1_ent(entry
, function
, index
);
2265 entry
->eax
= min(entry
->eax
, (u32
)0xd);
2268 entry
->edx
&= kvm_supported_word0_x86_features
;
2269 entry
->ecx
&= kvm_supported_word4_x86_features
;
2270 /* we support x2apic emulation even if host does not support
2271 * it since we emulate x2apic in software */
2272 entry
->ecx
|= F(X2APIC
);
2274 /* function 2 entries are STATEFUL. That is, repeated cpuid commands
2275 * may return different values. This forces us to get_cpu() before
2276 * issuing the first command, and also to emulate this annoying behavior
2277 * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
2279 int t
, times
= entry
->eax
& 0xff;
2281 entry
->flags
|= KVM_CPUID_FLAG_STATEFUL_FUNC
;
2282 entry
->flags
|= KVM_CPUID_FLAG_STATE_READ_NEXT
;
2283 for (t
= 1; t
< times
&& *nent
< maxnent
; ++t
) {
2284 do_cpuid_1_ent(&entry
[t
], function
, 0);
2285 entry
[t
].flags
|= KVM_CPUID_FLAG_STATEFUL_FUNC
;
2290 /* function 4 and 0xb have additional index. */
2294 entry
->flags
|= KVM_CPUID_FLAG_SIGNIFCANT_INDEX
;
2295 /* read more entries until cache_type is zero */
2296 for (i
= 1; *nent
< maxnent
; ++i
) {
2297 cache_type
= entry
[i
- 1].eax
& 0x1f;
2300 do_cpuid_1_ent(&entry
[i
], function
, i
);
2302 KVM_CPUID_FLAG_SIGNIFCANT_INDEX
;
2310 entry
->flags
|= KVM_CPUID_FLAG_SIGNIFCANT_INDEX
;
2311 /* read more entries until level_type is zero */
2312 for (i
= 1; *nent
< maxnent
; ++i
) {
2313 level_type
= entry
[i
- 1].ecx
& 0xff00;
2316 do_cpuid_1_ent(&entry
[i
], function
, i
);
2318 KVM_CPUID_FLAG_SIGNIFCANT_INDEX
;
2326 entry
->flags
|= KVM_CPUID_FLAG_SIGNIFCANT_INDEX
;
2327 for (i
= 1; *nent
< maxnent
; ++i
) {
2328 if (entry
[i
- 1].eax
== 0 && i
!= 2)
2330 do_cpuid_1_ent(&entry
[i
], function
, i
);
2332 KVM_CPUID_FLAG_SIGNIFCANT_INDEX
;
2337 case KVM_CPUID_SIGNATURE
: {
2338 char signature
[12] = "KVMKVMKVM\0\0";
2339 u32
*sigptr
= (u32
*)signature
;
2341 entry
->ebx
= sigptr
[0];
2342 entry
->ecx
= sigptr
[1];
2343 entry
->edx
= sigptr
[2];
2346 case KVM_CPUID_FEATURES
:
2347 entry
->eax
= (1 << KVM_FEATURE_CLOCKSOURCE
) |
2348 (1 << KVM_FEATURE_NOP_IO_DELAY
) |
2349 (1 << KVM_FEATURE_CLOCKSOURCE2
) |
2350 (1 << KVM_FEATURE_CLOCKSOURCE_STABLE_BIT
);
2356 entry
->eax
= min(entry
->eax
, 0x8000001a);
2359 entry
->edx
&= kvm_supported_word1_x86_features
;
2360 entry
->ecx
&= kvm_supported_word6_x86_features
;
2364 kvm_x86_ops
->set_supported_cpuid(function
, entry
);
2371 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2
*cpuid
,
2372 struct kvm_cpuid_entry2 __user
*entries
)
2374 struct kvm_cpuid_entry2
*cpuid_entries
;
2375 int limit
, nent
= 0, r
= -E2BIG
;
2378 if (cpuid
->nent
< 1)
2380 if (cpuid
->nent
> KVM_MAX_CPUID_ENTRIES
)
2381 cpuid
->nent
= KVM_MAX_CPUID_ENTRIES
;
2383 cpuid_entries
= vmalloc(sizeof(struct kvm_cpuid_entry2
) * cpuid
->nent
);
2387 do_cpuid_ent(&cpuid_entries
[0], 0, 0, &nent
, cpuid
->nent
);
2388 limit
= cpuid_entries
[0].eax
;
2389 for (func
= 1; func
<= limit
&& nent
< cpuid
->nent
; ++func
)
2390 do_cpuid_ent(&cpuid_entries
[nent
], func
, 0,
2391 &nent
, cpuid
->nent
);
2393 if (nent
>= cpuid
->nent
)
2396 do_cpuid_ent(&cpuid_entries
[nent
], 0x80000000, 0, &nent
, cpuid
->nent
);
2397 limit
= cpuid_entries
[nent
- 1].eax
;
2398 for (func
= 0x80000001; func
<= limit
&& nent
< cpuid
->nent
; ++func
)
2399 do_cpuid_ent(&cpuid_entries
[nent
], func
, 0,
2400 &nent
, cpuid
->nent
);
2405 if (nent
>= cpuid
->nent
)
2408 do_cpuid_ent(&cpuid_entries
[nent
], KVM_CPUID_SIGNATURE
, 0, &nent
,
2412 if (nent
>= cpuid
->nent
)
2415 do_cpuid_ent(&cpuid_entries
[nent
], KVM_CPUID_FEATURES
, 0, &nent
,
2419 if (nent
>= cpuid
->nent
)
2423 if (copy_to_user(entries
, cpuid_entries
,
2424 nent
* sizeof(struct kvm_cpuid_entry2
)))
2430 vfree(cpuid_entries
);
2435 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu
*vcpu
,
2436 struct kvm_lapic_state
*s
)
2438 memcpy(s
->regs
, vcpu
->arch
.apic
->regs
, sizeof *s
);
2443 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu
*vcpu
,
2444 struct kvm_lapic_state
*s
)
2446 memcpy(vcpu
->arch
.apic
->regs
, s
->regs
, sizeof *s
);
2447 kvm_apic_post_state_restore(vcpu
);
2448 update_cr8_intercept(vcpu
);
2453 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu
*vcpu
,
2454 struct kvm_interrupt
*irq
)
2456 if (irq
->irq
< 0 || irq
->irq
>= 256)
2458 if (irqchip_in_kernel(vcpu
->kvm
))
2461 kvm_queue_interrupt(vcpu
, irq
->irq
, false);
2462 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
2467 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu
*vcpu
)
2469 kvm_inject_nmi(vcpu
);
2474 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu
*vcpu
,
2475 struct kvm_tpr_access_ctl
*tac
)
2479 vcpu
->arch
.tpr_access_reporting
= !!tac
->enabled
;
2483 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu
*vcpu
,
2487 unsigned bank_num
= mcg_cap
& 0xff, bank
;
2490 if (!bank_num
|| bank_num
>= KVM_MAX_MCE_BANKS
)
2492 if (mcg_cap
& ~(KVM_MCE_CAP_SUPPORTED
| 0xff | 0xff0000))
2495 vcpu
->arch
.mcg_cap
= mcg_cap
;
2496 /* Init IA32_MCG_CTL to all 1s */
2497 if (mcg_cap
& MCG_CTL_P
)
2498 vcpu
->arch
.mcg_ctl
= ~(u64
)0;
2499 /* Init IA32_MCi_CTL to all 1s */
2500 for (bank
= 0; bank
< bank_num
; bank
++)
2501 vcpu
->arch
.mce_banks
[bank
*4] = ~(u64
)0;
2506 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu
*vcpu
,
2507 struct kvm_x86_mce
*mce
)
2509 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
2510 unsigned bank_num
= mcg_cap
& 0xff;
2511 u64
*banks
= vcpu
->arch
.mce_banks
;
2513 if (mce
->bank
>= bank_num
|| !(mce
->status
& MCI_STATUS_VAL
))
2516 * if IA32_MCG_CTL is not all 1s, the uncorrected error
2517 * reporting is disabled
2519 if ((mce
->status
& MCI_STATUS_UC
) && (mcg_cap
& MCG_CTL_P
) &&
2520 vcpu
->arch
.mcg_ctl
!= ~(u64
)0)
2522 banks
+= 4 * mce
->bank
;
2524 * if IA32_MCi_CTL is not all 1s, the uncorrected error
2525 * reporting is disabled for the bank
2527 if ((mce
->status
& MCI_STATUS_UC
) && banks
[0] != ~(u64
)0)
2529 if (mce
->status
& MCI_STATUS_UC
) {
2530 if ((vcpu
->arch
.mcg_status
& MCG_STATUS_MCIP
) ||
2531 !kvm_read_cr4_bits(vcpu
, X86_CR4_MCE
)) {
2532 printk(KERN_DEBUG
"kvm: set_mce: "
2533 "injects mce exception while "
2534 "previous one is in progress!\n");
2535 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
2538 if (banks
[1] & MCI_STATUS_VAL
)
2539 mce
->status
|= MCI_STATUS_OVER
;
2540 banks
[2] = mce
->addr
;
2541 banks
[3] = mce
->misc
;
2542 vcpu
->arch
.mcg_status
= mce
->mcg_status
;
2543 banks
[1] = mce
->status
;
2544 kvm_queue_exception(vcpu
, MC_VECTOR
);
2545 } else if (!(banks
[1] & MCI_STATUS_VAL
)
2546 || !(banks
[1] & MCI_STATUS_UC
)) {
2547 if (banks
[1] & MCI_STATUS_VAL
)
2548 mce
->status
|= MCI_STATUS_OVER
;
2549 banks
[2] = mce
->addr
;
2550 banks
[3] = mce
->misc
;
2551 banks
[1] = mce
->status
;
2553 banks
[1] |= MCI_STATUS_OVER
;
2557 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu
*vcpu
,
2558 struct kvm_vcpu_events
*events
)
2560 events
->exception
.injected
=
2561 vcpu
->arch
.exception
.pending
&&
2562 !kvm_exception_is_soft(vcpu
->arch
.exception
.nr
);
2563 events
->exception
.nr
= vcpu
->arch
.exception
.nr
;
2564 events
->exception
.has_error_code
= vcpu
->arch
.exception
.has_error_code
;
2565 events
->exception
.pad
= 0;
2566 events
->exception
.error_code
= vcpu
->arch
.exception
.error_code
;
2568 events
->interrupt
.injected
=
2569 vcpu
->arch
.interrupt
.pending
&& !vcpu
->arch
.interrupt
.soft
;
2570 events
->interrupt
.nr
= vcpu
->arch
.interrupt
.nr
;
2571 events
->interrupt
.soft
= 0;
2572 events
->interrupt
.shadow
=
2573 kvm_x86_ops
->get_interrupt_shadow(vcpu
,
2574 KVM_X86_SHADOW_INT_MOV_SS
| KVM_X86_SHADOW_INT_STI
);
2576 events
->nmi
.injected
= vcpu
->arch
.nmi_injected
;
2577 events
->nmi
.pending
= vcpu
->arch
.nmi_pending
;
2578 events
->nmi
.masked
= kvm_x86_ops
->get_nmi_mask(vcpu
);
2579 events
->nmi
.pad
= 0;
2581 events
->sipi_vector
= vcpu
->arch
.sipi_vector
;
2583 events
->flags
= (KVM_VCPUEVENT_VALID_NMI_PENDING
2584 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2585 | KVM_VCPUEVENT_VALID_SHADOW
);
2586 memset(&events
->reserved
, 0, sizeof(events
->reserved
));
2589 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu
*vcpu
,
2590 struct kvm_vcpu_events
*events
)
2592 if (events
->flags
& ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2593 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2594 | KVM_VCPUEVENT_VALID_SHADOW
))
2597 vcpu
->arch
.exception
.pending
= events
->exception
.injected
;
2598 vcpu
->arch
.exception
.nr
= events
->exception
.nr
;
2599 vcpu
->arch
.exception
.has_error_code
= events
->exception
.has_error_code
;
2600 vcpu
->arch
.exception
.error_code
= events
->exception
.error_code
;
2602 vcpu
->arch
.interrupt
.pending
= events
->interrupt
.injected
;
2603 vcpu
->arch
.interrupt
.nr
= events
->interrupt
.nr
;
2604 vcpu
->arch
.interrupt
.soft
= events
->interrupt
.soft
;
2605 if (vcpu
->arch
.interrupt
.pending
&& irqchip_in_kernel(vcpu
->kvm
))
2606 kvm_pic_clear_isr_ack(vcpu
->kvm
);
2607 if (events
->flags
& KVM_VCPUEVENT_VALID_SHADOW
)
2608 kvm_x86_ops
->set_interrupt_shadow(vcpu
,
2609 events
->interrupt
.shadow
);
2611 vcpu
->arch
.nmi_injected
= events
->nmi
.injected
;
2612 if (events
->flags
& KVM_VCPUEVENT_VALID_NMI_PENDING
)
2613 vcpu
->arch
.nmi_pending
= events
->nmi
.pending
;
2614 kvm_x86_ops
->set_nmi_mask(vcpu
, events
->nmi
.masked
);
2616 if (events
->flags
& KVM_VCPUEVENT_VALID_SIPI_VECTOR
)
2617 vcpu
->arch
.sipi_vector
= events
->sipi_vector
;
2619 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
2624 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu
*vcpu
,
2625 struct kvm_debugregs
*dbgregs
)
2627 memcpy(dbgregs
->db
, vcpu
->arch
.db
, sizeof(vcpu
->arch
.db
));
2628 dbgregs
->dr6
= vcpu
->arch
.dr6
;
2629 dbgregs
->dr7
= vcpu
->arch
.dr7
;
2631 memset(&dbgregs
->reserved
, 0, sizeof(dbgregs
->reserved
));
2634 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu
*vcpu
,
2635 struct kvm_debugregs
*dbgregs
)
2640 memcpy(vcpu
->arch
.db
, dbgregs
->db
, sizeof(vcpu
->arch
.db
));
2641 vcpu
->arch
.dr6
= dbgregs
->dr6
;
2642 vcpu
->arch
.dr7
= dbgregs
->dr7
;
2647 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu
*vcpu
,
2648 struct kvm_xsave
*guest_xsave
)
2651 memcpy(guest_xsave
->region
,
2652 &vcpu
->arch
.guest_fpu
.state
->xsave
,
2655 memcpy(guest_xsave
->region
,
2656 &vcpu
->arch
.guest_fpu
.state
->fxsave
,
2657 sizeof(struct i387_fxsave_struct
));
2658 *(u64
*)&guest_xsave
->region
[XSAVE_HDR_OFFSET
/ sizeof(u32
)] =
2663 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu
*vcpu
,
2664 struct kvm_xsave
*guest_xsave
)
2667 *(u64
*)&guest_xsave
->region
[XSAVE_HDR_OFFSET
/ sizeof(u32
)];
2670 memcpy(&vcpu
->arch
.guest_fpu
.state
->xsave
,
2671 guest_xsave
->region
, xstate_size
);
2673 if (xstate_bv
& ~XSTATE_FPSSE
)
2675 memcpy(&vcpu
->arch
.guest_fpu
.state
->fxsave
,
2676 guest_xsave
->region
, sizeof(struct i387_fxsave_struct
));
2681 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu
*vcpu
,
2682 struct kvm_xcrs
*guest_xcrs
)
2684 if (!cpu_has_xsave
) {
2685 guest_xcrs
->nr_xcrs
= 0;
2689 guest_xcrs
->nr_xcrs
= 1;
2690 guest_xcrs
->flags
= 0;
2691 guest_xcrs
->xcrs
[0].xcr
= XCR_XFEATURE_ENABLED_MASK
;
2692 guest_xcrs
->xcrs
[0].value
= vcpu
->arch
.xcr0
;
2695 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu
*vcpu
,
2696 struct kvm_xcrs
*guest_xcrs
)
2703 if (guest_xcrs
->nr_xcrs
> KVM_MAX_XCRS
|| guest_xcrs
->flags
)
2706 for (i
= 0; i
< guest_xcrs
->nr_xcrs
; i
++)
2707 /* Only support XCR0 currently */
2708 if (guest_xcrs
->xcrs
[0].xcr
== XCR_XFEATURE_ENABLED_MASK
) {
2709 r
= __kvm_set_xcr(vcpu
, XCR_XFEATURE_ENABLED_MASK
,
2710 guest_xcrs
->xcrs
[0].value
);
2718 long kvm_arch_vcpu_ioctl(struct file
*filp
,
2719 unsigned int ioctl
, unsigned long arg
)
2721 struct kvm_vcpu
*vcpu
= filp
->private_data
;
2722 void __user
*argp
= (void __user
*)arg
;
2725 struct kvm_lapic_state
*lapic
;
2726 struct kvm_xsave
*xsave
;
2727 struct kvm_xcrs
*xcrs
;
2733 case KVM_GET_LAPIC
: {
2735 if (!vcpu
->arch
.apic
)
2737 u
.lapic
= kzalloc(sizeof(struct kvm_lapic_state
), GFP_KERNEL
);
2742 r
= kvm_vcpu_ioctl_get_lapic(vcpu
, u
.lapic
);
2746 if (copy_to_user(argp
, u
.lapic
, sizeof(struct kvm_lapic_state
)))
2751 case KVM_SET_LAPIC
: {
2753 if (!vcpu
->arch
.apic
)
2755 u
.lapic
= kmalloc(sizeof(struct kvm_lapic_state
), GFP_KERNEL
);
2760 if (copy_from_user(u
.lapic
, argp
, sizeof(struct kvm_lapic_state
)))
2762 r
= kvm_vcpu_ioctl_set_lapic(vcpu
, u
.lapic
);
2768 case KVM_INTERRUPT
: {
2769 struct kvm_interrupt irq
;
2772 if (copy_from_user(&irq
, argp
, sizeof irq
))
2774 r
= kvm_vcpu_ioctl_interrupt(vcpu
, &irq
);
2781 r
= kvm_vcpu_ioctl_nmi(vcpu
);
2787 case KVM_SET_CPUID
: {
2788 struct kvm_cpuid __user
*cpuid_arg
= argp
;
2789 struct kvm_cpuid cpuid
;
2792 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
2794 r
= kvm_vcpu_ioctl_set_cpuid(vcpu
, &cpuid
, cpuid_arg
->entries
);
2799 case KVM_SET_CPUID2
: {
2800 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
2801 struct kvm_cpuid2 cpuid
;
2804 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
2806 r
= kvm_vcpu_ioctl_set_cpuid2(vcpu
, &cpuid
,
2807 cpuid_arg
->entries
);
2812 case KVM_GET_CPUID2
: {
2813 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
2814 struct kvm_cpuid2 cpuid
;
2817 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
2819 r
= kvm_vcpu_ioctl_get_cpuid2(vcpu
, &cpuid
,
2820 cpuid_arg
->entries
);
2824 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof cpuid
))
2830 r
= msr_io(vcpu
, argp
, kvm_get_msr
, 1);
2833 r
= msr_io(vcpu
, argp
, do_set_msr
, 0);
2835 case KVM_TPR_ACCESS_REPORTING
: {
2836 struct kvm_tpr_access_ctl tac
;
2839 if (copy_from_user(&tac
, argp
, sizeof tac
))
2841 r
= vcpu_ioctl_tpr_access_reporting(vcpu
, &tac
);
2845 if (copy_to_user(argp
, &tac
, sizeof tac
))
2850 case KVM_SET_VAPIC_ADDR
: {
2851 struct kvm_vapic_addr va
;
2854 if (!irqchip_in_kernel(vcpu
->kvm
))
2857 if (copy_from_user(&va
, argp
, sizeof va
))
2860 kvm_lapic_set_vapic_addr(vcpu
, va
.vapic_addr
);
2863 case KVM_X86_SETUP_MCE
: {
2867 if (copy_from_user(&mcg_cap
, argp
, sizeof mcg_cap
))
2869 r
= kvm_vcpu_ioctl_x86_setup_mce(vcpu
, mcg_cap
);
2872 case KVM_X86_SET_MCE
: {
2873 struct kvm_x86_mce mce
;
2876 if (copy_from_user(&mce
, argp
, sizeof mce
))
2878 r
= kvm_vcpu_ioctl_x86_set_mce(vcpu
, &mce
);
2881 case KVM_GET_VCPU_EVENTS
: {
2882 struct kvm_vcpu_events events
;
2884 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu
, &events
);
2887 if (copy_to_user(argp
, &events
, sizeof(struct kvm_vcpu_events
)))
2892 case KVM_SET_VCPU_EVENTS
: {
2893 struct kvm_vcpu_events events
;
2896 if (copy_from_user(&events
, argp
, sizeof(struct kvm_vcpu_events
)))
2899 r
= kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu
, &events
);
2902 case KVM_GET_DEBUGREGS
: {
2903 struct kvm_debugregs dbgregs
;
2905 kvm_vcpu_ioctl_x86_get_debugregs(vcpu
, &dbgregs
);
2908 if (copy_to_user(argp
, &dbgregs
,
2909 sizeof(struct kvm_debugregs
)))
2914 case KVM_SET_DEBUGREGS
: {
2915 struct kvm_debugregs dbgregs
;
2918 if (copy_from_user(&dbgregs
, argp
,
2919 sizeof(struct kvm_debugregs
)))
2922 r
= kvm_vcpu_ioctl_x86_set_debugregs(vcpu
, &dbgregs
);
2925 case KVM_GET_XSAVE
: {
2926 u
.xsave
= kzalloc(sizeof(struct kvm_xsave
), GFP_KERNEL
);
2931 kvm_vcpu_ioctl_x86_get_xsave(vcpu
, u
.xsave
);
2934 if (copy_to_user(argp
, u
.xsave
, sizeof(struct kvm_xsave
)))
2939 case KVM_SET_XSAVE
: {
2940 u
.xsave
= kzalloc(sizeof(struct kvm_xsave
), GFP_KERNEL
);
2946 if (copy_from_user(u
.xsave
, argp
, sizeof(struct kvm_xsave
)))
2949 r
= kvm_vcpu_ioctl_x86_set_xsave(vcpu
, u
.xsave
);
2952 case KVM_GET_XCRS
: {
2953 u
.xcrs
= kzalloc(sizeof(struct kvm_xcrs
), GFP_KERNEL
);
2958 kvm_vcpu_ioctl_x86_get_xcrs(vcpu
, u
.xcrs
);
2961 if (copy_to_user(argp
, u
.xcrs
,
2962 sizeof(struct kvm_xcrs
)))
2967 case KVM_SET_XCRS
: {
2968 u
.xcrs
= kzalloc(sizeof(struct kvm_xcrs
), GFP_KERNEL
);
2974 if (copy_from_user(u
.xcrs
, argp
,
2975 sizeof(struct kvm_xcrs
)))
2978 r
= kvm_vcpu_ioctl_x86_set_xcrs(vcpu
, u
.xcrs
);
2989 static int kvm_vm_ioctl_set_tss_addr(struct kvm
*kvm
, unsigned long addr
)
2993 if (addr
> (unsigned int)(-3 * PAGE_SIZE
))
2995 ret
= kvm_x86_ops
->set_tss_addr(kvm
, addr
);
2999 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm
*kvm
,
3002 kvm
->arch
.ept_identity_map_addr
= ident_addr
;
3006 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm
*kvm
,
3007 u32 kvm_nr_mmu_pages
)
3009 if (kvm_nr_mmu_pages
< KVM_MIN_ALLOC_MMU_PAGES
)
3012 mutex_lock(&kvm
->slots_lock
);
3013 spin_lock(&kvm
->mmu_lock
);
3015 kvm_mmu_change_mmu_pages(kvm
, kvm_nr_mmu_pages
);
3016 kvm
->arch
.n_requested_mmu_pages
= kvm_nr_mmu_pages
;
3018 spin_unlock(&kvm
->mmu_lock
);
3019 mutex_unlock(&kvm
->slots_lock
);
3023 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm
*kvm
)
3025 return kvm
->arch
.n_max_mmu_pages
;
3028 static int kvm_vm_ioctl_get_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
3033 switch (chip
->chip_id
) {
3034 case KVM_IRQCHIP_PIC_MASTER
:
3035 memcpy(&chip
->chip
.pic
,
3036 &pic_irqchip(kvm
)->pics
[0],
3037 sizeof(struct kvm_pic_state
));
3039 case KVM_IRQCHIP_PIC_SLAVE
:
3040 memcpy(&chip
->chip
.pic
,
3041 &pic_irqchip(kvm
)->pics
[1],
3042 sizeof(struct kvm_pic_state
));
3044 case KVM_IRQCHIP_IOAPIC
:
3045 r
= kvm_get_ioapic(kvm
, &chip
->chip
.ioapic
);
3054 static int kvm_vm_ioctl_set_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
3059 switch (chip
->chip_id
) {
3060 case KVM_IRQCHIP_PIC_MASTER
:
3061 spin_lock(&pic_irqchip(kvm
)->lock
);
3062 memcpy(&pic_irqchip(kvm
)->pics
[0],
3064 sizeof(struct kvm_pic_state
));
3065 spin_unlock(&pic_irqchip(kvm
)->lock
);
3067 case KVM_IRQCHIP_PIC_SLAVE
:
3068 spin_lock(&pic_irqchip(kvm
)->lock
);
3069 memcpy(&pic_irqchip(kvm
)->pics
[1],
3071 sizeof(struct kvm_pic_state
));
3072 spin_unlock(&pic_irqchip(kvm
)->lock
);
3074 case KVM_IRQCHIP_IOAPIC
:
3075 r
= kvm_set_ioapic(kvm
, &chip
->chip
.ioapic
);
3081 kvm_pic_update_irq(pic_irqchip(kvm
));
3085 static int kvm_vm_ioctl_get_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
3089 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3090 memcpy(ps
, &kvm
->arch
.vpit
->pit_state
, sizeof(struct kvm_pit_state
));
3091 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3095 static int kvm_vm_ioctl_set_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
3099 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3100 memcpy(&kvm
->arch
.vpit
->pit_state
, ps
, sizeof(struct kvm_pit_state
));
3101 kvm_pit_load_count(kvm
, 0, ps
->channels
[0].count
, 0);
3102 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3106 static int kvm_vm_ioctl_get_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
3110 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3111 memcpy(ps
->channels
, &kvm
->arch
.vpit
->pit_state
.channels
,
3112 sizeof(ps
->channels
));
3113 ps
->flags
= kvm
->arch
.vpit
->pit_state
.flags
;
3114 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3115 memset(&ps
->reserved
, 0, sizeof(ps
->reserved
));
3119 static int kvm_vm_ioctl_set_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
3121 int r
= 0, start
= 0;
3122 u32 prev_legacy
, cur_legacy
;
3123 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3124 prev_legacy
= kvm
->arch
.vpit
->pit_state
.flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
3125 cur_legacy
= ps
->flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
3126 if (!prev_legacy
&& cur_legacy
)
3128 memcpy(&kvm
->arch
.vpit
->pit_state
.channels
, &ps
->channels
,
3129 sizeof(kvm
->arch
.vpit
->pit_state
.channels
));
3130 kvm
->arch
.vpit
->pit_state
.flags
= ps
->flags
;
3131 kvm_pit_load_count(kvm
, 0, kvm
->arch
.vpit
->pit_state
.channels
[0].count
, start
);
3132 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3136 static int kvm_vm_ioctl_reinject(struct kvm
*kvm
,
3137 struct kvm_reinject_control
*control
)
3139 if (!kvm
->arch
.vpit
)
3141 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3142 kvm
->arch
.vpit
->pit_state
.pit_timer
.reinject
= control
->pit_reinject
;
3143 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3148 * Get (and clear) the dirty memory log for a memory slot.
3150 int kvm_vm_ioctl_get_dirty_log(struct kvm
*kvm
,
3151 struct kvm_dirty_log
*log
)
3154 struct kvm_memory_slot
*memslot
;
3156 unsigned long is_dirty
= 0;
3158 mutex_lock(&kvm
->slots_lock
);
3161 if (log
->slot
>= KVM_MEMORY_SLOTS
)
3164 memslot
= &kvm
->memslots
->memslots
[log
->slot
];
3166 if (!memslot
->dirty_bitmap
)
3169 n
= kvm_dirty_bitmap_bytes(memslot
);
3171 for (i
= 0; !is_dirty
&& i
< n
/sizeof(long); i
++)
3172 is_dirty
= memslot
->dirty_bitmap
[i
];
3174 /* If nothing is dirty, don't bother messing with page tables. */
3176 struct kvm_memslots
*slots
, *old_slots
;
3177 unsigned long *dirty_bitmap
;
3180 dirty_bitmap
= vmalloc(n
);
3183 memset(dirty_bitmap
, 0, n
);
3186 slots
= kzalloc(sizeof(struct kvm_memslots
), GFP_KERNEL
);
3188 vfree(dirty_bitmap
);
3191 memcpy(slots
, kvm
->memslots
, sizeof(struct kvm_memslots
));
3192 slots
->memslots
[log
->slot
].dirty_bitmap
= dirty_bitmap
;
3194 old_slots
= kvm
->memslots
;
3195 rcu_assign_pointer(kvm
->memslots
, slots
);
3196 synchronize_srcu_expedited(&kvm
->srcu
);
3197 dirty_bitmap
= old_slots
->memslots
[log
->slot
].dirty_bitmap
;
3200 spin_lock(&kvm
->mmu_lock
);
3201 kvm_mmu_slot_remove_write_access(kvm
, log
->slot
);
3202 spin_unlock(&kvm
->mmu_lock
);
3205 if (copy_to_user(log
->dirty_bitmap
, dirty_bitmap
, n
)) {
3206 vfree(dirty_bitmap
);
3209 vfree(dirty_bitmap
);
3212 if (clear_user(log
->dirty_bitmap
, n
))
3218 mutex_unlock(&kvm
->slots_lock
);
3222 long kvm_arch_vm_ioctl(struct file
*filp
,
3223 unsigned int ioctl
, unsigned long arg
)
3225 struct kvm
*kvm
= filp
->private_data
;
3226 void __user
*argp
= (void __user
*)arg
;
3229 * This union makes it completely explicit to gcc-3.x
3230 * that these two variables' stack usage should be
3231 * combined, not added together.
3234 struct kvm_pit_state ps
;
3235 struct kvm_pit_state2 ps2
;
3236 struct kvm_pit_config pit_config
;
3240 case KVM_SET_TSS_ADDR
:
3241 r
= kvm_vm_ioctl_set_tss_addr(kvm
, arg
);
3245 case KVM_SET_IDENTITY_MAP_ADDR
: {
3249 if (copy_from_user(&ident_addr
, argp
, sizeof ident_addr
))
3251 r
= kvm_vm_ioctl_set_identity_map_addr(kvm
, ident_addr
);
3256 case KVM_SET_NR_MMU_PAGES
:
3257 r
= kvm_vm_ioctl_set_nr_mmu_pages(kvm
, arg
);
3261 case KVM_GET_NR_MMU_PAGES
:
3262 r
= kvm_vm_ioctl_get_nr_mmu_pages(kvm
);
3264 case KVM_CREATE_IRQCHIP
: {
3265 struct kvm_pic
*vpic
;
3267 mutex_lock(&kvm
->lock
);
3270 goto create_irqchip_unlock
;
3272 vpic
= kvm_create_pic(kvm
);
3274 r
= kvm_ioapic_init(kvm
);
3276 kvm_io_bus_unregister_dev(kvm
, KVM_PIO_BUS
,
3279 goto create_irqchip_unlock
;
3282 goto create_irqchip_unlock
;
3284 kvm
->arch
.vpic
= vpic
;
3286 r
= kvm_setup_default_irq_routing(kvm
);
3288 mutex_lock(&kvm
->irq_lock
);
3289 kvm_ioapic_destroy(kvm
);
3290 kvm_destroy_pic(kvm
);
3291 mutex_unlock(&kvm
->irq_lock
);
3293 create_irqchip_unlock
:
3294 mutex_unlock(&kvm
->lock
);
3297 case KVM_CREATE_PIT
:
3298 u
.pit_config
.flags
= KVM_PIT_SPEAKER_DUMMY
;
3300 case KVM_CREATE_PIT2
:
3302 if (copy_from_user(&u
.pit_config
, argp
,
3303 sizeof(struct kvm_pit_config
)))
3306 mutex_lock(&kvm
->slots_lock
);
3309 goto create_pit_unlock
;
3311 kvm
->arch
.vpit
= kvm_create_pit(kvm
, u
.pit_config
.flags
);
3315 mutex_unlock(&kvm
->slots_lock
);
3317 case KVM_IRQ_LINE_STATUS
:
3318 case KVM_IRQ_LINE
: {
3319 struct kvm_irq_level irq_event
;
3322 if (copy_from_user(&irq_event
, argp
, sizeof irq_event
))
3325 if (irqchip_in_kernel(kvm
)) {
3327 status
= kvm_set_irq(kvm
, KVM_USERSPACE_IRQ_SOURCE_ID
,
3328 irq_event
.irq
, irq_event
.level
);
3329 if (ioctl
== KVM_IRQ_LINE_STATUS
) {
3331 irq_event
.status
= status
;
3332 if (copy_to_user(argp
, &irq_event
,
3340 case KVM_GET_IRQCHIP
: {
3341 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3342 struct kvm_irqchip
*chip
= kmalloc(sizeof(*chip
), GFP_KERNEL
);
3348 if (copy_from_user(chip
, argp
, sizeof *chip
))
3349 goto get_irqchip_out
;
3351 if (!irqchip_in_kernel(kvm
))
3352 goto get_irqchip_out
;
3353 r
= kvm_vm_ioctl_get_irqchip(kvm
, chip
);
3355 goto get_irqchip_out
;
3357 if (copy_to_user(argp
, chip
, sizeof *chip
))
3358 goto get_irqchip_out
;
3366 case KVM_SET_IRQCHIP
: {
3367 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3368 struct kvm_irqchip
*chip
= kmalloc(sizeof(*chip
), GFP_KERNEL
);
3374 if (copy_from_user(chip
, argp
, sizeof *chip
))
3375 goto set_irqchip_out
;
3377 if (!irqchip_in_kernel(kvm
))
3378 goto set_irqchip_out
;
3379 r
= kvm_vm_ioctl_set_irqchip(kvm
, chip
);
3381 goto set_irqchip_out
;
3391 if (copy_from_user(&u
.ps
, argp
, sizeof(struct kvm_pit_state
)))
3394 if (!kvm
->arch
.vpit
)
3396 r
= kvm_vm_ioctl_get_pit(kvm
, &u
.ps
);
3400 if (copy_to_user(argp
, &u
.ps
, sizeof(struct kvm_pit_state
)))
3407 if (copy_from_user(&u
.ps
, argp
, sizeof u
.ps
))
3410 if (!kvm
->arch
.vpit
)
3412 r
= kvm_vm_ioctl_set_pit(kvm
, &u
.ps
);
3418 case KVM_GET_PIT2
: {
3420 if (!kvm
->arch
.vpit
)
3422 r
= kvm_vm_ioctl_get_pit2(kvm
, &u
.ps2
);
3426 if (copy_to_user(argp
, &u
.ps2
, sizeof(u
.ps2
)))
3431 case KVM_SET_PIT2
: {
3433 if (copy_from_user(&u
.ps2
, argp
, sizeof(u
.ps2
)))
3436 if (!kvm
->arch
.vpit
)
3438 r
= kvm_vm_ioctl_set_pit2(kvm
, &u
.ps2
);
3444 case KVM_REINJECT_CONTROL
: {
3445 struct kvm_reinject_control control
;
3447 if (copy_from_user(&control
, argp
, sizeof(control
)))
3449 r
= kvm_vm_ioctl_reinject(kvm
, &control
);
3455 case KVM_XEN_HVM_CONFIG
: {
3457 if (copy_from_user(&kvm
->arch
.xen_hvm_config
, argp
,
3458 sizeof(struct kvm_xen_hvm_config
)))
3461 if (kvm
->arch
.xen_hvm_config
.flags
)
3466 case KVM_SET_CLOCK
: {
3467 struct kvm_clock_data user_ns
;
3472 if (copy_from_user(&user_ns
, argp
, sizeof(user_ns
)))
3480 local_irq_disable();
3481 now_ns
= get_kernel_ns();
3482 delta
= user_ns
.clock
- now_ns
;
3484 kvm
->arch
.kvmclock_offset
= delta
;
3487 case KVM_GET_CLOCK
: {
3488 struct kvm_clock_data user_ns
;
3491 local_irq_disable();
3492 now_ns
= get_kernel_ns();
3493 user_ns
.clock
= kvm
->arch
.kvmclock_offset
+ now_ns
;
3496 memset(&user_ns
.pad
, 0, sizeof(user_ns
.pad
));
3499 if (copy_to_user(argp
, &user_ns
, sizeof(user_ns
)))
3512 static void kvm_init_msr_list(void)
3517 /* skip the first msrs in the list. KVM-specific */
3518 for (i
= j
= KVM_SAVE_MSRS_BEGIN
; i
< ARRAY_SIZE(msrs_to_save
); i
++) {
3519 if (rdmsr_safe(msrs_to_save
[i
], &dummy
[0], &dummy
[1]) < 0)
3522 msrs_to_save
[j
] = msrs_to_save
[i
];
3525 num_msrs_to_save
= j
;
3528 static int vcpu_mmio_write(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
,
3531 if (vcpu
->arch
.apic
&&
3532 !kvm_iodevice_write(&vcpu
->arch
.apic
->dev
, addr
, len
, v
))
3535 return kvm_io_bus_write(vcpu
->kvm
, KVM_MMIO_BUS
, addr
, len
, v
);
3538 static int vcpu_mmio_read(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
, void *v
)
3540 if (vcpu
->arch
.apic
&&
3541 !kvm_iodevice_read(&vcpu
->arch
.apic
->dev
, addr
, len
, v
))
3544 return kvm_io_bus_read(vcpu
->kvm
, KVM_MMIO_BUS
, addr
, len
, v
);
3547 static void kvm_set_segment(struct kvm_vcpu
*vcpu
,
3548 struct kvm_segment
*var
, int seg
)
3550 kvm_x86_ops
->set_segment(vcpu
, var
, seg
);
3553 void kvm_get_segment(struct kvm_vcpu
*vcpu
,
3554 struct kvm_segment
*var
, int seg
)
3556 kvm_x86_ops
->get_segment(vcpu
, var
, seg
);
3559 static gpa_t
translate_gpa(struct kvm_vcpu
*vcpu
, gpa_t gpa
, u32 access
)
3564 static gpa_t
translate_nested_gpa(struct kvm_vcpu
*vcpu
, gpa_t gpa
, u32 access
)
3569 BUG_ON(!mmu_is_nested(vcpu
));
3571 /* NPT walks are always user-walks */
3572 access
|= PFERR_USER_MASK
;
3573 t_gpa
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, gpa
, access
, &error
);
3574 if (t_gpa
== UNMAPPED_GVA
)
3575 vcpu
->arch
.fault
.nested
= true;
3580 gpa_t
kvm_mmu_gva_to_gpa_read(struct kvm_vcpu
*vcpu
, gva_t gva
, u32
*error
)
3582 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
3583 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, error
);
3586 gpa_t
kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu
*vcpu
, gva_t gva
, u32
*error
)
3588 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
3589 access
|= PFERR_FETCH_MASK
;
3590 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, error
);
3593 gpa_t
kvm_mmu_gva_to_gpa_write(struct kvm_vcpu
*vcpu
, gva_t gva
, u32
*error
)
3595 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
3596 access
|= PFERR_WRITE_MASK
;
3597 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, error
);
3600 /* uses this to access any guest's mapped memory without checking CPL */
3601 gpa_t
kvm_mmu_gva_to_gpa_system(struct kvm_vcpu
*vcpu
, gva_t gva
, u32
*error
)
3603 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, 0, error
);
3606 static int kvm_read_guest_virt_helper(gva_t addr
, void *val
, unsigned int bytes
,
3607 struct kvm_vcpu
*vcpu
, u32 access
,
3611 int r
= X86EMUL_CONTINUE
;
3614 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
, access
,
3616 unsigned offset
= addr
& (PAGE_SIZE
-1);
3617 unsigned toread
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
3620 if (gpa
== UNMAPPED_GVA
) {
3621 r
= X86EMUL_PROPAGATE_FAULT
;
3624 ret
= kvm_read_guest(vcpu
->kvm
, gpa
, data
, toread
);
3626 r
= X86EMUL_IO_NEEDED
;
3638 /* used for instruction fetching */
3639 static int kvm_fetch_guest_virt(gva_t addr
, void *val
, unsigned int bytes
,
3640 struct kvm_vcpu
*vcpu
, u32
*error
)
3642 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
3643 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
,
3644 access
| PFERR_FETCH_MASK
, error
);
3647 static int kvm_read_guest_virt(gva_t addr
, void *val
, unsigned int bytes
,
3648 struct kvm_vcpu
*vcpu
, u32
*error
)
3650 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
3651 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, access
,
3655 static int kvm_read_guest_virt_system(gva_t addr
, void *val
, unsigned int bytes
,
3656 struct kvm_vcpu
*vcpu
, u32
*error
)
3658 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, 0, error
);
3661 static int kvm_write_guest_virt_system(gva_t addr
, void *val
,
3663 struct kvm_vcpu
*vcpu
,
3667 int r
= X86EMUL_CONTINUE
;
3670 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
,
3673 unsigned offset
= addr
& (PAGE_SIZE
-1);
3674 unsigned towrite
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
3677 if (gpa
== UNMAPPED_GVA
) {
3678 r
= X86EMUL_PROPAGATE_FAULT
;
3681 ret
= kvm_write_guest(vcpu
->kvm
, gpa
, data
, towrite
);
3683 r
= X86EMUL_IO_NEEDED
;
3695 static int emulator_read_emulated(unsigned long addr
,
3698 unsigned int *error_code
,
3699 struct kvm_vcpu
*vcpu
)
3703 if (vcpu
->mmio_read_completed
) {
3704 memcpy(val
, vcpu
->mmio_data
, bytes
);
3705 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, bytes
,
3706 vcpu
->mmio_phys_addr
, *(u64
*)val
);
3707 vcpu
->mmio_read_completed
= 0;
3708 return X86EMUL_CONTINUE
;
3711 gpa
= kvm_mmu_gva_to_gpa_read(vcpu
, addr
, error_code
);
3713 if (gpa
== UNMAPPED_GVA
)
3714 return X86EMUL_PROPAGATE_FAULT
;
3716 /* For APIC access vmexit */
3717 if ((gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
3720 if (kvm_read_guest_virt(addr
, val
, bytes
, vcpu
, NULL
)
3721 == X86EMUL_CONTINUE
)
3722 return X86EMUL_CONTINUE
;
3726 * Is this MMIO handled locally?
3728 if (!vcpu_mmio_read(vcpu
, gpa
, bytes
, val
)) {
3729 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, bytes
, gpa
, *(u64
*)val
);
3730 return X86EMUL_CONTINUE
;
3733 trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED
, bytes
, gpa
, 0);
3735 vcpu
->mmio_needed
= 1;
3736 vcpu
->run
->exit_reason
= KVM_EXIT_MMIO
;
3737 vcpu
->run
->mmio
.phys_addr
= vcpu
->mmio_phys_addr
= gpa
;
3738 vcpu
->run
->mmio
.len
= vcpu
->mmio_size
= bytes
;
3739 vcpu
->run
->mmio
.is_write
= vcpu
->mmio_is_write
= 0;
3741 return X86EMUL_IO_NEEDED
;
3744 int emulator_write_phys(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
3745 const void *val
, int bytes
)
3749 ret
= kvm_write_guest(vcpu
->kvm
, gpa
, val
, bytes
);
3752 kvm_mmu_pte_write(vcpu
, gpa
, val
, bytes
, 1);
3756 static int emulator_write_emulated_onepage(unsigned long addr
,
3759 unsigned int *error_code
,
3760 struct kvm_vcpu
*vcpu
)
3764 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, addr
, error_code
);
3766 if (gpa
== UNMAPPED_GVA
)
3767 return X86EMUL_PROPAGATE_FAULT
;
3769 /* For APIC access vmexit */
3770 if ((gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
3773 if (emulator_write_phys(vcpu
, gpa
, val
, bytes
))
3774 return X86EMUL_CONTINUE
;
3777 trace_kvm_mmio(KVM_TRACE_MMIO_WRITE
, bytes
, gpa
, *(u64
*)val
);
3779 * Is this MMIO handled locally?
3781 if (!vcpu_mmio_write(vcpu
, gpa
, bytes
, val
))
3782 return X86EMUL_CONTINUE
;
3784 vcpu
->mmio_needed
= 1;
3785 vcpu
->run
->exit_reason
= KVM_EXIT_MMIO
;
3786 vcpu
->run
->mmio
.phys_addr
= vcpu
->mmio_phys_addr
= gpa
;
3787 vcpu
->run
->mmio
.len
= vcpu
->mmio_size
= bytes
;
3788 vcpu
->run
->mmio
.is_write
= vcpu
->mmio_is_write
= 1;
3789 memcpy(vcpu
->run
->mmio
.data
, val
, bytes
);
3791 return X86EMUL_CONTINUE
;
3794 int emulator_write_emulated(unsigned long addr
,
3797 unsigned int *error_code
,
3798 struct kvm_vcpu
*vcpu
)
3800 /* Crossing a page boundary? */
3801 if (((addr
+ bytes
- 1) ^ addr
) & PAGE_MASK
) {
3804 now
= -addr
& ~PAGE_MASK
;
3805 rc
= emulator_write_emulated_onepage(addr
, val
, now
, error_code
,
3807 if (rc
!= X86EMUL_CONTINUE
)
3813 return emulator_write_emulated_onepage(addr
, val
, bytes
, error_code
,
3817 #define CMPXCHG_TYPE(t, ptr, old, new) \
3818 (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
3820 #ifdef CONFIG_X86_64
3821 # define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
3823 # define CMPXCHG64(ptr, old, new) \
3824 (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
3827 static int emulator_cmpxchg_emulated(unsigned long addr
,
3831 unsigned int *error_code
,
3832 struct kvm_vcpu
*vcpu
)
3839 /* guests cmpxchg8b have to be emulated atomically */
3840 if (bytes
> 8 || (bytes
& (bytes
- 1)))
3843 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, addr
, NULL
);
3845 if (gpa
== UNMAPPED_GVA
||
3846 (gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
3849 if (((gpa
+ bytes
- 1) & PAGE_MASK
) != (gpa
& PAGE_MASK
))
3852 page
= gfn_to_page(vcpu
->kvm
, gpa
>> PAGE_SHIFT
);
3853 if (is_error_page(page
)) {
3854 kvm_release_page_clean(page
);
3858 kaddr
= kmap_atomic(page
, KM_USER0
);
3859 kaddr
+= offset_in_page(gpa
);
3862 exchanged
= CMPXCHG_TYPE(u8
, kaddr
, old
, new);
3865 exchanged
= CMPXCHG_TYPE(u16
, kaddr
, old
, new);
3868 exchanged
= CMPXCHG_TYPE(u32
, kaddr
, old
, new);
3871 exchanged
= CMPXCHG64(kaddr
, old
, new);
3876 kunmap_atomic(kaddr
, KM_USER0
);
3877 kvm_release_page_dirty(page
);
3880 return X86EMUL_CMPXCHG_FAILED
;
3882 kvm_mmu_pte_write(vcpu
, gpa
, new, bytes
, 1);
3884 return X86EMUL_CONTINUE
;
3887 printk_once(KERN_WARNING
"kvm: emulating exchange as write\n");
3889 return emulator_write_emulated(addr
, new, bytes
, error_code
, vcpu
);
3892 static int kernel_pio(struct kvm_vcpu
*vcpu
, void *pd
)
3894 /* TODO: String I/O for in kernel device */
3897 if (vcpu
->arch
.pio
.in
)
3898 r
= kvm_io_bus_read(vcpu
->kvm
, KVM_PIO_BUS
, vcpu
->arch
.pio
.port
,
3899 vcpu
->arch
.pio
.size
, pd
);
3901 r
= kvm_io_bus_write(vcpu
->kvm
, KVM_PIO_BUS
,
3902 vcpu
->arch
.pio
.port
, vcpu
->arch
.pio
.size
,
3908 static int emulator_pio_in_emulated(int size
, unsigned short port
, void *val
,
3909 unsigned int count
, struct kvm_vcpu
*vcpu
)
3911 if (vcpu
->arch
.pio
.count
)
3914 trace_kvm_pio(0, port
, size
, 1);
3916 vcpu
->arch
.pio
.port
= port
;
3917 vcpu
->arch
.pio
.in
= 1;
3918 vcpu
->arch
.pio
.count
= count
;
3919 vcpu
->arch
.pio
.size
= size
;
3921 if (!kernel_pio(vcpu
, vcpu
->arch
.pio_data
)) {
3923 memcpy(val
, vcpu
->arch
.pio_data
, size
* count
);
3924 vcpu
->arch
.pio
.count
= 0;
3928 vcpu
->run
->exit_reason
= KVM_EXIT_IO
;
3929 vcpu
->run
->io
.direction
= KVM_EXIT_IO_IN
;
3930 vcpu
->run
->io
.size
= size
;
3931 vcpu
->run
->io
.data_offset
= KVM_PIO_PAGE_OFFSET
* PAGE_SIZE
;
3932 vcpu
->run
->io
.count
= count
;
3933 vcpu
->run
->io
.port
= port
;
3938 static int emulator_pio_out_emulated(int size
, unsigned short port
,
3939 const void *val
, unsigned int count
,
3940 struct kvm_vcpu
*vcpu
)
3942 trace_kvm_pio(1, port
, size
, 1);
3944 vcpu
->arch
.pio
.port
= port
;
3945 vcpu
->arch
.pio
.in
= 0;
3946 vcpu
->arch
.pio
.count
= count
;
3947 vcpu
->arch
.pio
.size
= size
;
3949 memcpy(vcpu
->arch
.pio_data
, val
, size
* count
);
3951 if (!kernel_pio(vcpu
, vcpu
->arch
.pio_data
)) {
3952 vcpu
->arch
.pio
.count
= 0;
3956 vcpu
->run
->exit_reason
= KVM_EXIT_IO
;
3957 vcpu
->run
->io
.direction
= KVM_EXIT_IO_OUT
;
3958 vcpu
->run
->io
.size
= size
;
3959 vcpu
->run
->io
.data_offset
= KVM_PIO_PAGE_OFFSET
* PAGE_SIZE
;
3960 vcpu
->run
->io
.count
= count
;
3961 vcpu
->run
->io
.port
= port
;
3966 static unsigned long get_segment_base(struct kvm_vcpu
*vcpu
, int seg
)
3968 return kvm_x86_ops
->get_segment_base(vcpu
, seg
);
3971 int emulate_invlpg(struct kvm_vcpu
*vcpu
, gva_t address
)
3973 kvm_mmu_invlpg(vcpu
, address
);
3974 return X86EMUL_CONTINUE
;
3977 int kvm_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
3979 if (!need_emulate_wbinvd(vcpu
))
3980 return X86EMUL_CONTINUE
;
3982 if (kvm_x86_ops
->has_wbinvd_exit()) {
3984 smp_call_function_many(vcpu
->arch
.wbinvd_dirty_mask
,
3985 wbinvd_ipi
, NULL
, 1);
3987 cpumask_clear(vcpu
->arch
.wbinvd_dirty_mask
);
3990 return X86EMUL_CONTINUE
;
3992 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd
);
3994 int emulate_clts(struct kvm_vcpu
*vcpu
)
3996 kvm_x86_ops
->set_cr0(vcpu
, kvm_read_cr0_bits(vcpu
, ~X86_CR0_TS
));
3997 kvm_x86_ops
->fpu_activate(vcpu
);
3998 return X86EMUL_CONTINUE
;
4001 int emulator_get_dr(int dr
, unsigned long *dest
, struct kvm_vcpu
*vcpu
)
4003 return _kvm_get_dr(vcpu
, dr
, dest
);
4006 int emulator_set_dr(int dr
, unsigned long value
, struct kvm_vcpu
*vcpu
)
4009 return __kvm_set_dr(vcpu
, dr
, value
);
4012 static u64
mk_cr_64(u64 curr_cr
, u32 new_val
)
4014 return (curr_cr
& ~((1ULL << 32) - 1)) | new_val
;
4017 static unsigned long emulator_get_cr(int cr
, struct kvm_vcpu
*vcpu
)
4019 unsigned long value
;
4023 value
= kvm_read_cr0(vcpu
);
4026 value
= vcpu
->arch
.cr2
;
4029 value
= vcpu
->arch
.cr3
;
4032 value
= kvm_read_cr4(vcpu
);
4035 value
= kvm_get_cr8(vcpu
);
4038 vcpu_printf(vcpu
, "%s: unexpected cr %u\n", __func__
, cr
);
4045 static int emulator_set_cr(int cr
, unsigned long val
, struct kvm_vcpu
*vcpu
)
4051 res
= kvm_set_cr0(vcpu
, mk_cr_64(kvm_read_cr0(vcpu
), val
));
4054 vcpu
->arch
.cr2
= val
;
4057 res
= kvm_set_cr3(vcpu
, val
);
4060 res
= kvm_set_cr4(vcpu
, mk_cr_64(kvm_read_cr4(vcpu
), val
));
4063 res
= __kvm_set_cr8(vcpu
, val
& 0xfUL
);
4066 vcpu_printf(vcpu
, "%s: unexpected cr %u\n", __func__
, cr
);
4073 static int emulator_get_cpl(struct kvm_vcpu
*vcpu
)
4075 return kvm_x86_ops
->get_cpl(vcpu
);
4078 static void emulator_get_gdt(struct desc_ptr
*dt
, struct kvm_vcpu
*vcpu
)
4080 kvm_x86_ops
->get_gdt(vcpu
, dt
);
4083 static void emulator_get_idt(struct desc_ptr
*dt
, struct kvm_vcpu
*vcpu
)
4085 kvm_x86_ops
->get_idt(vcpu
, dt
);
4088 static unsigned long emulator_get_cached_segment_base(int seg
,
4089 struct kvm_vcpu
*vcpu
)
4091 return get_segment_base(vcpu
, seg
);
4094 static bool emulator_get_cached_descriptor(struct desc_struct
*desc
, int seg
,
4095 struct kvm_vcpu
*vcpu
)
4097 struct kvm_segment var
;
4099 kvm_get_segment(vcpu
, &var
, seg
);
4106 set_desc_limit(desc
, var
.limit
);
4107 set_desc_base(desc
, (unsigned long)var
.base
);
4108 desc
->type
= var
.type
;
4110 desc
->dpl
= var
.dpl
;
4111 desc
->p
= var
.present
;
4112 desc
->avl
= var
.avl
;
4120 static void emulator_set_cached_descriptor(struct desc_struct
*desc
, int seg
,
4121 struct kvm_vcpu
*vcpu
)
4123 struct kvm_segment var
;
4125 /* needed to preserve selector */
4126 kvm_get_segment(vcpu
, &var
, seg
);
4128 var
.base
= get_desc_base(desc
);
4129 var
.limit
= get_desc_limit(desc
);
4131 var
.limit
= (var
.limit
<< 12) | 0xfff;
4132 var
.type
= desc
->type
;
4133 var
.present
= desc
->p
;
4134 var
.dpl
= desc
->dpl
;
4139 var
.avl
= desc
->avl
;
4140 var
.present
= desc
->p
;
4141 var
.unusable
= !var
.present
;
4144 kvm_set_segment(vcpu
, &var
, seg
);
4148 static u16
emulator_get_segment_selector(int seg
, struct kvm_vcpu
*vcpu
)
4150 struct kvm_segment kvm_seg
;
4152 kvm_get_segment(vcpu
, &kvm_seg
, seg
);
4153 return kvm_seg
.selector
;
4156 static void emulator_set_segment_selector(u16 sel
, int seg
,
4157 struct kvm_vcpu
*vcpu
)
4159 struct kvm_segment kvm_seg
;
4161 kvm_get_segment(vcpu
, &kvm_seg
, seg
);
4162 kvm_seg
.selector
= sel
;
4163 kvm_set_segment(vcpu
, &kvm_seg
, seg
);
4166 static struct x86_emulate_ops emulate_ops
= {
4167 .read_std
= kvm_read_guest_virt_system
,
4168 .write_std
= kvm_write_guest_virt_system
,
4169 .fetch
= kvm_fetch_guest_virt
,
4170 .read_emulated
= emulator_read_emulated
,
4171 .write_emulated
= emulator_write_emulated
,
4172 .cmpxchg_emulated
= emulator_cmpxchg_emulated
,
4173 .pio_in_emulated
= emulator_pio_in_emulated
,
4174 .pio_out_emulated
= emulator_pio_out_emulated
,
4175 .get_cached_descriptor
= emulator_get_cached_descriptor
,
4176 .set_cached_descriptor
= emulator_set_cached_descriptor
,
4177 .get_segment_selector
= emulator_get_segment_selector
,
4178 .set_segment_selector
= emulator_set_segment_selector
,
4179 .get_cached_segment_base
= emulator_get_cached_segment_base
,
4180 .get_gdt
= emulator_get_gdt
,
4181 .get_idt
= emulator_get_idt
,
4182 .get_cr
= emulator_get_cr
,
4183 .set_cr
= emulator_set_cr
,
4184 .cpl
= emulator_get_cpl
,
4185 .get_dr
= emulator_get_dr
,
4186 .set_dr
= emulator_set_dr
,
4187 .set_msr
= kvm_set_msr
,
4188 .get_msr
= kvm_get_msr
,
4191 static void cache_all_regs(struct kvm_vcpu
*vcpu
)
4193 kvm_register_read(vcpu
, VCPU_REGS_RAX
);
4194 kvm_register_read(vcpu
, VCPU_REGS_RSP
);
4195 kvm_register_read(vcpu
, VCPU_REGS_RIP
);
4196 vcpu
->arch
.regs_dirty
= ~0;
4199 static void toggle_interruptibility(struct kvm_vcpu
*vcpu
, u32 mask
)
4201 u32 int_shadow
= kvm_x86_ops
->get_interrupt_shadow(vcpu
, mask
);
4203 * an sti; sti; sequence only disable interrupts for the first
4204 * instruction. So, if the last instruction, be it emulated or
4205 * not, left the system with the INT_STI flag enabled, it
4206 * means that the last instruction is an sti. We should not
4207 * leave the flag on in this case. The same goes for mov ss
4209 if (!(int_shadow
& mask
))
4210 kvm_x86_ops
->set_interrupt_shadow(vcpu
, mask
);
4213 static void inject_emulated_exception(struct kvm_vcpu
*vcpu
)
4215 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
4216 if (ctxt
->exception
== PF_VECTOR
)
4217 kvm_propagate_fault(vcpu
);
4218 else if (ctxt
->error_code_valid
)
4219 kvm_queue_exception_e(vcpu
, ctxt
->exception
, ctxt
->error_code
);
4221 kvm_queue_exception(vcpu
, ctxt
->exception
);
4224 static void init_emulate_ctxt(struct kvm_vcpu
*vcpu
)
4226 struct decode_cache
*c
= &vcpu
->arch
.emulate_ctxt
.decode
;
4229 cache_all_regs(vcpu
);
4231 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
4233 vcpu
->arch
.emulate_ctxt
.vcpu
= vcpu
;
4234 vcpu
->arch
.emulate_ctxt
.eflags
= kvm_x86_ops
->get_rflags(vcpu
);
4235 vcpu
->arch
.emulate_ctxt
.eip
= kvm_rip_read(vcpu
);
4236 vcpu
->arch
.emulate_ctxt
.mode
=
4237 (!is_protmode(vcpu
)) ? X86EMUL_MODE_REAL
:
4238 (vcpu
->arch
.emulate_ctxt
.eflags
& X86_EFLAGS_VM
)
4239 ? X86EMUL_MODE_VM86
: cs_l
4240 ? X86EMUL_MODE_PROT64
: cs_db
4241 ? X86EMUL_MODE_PROT32
: X86EMUL_MODE_PROT16
;
4242 memset(c
, 0, sizeof(struct decode_cache
));
4243 memcpy(c
->regs
, vcpu
->arch
.regs
, sizeof c
->regs
);
4246 int kvm_inject_realmode_interrupt(struct kvm_vcpu
*vcpu
, int irq
)
4248 struct decode_cache
*c
= &vcpu
->arch
.emulate_ctxt
.decode
;
4251 init_emulate_ctxt(vcpu
);
4253 vcpu
->arch
.emulate_ctxt
.decode
.op_bytes
= 2;
4254 vcpu
->arch
.emulate_ctxt
.decode
.ad_bytes
= 2;
4255 vcpu
->arch
.emulate_ctxt
.decode
.eip
= vcpu
->arch
.emulate_ctxt
.eip
;
4256 ret
= emulate_int_real(&vcpu
->arch
.emulate_ctxt
, &emulate_ops
, irq
);
4258 if (ret
!= X86EMUL_CONTINUE
)
4259 return EMULATE_FAIL
;
4261 vcpu
->arch
.emulate_ctxt
.eip
= c
->eip
;
4262 memcpy(vcpu
->arch
.regs
, c
->regs
, sizeof c
->regs
);
4263 kvm_rip_write(vcpu
, vcpu
->arch
.emulate_ctxt
.eip
);
4264 kvm_x86_ops
->set_rflags(vcpu
, vcpu
->arch
.emulate_ctxt
.eflags
);
4266 if (irq
== NMI_VECTOR
)
4267 vcpu
->arch
.nmi_pending
= false;
4269 vcpu
->arch
.interrupt
.pending
= false;
4271 return EMULATE_DONE
;
4273 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt
);
4275 static int handle_emulation_failure(struct kvm_vcpu
*vcpu
)
4277 ++vcpu
->stat
.insn_emulation_fail
;
4278 trace_kvm_emulate_insn_failed(vcpu
);
4279 vcpu
->run
->exit_reason
= KVM_EXIT_INTERNAL_ERROR
;
4280 vcpu
->run
->internal
.suberror
= KVM_INTERNAL_ERROR_EMULATION
;
4281 vcpu
->run
->internal
.ndata
= 0;
4282 kvm_queue_exception(vcpu
, UD_VECTOR
);
4283 return EMULATE_FAIL
;
4286 static bool reexecute_instruction(struct kvm_vcpu
*vcpu
, gva_t gva
)
4294 * if emulation was due to access to shadowed page table
4295 * and it failed try to unshadow page and re-entetr the
4296 * guest to let CPU execute the instruction.
4298 if (kvm_mmu_unprotect_page_virt(vcpu
, gva
))
4301 gpa
= kvm_mmu_gva_to_gpa_system(vcpu
, gva
, NULL
);
4303 if (gpa
== UNMAPPED_GVA
)
4304 return true; /* let cpu generate fault */
4306 if (!kvm_is_error_hva(gfn_to_hva(vcpu
->kvm
, gpa
>> PAGE_SHIFT
)))
4312 int emulate_instruction(struct kvm_vcpu
*vcpu
,
4318 struct decode_cache
*c
= &vcpu
->arch
.emulate_ctxt
.decode
;
4320 kvm_clear_exception_queue(vcpu
);
4321 vcpu
->arch
.mmio_fault_cr2
= cr2
;
4323 * TODO: fix emulate.c to use guest_read/write_register
4324 * instead of direct ->regs accesses, can save hundred cycles
4325 * on Intel for instructions that don't read/change RSP, for
4328 cache_all_regs(vcpu
);
4330 if (!(emulation_type
& EMULTYPE_NO_DECODE
)) {
4331 init_emulate_ctxt(vcpu
);
4332 vcpu
->arch
.emulate_ctxt
.interruptibility
= 0;
4333 vcpu
->arch
.emulate_ctxt
.exception
= -1;
4334 vcpu
->arch
.emulate_ctxt
.perm_ok
= false;
4336 r
= x86_decode_insn(&vcpu
->arch
.emulate_ctxt
);
4337 if (r
== X86EMUL_PROPAGATE_FAULT
)
4340 trace_kvm_emulate_insn_start(vcpu
);
4342 /* Only allow emulation of specific instructions on #UD
4343 * (namely VMMCALL, sysenter, sysexit, syscall)*/
4344 if (emulation_type
& EMULTYPE_TRAP_UD
) {
4346 return EMULATE_FAIL
;
4348 case 0x01: /* VMMCALL */
4349 if (c
->modrm_mod
!= 3 || c
->modrm_rm
!= 1)
4350 return EMULATE_FAIL
;
4352 case 0x34: /* sysenter */
4353 case 0x35: /* sysexit */
4354 if (c
->modrm_mod
!= 0 || c
->modrm_rm
!= 0)
4355 return EMULATE_FAIL
;
4357 case 0x05: /* syscall */
4358 if (c
->modrm_mod
!= 0 || c
->modrm_rm
!= 0)
4359 return EMULATE_FAIL
;
4362 return EMULATE_FAIL
;
4365 if (!(c
->modrm_reg
== 0 || c
->modrm_reg
== 3))
4366 return EMULATE_FAIL
;
4369 ++vcpu
->stat
.insn_emulation
;
4371 if (reexecute_instruction(vcpu
, cr2
))
4372 return EMULATE_DONE
;
4373 if (emulation_type
& EMULTYPE_SKIP
)
4374 return EMULATE_FAIL
;
4375 return handle_emulation_failure(vcpu
);
4379 if (emulation_type
& EMULTYPE_SKIP
) {
4380 kvm_rip_write(vcpu
, vcpu
->arch
.emulate_ctxt
.decode
.eip
);
4381 return EMULATE_DONE
;
4384 /* this is needed for vmware backdor interface to work since it
4385 changes registers values during IO operation */
4386 memcpy(c
->regs
, vcpu
->arch
.regs
, sizeof c
->regs
);
4389 r
= x86_emulate_insn(&vcpu
->arch
.emulate_ctxt
);
4391 if (r
== EMULATION_FAILED
) {
4392 if (reexecute_instruction(vcpu
, cr2
))
4393 return EMULATE_DONE
;
4395 return handle_emulation_failure(vcpu
);
4399 if (vcpu
->arch
.emulate_ctxt
.exception
>= 0) {
4400 inject_emulated_exception(vcpu
);
4402 } else if (vcpu
->arch
.pio
.count
) {
4403 if (!vcpu
->arch
.pio
.in
)
4404 vcpu
->arch
.pio
.count
= 0;
4405 r
= EMULATE_DO_MMIO
;
4406 } else if (vcpu
->mmio_needed
) {
4407 if (vcpu
->mmio_is_write
)
4408 vcpu
->mmio_needed
= 0;
4409 r
= EMULATE_DO_MMIO
;
4410 } else if (r
== EMULATION_RESTART
)
4415 toggle_interruptibility(vcpu
, vcpu
->arch
.emulate_ctxt
.interruptibility
);
4416 kvm_x86_ops
->set_rflags(vcpu
, vcpu
->arch
.emulate_ctxt
.eflags
);
4417 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
4418 memcpy(vcpu
->arch
.regs
, c
->regs
, sizeof c
->regs
);
4419 kvm_rip_write(vcpu
, vcpu
->arch
.emulate_ctxt
.eip
);
4423 EXPORT_SYMBOL_GPL(emulate_instruction
);
4425 int kvm_fast_pio_out(struct kvm_vcpu
*vcpu
, int size
, unsigned short port
)
4427 unsigned long val
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
4428 int ret
= emulator_pio_out_emulated(size
, port
, &val
, 1, vcpu
);
4429 /* do not return to emulator after return from userspace */
4430 vcpu
->arch
.pio
.count
= 0;
4433 EXPORT_SYMBOL_GPL(kvm_fast_pio_out
);
4435 static void tsc_bad(void *info
)
4437 __get_cpu_var(cpu_tsc_khz
) = 0;
4440 static void tsc_khz_changed(void *data
)
4442 struct cpufreq_freqs
*freq
= data
;
4443 unsigned long khz
= 0;
4447 else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
4448 khz
= cpufreq_quick_get(raw_smp_processor_id());
4451 __get_cpu_var(cpu_tsc_khz
) = khz
;
4454 static int kvmclock_cpufreq_notifier(struct notifier_block
*nb
, unsigned long val
,
4457 struct cpufreq_freqs
*freq
= data
;
4459 struct kvm_vcpu
*vcpu
;
4460 int i
, send_ipi
= 0;
4463 * We allow guests to temporarily run on slowing clocks,
4464 * provided we notify them after, or to run on accelerating
4465 * clocks, provided we notify them before. Thus time never
4468 * However, we have a problem. We can't atomically update
4469 * the frequency of a given CPU from this function; it is
4470 * merely a notifier, which can be called from any CPU.
4471 * Changing the TSC frequency at arbitrary points in time
4472 * requires a recomputation of local variables related to
4473 * the TSC for each VCPU. We must flag these local variables
4474 * to be updated and be sure the update takes place with the
4475 * new frequency before any guests proceed.
4477 * Unfortunately, the combination of hotplug CPU and frequency
4478 * change creates an intractable locking scenario; the order
4479 * of when these callouts happen is undefined with respect to
4480 * CPU hotplug, and they can race with each other. As such,
4481 * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
4482 * undefined; you can actually have a CPU frequency change take
4483 * place in between the computation of X and the setting of the
4484 * variable. To protect against this problem, all updates of
4485 * the per_cpu tsc_khz variable are done in an interrupt
4486 * protected IPI, and all callers wishing to update the value
4487 * must wait for a synchronous IPI to complete (which is trivial
4488 * if the caller is on the CPU already). This establishes the
4489 * necessary total order on variable updates.
4491 * Note that because a guest time update may take place
4492 * anytime after the setting of the VCPU's request bit, the
4493 * correct TSC value must be set before the request. However,
4494 * to ensure the update actually makes it to any guest which
4495 * starts running in hardware virtualization between the set
4496 * and the acquisition of the spinlock, we must also ping the
4497 * CPU after setting the request bit.
4501 if (val
== CPUFREQ_PRECHANGE
&& freq
->old
> freq
->new)
4503 if (val
== CPUFREQ_POSTCHANGE
&& freq
->old
< freq
->new)
4506 smp_call_function_single(freq
->cpu
, tsc_khz_changed
, freq
, 1);
4508 spin_lock(&kvm_lock
);
4509 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
4510 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
4511 if (vcpu
->cpu
!= freq
->cpu
)
4513 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
4514 if (vcpu
->cpu
!= smp_processor_id())
4518 spin_unlock(&kvm_lock
);
4520 if (freq
->old
< freq
->new && send_ipi
) {
4522 * We upscale the frequency. Must make the guest
4523 * doesn't see old kvmclock values while running with
4524 * the new frequency, otherwise we risk the guest sees
4525 * time go backwards.
4527 * In case we update the frequency for another cpu
4528 * (which might be in guest context) send an interrupt
4529 * to kick the cpu out of guest context. Next time
4530 * guest context is entered kvmclock will be updated,
4531 * so the guest will not see stale values.
4533 smp_call_function_single(freq
->cpu
, tsc_khz_changed
, freq
, 1);
4538 static struct notifier_block kvmclock_cpufreq_notifier_block
= {
4539 .notifier_call
= kvmclock_cpufreq_notifier
4542 static int kvmclock_cpu_notifier(struct notifier_block
*nfb
,
4543 unsigned long action
, void *hcpu
)
4545 unsigned int cpu
= (unsigned long)hcpu
;
4549 case CPU_DOWN_FAILED
:
4550 smp_call_function_single(cpu
, tsc_khz_changed
, NULL
, 1);
4552 case CPU_DOWN_PREPARE
:
4553 smp_call_function_single(cpu
, tsc_bad
, NULL
, 1);
4559 static struct notifier_block kvmclock_cpu_notifier_block
= {
4560 .notifier_call
= kvmclock_cpu_notifier
,
4561 .priority
= -INT_MAX
4564 static void kvm_timer_init(void)
4568 max_tsc_khz
= tsc_khz
;
4569 register_hotcpu_notifier(&kvmclock_cpu_notifier_block
);
4570 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
)) {
4571 #ifdef CONFIG_CPU_FREQ
4572 struct cpufreq_policy policy
;
4573 memset(&policy
, 0, sizeof(policy
));
4575 cpufreq_get_policy(&policy
, cpu
);
4576 if (policy
.cpuinfo
.max_freq
)
4577 max_tsc_khz
= policy
.cpuinfo
.max_freq
;
4580 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block
,
4581 CPUFREQ_TRANSITION_NOTIFIER
);
4583 pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz
);
4584 for_each_online_cpu(cpu
)
4585 smp_call_function_single(cpu
, tsc_khz_changed
, NULL
, 1);
4588 static DEFINE_PER_CPU(struct kvm_vcpu
*, current_vcpu
);
4590 static int kvm_is_in_guest(void)
4592 return percpu_read(current_vcpu
) != NULL
;
4595 static int kvm_is_user_mode(void)
4599 if (percpu_read(current_vcpu
))
4600 user_mode
= kvm_x86_ops
->get_cpl(percpu_read(current_vcpu
));
4602 return user_mode
!= 0;
4605 static unsigned long kvm_get_guest_ip(void)
4607 unsigned long ip
= 0;
4609 if (percpu_read(current_vcpu
))
4610 ip
= kvm_rip_read(percpu_read(current_vcpu
));
4615 static struct perf_guest_info_callbacks kvm_guest_cbs
= {
4616 .is_in_guest
= kvm_is_in_guest
,
4617 .is_user_mode
= kvm_is_user_mode
,
4618 .get_guest_ip
= kvm_get_guest_ip
,
4621 void kvm_before_handle_nmi(struct kvm_vcpu
*vcpu
)
4623 percpu_write(current_vcpu
, vcpu
);
4625 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi
);
4627 void kvm_after_handle_nmi(struct kvm_vcpu
*vcpu
)
4629 percpu_write(current_vcpu
, NULL
);
4631 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi
);
4633 int kvm_arch_init(void *opaque
)
4636 struct kvm_x86_ops
*ops
= (struct kvm_x86_ops
*)opaque
;
4639 printk(KERN_ERR
"kvm: already loaded the other module\n");
4644 if (!ops
->cpu_has_kvm_support()) {
4645 printk(KERN_ERR
"kvm: no hardware support\n");
4649 if (ops
->disabled_by_bios()) {
4650 printk(KERN_ERR
"kvm: disabled by bios\n");
4655 r
= kvm_mmu_module_init();
4659 kvm_init_msr_list();
4662 kvm_mmu_set_nonpresent_ptes(0ull, 0ull);
4663 kvm_mmu_set_base_ptes(PT_PRESENT_MASK
);
4664 kvm_mmu_set_mask_ptes(PT_USER_MASK
, PT_ACCESSED_MASK
,
4665 PT_DIRTY_MASK
, PT64_NX_MASK
, 0);
4669 perf_register_guest_info_callbacks(&kvm_guest_cbs
);
4672 host_xcr0
= xgetbv(XCR_XFEATURE_ENABLED_MASK
);
4680 void kvm_arch_exit(void)
4682 perf_unregister_guest_info_callbacks(&kvm_guest_cbs
);
4684 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
4685 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block
,
4686 CPUFREQ_TRANSITION_NOTIFIER
);
4687 unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block
);
4689 kvm_mmu_module_exit();
4692 int kvm_emulate_halt(struct kvm_vcpu
*vcpu
)
4694 ++vcpu
->stat
.halt_exits
;
4695 if (irqchip_in_kernel(vcpu
->kvm
)) {
4696 vcpu
->arch
.mp_state
= KVM_MP_STATE_HALTED
;
4699 vcpu
->run
->exit_reason
= KVM_EXIT_HLT
;
4703 EXPORT_SYMBOL_GPL(kvm_emulate_halt
);
4705 static inline gpa_t
hc_gpa(struct kvm_vcpu
*vcpu
, unsigned long a0
,
4708 if (is_long_mode(vcpu
))
4711 return a0
| ((gpa_t
)a1
<< 32);
4714 int kvm_hv_hypercall(struct kvm_vcpu
*vcpu
)
4716 u64 param
, ingpa
, outgpa
, ret
;
4717 uint16_t code
, rep_idx
, rep_cnt
, res
= HV_STATUS_SUCCESS
, rep_done
= 0;
4718 bool fast
, longmode
;
4722 * hypercall generates UD from non zero cpl and real mode
4725 if (kvm_x86_ops
->get_cpl(vcpu
) != 0 || !is_protmode(vcpu
)) {
4726 kvm_queue_exception(vcpu
, UD_VECTOR
);
4730 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
4731 longmode
= is_long_mode(vcpu
) && cs_l
== 1;
4734 param
= ((u64
)kvm_register_read(vcpu
, VCPU_REGS_RDX
) << 32) |
4735 (kvm_register_read(vcpu
, VCPU_REGS_RAX
) & 0xffffffff);
4736 ingpa
= ((u64
)kvm_register_read(vcpu
, VCPU_REGS_RBX
) << 32) |
4737 (kvm_register_read(vcpu
, VCPU_REGS_RCX
) & 0xffffffff);
4738 outgpa
= ((u64
)kvm_register_read(vcpu
, VCPU_REGS_RDI
) << 32) |
4739 (kvm_register_read(vcpu
, VCPU_REGS_RSI
) & 0xffffffff);
4741 #ifdef CONFIG_X86_64
4743 param
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
4744 ingpa
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
4745 outgpa
= kvm_register_read(vcpu
, VCPU_REGS_R8
);
4749 code
= param
& 0xffff;
4750 fast
= (param
>> 16) & 0x1;
4751 rep_cnt
= (param
>> 32) & 0xfff;
4752 rep_idx
= (param
>> 48) & 0xfff;
4754 trace_kvm_hv_hypercall(code
, fast
, rep_cnt
, rep_idx
, ingpa
, outgpa
);
4757 case HV_X64_HV_NOTIFY_LONG_SPIN_WAIT
:
4758 kvm_vcpu_on_spin(vcpu
);
4761 res
= HV_STATUS_INVALID_HYPERCALL_CODE
;
4765 ret
= res
| (((u64
)rep_done
& 0xfff) << 32);
4767 kvm_register_write(vcpu
, VCPU_REGS_RAX
, ret
);
4769 kvm_register_write(vcpu
, VCPU_REGS_RDX
, ret
>> 32);
4770 kvm_register_write(vcpu
, VCPU_REGS_RAX
, ret
& 0xffffffff);
4776 int kvm_emulate_hypercall(struct kvm_vcpu
*vcpu
)
4778 unsigned long nr
, a0
, a1
, a2
, a3
, ret
;
4781 if (kvm_hv_hypercall_enabled(vcpu
->kvm
))
4782 return kvm_hv_hypercall(vcpu
);
4784 nr
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
4785 a0
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
4786 a1
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
4787 a2
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
4788 a3
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
4790 trace_kvm_hypercall(nr
, a0
, a1
, a2
, a3
);
4792 if (!is_long_mode(vcpu
)) {
4800 if (kvm_x86_ops
->get_cpl(vcpu
) != 0) {
4806 case KVM_HC_VAPIC_POLL_IRQ
:
4810 r
= kvm_pv_mmu_op(vcpu
, a0
, hc_gpa(vcpu
, a1
, a2
), &ret
);
4817 kvm_register_write(vcpu
, VCPU_REGS_RAX
, ret
);
4818 ++vcpu
->stat
.hypercalls
;
4821 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall
);
4823 int kvm_fix_hypercall(struct kvm_vcpu
*vcpu
)
4825 char instruction
[3];
4826 unsigned long rip
= kvm_rip_read(vcpu
);
4829 * Blow out the MMU to ensure that no other VCPU has an active mapping
4830 * to ensure that the updated hypercall appears atomically across all
4833 kvm_mmu_zap_all(vcpu
->kvm
);
4835 kvm_x86_ops
->patch_hypercall(vcpu
, instruction
);
4837 return emulator_write_emulated(rip
, instruction
, 3, NULL
, vcpu
);
4840 void realmode_lgdt(struct kvm_vcpu
*vcpu
, u16 limit
, unsigned long base
)
4842 struct desc_ptr dt
= { limit
, base
};
4844 kvm_x86_ops
->set_gdt(vcpu
, &dt
);
4847 void realmode_lidt(struct kvm_vcpu
*vcpu
, u16 limit
, unsigned long base
)
4849 struct desc_ptr dt
= { limit
, base
};
4851 kvm_x86_ops
->set_idt(vcpu
, &dt
);
4854 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu
*vcpu
, int i
)
4856 struct kvm_cpuid_entry2
*e
= &vcpu
->arch
.cpuid_entries
[i
];
4857 int j
, nent
= vcpu
->arch
.cpuid_nent
;
4859 e
->flags
&= ~KVM_CPUID_FLAG_STATE_READ_NEXT
;
4860 /* when no next entry is found, the current entry[i] is reselected */
4861 for (j
= i
+ 1; ; j
= (j
+ 1) % nent
) {
4862 struct kvm_cpuid_entry2
*ej
= &vcpu
->arch
.cpuid_entries
[j
];
4863 if (ej
->function
== e
->function
) {
4864 ej
->flags
|= KVM_CPUID_FLAG_STATE_READ_NEXT
;
4868 return 0; /* silence gcc, even though control never reaches here */
4871 /* find an entry with matching function, matching index (if needed), and that
4872 * should be read next (if it's stateful) */
4873 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2
*e
,
4874 u32 function
, u32 index
)
4876 if (e
->function
!= function
)
4878 if ((e
->flags
& KVM_CPUID_FLAG_SIGNIFCANT_INDEX
) && e
->index
!= index
)
4880 if ((e
->flags
& KVM_CPUID_FLAG_STATEFUL_FUNC
) &&
4881 !(e
->flags
& KVM_CPUID_FLAG_STATE_READ_NEXT
))
4886 struct kvm_cpuid_entry2
*kvm_find_cpuid_entry(struct kvm_vcpu
*vcpu
,
4887 u32 function
, u32 index
)
4890 struct kvm_cpuid_entry2
*best
= NULL
;
4892 for (i
= 0; i
< vcpu
->arch
.cpuid_nent
; ++i
) {
4893 struct kvm_cpuid_entry2
*e
;
4895 e
= &vcpu
->arch
.cpuid_entries
[i
];
4896 if (is_matching_cpuid_entry(e
, function
, index
)) {
4897 if (e
->flags
& KVM_CPUID_FLAG_STATEFUL_FUNC
)
4898 move_to_next_stateful_cpuid_entry(vcpu
, i
);
4903 * Both basic or both extended?
4905 if (((e
->function
^ function
) & 0x80000000) == 0)
4906 if (!best
|| e
->function
> best
->function
)
4911 EXPORT_SYMBOL_GPL(kvm_find_cpuid_entry
);
4913 int cpuid_maxphyaddr(struct kvm_vcpu
*vcpu
)
4915 struct kvm_cpuid_entry2
*best
;
4917 best
= kvm_find_cpuid_entry(vcpu
, 0x80000000, 0);
4918 if (!best
|| best
->eax
< 0x80000008)
4920 best
= kvm_find_cpuid_entry(vcpu
, 0x80000008, 0);
4922 return best
->eax
& 0xff;
4927 void kvm_emulate_cpuid(struct kvm_vcpu
*vcpu
)
4929 u32 function
, index
;
4930 struct kvm_cpuid_entry2
*best
;
4932 function
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
4933 index
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
4934 kvm_register_write(vcpu
, VCPU_REGS_RAX
, 0);
4935 kvm_register_write(vcpu
, VCPU_REGS_RBX
, 0);
4936 kvm_register_write(vcpu
, VCPU_REGS_RCX
, 0);
4937 kvm_register_write(vcpu
, VCPU_REGS_RDX
, 0);
4938 best
= kvm_find_cpuid_entry(vcpu
, function
, index
);
4940 kvm_register_write(vcpu
, VCPU_REGS_RAX
, best
->eax
);
4941 kvm_register_write(vcpu
, VCPU_REGS_RBX
, best
->ebx
);
4942 kvm_register_write(vcpu
, VCPU_REGS_RCX
, best
->ecx
);
4943 kvm_register_write(vcpu
, VCPU_REGS_RDX
, best
->edx
);
4945 kvm_x86_ops
->skip_emulated_instruction(vcpu
);
4946 trace_kvm_cpuid(function
,
4947 kvm_register_read(vcpu
, VCPU_REGS_RAX
),
4948 kvm_register_read(vcpu
, VCPU_REGS_RBX
),
4949 kvm_register_read(vcpu
, VCPU_REGS_RCX
),
4950 kvm_register_read(vcpu
, VCPU_REGS_RDX
));
4952 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid
);
4955 * Check if userspace requested an interrupt window, and that the
4956 * interrupt window is open.
4958 * No need to exit to userspace if we already have an interrupt queued.
4960 static int dm_request_for_irq_injection(struct kvm_vcpu
*vcpu
)
4962 return (!irqchip_in_kernel(vcpu
->kvm
) && !kvm_cpu_has_interrupt(vcpu
) &&
4963 vcpu
->run
->request_interrupt_window
&&
4964 kvm_arch_interrupt_allowed(vcpu
));
4967 static void post_kvm_run_save(struct kvm_vcpu
*vcpu
)
4969 struct kvm_run
*kvm_run
= vcpu
->run
;
4971 kvm_run
->if_flag
= (kvm_get_rflags(vcpu
) & X86_EFLAGS_IF
) != 0;
4972 kvm_run
->cr8
= kvm_get_cr8(vcpu
);
4973 kvm_run
->apic_base
= kvm_get_apic_base(vcpu
);
4974 if (irqchip_in_kernel(vcpu
->kvm
))
4975 kvm_run
->ready_for_interrupt_injection
= 1;
4977 kvm_run
->ready_for_interrupt_injection
=
4978 kvm_arch_interrupt_allowed(vcpu
) &&
4979 !kvm_cpu_has_interrupt(vcpu
) &&
4980 !kvm_event_needs_reinjection(vcpu
);
4983 static void vapic_enter(struct kvm_vcpu
*vcpu
)
4985 struct kvm_lapic
*apic
= vcpu
->arch
.apic
;
4988 if (!apic
|| !apic
->vapic_addr
)
4991 page
= gfn_to_page(vcpu
->kvm
, apic
->vapic_addr
>> PAGE_SHIFT
);
4993 vcpu
->arch
.apic
->vapic_page
= page
;
4996 static void vapic_exit(struct kvm_vcpu
*vcpu
)
4998 struct kvm_lapic
*apic
= vcpu
->arch
.apic
;
5001 if (!apic
|| !apic
->vapic_addr
)
5004 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
5005 kvm_release_page_dirty(apic
->vapic_page
);
5006 mark_page_dirty(vcpu
->kvm
, apic
->vapic_addr
>> PAGE_SHIFT
);
5007 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
5010 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
)
5014 if (!kvm_x86_ops
->update_cr8_intercept
)
5017 if (!vcpu
->arch
.apic
)
5020 if (!vcpu
->arch
.apic
->vapic_addr
)
5021 max_irr
= kvm_lapic_find_highest_irr(vcpu
);
5028 tpr
= kvm_lapic_get_cr8(vcpu
);
5030 kvm_x86_ops
->update_cr8_intercept(vcpu
, tpr
, max_irr
);
5033 static void inject_pending_event(struct kvm_vcpu
*vcpu
)
5035 /* try to reinject previous events if any */
5036 if (vcpu
->arch
.exception
.pending
) {
5037 trace_kvm_inj_exception(vcpu
->arch
.exception
.nr
,
5038 vcpu
->arch
.exception
.has_error_code
,
5039 vcpu
->arch
.exception
.error_code
);
5040 kvm_x86_ops
->queue_exception(vcpu
, vcpu
->arch
.exception
.nr
,
5041 vcpu
->arch
.exception
.has_error_code
,
5042 vcpu
->arch
.exception
.error_code
,
5043 vcpu
->arch
.exception
.reinject
);
5047 if (vcpu
->arch
.nmi_injected
) {
5048 kvm_x86_ops
->set_nmi(vcpu
);
5052 if (vcpu
->arch
.interrupt
.pending
) {
5053 kvm_x86_ops
->set_irq(vcpu
);
5057 /* try to inject new event if pending */
5058 if (vcpu
->arch
.nmi_pending
) {
5059 if (kvm_x86_ops
->nmi_allowed(vcpu
)) {
5060 vcpu
->arch
.nmi_pending
= false;
5061 vcpu
->arch
.nmi_injected
= true;
5062 kvm_x86_ops
->set_nmi(vcpu
);
5064 } else if (kvm_cpu_has_interrupt(vcpu
)) {
5065 if (kvm_x86_ops
->interrupt_allowed(vcpu
)) {
5066 kvm_queue_interrupt(vcpu
, kvm_cpu_get_interrupt(vcpu
),
5068 kvm_x86_ops
->set_irq(vcpu
);
5073 static void kvm_load_guest_xcr0(struct kvm_vcpu
*vcpu
)
5075 if (kvm_read_cr4_bits(vcpu
, X86_CR4_OSXSAVE
) &&
5076 !vcpu
->guest_xcr0_loaded
) {
5077 /* kvm_set_xcr() also depends on this */
5078 xsetbv(XCR_XFEATURE_ENABLED_MASK
, vcpu
->arch
.xcr0
);
5079 vcpu
->guest_xcr0_loaded
= 1;
5083 static void kvm_put_guest_xcr0(struct kvm_vcpu
*vcpu
)
5085 if (vcpu
->guest_xcr0_loaded
) {
5086 if (vcpu
->arch
.xcr0
!= host_xcr0
)
5087 xsetbv(XCR_XFEATURE_ENABLED_MASK
, host_xcr0
);
5088 vcpu
->guest_xcr0_loaded
= 0;
5092 static int vcpu_enter_guest(struct kvm_vcpu
*vcpu
)
5095 bool req_int_win
= !irqchip_in_kernel(vcpu
->kvm
) &&
5096 vcpu
->run
->request_interrupt_window
;
5098 if (vcpu
->requests
) {
5099 if (kvm_check_request(KVM_REQ_MMU_RELOAD
, vcpu
))
5100 kvm_mmu_unload(vcpu
);
5101 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER
, vcpu
))
5102 __kvm_migrate_timers(vcpu
);
5103 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE
, vcpu
)) {
5104 r
= kvm_guest_time_update(vcpu
);
5108 if (kvm_check_request(KVM_REQ_MMU_SYNC
, vcpu
))
5109 kvm_mmu_sync_roots(vcpu
);
5110 if (kvm_check_request(KVM_REQ_TLB_FLUSH
, vcpu
))
5111 kvm_x86_ops
->tlb_flush(vcpu
);
5112 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS
, vcpu
)) {
5113 vcpu
->run
->exit_reason
= KVM_EXIT_TPR_ACCESS
;
5117 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT
, vcpu
)) {
5118 vcpu
->run
->exit_reason
= KVM_EXIT_SHUTDOWN
;
5122 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU
, vcpu
)) {
5123 vcpu
->fpu_active
= 0;
5124 kvm_x86_ops
->fpu_deactivate(vcpu
);
5126 if (kvm_check_request(KVM_REQ_APF_HALT
, vcpu
)) {
5127 /* Page is swapped out. Do synthetic halt */
5128 vcpu
->arch
.apf
.halted
= true;
5134 r
= kvm_mmu_reload(vcpu
);
5138 if (kvm_check_request(KVM_REQ_EVENT
, vcpu
) || req_int_win
) {
5139 inject_pending_event(vcpu
);
5141 /* enable NMI/IRQ window open exits if needed */
5142 if (vcpu
->arch
.nmi_pending
)
5143 kvm_x86_ops
->enable_nmi_window(vcpu
);
5144 else if (kvm_cpu_has_interrupt(vcpu
) || req_int_win
)
5145 kvm_x86_ops
->enable_irq_window(vcpu
);
5147 if (kvm_lapic_enabled(vcpu
)) {
5148 update_cr8_intercept(vcpu
);
5149 kvm_lapic_sync_to_vapic(vcpu
);
5155 kvm_x86_ops
->prepare_guest_switch(vcpu
);
5156 if (vcpu
->fpu_active
)
5157 kvm_load_guest_fpu(vcpu
);
5158 kvm_load_guest_xcr0(vcpu
);
5160 atomic_set(&vcpu
->guest_mode
, 1);
5163 local_irq_disable();
5165 if (!atomic_read(&vcpu
->guest_mode
) || vcpu
->requests
5166 || need_resched() || signal_pending(current
)) {
5167 atomic_set(&vcpu
->guest_mode
, 0);
5171 kvm_x86_ops
->cancel_injection(vcpu
);
5176 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
5180 if (unlikely(vcpu
->arch
.switch_db_regs
)) {
5182 set_debugreg(vcpu
->arch
.eff_db
[0], 0);
5183 set_debugreg(vcpu
->arch
.eff_db
[1], 1);
5184 set_debugreg(vcpu
->arch
.eff_db
[2], 2);
5185 set_debugreg(vcpu
->arch
.eff_db
[3], 3);
5188 trace_kvm_entry(vcpu
->vcpu_id
);
5189 kvm_x86_ops
->run(vcpu
);
5192 * If the guest has used debug registers, at least dr7
5193 * will be disabled while returning to the host.
5194 * If we don't have active breakpoints in the host, we don't
5195 * care about the messed up debug address registers. But if
5196 * we have some of them active, restore the old state.
5198 if (hw_breakpoint_active())
5199 hw_breakpoint_restore();
5201 kvm_get_msr(vcpu
, MSR_IA32_TSC
, &vcpu
->arch
.last_guest_tsc
);
5203 atomic_set(&vcpu
->guest_mode
, 0);
5210 * We must have an instruction between local_irq_enable() and
5211 * kvm_guest_exit(), so the timer interrupt isn't delayed by
5212 * the interrupt shadow. The stat.exits increment will do nicely.
5213 * But we need to prevent reordering, hence this barrier():
5221 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
5224 * Profile KVM exit RIPs:
5226 if (unlikely(prof_on
== KVM_PROFILING
)) {
5227 unsigned long rip
= kvm_rip_read(vcpu
);
5228 profile_hit(KVM_PROFILING
, (void *)rip
);
5232 kvm_lapic_sync_from_vapic(vcpu
);
5234 r
= kvm_x86_ops
->handle_exit(vcpu
);
5240 static int __vcpu_run(struct kvm_vcpu
*vcpu
)
5243 struct kvm
*kvm
= vcpu
->kvm
;
5245 if (unlikely(vcpu
->arch
.mp_state
== KVM_MP_STATE_SIPI_RECEIVED
)) {
5246 pr_debug("vcpu %d received sipi with vector # %x\n",
5247 vcpu
->vcpu_id
, vcpu
->arch
.sipi_vector
);
5248 kvm_lapic_reset(vcpu
);
5249 r
= kvm_arch_vcpu_reset(vcpu
);
5252 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
5255 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
5260 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_RUNNABLE
&&
5261 !vcpu
->arch
.apf
.halted
)
5262 r
= vcpu_enter_guest(vcpu
);
5264 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
5265 kvm_vcpu_block(vcpu
);
5266 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
5267 if (kvm_check_request(KVM_REQ_UNHALT
, vcpu
))
5269 switch(vcpu
->arch
.mp_state
) {
5270 case KVM_MP_STATE_HALTED
:
5271 vcpu
->arch
.mp_state
=
5272 KVM_MP_STATE_RUNNABLE
;
5273 case KVM_MP_STATE_RUNNABLE
:
5274 vcpu
->arch
.apf
.halted
= false;
5276 case KVM_MP_STATE_SIPI_RECEIVED
:
5287 clear_bit(KVM_REQ_PENDING_TIMER
, &vcpu
->requests
);
5288 if (kvm_cpu_has_pending_timer(vcpu
))
5289 kvm_inject_pending_timer_irqs(vcpu
);
5291 if (dm_request_for_irq_injection(vcpu
)) {
5293 vcpu
->run
->exit_reason
= KVM_EXIT_INTR
;
5294 ++vcpu
->stat
.request_irq_exits
;
5297 kvm_check_async_pf_completion(vcpu
);
5299 if (signal_pending(current
)) {
5301 vcpu
->run
->exit_reason
= KVM_EXIT_INTR
;
5302 ++vcpu
->stat
.signal_exits
;
5304 if (need_resched()) {
5305 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
5307 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
5311 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
5318 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
5323 if (vcpu
->sigset_active
)
5324 sigprocmask(SIG_SETMASK
, &vcpu
->sigset
, &sigsaved
);
5326 if (unlikely(vcpu
->arch
.mp_state
== KVM_MP_STATE_UNINITIALIZED
)) {
5327 kvm_vcpu_block(vcpu
);
5328 clear_bit(KVM_REQ_UNHALT
, &vcpu
->requests
);
5333 /* re-sync apic's tpr */
5334 if (!irqchip_in_kernel(vcpu
->kvm
))
5335 kvm_set_cr8(vcpu
, kvm_run
->cr8
);
5337 if (vcpu
->arch
.pio
.count
|| vcpu
->mmio_needed
) {
5338 if (vcpu
->mmio_needed
) {
5339 memcpy(vcpu
->mmio_data
, kvm_run
->mmio
.data
, 8);
5340 vcpu
->mmio_read_completed
= 1;
5341 vcpu
->mmio_needed
= 0;
5343 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
5344 r
= emulate_instruction(vcpu
, 0, 0, EMULTYPE_NO_DECODE
);
5345 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
5346 if (r
!= EMULATE_DONE
) {
5351 if (kvm_run
->exit_reason
== KVM_EXIT_HYPERCALL
)
5352 kvm_register_write(vcpu
, VCPU_REGS_RAX
,
5353 kvm_run
->hypercall
.ret
);
5355 r
= __vcpu_run(vcpu
);
5358 post_kvm_run_save(vcpu
);
5359 if (vcpu
->sigset_active
)
5360 sigprocmask(SIG_SETMASK
, &sigsaved
, NULL
);
5365 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
5367 regs
->rax
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
5368 regs
->rbx
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
5369 regs
->rcx
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
5370 regs
->rdx
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
5371 regs
->rsi
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
5372 regs
->rdi
= kvm_register_read(vcpu
, VCPU_REGS_RDI
);
5373 regs
->rsp
= kvm_register_read(vcpu
, VCPU_REGS_RSP
);
5374 regs
->rbp
= kvm_register_read(vcpu
, VCPU_REGS_RBP
);
5375 #ifdef CONFIG_X86_64
5376 regs
->r8
= kvm_register_read(vcpu
, VCPU_REGS_R8
);
5377 regs
->r9
= kvm_register_read(vcpu
, VCPU_REGS_R9
);
5378 regs
->r10
= kvm_register_read(vcpu
, VCPU_REGS_R10
);
5379 regs
->r11
= kvm_register_read(vcpu
, VCPU_REGS_R11
);
5380 regs
->r12
= kvm_register_read(vcpu
, VCPU_REGS_R12
);
5381 regs
->r13
= kvm_register_read(vcpu
, VCPU_REGS_R13
);
5382 regs
->r14
= kvm_register_read(vcpu
, VCPU_REGS_R14
);
5383 regs
->r15
= kvm_register_read(vcpu
, VCPU_REGS_R15
);
5386 regs
->rip
= kvm_rip_read(vcpu
);
5387 regs
->rflags
= kvm_get_rflags(vcpu
);
5392 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
5394 kvm_register_write(vcpu
, VCPU_REGS_RAX
, regs
->rax
);
5395 kvm_register_write(vcpu
, VCPU_REGS_RBX
, regs
->rbx
);
5396 kvm_register_write(vcpu
, VCPU_REGS_RCX
, regs
->rcx
);
5397 kvm_register_write(vcpu
, VCPU_REGS_RDX
, regs
->rdx
);
5398 kvm_register_write(vcpu
, VCPU_REGS_RSI
, regs
->rsi
);
5399 kvm_register_write(vcpu
, VCPU_REGS_RDI
, regs
->rdi
);
5400 kvm_register_write(vcpu
, VCPU_REGS_RSP
, regs
->rsp
);
5401 kvm_register_write(vcpu
, VCPU_REGS_RBP
, regs
->rbp
);
5402 #ifdef CONFIG_X86_64
5403 kvm_register_write(vcpu
, VCPU_REGS_R8
, regs
->r8
);
5404 kvm_register_write(vcpu
, VCPU_REGS_R9
, regs
->r9
);
5405 kvm_register_write(vcpu
, VCPU_REGS_R10
, regs
->r10
);
5406 kvm_register_write(vcpu
, VCPU_REGS_R11
, regs
->r11
);
5407 kvm_register_write(vcpu
, VCPU_REGS_R12
, regs
->r12
);
5408 kvm_register_write(vcpu
, VCPU_REGS_R13
, regs
->r13
);
5409 kvm_register_write(vcpu
, VCPU_REGS_R14
, regs
->r14
);
5410 kvm_register_write(vcpu
, VCPU_REGS_R15
, regs
->r15
);
5413 kvm_rip_write(vcpu
, regs
->rip
);
5414 kvm_set_rflags(vcpu
, regs
->rflags
);
5416 vcpu
->arch
.exception
.pending
= false;
5418 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5423 void kvm_get_cs_db_l_bits(struct kvm_vcpu
*vcpu
, int *db
, int *l
)
5425 struct kvm_segment cs
;
5427 kvm_get_segment(vcpu
, &cs
, VCPU_SREG_CS
);
5431 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits
);
5433 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu
*vcpu
,
5434 struct kvm_sregs
*sregs
)
5438 kvm_get_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
5439 kvm_get_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
5440 kvm_get_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
5441 kvm_get_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
5442 kvm_get_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
5443 kvm_get_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
5445 kvm_get_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
5446 kvm_get_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
5448 kvm_x86_ops
->get_idt(vcpu
, &dt
);
5449 sregs
->idt
.limit
= dt
.size
;
5450 sregs
->idt
.base
= dt
.address
;
5451 kvm_x86_ops
->get_gdt(vcpu
, &dt
);
5452 sregs
->gdt
.limit
= dt
.size
;
5453 sregs
->gdt
.base
= dt
.address
;
5455 sregs
->cr0
= kvm_read_cr0(vcpu
);
5456 sregs
->cr2
= vcpu
->arch
.cr2
;
5457 sregs
->cr3
= vcpu
->arch
.cr3
;
5458 sregs
->cr4
= kvm_read_cr4(vcpu
);
5459 sregs
->cr8
= kvm_get_cr8(vcpu
);
5460 sregs
->efer
= vcpu
->arch
.efer
;
5461 sregs
->apic_base
= kvm_get_apic_base(vcpu
);
5463 memset(sregs
->interrupt_bitmap
, 0, sizeof sregs
->interrupt_bitmap
);
5465 if (vcpu
->arch
.interrupt
.pending
&& !vcpu
->arch
.interrupt
.soft
)
5466 set_bit(vcpu
->arch
.interrupt
.nr
,
5467 (unsigned long *)sregs
->interrupt_bitmap
);
5472 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu
*vcpu
,
5473 struct kvm_mp_state
*mp_state
)
5475 mp_state
->mp_state
= vcpu
->arch
.mp_state
;
5479 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu
*vcpu
,
5480 struct kvm_mp_state
*mp_state
)
5482 vcpu
->arch
.mp_state
= mp_state
->mp_state
;
5483 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5487 int kvm_task_switch(struct kvm_vcpu
*vcpu
, u16 tss_selector
, int reason
,
5488 bool has_error_code
, u32 error_code
)
5490 struct decode_cache
*c
= &vcpu
->arch
.emulate_ctxt
.decode
;
5493 init_emulate_ctxt(vcpu
);
5495 ret
= emulator_task_switch(&vcpu
->arch
.emulate_ctxt
,
5496 tss_selector
, reason
, has_error_code
,
5500 return EMULATE_FAIL
;
5502 memcpy(vcpu
->arch
.regs
, c
->regs
, sizeof c
->regs
);
5503 kvm_rip_write(vcpu
, vcpu
->arch
.emulate_ctxt
.eip
);
5504 kvm_x86_ops
->set_rflags(vcpu
, vcpu
->arch
.emulate_ctxt
.eflags
);
5505 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5506 return EMULATE_DONE
;
5508 EXPORT_SYMBOL_GPL(kvm_task_switch
);
5510 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu
*vcpu
,
5511 struct kvm_sregs
*sregs
)
5513 int mmu_reset_needed
= 0;
5514 int pending_vec
, max_bits
;
5517 dt
.size
= sregs
->idt
.limit
;
5518 dt
.address
= sregs
->idt
.base
;
5519 kvm_x86_ops
->set_idt(vcpu
, &dt
);
5520 dt
.size
= sregs
->gdt
.limit
;
5521 dt
.address
= sregs
->gdt
.base
;
5522 kvm_x86_ops
->set_gdt(vcpu
, &dt
);
5524 vcpu
->arch
.cr2
= sregs
->cr2
;
5525 mmu_reset_needed
|= vcpu
->arch
.cr3
!= sregs
->cr3
;
5526 vcpu
->arch
.cr3
= sregs
->cr3
;
5528 kvm_set_cr8(vcpu
, sregs
->cr8
);
5530 mmu_reset_needed
|= vcpu
->arch
.efer
!= sregs
->efer
;
5531 kvm_x86_ops
->set_efer(vcpu
, sregs
->efer
);
5532 kvm_set_apic_base(vcpu
, sregs
->apic_base
);
5534 mmu_reset_needed
|= kvm_read_cr0(vcpu
) != sregs
->cr0
;
5535 kvm_x86_ops
->set_cr0(vcpu
, sregs
->cr0
);
5536 vcpu
->arch
.cr0
= sregs
->cr0
;
5538 mmu_reset_needed
|= kvm_read_cr4(vcpu
) != sregs
->cr4
;
5539 kvm_x86_ops
->set_cr4(vcpu
, sregs
->cr4
);
5540 if (sregs
->cr4
& X86_CR4_OSXSAVE
)
5542 if (!is_long_mode(vcpu
) && is_pae(vcpu
)) {
5543 load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, vcpu
->arch
.cr3
);
5544 mmu_reset_needed
= 1;
5547 if (mmu_reset_needed
)
5548 kvm_mmu_reset_context(vcpu
);
5550 max_bits
= (sizeof sregs
->interrupt_bitmap
) << 3;
5551 pending_vec
= find_first_bit(
5552 (const unsigned long *)sregs
->interrupt_bitmap
, max_bits
);
5553 if (pending_vec
< max_bits
) {
5554 kvm_queue_interrupt(vcpu
, pending_vec
, false);
5555 pr_debug("Set back pending irq %d\n", pending_vec
);
5556 if (irqchip_in_kernel(vcpu
->kvm
))
5557 kvm_pic_clear_isr_ack(vcpu
->kvm
);
5560 kvm_set_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
5561 kvm_set_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
5562 kvm_set_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
5563 kvm_set_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
5564 kvm_set_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
5565 kvm_set_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
5567 kvm_set_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
5568 kvm_set_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
5570 update_cr8_intercept(vcpu
);
5572 /* Older userspace won't unhalt the vcpu on reset. */
5573 if (kvm_vcpu_is_bsp(vcpu
) && kvm_rip_read(vcpu
) == 0xfff0 &&
5574 sregs
->cs
.selector
== 0xf000 && sregs
->cs
.base
== 0xffff0000 &&
5576 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
5578 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5583 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu
*vcpu
,
5584 struct kvm_guest_debug
*dbg
)
5586 unsigned long rflags
;
5589 if (dbg
->control
& (KVM_GUESTDBG_INJECT_DB
| KVM_GUESTDBG_INJECT_BP
)) {
5591 if (vcpu
->arch
.exception
.pending
)
5593 if (dbg
->control
& KVM_GUESTDBG_INJECT_DB
)
5594 kvm_queue_exception(vcpu
, DB_VECTOR
);
5596 kvm_queue_exception(vcpu
, BP_VECTOR
);
5600 * Read rflags as long as potentially injected trace flags are still
5603 rflags
= kvm_get_rflags(vcpu
);
5605 vcpu
->guest_debug
= dbg
->control
;
5606 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_ENABLE
))
5607 vcpu
->guest_debug
= 0;
5609 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
) {
5610 for (i
= 0; i
< KVM_NR_DB_REGS
; ++i
)
5611 vcpu
->arch
.eff_db
[i
] = dbg
->arch
.debugreg
[i
];
5612 vcpu
->arch
.switch_db_regs
=
5613 (dbg
->arch
.debugreg
[7] & DR7_BP_EN_MASK
);
5615 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
5616 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
5617 vcpu
->arch
.switch_db_regs
= (vcpu
->arch
.dr7
& DR7_BP_EN_MASK
);
5620 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
5621 vcpu
->arch
.singlestep_rip
= kvm_rip_read(vcpu
) +
5622 get_segment_base(vcpu
, VCPU_SREG_CS
);
5625 * Trigger an rflags update that will inject or remove the trace
5628 kvm_set_rflags(vcpu
, rflags
);
5630 kvm_x86_ops
->set_guest_debug(vcpu
, dbg
);
5640 * Translate a guest virtual address to a guest physical address.
5642 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu
*vcpu
,
5643 struct kvm_translation
*tr
)
5645 unsigned long vaddr
= tr
->linear_address
;
5649 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
5650 gpa
= kvm_mmu_gva_to_gpa_system(vcpu
, vaddr
, NULL
);
5651 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
5652 tr
->physical_address
= gpa
;
5653 tr
->valid
= gpa
!= UNMAPPED_GVA
;
5660 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
5662 struct i387_fxsave_struct
*fxsave
=
5663 &vcpu
->arch
.guest_fpu
.state
->fxsave
;
5665 memcpy(fpu
->fpr
, fxsave
->st_space
, 128);
5666 fpu
->fcw
= fxsave
->cwd
;
5667 fpu
->fsw
= fxsave
->swd
;
5668 fpu
->ftwx
= fxsave
->twd
;
5669 fpu
->last_opcode
= fxsave
->fop
;
5670 fpu
->last_ip
= fxsave
->rip
;
5671 fpu
->last_dp
= fxsave
->rdp
;
5672 memcpy(fpu
->xmm
, fxsave
->xmm_space
, sizeof fxsave
->xmm_space
);
5677 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
5679 struct i387_fxsave_struct
*fxsave
=
5680 &vcpu
->arch
.guest_fpu
.state
->fxsave
;
5682 memcpy(fxsave
->st_space
, fpu
->fpr
, 128);
5683 fxsave
->cwd
= fpu
->fcw
;
5684 fxsave
->swd
= fpu
->fsw
;
5685 fxsave
->twd
= fpu
->ftwx
;
5686 fxsave
->fop
= fpu
->last_opcode
;
5687 fxsave
->rip
= fpu
->last_ip
;
5688 fxsave
->rdp
= fpu
->last_dp
;
5689 memcpy(fxsave
->xmm_space
, fpu
->xmm
, sizeof fxsave
->xmm_space
);
5694 int fx_init(struct kvm_vcpu
*vcpu
)
5698 err
= fpu_alloc(&vcpu
->arch
.guest_fpu
);
5702 fpu_finit(&vcpu
->arch
.guest_fpu
);
5705 * Ensure guest xcr0 is valid for loading
5707 vcpu
->arch
.xcr0
= XSTATE_FP
;
5709 vcpu
->arch
.cr0
|= X86_CR0_ET
;
5713 EXPORT_SYMBOL_GPL(fx_init
);
5715 static void fx_free(struct kvm_vcpu
*vcpu
)
5717 fpu_free(&vcpu
->arch
.guest_fpu
);
5720 void kvm_load_guest_fpu(struct kvm_vcpu
*vcpu
)
5722 if (vcpu
->guest_fpu_loaded
)
5726 * Restore all possible states in the guest,
5727 * and assume host would use all available bits.
5728 * Guest xcr0 would be loaded later.
5730 kvm_put_guest_xcr0(vcpu
);
5731 vcpu
->guest_fpu_loaded
= 1;
5732 unlazy_fpu(current
);
5733 fpu_restore_checking(&vcpu
->arch
.guest_fpu
);
5737 void kvm_put_guest_fpu(struct kvm_vcpu
*vcpu
)
5739 kvm_put_guest_xcr0(vcpu
);
5741 if (!vcpu
->guest_fpu_loaded
)
5744 vcpu
->guest_fpu_loaded
= 0;
5745 fpu_save_init(&vcpu
->arch
.guest_fpu
);
5746 ++vcpu
->stat
.fpu_reload
;
5747 kvm_make_request(KVM_REQ_DEACTIVATE_FPU
, vcpu
);
5751 void kvm_arch_vcpu_free(struct kvm_vcpu
*vcpu
)
5753 if (vcpu
->arch
.time_page
) {
5754 kvm_release_page_dirty(vcpu
->arch
.time_page
);
5755 vcpu
->arch
.time_page
= NULL
;
5758 free_cpumask_var(vcpu
->arch
.wbinvd_dirty_mask
);
5760 kvm_x86_ops
->vcpu_free(vcpu
);
5763 struct kvm_vcpu
*kvm_arch_vcpu_create(struct kvm
*kvm
,
5766 if (check_tsc_unstable() && atomic_read(&kvm
->online_vcpus
) != 0)
5767 printk_once(KERN_WARNING
5768 "kvm: SMP vm created on host with unstable TSC; "
5769 "guest TSC will not be reliable\n");
5770 return kvm_x86_ops
->vcpu_create(kvm
, id
);
5773 int kvm_arch_vcpu_setup(struct kvm_vcpu
*vcpu
)
5777 vcpu
->arch
.mtrr_state
.have_fixed
= 1;
5779 r
= kvm_arch_vcpu_reset(vcpu
);
5781 r
= kvm_mmu_setup(vcpu
);
5788 kvm_x86_ops
->vcpu_free(vcpu
);
5792 void kvm_arch_vcpu_destroy(struct kvm_vcpu
*vcpu
)
5795 kvm_mmu_unload(vcpu
);
5799 kvm_x86_ops
->vcpu_free(vcpu
);
5802 int kvm_arch_vcpu_reset(struct kvm_vcpu
*vcpu
)
5804 vcpu
->arch
.nmi_pending
= false;
5805 vcpu
->arch
.nmi_injected
= false;
5807 vcpu
->arch
.switch_db_regs
= 0;
5808 memset(vcpu
->arch
.db
, 0, sizeof(vcpu
->arch
.db
));
5809 vcpu
->arch
.dr6
= DR6_FIXED_1
;
5810 vcpu
->arch
.dr7
= DR7_FIXED_1
;
5812 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5814 kvm_clear_async_pf_completion_queue(vcpu
);
5815 kvm_async_pf_hash_reset(vcpu
);
5816 vcpu
->arch
.apf
.halted
= false;
5818 return kvm_x86_ops
->vcpu_reset(vcpu
);
5821 int kvm_arch_hardware_enable(void *garbage
)
5824 struct kvm_vcpu
*vcpu
;
5827 kvm_shared_msr_cpu_online();
5828 list_for_each_entry(kvm
, &vm_list
, vm_list
)
5829 kvm_for_each_vcpu(i
, vcpu
, kvm
)
5830 if (vcpu
->cpu
== smp_processor_id())
5831 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
5832 return kvm_x86_ops
->hardware_enable(garbage
);
5835 void kvm_arch_hardware_disable(void *garbage
)
5837 kvm_x86_ops
->hardware_disable(garbage
);
5838 drop_user_return_notifiers(garbage
);
5841 int kvm_arch_hardware_setup(void)
5843 return kvm_x86_ops
->hardware_setup();
5846 void kvm_arch_hardware_unsetup(void)
5848 kvm_x86_ops
->hardware_unsetup();
5851 void kvm_arch_check_processor_compat(void *rtn
)
5853 kvm_x86_ops
->check_processor_compatibility(rtn
);
5856 int kvm_arch_vcpu_init(struct kvm_vcpu
*vcpu
)
5862 BUG_ON(vcpu
->kvm
== NULL
);
5865 vcpu
->arch
.emulate_ctxt
.ops
= &emulate_ops
;
5866 vcpu
->arch
.walk_mmu
= &vcpu
->arch
.mmu
;
5867 vcpu
->arch
.mmu
.root_hpa
= INVALID_PAGE
;
5868 vcpu
->arch
.mmu
.translate_gpa
= translate_gpa
;
5869 vcpu
->arch
.nested_mmu
.translate_gpa
= translate_nested_gpa
;
5870 if (!irqchip_in_kernel(kvm
) || kvm_vcpu_is_bsp(vcpu
))
5871 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
5873 vcpu
->arch
.mp_state
= KVM_MP_STATE_UNINITIALIZED
;
5875 page
= alloc_page(GFP_KERNEL
| __GFP_ZERO
);
5880 vcpu
->arch
.pio_data
= page_address(page
);
5882 if (!kvm
->arch
.virtual_tsc_khz
)
5883 kvm_arch_set_tsc_khz(kvm
, max_tsc_khz
);
5885 r
= kvm_mmu_create(vcpu
);
5887 goto fail_free_pio_data
;
5889 if (irqchip_in_kernel(kvm
)) {
5890 r
= kvm_create_lapic(vcpu
);
5892 goto fail_mmu_destroy
;
5895 vcpu
->arch
.mce_banks
= kzalloc(KVM_MAX_MCE_BANKS
* sizeof(u64
) * 4,
5897 if (!vcpu
->arch
.mce_banks
) {
5899 goto fail_free_lapic
;
5901 vcpu
->arch
.mcg_cap
= KVM_MAX_MCE_BANKS
;
5903 if (!zalloc_cpumask_var(&vcpu
->arch
.wbinvd_dirty_mask
, GFP_KERNEL
))
5904 goto fail_free_mce_banks
;
5906 kvm_async_pf_hash_reset(vcpu
);
5909 fail_free_mce_banks
:
5910 kfree(vcpu
->arch
.mce_banks
);
5912 kvm_free_lapic(vcpu
);
5914 kvm_mmu_destroy(vcpu
);
5916 free_page((unsigned long)vcpu
->arch
.pio_data
);
5921 void kvm_arch_vcpu_uninit(struct kvm_vcpu
*vcpu
)
5925 kfree(vcpu
->arch
.mce_banks
);
5926 kvm_free_lapic(vcpu
);
5927 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
5928 kvm_mmu_destroy(vcpu
);
5929 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
5930 free_page((unsigned long)vcpu
->arch
.pio_data
);
5933 struct kvm
*kvm_arch_create_vm(void)
5935 struct kvm
*kvm
= kzalloc(sizeof(struct kvm
), GFP_KERNEL
);
5938 return ERR_PTR(-ENOMEM
);
5940 INIT_LIST_HEAD(&kvm
->arch
.active_mmu_pages
);
5941 INIT_LIST_HEAD(&kvm
->arch
.assigned_dev_head
);
5943 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
5944 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID
, &kvm
->arch
.irq_sources_bitmap
);
5946 spin_lock_init(&kvm
->arch
.tsc_write_lock
);
5951 static void kvm_unload_vcpu_mmu(struct kvm_vcpu
*vcpu
)
5954 kvm_mmu_unload(vcpu
);
5958 static void kvm_free_vcpus(struct kvm
*kvm
)
5961 struct kvm_vcpu
*vcpu
;
5964 * Unpin any mmu pages first.
5966 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
5967 kvm_clear_async_pf_completion_queue(vcpu
);
5968 kvm_unload_vcpu_mmu(vcpu
);
5970 kvm_for_each_vcpu(i
, vcpu
, kvm
)
5971 kvm_arch_vcpu_free(vcpu
);
5973 mutex_lock(&kvm
->lock
);
5974 for (i
= 0; i
< atomic_read(&kvm
->online_vcpus
); i
++)
5975 kvm
->vcpus
[i
] = NULL
;
5977 atomic_set(&kvm
->online_vcpus
, 0);
5978 mutex_unlock(&kvm
->lock
);
5981 void kvm_arch_sync_events(struct kvm
*kvm
)
5983 kvm_free_all_assigned_devices(kvm
);
5987 void kvm_arch_destroy_vm(struct kvm
*kvm
)
5989 kvm_iommu_unmap_guest(kvm
);
5990 kfree(kvm
->arch
.vpic
);
5991 kfree(kvm
->arch
.vioapic
);
5992 kvm_free_vcpus(kvm
);
5993 kvm_free_physmem(kvm
);
5994 if (kvm
->arch
.apic_access_page
)
5995 put_page(kvm
->arch
.apic_access_page
);
5996 if (kvm
->arch
.ept_identity_pagetable
)
5997 put_page(kvm
->arch
.ept_identity_pagetable
);
5998 cleanup_srcu_struct(&kvm
->srcu
);
6002 int kvm_arch_prepare_memory_region(struct kvm
*kvm
,
6003 struct kvm_memory_slot
*memslot
,
6004 struct kvm_memory_slot old
,
6005 struct kvm_userspace_memory_region
*mem
,
6008 int npages
= memslot
->npages
;
6009 int map_flags
= MAP_PRIVATE
| MAP_ANONYMOUS
;
6011 /* Prevent internal slot pages from being moved by fork()/COW. */
6012 if (memslot
->id
>= KVM_MEMORY_SLOTS
)
6013 map_flags
= MAP_SHARED
| MAP_ANONYMOUS
;
6015 /*To keep backward compatibility with older userspace,
6016 *x86 needs to hanlde !user_alloc case.
6019 if (npages
&& !old
.rmap
) {
6020 unsigned long userspace_addr
;
6022 down_write(¤t
->mm
->mmap_sem
);
6023 userspace_addr
= do_mmap(NULL
, 0,
6025 PROT_READ
| PROT_WRITE
,
6028 up_write(¤t
->mm
->mmap_sem
);
6030 if (IS_ERR((void *)userspace_addr
))
6031 return PTR_ERR((void *)userspace_addr
);
6033 memslot
->userspace_addr
= userspace_addr
;
6041 void kvm_arch_commit_memory_region(struct kvm
*kvm
,
6042 struct kvm_userspace_memory_region
*mem
,
6043 struct kvm_memory_slot old
,
6047 int npages
= mem
->memory_size
>> PAGE_SHIFT
;
6049 if (!user_alloc
&& !old
.user_alloc
&& old
.rmap
&& !npages
) {
6052 down_write(¤t
->mm
->mmap_sem
);
6053 ret
= do_munmap(current
->mm
, old
.userspace_addr
,
6054 old
.npages
* PAGE_SIZE
);
6055 up_write(¤t
->mm
->mmap_sem
);
6058 "kvm_vm_ioctl_set_memory_region: "
6059 "failed to munmap memory\n");
6062 spin_lock(&kvm
->mmu_lock
);
6063 if (!kvm
->arch
.n_requested_mmu_pages
) {
6064 unsigned int nr_mmu_pages
= kvm_mmu_calculate_mmu_pages(kvm
);
6065 kvm_mmu_change_mmu_pages(kvm
, nr_mmu_pages
);
6068 kvm_mmu_slot_remove_write_access(kvm
, mem
->slot
);
6069 spin_unlock(&kvm
->mmu_lock
);
6072 void kvm_arch_flush_shadow(struct kvm
*kvm
)
6074 kvm_mmu_zap_all(kvm
);
6075 kvm_reload_remote_mmus(kvm
);
6078 int kvm_arch_vcpu_runnable(struct kvm_vcpu
*vcpu
)
6080 return (vcpu
->arch
.mp_state
== KVM_MP_STATE_RUNNABLE
&&
6081 !vcpu
->arch
.apf
.halted
)
6082 || !list_empty_careful(&vcpu
->async_pf
.done
)
6083 || vcpu
->arch
.mp_state
== KVM_MP_STATE_SIPI_RECEIVED
6084 || vcpu
->arch
.nmi_pending
||
6085 (kvm_arch_interrupt_allowed(vcpu
) &&
6086 kvm_cpu_has_interrupt(vcpu
));
6089 void kvm_vcpu_kick(struct kvm_vcpu
*vcpu
)
6092 int cpu
= vcpu
->cpu
;
6094 if (waitqueue_active(&vcpu
->wq
)) {
6095 wake_up_interruptible(&vcpu
->wq
);
6096 ++vcpu
->stat
.halt_wakeup
;
6100 if (cpu
!= me
&& (unsigned)cpu
< nr_cpu_ids
&& cpu_online(cpu
))
6101 if (atomic_xchg(&vcpu
->guest_mode
, 0))
6102 smp_send_reschedule(cpu
);
6106 int kvm_arch_interrupt_allowed(struct kvm_vcpu
*vcpu
)
6108 return kvm_x86_ops
->interrupt_allowed(vcpu
);
6111 bool kvm_is_linear_rip(struct kvm_vcpu
*vcpu
, unsigned long linear_rip
)
6113 unsigned long current_rip
= kvm_rip_read(vcpu
) +
6114 get_segment_base(vcpu
, VCPU_SREG_CS
);
6116 return current_rip
== linear_rip
;
6118 EXPORT_SYMBOL_GPL(kvm_is_linear_rip
);
6120 unsigned long kvm_get_rflags(struct kvm_vcpu
*vcpu
)
6122 unsigned long rflags
;
6124 rflags
= kvm_x86_ops
->get_rflags(vcpu
);
6125 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
6126 rflags
&= ~X86_EFLAGS_TF
;
6129 EXPORT_SYMBOL_GPL(kvm_get_rflags
);
6131 void kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
6133 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
&&
6134 kvm_is_linear_rip(vcpu
, vcpu
->arch
.singlestep_rip
))
6135 rflags
|= X86_EFLAGS_TF
;
6136 kvm_x86_ops
->set_rflags(vcpu
, rflags
);
6137 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6139 EXPORT_SYMBOL_GPL(kvm_set_rflags
);
6141 static inline u32
kvm_async_pf_hash_fn(gfn_t gfn
)
6143 return hash_32(gfn
& 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU
));
6146 static inline u32
kvm_async_pf_next_probe(u32 key
)
6148 return (key
+ 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU
) - 1);
6151 static void kvm_add_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
6153 u32 key
= kvm_async_pf_hash_fn(gfn
);
6155 while (vcpu
->arch
.apf
.gfns
[key
] != ~0)
6156 key
= kvm_async_pf_next_probe(key
);
6158 vcpu
->arch
.apf
.gfns
[key
] = gfn
;
6161 static u32
kvm_async_pf_gfn_slot(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
6164 u32 key
= kvm_async_pf_hash_fn(gfn
);
6166 for (i
= 0; i
< roundup_pow_of_two(ASYNC_PF_PER_VCPU
) &&
6167 (vcpu
->arch
.apf
.gfns
[key
] != gfn
||
6168 vcpu
->arch
.apf
.gfns
[key
] == ~0); i
++)
6169 key
= kvm_async_pf_next_probe(key
);
6174 bool kvm_find_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
6176 return vcpu
->arch
.apf
.gfns
[kvm_async_pf_gfn_slot(vcpu
, gfn
)] == gfn
;
6179 static void kvm_del_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
6183 i
= j
= kvm_async_pf_gfn_slot(vcpu
, gfn
);
6185 vcpu
->arch
.apf
.gfns
[i
] = ~0;
6187 j
= kvm_async_pf_next_probe(j
);
6188 if (vcpu
->arch
.apf
.gfns
[j
] == ~0)
6190 k
= kvm_async_pf_hash_fn(vcpu
->arch
.apf
.gfns
[j
]);
6192 * k lies cyclically in ]i,j]
6194 * |....j i.k.| or |.k..j i...|
6196 } while ((i
<= j
) ? (i
< k
&& k
<= j
) : (i
< k
|| k
<= j
));
6197 vcpu
->arch
.apf
.gfns
[i
] = vcpu
->arch
.apf
.gfns
[j
];
6202 void kvm_arch_async_page_not_present(struct kvm_vcpu
*vcpu
,
6203 struct kvm_async_pf
*work
)
6205 trace_kvm_async_pf_not_present(work
->gva
);
6207 kvm_make_request(KVM_REQ_APF_HALT
, vcpu
);
6208 kvm_add_async_pf_gfn(vcpu
, work
->arch
.gfn
);
6211 void kvm_arch_async_page_present(struct kvm_vcpu
*vcpu
,
6212 struct kvm_async_pf
*work
)
6214 trace_kvm_async_pf_ready(work
->gva
);
6215 kvm_del_async_pf_gfn(vcpu
, work
->arch
.gfn
);
6218 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit
);
6219 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq
);
6220 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault
);
6221 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr
);
6222 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr
);
6223 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun
);
6224 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit
);
6225 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject
);
6226 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit
);
6227 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga
);
6228 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit
);
6229 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts
);