]> git.proxmox.com Git - mirror_ubuntu-artful-kernel.git/blob - arch/x86_64/kernel/time.c
[PATCH] Simplify profile_pc on x86-64
[mirror_ubuntu-artful-kernel.git] / arch / x86_64 / kernel / time.c
1 /*
2 * linux/arch/x86-64/kernel/time.c
3 *
4 * "High Precision Event Timer" based timekeeping.
5 *
6 * Copyright (c) 1991,1992,1995 Linus Torvalds
7 * Copyright (c) 1994 Alan Modra
8 * Copyright (c) 1995 Markus Kuhn
9 * Copyright (c) 1996 Ingo Molnar
10 * Copyright (c) 1998 Andrea Arcangeli
11 * Copyright (c) 2002,2006 Vojtech Pavlik
12 * Copyright (c) 2003 Andi Kleen
13 * RTC support code taken from arch/i386/kernel/timers/time_hpet.c
14 */
15
16 #include <linux/kernel.h>
17 #include <linux/sched.h>
18 #include <linux/interrupt.h>
19 #include <linux/init.h>
20 #include <linux/mc146818rtc.h>
21 #include <linux/time.h>
22 #include <linux/ioport.h>
23 #include <linux/module.h>
24 #include <linux/device.h>
25 #include <linux/sysdev.h>
26 #include <linux/bcd.h>
27 #include <linux/notifier.h>
28 #include <linux/cpu.h>
29 #include <linux/kallsyms.h>
30 #include <linux/acpi.h>
31 #ifdef CONFIG_ACPI
32 #include <acpi/achware.h> /* for PM timer frequency */
33 #include <acpi/acpi_bus.h>
34 #endif
35 #include <asm/8253pit.h>
36 #include <asm/pgtable.h>
37 #include <asm/vsyscall.h>
38 #include <asm/timex.h>
39 #include <asm/proto.h>
40 #include <asm/hpet.h>
41 #include <asm/sections.h>
42 #include <linux/cpufreq.h>
43 #include <linux/hpet.h>
44 #ifdef CONFIG_X86_LOCAL_APIC
45 #include <asm/apic.h>
46 #endif
47
48 #ifdef CONFIG_CPU_FREQ
49 static void cpufreq_delayed_get(void);
50 #endif
51 extern void i8254_timer_resume(void);
52 extern int using_apic_timer;
53
54 static char *timename = NULL;
55
56 DEFINE_SPINLOCK(rtc_lock);
57 EXPORT_SYMBOL(rtc_lock);
58 DEFINE_SPINLOCK(i8253_lock);
59
60 int nohpet __initdata = 0;
61 static int notsc __initdata = 0;
62
63 #define USEC_PER_TICK (USEC_PER_SEC / HZ)
64 #define NSEC_PER_TICK (NSEC_PER_SEC / HZ)
65 #define FSEC_PER_TICK (FSEC_PER_SEC / HZ)
66
67 #define NS_SCALE 10 /* 2^10, carefully chosen */
68 #define US_SCALE 32 /* 2^32, arbitralrily chosen */
69
70 unsigned int cpu_khz; /* TSC clocks / usec, not used here */
71 EXPORT_SYMBOL(cpu_khz);
72 static unsigned long hpet_period; /* fsecs / HPET clock */
73 unsigned long hpet_tick; /* HPET clocks / interrupt */
74 int hpet_use_timer; /* Use counter of hpet for time keeping, otherwise PIT */
75 unsigned long vxtime_hz = PIT_TICK_RATE;
76 int report_lost_ticks; /* command line option */
77 unsigned long long monotonic_base;
78
79 struct vxtime_data __vxtime __section_vxtime; /* for vsyscalls */
80
81 volatile unsigned long __jiffies __section_jiffies = INITIAL_JIFFIES;
82 unsigned long __wall_jiffies __section_wall_jiffies = INITIAL_JIFFIES;
83 struct timespec __xtime __section_xtime;
84 struct timezone __sys_tz __section_sys_tz;
85
86 /*
87 * do_gettimeoffset() returns microseconds since last timer interrupt was
88 * triggered by hardware. A memory read of HPET is slower than a register read
89 * of TSC, but much more reliable. It's also synchronized to the timer
90 * interrupt. Note that do_gettimeoffset() may return more than hpet_tick, if a
91 * timer interrupt has happened already, but vxtime.trigger wasn't updated yet.
92 * This is not a problem, because jiffies hasn't updated either. They are bound
93 * together by xtime_lock.
94 */
95
96 static inline unsigned int do_gettimeoffset_tsc(void)
97 {
98 unsigned long t;
99 unsigned long x;
100 t = get_cycles_sync();
101 if (t < vxtime.last_tsc)
102 t = vxtime.last_tsc; /* hack */
103 x = ((t - vxtime.last_tsc) * vxtime.tsc_quot) >> US_SCALE;
104 return x;
105 }
106
107 static inline unsigned int do_gettimeoffset_hpet(void)
108 {
109 /* cap counter read to one tick to avoid inconsistencies */
110 unsigned long counter = hpet_readl(HPET_COUNTER) - vxtime.last;
111 return (min(counter,hpet_tick) * vxtime.quot) >> US_SCALE;
112 }
113
114 unsigned int (*do_gettimeoffset)(void) = do_gettimeoffset_tsc;
115
116 /*
117 * This version of gettimeofday() has microsecond resolution and better than
118 * microsecond precision, as we're using at least a 10 MHz (usually 14.31818
119 * MHz) HPET timer.
120 */
121
122 void do_gettimeofday(struct timeval *tv)
123 {
124 unsigned long seq, t;
125 unsigned int sec, usec;
126
127 do {
128 seq = read_seqbegin(&xtime_lock);
129
130 sec = xtime.tv_sec;
131 usec = xtime.tv_nsec / NSEC_PER_USEC;
132
133 /* i386 does some correction here to keep the clock
134 monotonous even when ntpd is fixing drift.
135 But they didn't work for me, there is a non monotonic
136 clock anyways with ntp.
137 I dropped all corrections now until a real solution can
138 be found. Note when you fix it here you need to do the same
139 in arch/x86_64/kernel/vsyscall.c and export all needed
140 variables in vmlinux.lds. -AK */
141
142 t = (jiffies - wall_jiffies) * USEC_PER_TICK +
143 do_gettimeoffset();
144 usec += t;
145
146 } while (read_seqretry(&xtime_lock, seq));
147
148 tv->tv_sec = sec + usec / USEC_PER_SEC;
149 tv->tv_usec = usec % USEC_PER_SEC;
150 }
151
152 EXPORT_SYMBOL(do_gettimeofday);
153
154 /*
155 * settimeofday() first undoes the correction that gettimeofday would do
156 * on the time, and then saves it. This is ugly, but has been like this for
157 * ages already.
158 */
159
160 int do_settimeofday(struct timespec *tv)
161 {
162 time_t wtm_sec, sec = tv->tv_sec;
163 long wtm_nsec, nsec = tv->tv_nsec;
164
165 if ((unsigned long)tv->tv_nsec >= NSEC_PER_SEC)
166 return -EINVAL;
167
168 write_seqlock_irq(&xtime_lock);
169
170 nsec -= do_gettimeoffset() * NSEC_PER_USEC +
171 (jiffies - wall_jiffies) * NSEC_PER_TICK;
172
173 wtm_sec = wall_to_monotonic.tv_sec + (xtime.tv_sec - sec);
174 wtm_nsec = wall_to_monotonic.tv_nsec + (xtime.tv_nsec - nsec);
175
176 set_normalized_timespec(&xtime, sec, nsec);
177 set_normalized_timespec(&wall_to_monotonic, wtm_sec, wtm_nsec);
178
179 ntp_clear();
180
181 write_sequnlock_irq(&xtime_lock);
182 clock_was_set();
183 return 0;
184 }
185
186 EXPORT_SYMBOL(do_settimeofday);
187
188 unsigned long profile_pc(struct pt_regs *regs)
189 {
190 unsigned long pc = instruction_pointer(regs);
191
192 /* Assume the lock function has either no stack frame or a copy
193 of eflags from PUSHF
194 Eflags always has bits 22 and up cleared unlike kernel addresses. */
195 if (!user_mode(regs) && in_lock_functions(pc)) {
196 unsigned long *sp = (unsigned long *)regs->rsp;
197 if (sp[0] >> 22)
198 return sp[0];
199 if (sp[1] >> 22)
200 return sp[1];
201 }
202 return pc;
203 }
204 EXPORT_SYMBOL(profile_pc);
205
206 /*
207 * In order to set the CMOS clock precisely, set_rtc_mmss has to be called 500
208 * ms after the second nowtime has started, because when nowtime is written
209 * into the registers of the CMOS clock, it will jump to the next second
210 * precisely 500 ms later. Check the Motorola MC146818A or Dallas DS12887 data
211 * sheet for details.
212 */
213
214 static void set_rtc_mmss(unsigned long nowtime)
215 {
216 int real_seconds, real_minutes, cmos_minutes;
217 unsigned char control, freq_select;
218
219 /*
220 * IRQs are disabled when we're called from the timer interrupt,
221 * no need for spin_lock_irqsave()
222 */
223
224 spin_lock(&rtc_lock);
225
226 /*
227 * Tell the clock it's being set and stop it.
228 */
229
230 control = CMOS_READ(RTC_CONTROL);
231 CMOS_WRITE(control | RTC_SET, RTC_CONTROL);
232
233 freq_select = CMOS_READ(RTC_FREQ_SELECT);
234 CMOS_WRITE(freq_select | RTC_DIV_RESET2, RTC_FREQ_SELECT);
235
236 cmos_minutes = CMOS_READ(RTC_MINUTES);
237 BCD_TO_BIN(cmos_minutes);
238
239 /*
240 * since we're only adjusting minutes and seconds, don't interfere with hour
241 * overflow. This avoids messing with unknown time zones but requires your RTC
242 * not to be off by more than 15 minutes. Since we're calling it only when
243 * our clock is externally synchronized using NTP, this shouldn't be a problem.
244 */
245
246 real_seconds = nowtime % 60;
247 real_minutes = nowtime / 60;
248 if (((abs(real_minutes - cmos_minutes) + 15) / 30) & 1)
249 real_minutes += 30; /* correct for half hour time zone */
250 real_minutes %= 60;
251
252 if (abs(real_minutes - cmos_minutes) >= 30) {
253 printk(KERN_WARNING "time.c: can't update CMOS clock "
254 "from %d to %d\n", cmos_minutes, real_minutes);
255 } else {
256 BIN_TO_BCD(real_seconds);
257 BIN_TO_BCD(real_minutes);
258 CMOS_WRITE(real_seconds, RTC_SECONDS);
259 CMOS_WRITE(real_minutes, RTC_MINUTES);
260 }
261
262 /*
263 * The following flags have to be released exactly in this order, otherwise the
264 * DS12887 (popular MC146818A clone with integrated battery and quartz) will
265 * not reset the oscillator and will not update precisely 500 ms later. You
266 * won't find this mentioned in the Dallas Semiconductor data sheets, but who
267 * believes data sheets anyway ... -- Markus Kuhn
268 */
269
270 CMOS_WRITE(control, RTC_CONTROL);
271 CMOS_WRITE(freq_select, RTC_FREQ_SELECT);
272
273 spin_unlock(&rtc_lock);
274 }
275
276
277 /* monotonic_clock(): returns # of nanoseconds passed since time_init()
278 * Note: This function is required to return accurate
279 * time even in the absence of multiple timer ticks.
280 */
281 unsigned long long monotonic_clock(void)
282 {
283 unsigned long seq;
284 u32 last_offset, this_offset, offset;
285 unsigned long long base;
286
287 if (vxtime.mode == VXTIME_HPET) {
288 do {
289 seq = read_seqbegin(&xtime_lock);
290
291 last_offset = vxtime.last;
292 base = monotonic_base;
293 this_offset = hpet_readl(HPET_COUNTER);
294 } while (read_seqretry(&xtime_lock, seq));
295 offset = (this_offset - last_offset);
296 offset *= NSEC_PER_TICK / hpet_tick;
297 } else {
298 do {
299 seq = read_seqbegin(&xtime_lock);
300
301 last_offset = vxtime.last_tsc;
302 base = monotonic_base;
303 } while (read_seqretry(&xtime_lock, seq));
304 this_offset = get_cycles_sync();
305 /* FIXME: 1000 or 1000000? */
306 offset = (this_offset - last_offset)*1000 / cpu_khz;
307 }
308 return base + offset;
309 }
310 EXPORT_SYMBOL(monotonic_clock);
311
312 static noinline void handle_lost_ticks(int lost, struct pt_regs *regs)
313 {
314 static long lost_count;
315 static int warned;
316 if (report_lost_ticks) {
317 printk(KERN_WARNING "time.c: Lost %d timer tick(s)! ", lost);
318 print_symbol("rip %s)\n", regs->rip);
319 }
320
321 if (lost_count == 1000 && !warned) {
322 printk(KERN_WARNING "warning: many lost ticks.\n"
323 KERN_WARNING "Your time source seems to be instable or "
324 "some driver is hogging interupts\n");
325 print_symbol("rip %s\n", regs->rip);
326 if (vxtime.mode == VXTIME_TSC && vxtime.hpet_address) {
327 printk(KERN_WARNING "Falling back to HPET\n");
328 if (hpet_use_timer)
329 vxtime.last = hpet_readl(HPET_T0_CMP) -
330 hpet_tick;
331 else
332 vxtime.last = hpet_readl(HPET_COUNTER);
333 vxtime.mode = VXTIME_HPET;
334 do_gettimeoffset = do_gettimeoffset_hpet;
335 }
336 /* else should fall back to PIT, but code missing. */
337 warned = 1;
338 } else
339 lost_count++;
340
341 #ifdef CONFIG_CPU_FREQ
342 /* In some cases the CPU can change frequency without us noticing
343 Give cpufreq a change to catch up. */
344 if ((lost_count+1) % 25 == 0)
345 cpufreq_delayed_get();
346 #endif
347 }
348
349 void main_timer_handler(struct pt_regs *regs)
350 {
351 static unsigned long rtc_update = 0;
352 unsigned long tsc;
353 int delay = 0, offset = 0, lost = 0;
354
355 /*
356 * Here we are in the timer irq handler. We have irqs locally disabled (so we
357 * don't need spin_lock_irqsave()) but we don't know if the timer_bh is running
358 * on the other CPU, so we need a lock. We also need to lock the vsyscall
359 * variables, because both do_timer() and us change them -arca+vojtech
360 */
361
362 write_seqlock(&xtime_lock);
363
364 if (vxtime.hpet_address)
365 offset = hpet_readl(HPET_COUNTER);
366
367 if (hpet_use_timer) {
368 /* if we're using the hpet timer functionality,
369 * we can more accurately know the counter value
370 * when the timer interrupt occured.
371 */
372 offset = hpet_readl(HPET_T0_CMP) - hpet_tick;
373 delay = hpet_readl(HPET_COUNTER) - offset;
374 } else if (!pmtmr_ioport) {
375 spin_lock(&i8253_lock);
376 outb_p(0x00, 0x43);
377 delay = inb_p(0x40);
378 delay |= inb(0x40) << 8;
379 spin_unlock(&i8253_lock);
380 delay = LATCH - 1 - delay;
381 }
382
383 tsc = get_cycles_sync();
384
385 if (vxtime.mode == VXTIME_HPET) {
386 if (offset - vxtime.last > hpet_tick) {
387 lost = (offset - vxtime.last) / hpet_tick - 1;
388 }
389
390 monotonic_base +=
391 (offset - vxtime.last) * NSEC_PER_TICK / hpet_tick;
392
393 vxtime.last = offset;
394 #ifdef CONFIG_X86_PM_TIMER
395 } else if (vxtime.mode == VXTIME_PMTMR) {
396 lost = pmtimer_mark_offset();
397 #endif
398 } else {
399 offset = (((tsc - vxtime.last_tsc) *
400 vxtime.tsc_quot) >> US_SCALE) - USEC_PER_TICK;
401
402 if (offset < 0)
403 offset = 0;
404
405 if (offset > USEC_PER_TICK) {
406 lost = offset / USEC_PER_TICK;
407 offset %= USEC_PER_TICK;
408 }
409
410 /* FIXME: 1000 or 1000000? */
411 monotonic_base += (tsc - vxtime.last_tsc) * 1000000 / cpu_khz;
412
413 vxtime.last_tsc = tsc - vxtime.quot * delay / vxtime.tsc_quot;
414
415 if ((((tsc - vxtime.last_tsc) *
416 vxtime.tsc_quot) >> US_SCALE) < offset)
417 vxtime.last_tsc = tsc -
418 (((long) offset << US_SCALE) / vxtime.tsc_quot) - 1;
419 }
420
421 if (lost > 0) {
422 handle_lost_ticks(lost, regs);
423 jiffies += lost;
424 }
425
426 /*
427 * Do the timer stuff.
428 */
429
430 do_timer(regs);
431 #ifndef CONFIG_SMP
432 update_process_times(user_mode(regs));
433 #endif
434
435 /*
436 * In the SMP case we use the local APIC timer interrupt to do the profiling,
437 * except when we simulate SMP mode on a uniprocessor system, in that case we
438 * have to call the local interrupt handler.
439 */
440
441 #ifndef CONFIG_X86_LOCAL_APIC
442 profile_tick(CPU_PROFILING, regs);
443 #else
444 if (!using_apic_timer)
445 smp_local_timer_interrupt(regs);
446 #endif
447
448 /*
449 * If we have an externally synchronized Linux clock, then update CMOS clock
450 * accordingly every ~11 minutes. set_rtc_mmss() will be called in the jiffy
451 * closest to exactly 500 ms before the next second. If the update fails, we
452 * don't care, as it'll be updated on the next turn, and the problem (time way
453 * off) isn't likely to go away much sooner anyway.
454 */
455
456 if (ntp_synced() && xtime.tv_sec > rtc_update &&
457 abs(xtime.tv_nsec - 500000000) <= tick_nsec / 2) {
458 set_rtc_mmss(xtime.tv_sec);
459 rtc_update = xtime.tv_sec + 660;
460 }
461
462 write_sequnlock(&xtime_lock);
463 }
464
465 static irqreturn_t timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
466 {
467 if (apic_runs_main_timer > 1)
468 return IRQ_HANDLED;
469 main_timer_handler(regs);
470 #ifdef CONFIG_X86_LOCAL_APIC
471 if (using_apic_timer)
472 smp_send_timer_broadcast_ipi();
473 #endif
474 return IRQ_HANDLED;
475 }
476
477 static unsigned int cyc2ns_scale __read_mostly;
478
479 static inline void set_cyc2ns_scale(unsigned long cpu_khz)
480 {
481 cyc2ns_scale = (NSEC_PER_MSEC << NS_SCALE) / cpu_khz;
482 }
483
484 static inline unsigned long long cycles_2_ns(unsigned long long cyc)
485 {
486 return (cyc * cyc2ns_scale) >> NS_SCALE;
487 }
488
489 unsigned long long sched_clock(void)
490 {
491 unsigned long a = 0;
492
493 #if 0
494 /* Don't do a HPET read here. Using TSC always is much faster
495 and HPET may not be mapped yet when the scheduler first runs.
496 Disadvantage is a small drift between CPUs in some configurations,
497 but that should be tolerable. */
498 if (__vxtime.mode == VXTIME_HPET)
499 return (hpet_readl(HPET_COUNTER) * vxtime.quot) >> US_SCALE;
500 #endif
501
502 /* Could do CPU core sync here. Opteron can execute rdtsc speculatively,
503 which means it is not completely exact and may not be monotonous between
504 CPUs. But the errors should be too small to matter for scheduling
505 purposes. */
506
507 rdtscll(a);
508 return cycles_2_ns(a);
509 }
510
511 static unsigned long get_cmos_time(void)
512 {
513 unsigned int year, mon, day, hour, min, sec;
514 unsigned long flags;
515 unsigned extyear = 0;
516
517 spin_lock_irqsave(&rtc_lock, flags);
518
519 do {
520 sec = CMOS_READ(RTC_SECONDS);
521 min = CMOS_READ(RTC_MINUTES);
522 hour = CMOS_READ(RTC_HOURS);
523 day = CMOS_READ(RTC_DAY_OF_MONTH);
524 mon = CMOS_READ(RTC_MONTH);
525 year = CMOS_READ(RTC_YEAR);
526 #ifdef CONFIG_ACPI
527 if (acpi_fadt.revision >= FADT2_REVISION_ID &&
528 acpi_fadt.century)
529 extyear = CMOS_READ(acpi_fadt.century);
530 #endif
531 } while (sec != CMOS_READ(RTC_SECONDS));
532
533 spin_unlock_irqrestore(&rtc_lock, flags);
534
535 /*
536 * We know that x86-64 always uses BCD format, no need to check the
537 * config register.
538 */
539
540 BCD_TO_BIN(sec);
541 BCD_TO_BIN(min);
542 BCD_TO_BIN(hour);
543 BCD_TO_BIN(day);
544 BCD_TO_BIN(mon);
545 BCD_TO_BIN(year);
546
547 if (extyear) {
548 BCD_TO_BIN(extyear);
549 year += extyear;
550 printk(KERN_INFO "Extended CMOS year: %d\n", extyear);
551 } else {
552 /*
553 * x86-64 systems only exists since 2002.
554 * This will work up to Dec 31, 2100
555 */
556 year += 2000;
557 }
558
559 return mktime(year, mon, day, hour, min, sec);
560 }
561
562 #ifdef CONFIG_CPU_FREQ
563
564 /* Frequency scaling support. Adjust the TSC based timer when the cpu frequency
565 changes.
566
567 RED-PEN: On SMP we assume all CPUs run with the same frequency. It's
568 not that important because current Opteron setups do not support
569 scaling on SMP anyroads.
570
571 Should fix up last_tsc too. Currently gettimeofday in the
572 first tick after the change will be slightly wrong. */
573
574 #include <linux/workqueue.h>
575
576 static unsigned int cpufreq_delayed_issched = 0;
577 static unsigned int cpufreq_init = 0;
578 static struct work_struct cpufreq_delayed_get_work;
579
580 static void handle_cpufreq_delayed_get(void *v)
581 {
582 unsigned int cpu;
583 for_each_online_cpu(cpu) {
584 cpufreq_get(cpu);
585 }
586 cpufreq_delayed_issched = 0;
587 }
588
589 /* if we notice lost ticks, schedule a call to cpufreq_get() as it tries
590 * to verify the CPU frequency the timing core thinks the CPU is running
591 * at is still correct.
592 */
593 static void cpufreq_delayed_get(void)
594 {
595 static int warned;
596 if (cpufreq_init && !cpufreq_delayed_issched) {
597 cpufreq_delayed_issched = 1;
598 if (!warned) {
599 warned = 1;
600 printk(KERN_DEBUG
601 "Losing some ticks... checking if CPU frequency changed.\n");
602 }
603 schedule_work(&cpufreq_delayed_get_work);
604 }
605 }
606
607 static unsigned int ref_freq = 0;
608 static unsigned long loops_per_jiffy_ref = 0;
609
610 static unsigned long cpu_khz_ref = 0;
611
612 static int time_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
613 void *data)
614 {
615 struct cpufreq_freqs *freq = data;
616 unsigned long *lpj, dummy;
617
618 if (cpu_has(&cpu_data[freq->cpu], X86_FEATURE_CONSTANT_TSC))
619 return 0;
620
621 lpj = &dummy;
622 if (!(freq->flags & CPUFREQ_CONST_LOOPS))
623 #ifdef CONFIG_SMP
624 lpj = &cpu_data[freq->cpu].loops_per_jiffy;
625 #else
626 lpj = &boot_cpu_data.loops_per_jiffy;
627 #endif
628
629 if (!ref_freq) {
630 ref_freq = freq->old;
631 loops_per_jiffy_ref = *lpj;
632 cpu_khz_ref = cpu_khz;
633 }
634 if ((val == CPUFREQ_PRECHANGE && freq->old < freq->new) ||
635 (val == CPUFREQ_POSTCHANGE && freq->old > freq->new) ||
636 (val == CPUFREQ_RESUMECHANGE)) {
637 *lpj =
638 cpufreq_scale(loops_per_jiffy_ref, ref_freq, freq->new);
639
640 cpu_khz = cpufreq_scale(cpu_khz_ref, ref_freq, freq->new);
641 if (!(freq->flags & CPUFREQ_CONST_LOOPS))
642 vxtime.tsc_quot = (USEC_PER_MSEC << US_SCALE) / cpu_khz;
643 }
644
645 set_cyc2ns_scale(cpu_khz_ref);
646
647 return 0;
648 }
649
650 static struct notifier_block time_cpufreq_notifier_block = {
651 .notifier_call = time_cpufreq_notifier
652 };
653
654 static int __init cpufreq_tsc(void)
655 {
656 INIT_WORK(&cpufreq_delayed_get_work, handle_cpufreq_delayed_get, NULL);
657 if (!cpufreq_register_notifier(&time_cpufreq_notifier_block,
658 CPUFREQ_TRANSITION_NOTIFIER))
659 cpufreq_init = 1;
660 return 0;
661 }
662
663 core_initcall(cpufreq_tsc);
664
665 #endif
666
667 /*
668 * calibrate_tsc() calibrates the processor TSC in a very simple way, comparing
669 * it to the HPET timer of known frequency.
670 */
671
672 #define TICK_COUNT 100000000
673
674 static unsigned int __init hpet_calibrate_tsc(void)
675 {
676 int tsc_start, hpet_start;
677 int tsc_now, hpet_now;
678 unsigned long flags;
679
680 local_irq_save(flags);
681 local_irq_disable();
682
683 hpet_start = hpet_readl(HPET_COUNTER);
684 rdtscl(tsc_start);
685
686 do {
687 local_irq_disable();
688 hpet_now = hpet_readl(HPET_COUNTER);
689 tsc_now = get_cycles_sync();
690 local_irq_restore(flags);
691 } while ((tsc_now - tsc_start) < TICK_COUNT &&
692 (hpet_now - hpet_start) < TICK_COUNT);
693
694 return (tsc_now - tsc_start) * 1000000000L
695 / ((hpet_now - hpet_start) * hpet_period / 1000);
696 }
697
698
699 /*
700 * pit_calibrate_tsc() uses the speaker output (channel 2) of
701 * the PIT. This is better than using the timer interrupt output,
702 * because we can read the value of the speaker with just one inb(),
703 * where we need three i/o operations for the interrupt channel.
704 * We count how many ticks the TSC does in 50 ms.
705 */
706
707 static unsigned int __init pit_calibrate_tsc(void)
708 {
709 unsigned long start, end;
710 unsigned long flags;
711
712 spin_lock_irqsave(&i8253_lock, flags);
713
714 outb((inb(0x61) & ~0x02) | 0x01, 0x61);
715
716 outb(0xb0, 0x43);
717 outb((PIT_TICK_RATE / (1000 / 50)) & 0xff, 0x42);
718 outb((PIT_TICK_RATE / (1000 / 50)) >> 8, 0x42);
719 start = get_cycles_sync();
720 while ((inb(0x61) & 0x20) == 0);
721 end = get_cycles_sync();
722
723 spin_unlock_irqrestore(&i8253_lock, flags);
724
725 return (end - start) / 50;
726 }
727
728 #ifdef CONFIG_HPET
729 static __init int late_hpet_init(void)
730 {
731 struct hpet_data hd;
732 unsigned int ntimer;
733
734 if (!vxtime.hpet_address)
735 return 0;
736
737 memset(&hd, 0, sizeof (hd));
738
739 ntimer = hpet_readl(HPET_ID);
740 ntimer = (ntimer & HPET_ID_NUMBER) >> HPET_ID_NUMBER_SHIFT;
741 ntimer++;
742
743 /*
744 * Register with driver.
745 * Timer0 and Timer1 is used by platform.
746 */
747 hd.hd_phys_address = vxtime.hpet_address;
748 hd.hd_address = (void __iomem *)fix_to_virt(FIX_HPET_BASE);
749 hd.hd_nirqs = ntimer;
750 hd.hd_flags = HPET_DATA_PLATFORM;
751 hpet_reserve_timer(&hd, 0);
752 #ifdef CONFIG_HPET_EMULATE_RTC
753 hpet_reserve_timer(&hd, 1);
754 #endif
755 hd.hd_irq[0] = HPET_LEGACY_8254;
756 hd.hd_irq[1] = HPET_LEGACY_RTC;
757 if (ntimer > 2) {
758 struct hpet *hpet;
759 struct hpet_timer *timer;
760 int i;
761
762 hpet = (struct hpet *) fix_to_virt(FIX_HPET_BASE);
763 timer = &hpet->hpet_timers[2];
764 for (i = 2; i < ntimer; timer++, i++)
765 hd.hd_irq[i] = (timer->hpet_config &
766 Tn_INT_ROUTE_CNF_MASK) >>
767 Tn_INT_ROUTE_CNF_SHIFT;
768
769 }
770
771 hpet_alloc(&hd);
772 return 0;
773 }
774 fs_initcall(late_hpet_init);
775 #endif
776
777 static int hpet_timer_stop_set_go(unsigned long tick)
778 {
779 unsigned int cfg;
780
781 /*
782 * Stop the timers and reset the main counter.
783 */
784
785 cfg = hpet_readl(HPET_CFG);
786 cfg &= ~(HPET_CFG_ENABLE | HPET_CFG_LEGACY);
787 hpet_writel(cfg, HPET_CFG);
788 hpet_writel(0, HPET_COUNTER);
789 hpet_writel(0, HPET_COUNTER + 4);
790
791 /*
792 * Set up timer 0, as periodic with first interrupt to happen at hpet_tick,
793 * and period also hpet_tick.
794 */
795 if (hpet_use_timer) {
796 hpet_writel(HPET_TN_ENABLE | HPET_TN_PERIODIC | HPET_TN_SETVAL |
797 HPET_TN_32BIT, HPET_T0_CFG);
798 hpet_writel(hpet_tick, HPET_T0_CMP); /* next interrupt */
799 hpet_writel(hpet_tick, HPET_T0_CMP); /* period */
800 cfg |= HPET_CFG_LEGACY;
801 }
802 /*
803 * Go!
804 */
805
806 cfg |= HPET_CFG_ENABLE;
807 hpet_writel(cfg, HPET_CFG);
808
809 return 0;
810 }
811
812 static int hpet_init(void)
813 {
814 unsigned int id;
815
816 if (!vxtime.hpet_address)
817 return -1;
818 set_fixmap_nocache(FIX_HPET_BASE, vxtime.hpet_address);
819 __set_fixmap(VSYSCALL_HPET, vxtime.hpet_address, PAGE_KERNEL_VSYSCALL_NOCACHE);
820
821 /*
822 * Read the period, compute tick and quotient.
823 */
824
825 id = hpet_readl(HPET_ID);
826
827 if (!(id & HPET_ID_VENDOR) || !(id & HPET_ID_NUMBER))
828 return -1;
829
830 hpet_period = hpet_readl(HPET_PERIOD);
831 if (hpet_period < 100000 || hpet_period > 100000000)
832 return -1;
833
834 hpet_tick = (FSEC_PER_TICK + hpet_period / 2) / hpet_period;
835
836 hpet_use_timer = (id & HPET_ID_LEGSUP);
837
838 return hpet_timer_stop_set_go(hpet_tick);
839 }
840
841 static int hpet_reenable(void)
842 {
843 return hpet_timer_stop_set_go(hpet_tick);
844 }
845
846 #define PIT_MODE 0x43
847 #define PIT_CH0 0x40
848
849 static void __init __pit_init(int val, u8 mode)
850 {
851 unsigned long flags;
852
853 spin_lock_irqsave(&i8253_lock, flags);
854 outb_p(mode, PIT_MODE);
855 outb_p(val & 0xff, PIT_CH0); /* LSB */
856 outb_p(val >> 8, PIT_CH0); /* MSB */
857 spin_unlock_irqrestore(&i8253_lock, flags);
858 }
859
860 void __init pit_init(void)
861 {
862 __pit_init(LATCH, 0x34); /* binary, mode 2, LSB/MSB, ch 0 */
863 }
864
865 void __init pit_stop_interrupt(void)
866 {
867 __pit_init(0, 0x30); /* mode 0 */
868 }
869
870 void __init stop_timer_interrupt(void)
871 {
872 char *name;
873 if (vxtime.hpet_address) {
874 name = "HPET";
875 hpet_timer_stop_set_go(0);
876 } else {
877 name = "PIT";
878 pit_stop_interrupt();
879 }
880 printk(KERN_INFO "timer: %s interrupt stopped.\n", name);
881 }
882
883 int __init time_setup(char *str)
884 {
885 report_lost_ticks = 1;
886 return 1;
887 }
888
889 static struct irqaction irq0 = {
890 timer_interrupt, IRQF_DISABLED, CPU_MASK_NONE, "timer", NULL, NULL
891 };
892
893 static int __cpuinit
894 time_cpu_notifier(struct notifier_block *nb, unsigned long action, void *hcpu)
895 {
896 unsigned cpu = (unsigned long) hcpu;
897 if (action == CPU_ONLINE)
898 vsyscall_set_cpu(cpu);
899 return NOTIFY_DONE;
900 }
901
902 void __init time_init(void)
903 {
904 if (nohpet)
905 vxtime.hpet_address = 0;
906
907 xtime.tv_sec = get_cmos_time();
908 xtime.tv_nsec = 0;
909
910 set_normalized_timespec(&wall_to_monotonic,
911 -xtime.tv_sec, -xtime.tv_nsec);
912
913 if (!hpet_init())
914 vxtime_hz = (FSEC_PER_SEC + hpet_period / 2) / hpet_period;
915 else
916 vxtime.hpet_address = 0;
917
918 if (hpet_use_timer) {
919 /* set tick_nsec to use the proper rate for HPET */
920 tick_nsec = TICK_NSEC_HPET;
921 cpu_khz = hpet_calibrate_tsc();
922 timename = "HPET";
923 #ifdef CONFIG_X86_PM_TIMER
924 } else if (pmtmr_ioport && !vxtime.hpet_address) {
925 vxtime_hz = PM_TIMER_FREQUENCY;
926 timename = "PM";
927 pit_init();
928 cpu_khz = pit_calibrate_tsc();
929 #endif
930 } else {
931 pit_init();
932 cpu_khz = pit_calibrate_tsc();
933 timename = "PIT";
934 }
935
936 vxtime.mode = VXTIME_TSC;
937 vxtime.quot = (USEC_PER_SEC << US_SCALE) / vxtime_hz;
938 vxtime.tsc_quot = (USEC_PER_MSEC << US_SCALE) / cpu_khz;
939 vxtime.last_tsc = get_cycles_sync();
940 setup_irq(0, &irq0);
941
942 set_cyc2ns_scale(cpu_khz);
943
944 hotcpu_notifier(time_cpu_notifier, 0);
945 time_cpu_notifier(NULL, CPU_ONLINE, (void *)(long)smp_processor_id());
946
947 #ifndef CONFIG_SMP
948 time_init_gtod();
949 #endif
950 }
951
952 /*
953 * Make an educated guess if the TSC is trustworthy and synchronized
954 * over all CPUs.
955 */
956 __cpuinit int unsynchronized_tsc(void)
957 {
958 #ifdef CONFIG_SMP
959 if (apic_is_clustered_box())
960 return 1;
961 #endif
962 /* Most intel systems have synchronized TSCs except for
963 multi node systems */
964 if (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL) {
965 #ifdef CONFIG_ACPI
966 /* But TSC doesn't tick in C3 so don't use it there */
967 if (acpi_fadt.length > 0 && acpi_fadt.plvl3_lat < 100)
968 return 1;
969 #endif
970 return 0;
971 }
972
973 /* Assume multi socket systems are not synchronized */
974 return num_present_cpus() > 1;
975 }
976
977 /*
978 * Decide what mode gettimeofday should use.
979 */
980 void time_init_gtod(void)
981 {
982 char *timetype;
983
984 if (unsynchronized_tsc())
985 notsc = 1;
986
987 if (cpu_has(&boot_cpu_data, X86_FEATURE_RDTSCP))
988 vgetcpu_mode = VGETCPU_RDTSCP;
989 else
990 vgetcpu_mode = VGETCPU_LSL;
991
992 if (vxtime.hpet_address && notsc) {
993 timetype = hpet_use_timer ? "HPET" : "PIT/HPET";
994 if (hpet_use_timer)
995 vxtime.last = hpet_readl(HPET_T0_CMP) - hpet_tick;
996 else
997 vxtime.last = hpet_readl(HPET_COUNTER);
998 vxtime.mode = VXTIME_HPET;
999 do_gettimeoffset = do_gettimeoffset_hpet;
1000 #ifdef CONFIG_X86_PM_TIMER
1001 /* Using PM for gettimeofday is quite slow, but we have no other
1002 choice because the TSC is too unreliable on some systems. */
1003 } else if (pmtmr_ioport && !vxtime.hpet_address && notsc) {
1004 timetype = "PM";
1005 do_gettimeoffset = do_gettimeoffset_pm;
1006 vxtime.mode = VXTIME_PMTMR;
1007 sysctl_vsyscall = 0;
1008 printk(KERN_INFO "Disabling vsyscall due to use of PM timer\n");
1009 #endif
1010 } else {
1011 timetype = hpet_use_timer ? "HPET/TSC" : "PIT/TSC";
1012 vxtime.mode = VXTIME_TSC;
1013 }
1014
1015 printk(KERN_INFO "time.c: Using %ld.%06ld MHz WALL %s GTOD %s timer.\n",
1016 vxtime_hz / 1000000, vxtime_hz % 1000000, timename, timetype);
1017 printk(KERN_INFO "time.c: Detected %d.%03d MHz processor.\n",
1018 cpu_khz / 1000, cpu_khz % 1000);
1019 vxtime.quot = (USEC_PER_SEC << US_SCALE) / vxtime_hz;
1020 vxtime.tsc_quot = (USEC_PER_MSEC << US_SCALE) / cpu_khz;
1021 vxtime.last_tsc = get_cycles_sync();
1022
1023 set_cyc2ns_scale(cpu_khz);
1024 }
1025
1026 __setup("report_lost_ticks", time_setup);
1027
1028 static long clock_cmos_diff;
1029 static unsigned long sleep_start;
1030
1031 /*
1032 * sysfs support for the timer.
1033 */
1034
1035 static int timer_suspend(struct sys_device *dev, pm_message_t state)
1036 {
1037 /*
1038 * Estimate time zone so that set_time can update the clock
1039 */
1040 long cmos_time = get_cmos_time();
1041
1042 clock_cmos_diff = -cmos_time;
1043 clock_cmos_diff += get_seconds();
1044 sleep_start = cmos_time;
1045 return 0;
1046 }
1047
1048 static int timer_resume(struct sys_device *dev)
1049 {
1050 unsigned long flags;
1051 unsigned long sec;
1052 unsigned long ctime = get_cmos_time();
1053 unsigned long sleep_length = (ctime - sleep_start) * HZ;
1054
1055 if (vxtime.hpet_address)
1056 hpet_reenable();
1057 else
1058 i8254_timer_resume();
1059
1060 sec = ctime + clock_cmos_diff;
1061 write_seqlock_irqsave(&xtime_lock,flags);
1062 xtime.tv_sec = sec;
1063 xtime.tv_nsec = 0;
1064 if (vxtime.mode == VXTIME_HPET) {
1065 if (hpet_use_timer)
1066 vxtime.last = hpet_readl(HPET_T0_CMP) - hpet_tick;
1067 else
1068 vxtime.last = hpet_readl(HPET_COUNTER);
1069 #ifdef CONFIG_X86_PM_TIMER
1070 } else if (vxtime.mode == VXTIME_PMTMR) {
1071 pmtimer_resume();
1072 #endif
1073 } else
1074 vxtime.last_tsc = get_cycles_sync();
1075 write_sequnlock_irqrestore(&xtime_lock,flags);
1076 jiffies += sleep_length;
1077 wall_jiffies += sleep_length;
1078 monotonic_base += sleep_length * (NSEC_PER_SEC/HZ);
1079 touch_softlockup_watchdog();
1080 return 0;
1081 }
1082
1083 static struct sysdev_class timer_sysclass = {
1084 .resume = timer_resume,
1085 .suspend = timer_suspend,
1086 set_kset_name("timer"),
1087 };
1088
1089 /* XXX this driverfs stuff should probably go elsewhere later -john */
1090 static struct sys_device device_timer = {
1091 .id = 0,
1092 .cls = &timer_sysclass,
1093 };
1094
1095 static int time_init_device(void)
1096 {
1097 int error = sysdev_class_register(&timer_sysclass);
1098 if (!error)
1099 error = sysdev_register(&device_timer);
1100 return error;
1101 }
1102
1103 device_initcall(time_init_device);
1104
1105 #ifdef CONFIG_HPET_EMULATE_RTC
1106 /* HPET in LegacyReplacement Mode eats up RTC interrupt line. When, HPET
1107 * is enabled, we support RTC interrupt functionality in software.
1108 * RTC has 3 kinds of interrupts:
1109 * 1) Update Interrupt - generate an interrupt, every sec, when RTC clock
1110 * is updated
1111 * 2) Alarm Interrupt - generate an interrupt at a specific time of day
1112 * 3) Periodic Interrupt - generate periodic interrupt, with frequencies
1113 * 2Hz-8192Hz (2Hz-64Hz for non-root user) (all freqs in powers of 2)
1114 * (1) and (2) above are implemented using polling at a frequency of
1115 * 64 Hz. The exact frequency is a tradeoff between accuracy and interrupt
1116 * overhead. (DEFAULT_RTC_INT_FREQ)
1117 * For (3), we use interrupts at 64Hz or user specified periodic
1118 * frequency, whichever is higher.
1119 */
1120 #include <linux/rtc.h>
1121
1122 #define DEFAULT_RTC_INT_FREQ 64
1123 #define RTC_NUM_INTS 1
1124
1125 static unsigned long UIE_on;
1126 static unsigned long prev_update_sec;
1127
1128 static unsigned long AIE_on;
1129 static struct rtc_time alarm_time;
1130
1131 static unsigned long PIE_on;
1132 static unsigned long PIE_freq = DEFAULT_RTC_INT_FREQ;
1133 static unsigned long PIE_count;
1134
1135 static unsigned long hpet_rtc_int_freq; /* RTC interrupt frequency */
1136 static unsigned int hpet_t1_cmp; /* cached comparator register */
1137
1138 int is_hpet_enabled(void)
1139 {
1140 return vxtime.hpet_address != 0;
1141 }
1142
1143 /*
1144 * Timer 1 for RTC, we do not use periodic interrupt feature,
1145 * even if HPET supports periodic interrupts on Timer 1.
1146 * The reason being, to set up a periodic interrupt in HPET, we need to
1147 * stop the main counter. And if we do that everytime someone diables/enables
1148 * RTC, we will have adverse effect on main kernel timer running on Timer 0.
1149 * So, for the time being, simulate the periodic interrupt in software.
1150 *
1151 * hpet_rtc_timer_init() is called for the first time and during subsequent
1152 * interuppts reinit happens through hpet_rtc_timer_reinit().
1153 */
1154 int hpet_rtc_timer_init(void)
1155 {
1156 unsigned int cfg, cnt;
1157 unsigned long flags;
1158
1159 if (!is_hpet_enabled())
1160 return 0;
1161 /*
1162 * Set the counter 1 and enable the interrupts.
1163 */
1164 if (PIE_on && (PIE_freq > DEFAULT_RTC_INT_FREQ))
1165 hpet_rtc_int_freq = PIE_freq;
1166 else
1167 hpet_rtc_int_freq = DEFAULT_RTC_INT_FREQ;
1168
1169 local_irq_save(flags);
1170 cnt = hpet_readl(HPET_COUNTER);
1171 cnt += ((hpet_tick*HZ)/hpet_rtc_int_freq);
1172 hpet_writel(cnt, HPET_T1_CMP);
1173 hpet_t1_cmp = cnt;
1174 local_irq_restore(flags);
1175
1176 cfg = hpet_readl(HPET_T1_CFG);
1177 cfg &= ~HPET_TN_PERIODIC;
1178 cfg |= HPET_TN_ENABLE | HPET_TN_32BIT;
1179 hpet_writel(cfg, HPET_T1_CFG);
1180
1181 return 1;
1182 }
1183
1184 static void hpet_rtc_timer_reinit(void)
1185 {
1186 unsigned int cfg, cnt;
1187
1188 if (unlikely(!(PIE_on | AIE_on | UIE_on))) {
1189 cfg = hpet_readl(HPET_T1_CFG);
1190 cfg &= ~HPET_TN_ENABLE;
1191 hpet_writel(cfg, HPET_T1_CFG);
1192 return;
1193 }
1194
1195 if (PIE_on && (PIE_freq > DEFAULT_RTC_INT_FREQ))
1196 hpet_rtc_int_freq = PIE_freq;
1197 else
1198 hpet_rtc_int_freq = DEFAULT_RTC_INT_FREQ;
1199
1200 /* It is more accurate to use the comparator value than current count.*/
1201 cnt = hpet_t1_cmp;
1202 cnt += hpet_tick*HZ/hpet_rtc_int_freq;
1203 hpet_writel(cnt, HPET_T1_CMP);
1204 hpet_t1_cmp = cnt;
1205 }
1206
1207 /*
1208 * The functions below are called from rtc driver.
1209 * Return 0 if HPET is not being used.
1210 * Otherwise do the necessary changes and return 1.
1211 */
1212 int hpet_mask_rtc_irq_bit(unsigned long bit_mask)
1213 {
1214 if (!is_hpet_enabled())
1215 return 0;
1216
1217 if (bit_mask & RTC_UIE)
1218 UIE_on = 0;
1219 if (bit_mask & RTC_PIE)
1220 PIE_on = 0;
1221 if (bit_mask & RTC_AIE)
1222 AIE_on = 0;
1223
1224 return 1;
1225 }
1226
1227 int hpet_set_rtc_irq_bit(unsigned long bit_mask)
1228 {
1229 int timer_init_reqd = 0;
1230
1231 if (!is_hpet_enabled())
1232 return 0;
1233
1234 if (!(PIE_on | AIE_on | UIE_on))
1235 timer_init_reqd = 1;
1236
1237 if (bit_mask & RTC_UIE) {
1238 UIE_on = 1;
1239 }
1240 if (bit_mask & RTC_PIE) {
1241 PIE_on = 1;
1242 PIE_count = 0;
1243 }
1244 if (bit_mask & RTC_AIE) {
1245 AIE_on = 1;
1246 }
1247
1248 if (timer_init_reqd)
1249 hpet_rtc_timer_init();
1250
1251 return 1;
1252 }
1253
1254 int hpet_set_alarm_time(unsigned char hrs, unsigned char min, unsigned char sec)
1255 {
1256 if (!is_hpet_enabled())
1257 return 0;
1258
1259 alarm_time.tm_hour = hrs;
1260 alarm_time.tm_min = min;
1261 alarm_time.tm_sec = sec;
1262
1263 return 1;
1264 }
1265
1266 int hpet_set_periodic_freq(unsigned long freq)
1267 {
1268 if (!is_hpet_enabled())
1269 return 0;
1270
1271 PIE_freq = freq;
1272 PIE_count = 0;
1273
1274 return 1;
1275 }
1276
1277 int hpet_rtc_dropped_irq(void)
1278 {
1279 if (!is_hpet_enabled())
1280 return 0;
1281
1282 return 1;
1283 }
1284
1285 irqreturn_t hpet_rtc_interrupt(int irq, void *dev_id, struct pt_regs *regs)
1286 {
1287 struct rtc_time curr_time;
1288 unsigned long rtc_int_flag = 0;
1289 int call_rtc_interrupt = 0;
1290
1291 hpet_rtc_timer_reinit();
1292
1293 if (UIE_on | AIE_on) {
1294 rtc_get_rtc_time(&curr_time);
1295 }
1296 if (UIE_on) {
1297 if (curr_time.tm_sec != prev_update_sec) {
1298 /* Set update int info, call real rtc int routine */
1299 call_rtc_interrupt = 1;
1300 rtc_int_flag = RTC_UF;
1301 prev_update_sec = curr_time.tm_sec;
1302 }
1303 }
1304 if (PIE_on) {
1305 PIE_count++;
1306 if (PIE_count >= hpet_rtc_int_freq/PIE_freq) {
1307 /* Set periodic int info, call real rtc int routine */
1308 call_rtc_interrupt = 1;
1309 rtc_int_flag |= RTC_PF;
1310 PIE_count = 0;
1311 }
1312 }
1313 if (AIE_on) {
1314 if ((curr_time.tm_sec == alarm_time.tm_sec) &&
1315 (curr_time.tm_min == alarm_time.tm_min) &&
1316 (curr_time.tm_hour == alarm_time.tm_hour)) {
1317 /* Set alarm int info, call real rtc int routine */
1318 call_rtc_interrupt = 1;
1319 rtc_int_flag |= RTC_AF;
1320 }
1321 }
1322 if (call_rtc_interrupt) {
1323 rtc_int_flag |= (RTC_IRQF | (RTC_NUM_INTS << 8));
1324 rtc_interrupt(rtc_int_flag, dev_id, regs);
1325 }
1326 return IRQ_HANDLED;
1327 }
1328 #endif
1329
1330 static int __init nohpet_setup(char *s)
1331 {
1332 nohpet = 1;
1333 return 1;
1334 }
1335
1336 __setup("nohpet", nohpet_setup);
1337
1338 int __init notsc_setup(char *s)
1339 {
1340 notsc = 1;
1341 return 1;
1342 }
1343
1344 __setup("notsc", notsc_setup);