1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright (c) 2016 - 2018 Cavium Inc.
7 #ifndef _INIT_FW_FUNCS_H
8 #define _INIT_FW_FUNCS_H
9 /* Forward declarations */
11 struct init_qm_pq_params
;
14 * @brief ecore_qm_pf_mem_size - Prepare QM ILT sizes
16 * Returns the required host memory size in 4KB units.
17 * Must be called before all QM init HSI functions.
19 * @param num_pf_cids - number of connections used by this PF
20 * @param num_vf_cids - number of connections used by VFs of this PF
21 * @param num_tids - number of tasks used by this PF
22 * @param num_pf_pqs - number of PQs used by this PF
23 * @param num_vf_pqs - number of PQs used by VFs of this PF
25 * @return The required host memory size in 4KB units.
27 u32
ecore_qm_pf_mem_size(u32 num_pf_cids
,
34 * @brief ecore_qm_common_rt_init - Prepare QM runtime init values for engine
38 * @param max_ports_per_engine - max number of ports per engine in HW
39 * @param max_phys_tcs_per_port - max number of physical TCs per port in HW
40 * @param pf_rl_en - enable per-PF rate limiters
41 * @param pf_wfq_en - enable per-PF WFQ
42 * @param vport_rl_en - enable per-VPORT rate limiters
43 * @param vport_wfq_en - enable per-VPORT WFQ
44 * @param port_params - array of size MAX_NUM_PORTS with params for each port
46 * @return 0 on success, -1 on error.
48 int ecore_qm_common_rt_init(struct ecore_hwfn
*p_hwfn
,
49 u8 max_ports_per_engine
,
50 u8 max_phys_tcs_per_port
,
55 struct init_qm_port_params port_params
[MAX_NUM_PORTS
]);
58 * @brief ecore_qm_pf_rt_init Prepare QM runtime init values for the PF phase
61 * @param p_ptt - ptt window used for writing the registers
62 * @param pf_id - PF ID
63 * @param max_phys_tcs_per_port - max number of physical TCs per port in HW
64 * @param is_pf_loading - indicates if the PF is currently loading,
65 * i.e. it has no allocated QM resources.
66 * @param num_pf_cids - number of connections used by this PF
67 * @param num_vf_cids - number of connections used by VFs of this PF
68 * @param num_tids - number of tasks used by this PF
69 * @param start_pq - first Tx PQ ID associated with this PF
70 * @param num_pf_pqs - number of Tx PQs associated with this PF
72 * @param num_vf_pqs - number of Tx PQs associated with a VF
73 * @param start_vport - first VPORT ID associated with this PF
74 * @param num_vports - number of VPORTs associated with this PF
75 * @param pf_wfq - WFQ weight. if PF WFQ is globally disabled, the weight must
76 * be 0. otherwise, the weight must be non-zero.
77 * @param pf_rl - rate limit in Mb/sec units. a value of 0 means don't
78 * configure. ignored if PF RL is globally disabled.
79 * @param link_speed - link speed in Mbps.
80 * @param pq_params - array of size (num_pf_pqs+num_vf_pqs) with parameters for
81 * each Tx PQ associated with the specified PF.
82 * @param vport_params - array of size num_vports with parameters for each
85 * @return 0 on success, -1 on error.
87 int ecore_qm_pf_rt_init(struct ecore_hwfn
*p_hwfn
,
88 struct ecore_ptt
*p_ptt
,
90 u8 max_phys_tcs_per_port
,
103 struct init_qm_pq_params
*pq_params
,
104 struct init_qm_vport_params
*vport_params
);
107 * @brief ecore_init_pf_wfq Initializes the WFQ weight of the specified PF
110 * @param p_ptt - ptt window used for writing the registers
111 * @param pf_id - PF ID
112 * @param pf_wfq - WFQ weight. Must be non-zero.
114 * @return 0 on success, -1 on error.
116 int ecore_init_pf_wfq(struct ecore_hwfn
*p_hwfn
,
117 struct ecore_ptt
*p_ptt
,
122 * @brief ecore_init_pf_rl - Initializes the rate limit of the specified PF
125 * @param p_ptt - ptt window used for writing the registers
126 * @param pf_id - PF ID
127 * @param pf_rl - rate limit in Mb/sec units
129 * @return 0 on success, -1 on error.
131 int ecore_init_pf_rl(struct ecore_hwfn
*p_hwfn
,
132 struct ecore_ptt
*p_ptt
,
137 * @brief ecore_init_vport_wfq Initializes the WFQ weight of specified VPORT
140 * @param p_ptt - ptt window used for writing the registers
141 * @param first_tx_pq_id- An array containing the first Tx PQ ID associated
142 * with the VPORT for each TC. This array is filled by
143 * ecore_qm_pf_rt_init
144 * @param vport_wfq - WFQ weight. Must be non-zero.
146 * @return 0 on success, -1 on error.
148 int ecore_init_vport_wfq(struct ecore_hwfn
*p_hwfn
,
149 struct ecore_ptt
*p_ptt
,
150 u16 first_tx_pq_id
[NUM_OF_TCS
],
154 * @brief ecore_init_vport_rl - Initializes the rate limit of the specified
157 * @param p_hwfn - HW device data
158 * @param p_ptt - ptt window used for writing the registers
159 * @param vport_id - VPORT ID
160 * @param vport_rl - rate limit in Mb/sec units
161 * @param link_speed - link speed in Mbps.
163 * @return 0 on success, -1 on error.
165 int ecore_init_vport_rl(struct ecore_hwfn
*p_hwfn
,
166 struct ecore_ptt
*p_ptt
,
172 * @brief ecore_send_qm_stop_cmd Sends a stop command to the QM
175 * @param p_ptt - ptt window used for writing the registers
176 * @param is_release_cmd - true for release, false for stop.
177 * @param is_tx_pq - true for Tx PQs, false for Other PQs.
178 * @param start_pq - first PQ ID to stop
179 * @param num_pqs - Number of PQs to stop, starting from start_pq.
181 * @return bool, true if successful, false if timeout occurred while waiting
182 * for QM command done.
184 bool ecore_send_qm_stop_cmd(struct ecore_hwfn
*p_hwfn
,
185 struct ecore_ptt
*p_ptt
,
190 #ifndef UNUSED_HSI_FUNC
193 * @brief ecore_init_nig_ets - initializes the NIG ETS arbiter
195 * Based on weight/priority requirements per-TC.
197 * @param p_ptt - ptt window used for writing the registers.
198 * @param req - the NIG ETS initialization requirements.
199 * @param is_lb - if set, the loopback port arbiter is initialized, otherwise
200 * the physical port arbiter is initialized. The pure-LB TC
201 * requirements are ignored when is_lb is cleared.
203 void ecore_init_nig_ets(struct ecore_hwfn
*p_hwfn
,
204 struct ecore_ptt
*p_ptt
,
205 struct init_ets_req
*req
,
209 * @brief ecore_init_nig_lb_rl - initializes the NIG LB RLs
211 * Based on global and per-TC rate requirements
213 * @param p_ptt - ptt window used for writing the registers.
214 * @param req - the NIG LB RLs initialization requirements.
216 void ecore_init_nig_lb_rl(struct ecore_hwfn
*p_hwfn
,
217 struct ecore_ptt
*p_ptt
,
218 struct init_nig_lb_rl_req
*req
);
219 #endif /* UNUSED_HSI_FUNC */
222 * @brief ecore_init_nig_pri_tc_map - initializes the NIG priority to TC map.
224 * Assumes valid arguments.
226 * @param p_ptt - ptt window used for writing the registers.
227 * @param req - required mapping from prioirties to TCs.
229 void ecore_init_nig_pri_tc_map(struct ecore_hwfn
*p_hwfn
,
230 struct ecore_ptt
*p_ptt
,
231 struct init_nig_pri_tc_map_req
*req
);
233 #ifndef UNUSED_HSI_FUNC
235 * @brief ecore_init_prs_ets - initializes the PRS Rx ETS arbiter
237 * Based on weight/priority requirements per-TC.
239 * @param p_ptt - ptt window used for writing the registers.
240 * @param req - the PRS ETS initialization requirements.
242 void ecore_init_prs_ets(struct ecore_hwfn
*p_hwfn
,
243 struct ecore_ptt
*p_ptt
,
244 struct init_ets_req
*req
);
245 #endif /* UNUSED_HSI_FUNC */
247 #ifndef UNUSED_HSI_FUNC
249 * @brief ecore_init_brb_ram - initializes BRB RAM sizes per TC
251 * Based on weight/priority requirements per-TC.
253 * @param p_ptt - ptt window used for writing the registers.
254 * @param req - the BRB RAM initialization requirements.
256 void ecore_init_brb_ram(struct ecore_hwfn
*p_hwfn
,
257 struct ecore_ptt
*p_ptt
,
258 struct init_brb_ram_req
*req
);
259 #endif /* UNUSED_HSI_FUNC */
262 * @brief ecore_set_vxlan_no_l2_enable - enable or disable VXLAN no L2 parsing
264 * @param p_ptt - ptt window used for writing the registers.
265 * @param enable - VXLAN no L2 enable flag.
267 void ecore_set_vxlan_no_l2_enable(struct ecore_hwfn
*p_hwfn
,
268 struct ecore_ptt
*p_ptt
,
271 #ifndef UNUSED_HSI_FUNC
273 * @brief ecore_set_port_mf_ovlan_eth_type - initializes DORQ ethType Regs to
274 * input ethType should Be called
277 * @param p_hwfn - HW device data
278 * @param ethType - etherType to configure
280 void ecore_set_port_mf_ovlan_eth_type(struct ecore_hwfn
*p_hwfn
,
282 #endif /* UNUSED_HSI_FUNC */
285 * @brief ecore_set_vxlan_dest_port - initializes vxlan tunnel destination udp
288 * @param p_ptt - ptt window used for writing the registers.
289 * @param dest_port - vxlan destination udp port.
291 void ecore_set_vxlan_dest_port(struct ecore_hwfn
*p_hwfn
,
292 struct ecore_ptt
*p_ptt
,
296 * @brief ecore_set_vxlan_enable - enable or disable VXLAN tunnel in HW
298 * @param p_ptt - ptt window used for writing the registers.
299 * @param vxlan_enable - vxlan enable flag.
301 void ecore_set_vxlan_enable(struct ecore_hwfn
*p_hwfn
,
302 struct ecore_ptt
*p_ptt
,
306 * @brief ecore_set_gre_enable - enable or disable GRE tunnel in HW
308 * @param p_ptt - ptt window used for writing the registers.
309 * @param eth_gre_enable - eth GRE enable enable flag.
310 * @param ip_gre_enable - IP GRE enable enable flag.
312 void ecore_set_gre_enable(struct ecore_hwfn
*p_hwfn
,
313 struct ecore_ptt
*p_ptt
,
318 * @brief ecore_set_geneve_dest_port - initializes geneve tunnel destination
321 * @param p_ptt - ptt window used for writing the registers.
322 * @param dest_port - geneve destination udp port.
324 void ecore_set_geneve_dest_port(struct ecore_hwfn
*p_hwfn
,
325 struct ecore_ptt
*p_ptt
,
329 * @brief ecore_set_gre_enable - enable or disable GRE tunnel in HW
331 * @param p_ptt - ptt window used for writing the registers.
332 * @param eth_geneve_enable - eth GENEVE enable enable flag.
333 * @param ip_geneve_enable - IP GENEVE enable enable flag.
335 void ecore_set_geneve_enable(struct ecore_hwfn
*p_hwfn
,
336 struct ecore_ptt
*p_ptt
,
337 bool eth_geneve_enable
,
338 bool ip_geneve_enable
);
339 #ifndef UNUSED_HSI_FUNC
342 * @brief ecore_set_gft_event_id_cm_hdr - configure GFT event id and cm header
344 * @param p_ptt - ptt window used for writing the registers.
346 void ecore_set_gft_event_id_cm_hdr(struct ecore_hwfn
*p_hwfn
,
347 struct ecore_ptt
*p_ptt
);
350 * @brief ecore_gft_disable - Disable and GFT
352 * @param p_hwfn - HW device data
353 * @param p_ptt - ptt window used for writing the registers.
354 * @param pf_id - pf on which to disable GFT.
356 void ecore_gft_disable(struct ecore_hwfn
*p_hwfn
,
357 struct ecore_ptt
*p_ptt
,
361 * @brief ecore_gft_config - Enable and configure HW for GFT
363 * @param p_ptt - ptt window used for writing the registers.
364 * @param pf_id - pf on which to enable GFT.
365 * @param tcp - set profile tcp packets.
366 * @param udp - set profile udp packet.
367 * @param ipv4 - set profile ipv4 packet.
368 * @param ipv6 - set profile ipv6 packet.
369 * @param profile_type - define packet same fields. Use enum gft_profile_type.
371 void ecore_gft_config(struct ecore_hwfn
*p_hwfn
,
372 struct ecore_ptt
*p_ptt
,
378 enum gft_profile_type profile_type
);
379 #endif /* UNUSED_HSI_FUNC */
382 * @brief ecore_config_vf_zone_size_mode - Configure VF zone size mode. Must be
383 * used before first ETH queue started.
386 * @param p_ptt - ptt window used for writing the registers. Don't care
387 * if runtime_init used
388 * @param mode - VF zone size mode. Use enum vf_zone_size_mode.
389 * @param runtime_init - Set 1 to init runtime registers in engine phase. Set 0
390 * if VF zone size mode configured after engine phase.
392 void ecore_config_vf_zone_size_mode(struct ecore_hwfn
*p_hwfn
, struct ecore_ptt
393 *p_ptt
, u16 mode
, bool runtime_init
);
396 * @brief ecore_get_mstorm_queue_stat_offset - Get mstorm statistics offset by
399 * @param stat_cnt_id - statistic counter id
400 * @param vf_zone_size_mode - VF zone size mode. Use enum vf_zone_size_mode.
402 u32
ecore_get_mstorm_queue_stat_offset(struct ecore_hwfn
*p_hwfn
,
403 u16 stat_cnt_id
, u16 vf_zone_size_mode
);
406 * @brief ecore_get_mstorm_eth_vf_prods_offset - VF producer offset by VF zone
409 * @param vf_id - vf id.
410 * @param vf_queue_id - per VF rx queue id.
411 * @param vf_zone_size_mode - vf zone size mode. Use enum vf_zone_size_mode.
413 u32
ecore_get_mstorm_eth_vf_prods_offset(struct ecore_hwfn
*p_hwfn
, u8 vf_id
, u8
414 vf_queue_id
, u16 vf_zone_size_mode
);
416 * @brief ecore_enable_context_validation - Enable and configure context
419 * @param p_ptt - ptt window used for writing the registers.
421 void ecore_enable_context_validation(struct ecore_hwfn
*p_hwfn
,
422 struct ecore_ptt
*p_ptt
);
424 * @brief ecore_calc_session_ctx_validation - Calcualte validation byte for
427 * @param p_ctx_mem - pointer to context memory.
428 * @param ctx_size - context size.
429 * @param ctx_type - context type.
430 * @param cid - context cid.
432 void ecore_calc_session_ctx_validation(void *p_ctx_mem
,
438 * @brief ecore_calc_task_ctx_validation - Calcualte validation byte for task
441 * @param p_ctx_mem - pointer to context memory.
442 * @param ctx_size - context size.
443 * @param ctx_type - context type.
444 * @param tid - context tid.
446 void ecore_calc_task_ctx_validation(void *p_ctx_mem
,
452 * @brief ecore_memset_session_ctx - Memset session context to 0 while
453 * preserving validation bytes.
455 * @param p_hwfn - HW device data
456 * @param p_ctx_mem - pointer to context memory.
457 * @param ctx_size - size to initialzie.
458 * @param ctx_type - context type.
460 void ecore_memset_session_ctx(void *p_ctx_mem
,
464 * @brief ecore_memset_task_ctx - Memset task context to 0 while preserving
467 * @param p_ctx_mem - pointer to context memory.
468 * @param ctx_size - size to initialzie.
469 * @param ctx_type - context type.
471 void ecore_memset_task_ctx(void *p_ctx_mem
,
476 /*******************************************************************************
477 * File name : rdma_init.h
478 * Author : Michael Shteinbok
479 *******************************************************************************
480 *******************************************************************************
482 * RDMA HSI functions header
484 *******************************************************************************
485 * Notes: This is the input to the auto generated file drv_init_fw_funcs.h
487 *******************************************************************************
494 * @brief ecore_set_rdma_error_level - Sets the RDMA assert level.
495 * If the severity of the error will be
496 * above the level, the FW will assert.
497 * @param p_hwfn - HW device data
498 * @param p_ptt - ptt window used for writing the registers
499 * @param assert_level - An array of assert levels for each storm.
501 void ecore_set_rdma_error_level(struct ecore_hwfn
*p_hwfn
,
502 struct ecore_ptt
*p_ptt
,
503 u8 assert_level
[NUM_STORMS
]);