ceph/src/seastar/dpdk/lib/librte_eal/common/include/arch/arm/rte_cycles_64.h

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(c) 2015 Cavium, Inc
   3  */
   4
   5 #ifndef _RTE_CYCLES_ARM64_H_
   6 #define _RTE_CYCLES_ARM64_H_
   7
   8 #ifdef __cplusplus
   9 extern "C" {
  10 #endif
  11
  12 #include "generic/rte_cycles.h"
  13
  14 /**
  15  * Read the time base register.
  16  *
  17  * @return
  18  *   The time base for this lcore.
  19  */
  20 #ifndef RTE_ARM_EAL_RDTSC_USE_PMU
  21 /**
  22  * This call is portable to any ARMv8 architecture, however, typically
  23  * cntvct_el0 runs at <= 100MHz and it may be imprecise for some tasks.
  24  */
  25 static inline uint64_t
  26 rte_rdtsc(void)
  27 {
  28         uint64_t tsc;
  29
  30         asm volatile("mrs %0, cntvct_el0" : "=r" (tsc));
  31         return tsc;
  32 }
  33 #else
  34 /**
  35  * This is an alternative method to enable rte_rdtsc() with high resolution
  36  * PMU cycles counter.The cycle counter runs at cpu frequency and this scheme
  37  * uses ARMv8 PMU subsystem to get the cycle counter at userspace, However,
  38  * access to PMU cycle counter from user space is not enabled by default in
  39  * arm64 linux kernel.
  40  * It is possible to enable cycle counter at user space access by configuring
  41  * the PMU from the privileged mode (kernel space).
  42  *
  43  * asm volatile("msr pmintenset_el1, %0" : : "r" ((u64)(0 << 31)));
  44  * asm volatile("msr pmcntenset_el0, %0" :: "r" BIT(31));
  45  * asm volatile("msr pmuserenr_el0, %0" : : "r"(BIT(0) | BIT(2)));
  46  * asm volatile("mrs %0, pmcr_el0" : "=r" (val));
  47  * val |= (BIT(0) | BIT(2));
  48  * isb();
  49  * asm volatile("msr pmcr_el0, %0" : : "r" (val));
  50  *
  51  */
  52 static inline uint64_t
  53 rte_rdtsc(void)
  54 {
  55         uint64_t tsc;
  56
  57         asm volatile("mrs %0, pmccntr_el0" : "=r"(tsc));
  58         return tsc;
  59 }
  60 #endif
  61
  62 static inline uint64_t
  63 rte_rdtsc_precise(void)
  64 {
  65         rte_mb();
  66         return rte_rdtsc();
  67 }
  68
  69 static inline uint64_t
  70 rte_get_tsc_cycles(void) { return rte_rdtsc(); }
  71
  72 #ifdef __cplusplus
  73 }
  74 #endif
  75
  76 #endif /* _RTE_CYCLES_ARM64_H_ */