1 #include <linux/kernel.h>
2 #include <linux/module.h>
3 #include <linux/init.h>
4 #include <linux/blkdev.h>
5 #include <scsi/scsi_host.h>
7 #include <linux/libata.h>
10 #include <asm/ecard.h>
12 #define DRV_NAME "pata_icside"
14 #define ICS_IDENT_OFFSET 0x2280
16 #define ICS_ARCIN_V5_INTRSTAT 0x0000
17 #define ICS_ARCIN_V5_INTROFFSET 0x0004
19 #define ICS_ARCIN_V6_INTROFFSET_1 0x2200
20 #define ICS_ARCIN_V6_INTRSTAT_1 0x2290
21 #define ICS_ARCIN_V6_INTROFFSET_2 0x3200
22 #define ICS_ARCIN_V6_INTRSTAT_2 0x3290
25 unsigned int dataoffset
;
26 unsigned int ctrloffset
;
27 unsigned int stepping
;
30 static const struct portinfo pata_icside_portinfo_v5
= {
36 static const struct portinfo pata_icside_portinfo_v6_1
= {
42 static const struct portinfo pata_icside_portinfo_v6_2
= {
48 #define PATA_ICSIDE_MAX_SG 128
50 struct pata_icside_state
{
51 void __iomem
*irq_port
;
52 void __iomem
*ioc_base
;
58 unsigned int speed
[ATA_MAX_DEVICES
];
60 struct scatterlist sg
[PATA_ICSIDE_MAX_SG
];
63 struct pata_icside_info
{
64 struct pata_icside_state
*state
;
65 struct expansion_card
*ec
;
67 void __iomem
*irqaddr
;
69 const expansioncard_ops_t
*irqops
;
70 unsigned int mwdma_mask
;
71 unsigned int nr_ports
;
72 const struct portinfo
*port
[2];
73 unsigned long raw_base
;
74 unsigned long raw_ioc_base
;
77 #define ICS_TYPE_A3IN 0
78 #define ICS_TYPE_A3USER 1
80 #define ICS_TYPE_V5 15
81 #define ICS_TYPE_NOTYPE ((unsigned int)-1)
83 /* ---------------- Version 5 PCB Support Functions --------------------- */
84 /* Prototype: pata_icside_irqenable_arcin_v5 (struct expansion_card *ec, int irqnr)
85 * Purpose : enable interrupts from card
87 static void pata_icside_irqenable_arcin_v5 (struct expansion_card
*ec
, int irqnr
)
89 struct pata_icside_state
*state
= ec
->irq_data
;
91 writeb(0, state
->irq_port
+ ICS_ARCIN_V5_INTROFFSET
);
94 /* Prototype: pata_icside_irqdisable_arcin_v5 (struct expansion_card *ec, int irqnr)
95 * Purpose : disable interrupts from card
97 static void pata_icside_irqdisable_arcin_v5 (struct expansion_card
*ec
, int irqnr
)
99 struct pata_icside_state
*state
= ec
->irq_data
;
101 readb(state
->irq_port
+ ICS_ARCIN_V5_INTROFFSET
);
104 static const expansioncard_ops_t pata_icside_ops_arcin_v5
= {
105 .irqenable
= pata_icside_irqenable_arcin_v5
,
106 .irqdisable
= pata_icside_irqdisable_arcin_v5
,
110 /* ---------------- Version 6 PCB Support Functions --------------------- */
111 /* Prototype: pata_icside_irqenable_arcin_v6 (struct expansion_card *ec, int irqnr)
112 * Purpose : enable interrupts from card
114 static void pata_icside_irqenable_arcin_v6 (struct expansion_card
*ec
, int irqnr
)
116 struct pata_icside_state
*state
= ec
->irq_data
;
117 void __iomem
*base
= state
->irq_port
;
119 if (!state
->port
[0].disabled
)
120 writeb(0, base
+ ICS_ARCIN_V6_INTROFFSET_1
);
121 if (!state
->port
[1].disabled
)
122 writeb(0, base
+ ICS_ARCIN_V6_INTROFFSET_2
);
125 /* Prototype: pata_icside_irqdisable_arcin_v6 (struct expansion_card *ec, int irqnr)
126 * Purpose : disable interrupts from card
128 static void pata_icside_irqdisable_arcin_v6 (struct expansion_card
*ec
, int irqnr
)
130 struct pata_icside_state
*state
= ec
->irq_data
;
132 readb(state
->irq_port
+ ICS_ARCIN_V6_INTROFFSET_1
);
133 readb(state
->irq_port
+ ICS_ARCIN_V6_INTROFFSET_2
);
136 /* Prototype: pata_icside_irqprobe(struct expansion_card *ec)
137 * Purpose : detect an active interrupt from card
139 static int pata_icside_irqpending_arcin_v6(struct expansion_card
*ec
)
141 struct pata_icside_state
*state
= ec
->irq_data
;
143 return readb(state
->irq_port
+ ICS_ARCIN_V6_INTRSTAT_1
) & 1 ||
144 readb(state
->irq_port
+ ICS_ARCIN_V6_INTRSTAT_2
) & 1;
147 static const expansioncard_ops_t pata_icside_ops_arcin_v6
= {
148 .irqenable
= pata_icside_irqenable_arcin_v6
,
149 .irqdisable
= pata_icside_irqdisable_arcin_v6
,
150 .irqpending
= pata_icside_irqpending_arcin_v6
,
157 * Similar to the BM-DMA, but we use the RiscPCs IOMD DMA controllers.
158 * There is only one DMA controller per card, which means that only
159 * one drive can be accessed at one time. NOTE! We do not enforce that
160 * here, but we rely on the main IDE driver spotting that both
161 * interfaces use the same IRQ, which should guarantee this.
165 * Configure the IOMD to give the appropriate timings for the transfer
166 * mode being requested. We take the advice of the ATA standards, and
167 * calculate the cycle time based on the transfer mode, and the EIDE
168 * MW DMA specs that the drive provides in the IDENTIFY command.
170 * We have the following IOMD DMA modes to choose from:
172 * Type Active Recovery Cycle
173 * A 250 (250) 312 (550) 562 (800)
174 * B 187 (200) 250 (550) 437 (750)
175 * C 125 (125) 125 (375) 250 (500)
176 * D 62 (50) 125 (375) 187 (425)
178 * (figures in brackets are actual measured timings on DIOR/DIOW)
180 * However, we also need to take care of the read/write active and
184 * Mode Active -- Recovery -- Cycle IOMD type
185 * MW0 215 50 215 480 A
189 static void pata_icside_set_dmamode(struct ata_port
*ap
, struct ata_device
*adev
)
191 struct pata_icside_state
*state
= ap
->host
->private_data
;
197 * DMA is based on a 16MHz clock
199 if (ata_timing_compute(adev
, adev
->dma_mode
, &t
, 1000, 1))
203 * Choose the IOMD cycle timing which ensure that the interface
204 * satisfies the measured active, recovery and cycle times.
206 if (t
.active
<= 50 && t
.recover
<= 375 && t
.cycle
<= 425)
207 iomd_type
= 'D', cycle
= 187;
208 else if (t
.active
<= 125 && t
.recover
<= 375 && t
.cycle
<= 500)
209 iomd_type
= 'C', cycle
= 250;
210 else if (t
.active
<= 200 && t
.recover
<= 550 && t
.cycle
<= 750)
211 iomd_type
= 'B', cycle
= 437;
213 iomd_type
= 'A', cycle
= 562;
215 ata_dev_printk(adev
, KERN_INFO
, "timings: act %dns rec %dns cyc %dns (%c)\n",
216 t
.active
, t
.recover
, t
.cycle
, iomd_type
);
218 state
->port
[ap
->port_no
].speed
[adev
->devno
] = cycle
;
221 static void pata_icside_bmdma_setup(struct ata_queued_cmd
*qc
)
223 struct ata_port
*ap
= qc
->ap
;
224 struct pata_icside_state
*state
= ap
->host
->private_data
;
225 struct scatterlist
*sg
, *rsg
= state
->sg
;
226 unsigned int write
= qc
->tf
.flags
& ATA_TFLAG_WRITE
;
230 * We are simplex; BUG if we try to fiddle with DMA
233 BUG_ON(dma_channel_active(state
->dma
));
236 * Copy ATAs scattered sg list into a contiguous array of sg
238 for_each_sg(qc
->sg
, sg
, qc
->n_elem
, si
) {
239 memcpy(rsg
, sg
, sizeof(*sg
));
244 * Route the DMA signals to the correct interface
246 writeb(state
->port
[ap
->port_no
].port_sel
, state
->ioc_base
);
248 set_dma_speed(state
->dma
, state
->port
[ap
->port_no
].speed
[qc
->dev
->devno
]);
249 set_dma_sg(state
->dma
, state
->sg
, rsg
- state
->sg
);
250 set_dma_mode(state
->dma
, write
? DMA_MODE_WRITE
: DMA_MODE_READ
);
252 /* issue r/w command */
253 ap
->ops
->exec_command(ap
, &qc
->tf
);
256 static void pata_icside_bmdma_start(struct ata_queued_cmd
*qc
)
258 struct ata_port
*ap
= qc
->ap
;
259 struct pata_icside_state
*state
= ap
->host
->private_data
;
261 BUG_ON(dma_channel_active(state
->dma
));
262 enable_dma(state
->dma
);
265 static void pata_icside_bmdma_stop(struct ata_queued_cmd
*qc
)
267 struct ata_port
*ap
= qc
->ap
;
268 struct pata_icside_state
*state
= ap
->host
->private_data
;
270 disable_dma(state
->dma
);
272 /* see ata_bmdma_stop */
276 static u8
pata_icside_bmdma_status(struct ata_port
*ap
)
278 struct pata_icside_state
*state
= ap
->host
->private_data
;
279 void __iomem
*irq_port
;
281 irq_port
= state
->irq_port
+ (ap
->port_no
? ICS_ARCIN_V6_INTRSTAT_2
:
282 ICS_ARCIN_V6_INTRSTAT_1
);
284 return readb(irq_port
) & 1 ? ATA_DMA_INTR
: 0;
287 static int icside_dma_init(struct pata_icside_info
*info
)
289 struct pata_icside_state
*state
= info
->state
;
290 struct expansion_card
*ec
= info
->ec
;
293 for (i
= 0; i
< ATA_MAX_DEVICES
; i
++) {
294 state
->port
[0].speed
[i
] = 480;
295 state
->port
[1].speed
[i
] = 480;
298 if (ec
->dma
!= NO_DMA
&& !request_dma(ec
->dma
, DRV_NAME
)) {
299 state
->dma
= ec
->dma
;
300 info
->mwdma_mask
= 0x07; /* MW0..2 */
307 static struct scsi_host_template pata_icside_sht
= {
308 ATA_BASE_SHT(DRV_NAME
),
309 .sg_tablesize
= PATA_ICSIDE_MAX_SG
,
310 .dma_boundary
= ~0, /* no dma boundaries */
313 static void pata_icside_postreset(struct ata_link
*link
, unsigned int *classes
)
315 struct ata_port
*ap
= link
->ap
;
316 struct pata_icside_state
*state
= ap
->host
->private_data
;
318 if (classes
[0] != ATA_DEV_NONE
|| classes
[1] != ATA_DEV_NONE
)
319 return ata_std_postreset(link
, classes
);
321 state
->port
[ap
->port_no
].disabled
= 1;
323 if (state
->type
== ICS_TYPE_V6
) {
325 * Disable interrupts from this port, otherwise we
326 * receive spurious interrupts from the floating
329 void __iomem
*irq_port
= state
->irq_port
+
330 (ap
->port_no
? ICS_ARCIN_V6_INTROFFSET_2
: ICS_ARCIN_V6_INTROFFSET_1
);
335 static void pata_icside_error_handler(struct ata_port
*ap
)
337 ata_bmdma_drive_eh(ap
, ata_std_prereset
, ata_std_softreset
, NULL
,
338 pata_icside_postreset
);
341 static struct ata_port_operations pata_icside_port_ops
= {
342 .inherits
= &ata_sff_port_ops
,
343 /* no need to build any PRD tables for DMA */
344 .qc_prep
= ata_noop_qc_prep
,
345 .data_xfer
= ata_data_xfer_noirq
,
346 .bmdma_setup
= pata_icside_bmdma_setup
,
347 .bmdma_start
= pata_icside_bmdma_start
,
348 .bmdma_stop
= pata_icside_bmdma_stop
,
349 .bmdma_status
= pata_icside_bmdma_status
,
351 .cable_detect
= ata_cable_40wire
,
352 .set_dmamode
= pata_icside_set_dmamode
,
353 .error_handler
= pata_icside_error_handler
,
354 .post_internal_cmd
= pata_icside_bmdma_stop
,
357 static void __devinit
358 pata_icside_setup_ioaddr(struct ata_port
*ap
, void __iomem
*base
,
359 struct pata_icside_info
*info
,
360 const struct portinfo
*port
)
362 struct ata_ioports
*ioaddr
= &ap
->ioaddr
;
363 void __iomem
*cmd
= base
+ port
->dataoffset
;
365 ioaddr
->cmd_addr
= cmd
;
366 ioaddr
->data_addr
= cmd
+ (ATA_REG_DATA
<< port
->stepping
);
367 ioaddr
->error_addr
= cmd
+ (ATA_REG_ERR
<< port
->stepping
);
368 ioaddr
->feature_addr
= cmd
+ (ATA_REG_FEATURE
<< port
->stepping
);
369 ioaddr
->nsect_addr
= cmd
+ (ATA_REG_NSECT
<< port
->stepping
);
370 ioaddr
->lbal_addr
= cmd
+ (ATA_REG_LBAL
<< port
->stepping
);
371 ioaddr
->lbam_addr
= cmd
+ (ATA_REG_LBAM
<< port
->stepping
);
372 ioaddr
->lbah_addr
= cmd
+ (ATA_REG_LBAH
<< port
->stepping
);
373 ioaddr
->device_addr
= cmd
+ (ATA_REG_DEVICE
<< port
->stepping
);
374 ioaddr
->status_addr
= cmd
+ (ATA_REG_STATUS
<< port
->stepping
);
375 ioaddr
->command_addr
= cmd
+ (ATA_REG_CMD
<< port
->stepping
);
377 ioaddr
->ctl_addr
= base
+ port
->ctrloffset
;
378 ioaddr
->altstatus_addr
= ioaddr
->ctl_addr
;
380 ata_port_desc(ap
, "cmd 0x%lx ctl 0x%lx",
381 info
->raw_base
+ port
->dataoffset
,
382 info
->raw_base
+ port
->ctrloffset
);
384 if (info
->raw_ioc_base
)
385 ata_port_desc(ap
, "iocbase 0x%lx", info
->raw_ioc_base
);
388 static int __devinit
pata_icside_register_v5(struct pata_icside_info
*info
)
390 struct pata_icside_state
*state
= info
->state
;
393 base
= ecardm_iomap(info
->ec
, ECARD_RES_MEMC
, 0, 0);
397 state
->irq_port
= base
;
400 info
->irqaddr
= base
+ ICS_ARCIN_V5_INTRSTAT
;
402 info
->irqops
= &pata_icside_ops_arcin_v5
;
404 info
->port
[0] = &pata_icside_portinfo_v5
;
406 info
->raw_base
= ecard_resource_start(info
->ec
, ECARD_RES_MEMC
);
411 static int __devinit
pata_icside_register_v6(struct pata_icside_info
*info
)
413 struct pata_icside_state
*state
= info
->state
;
414 struct expansion_card
*ec
= info
->ec
;
415 void __iomem
*ioc_base
, *easi_base
;
416 unsigned int sel
= 0;
418 ioc_base
= ecardm_iomap(ec
, ECARD_RES_IOCFAST
, 0, 0);
422 easi_base
= ioc_base
;
424 if (ecard_resource_flags(ec
, ECARD_RES_EASI
)) {
425 easi_base
= ecardm_iomap(ec
, ECARD_RES_EASI
, 0, 0);
430 * Enable access to the EASI region.
435 writeb(sel
, ioc_base
);
437 state
->irq_port
= easi_base
;
438 state
->ioc_base
= ioc_base
;
439 state
->port
[0].port_sel
= sel
;
440 state
->port
[1].port_sel
= sel
| 1;
442 info
->base
= easi_base
;
443 info
->irqops
= &pata_icside_ops_arcin_v6
;
445 info
->port
[0] = &pata_icside_portinfo_v6_1
;
446 info
->port
[1] = &pata_icside_portinfo_v6_2
;
448 info
->raw_base
= ecard_resource_start(ec
, ECARD_RES_EASI
);
449 info
->raw_ioc_base
= ecard_resource_start(ec
, ECARD_RES_IOCFAST
);
451 return icside_dma_init(info
);
454 static int __devinit
pata_icside_add_ports(struct pata_icside_info
*info
)
456 struct expansion_card
*ec
= info
->ec
;
457 struct ata_host
*host
;
461 ec
->irqaddr
= info
->irqaddr
;
462 ec
->irqmask
= info
->irqmask
;
465 ecard_setirq(ec
, info
->irqops
, info
->state
);
468 * Be on the safe side - disable interrupts
470 ec
->ops
->irqdisable(ec
, ec
->irq
);
472 host
= ata_host_alloc(&ec
->dev
, info
->nr_ports
);
476 host
->private_data
= info
->state
;
477 host
->flags
= ATA_HOST_SIMPLEX
;
479 for (i
= 0; i
< info
->nr_ports
; i
++) {
480 struct ata_port
*ap
= host
->ports
[i
];
483 ap
->mwdma_mask
= info
->mwdma_mask
;
484 ap
->flags
|= ATA_FLAG_SLAVE_POSS
;
485 ap
->ops
= &pata_icside_port_ops
;
487 pata_icside_setup_ioaddr(ap
, info
->base
, info
, info
->port
[i
]);
490 return ata_host_activate(host
, ec
->irq
, ata_interrupt
, 0,
495 pata_icside_probe(struct expansion_card
*ec
, const struct ecard_id
*id
)
497 struct pata_icside_state
*state
;
498 struct pata_icside_info info
;
502 ret
= ecard_request_resources(ec
);
506 state
= devm_kzalloc(&ec
->dev
, sizeof(*state
), GFP_KERNEL
);
512 state
->type
= ICS_TYPE_NOTYPE
;
515 idmem
= ecardm_iomap(ec
, ECARD_RES_IOCFAST
, 0, 0);
519 type
= readb(idmem
+ ICS_IDENT_OFFSET
) & 1;
520 type
|= (readb(idmem
+ ICS_IDENT_OFFSET
+ 4) & 1) << 1;
521 type
|= (readb(idmem
+ ICS_IDENT_OFFSET
+ 8) & 1) << 2;
522 type
|= (readb(idmem
+ ICS_IDENT_OFFSET
+ 12) & 1) << 3;
523 ecardm_iounmap(ec
, idmem
);
528 memset(&info
, 0, sizeof(info
));
532 switch (state
->type
) {
534 dev_warn(&ec
->dev
, "A3IN unsupported\n");
538 case ICS_TYPE_A3USER
:
539 dev_warn(&ec
->dev
, "A3USER unsupported\n");
544 ret
= pata_icside_register_v5(&info
);
548 ret
= pata_icside_register_v6(&info
);
552 dev_warn(&ec
->dev
, "unknown interface type\n");
558 ret
= pata_icside_add_ports(&info
);
564 ecard_release_resources(ec
);
569 static void pata_icside_shutdown(struct expansion_card
*ec
)
571 struct ata_host
*host
= ecard_get_drvdata(ec
);
575 * Disable interrupts from this card. We need to do
576 * this before disabling EASI since we may be accessing
577 * this register via that region.
579 local_irq_save(flags
);
580 ec
->ops
->irqdisable(ec
, ec
->irq
);
581 local_irq_restore(flags
);
584 * Reset the ROM pointer so that we can read the ROM
585 * after a soft reboot. This also disables access to
586 * the IDE taskfile via the EASI region.
589 struct pata_icside_state
*state
= host
->private_data
;
591 writeb(0, state
->ioc_base
);
595 static void __devexit
pata_icside_remove(struct expansion_card
*ec
)
597 struct ata_host
*host
= ecard_get_drvdata(ec
);
598 struct pata_icside_state
*state
= host
->private_data
;
600 ata_host_detach(host
);
602 pata_icside_shutdown(ec
);
605 * don't NULL out the drvdata - devres/libata wants it
606 * to free the ata_host structure.
608 if (state
->dma
!= NO_DMA
)
609 free_dma(state
->dma
);
611 ecard_release_resources(ec
);
614 static const struct ecard_id pata_icside_ids
[] = {
615 { MANU_ICS
, PROD_ICS_IDE
},
616 { MANU_ICS2
, PROD_ICS2_IDE
},
620 static struct ecard_driver pata_icside_driver
= {
621 .probe
= pata_icside_probe
,
622 .remove
= __devexit_p(pata_icside_remove
),
623 .shutdown
= pata_icside_shutdown
,
624 .id_table
= pata_icside_ids
,
630 static int __init
pata_icside_init(void)
632 return ecard_register_driver(&pata_icside_driver
);
635 static void __exit
pata_icside_exit(void)
637 ecard_remove_driver(&pata_icside_driver
);
640 MODULE_AUTHOR("Russell King <rmk@arm.linux.org.uk>");
641 MODULE_LICENSE("GPL");
642 MODULE_DESCRIPTION("ICS PATA driver");
644 module_init(pata_icside_init
);
645 module_exit(pata_icside_exit
);