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mtip32xx: fix handling of commands in various scenarios
[mirror_ubuntu-bionic-kernel.git] / drivers / block / mtip32xx / mtip32xx.c
1 /*
2 * Driver for the Micron P320 SSD
3 * Copyright (C) 2011 Micron Technology, Inc.
4 *
5 * Portions of this code were derived from works subjected to the
6 * following copyright:
7 * Copyright (C) 2009 Integrated Device Technology, Inc.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 */
20
21 #include <linux/pci.h>
22 #include <linux/interrupt.h>
23 #include <linux/ata.h>
24 #include <linux/delay.h>
25 #include <linux/hdreg.h>
26 #include <linux/uaccess.h>
27 #include <linux/random.h>
28 #include <linux/smp.h>
29 #include <linux/compat.h>
30 #include <linux/fs.h>
31 #include <linux/module.h>
32 #include <linux/genhd.h>
33 #include <linux/blkdev.h>
34 #include <linux/bio.h>
35 #include <linux/dma-mapping.h>
36 #include <linux/idr.h>
37 #include <linux/kthread.h>
38 #include <../drivers/ata/ahci.h>
39 #include <linux/export.h>
40 #include "mtip32xx.h"
41
42 #define HW_CMD_SLOT_SZ (MTIP_MAX_COMMAND_SLOTS * 32)
43 #define HW_CMD_TBL_SZ (AHCI_CMD_TBL_HDR_SZ + (MTIP_MAX_SG * 16))
44 #define HW_CMD_TBL_AR_SZ (HW_CMD_TBL_SZ * MTIP_MAX_COMMAND_SLOTS)
45 #define HW_PORT_PRIV_DMA_SZ \
46 (HW_CMD_SLOT_SZ + HW_CMD_TBL_AR_SZ + AHCI_RX_FIS_SZ)
47
48 #define HOST_CAP_NZDMA (1 << 19)
49 #define HOST_HSORG 0xFC
50 #define HSORG_DISABLE_SLOTGRP_INTR (1<<24)
51 #define HSORG_DISABLE_SLOTGRP_PXIS (1<<16)
52 #define HSORG_HWREV 0xFF00
53 #define HSORG_STYLE 0x8
54 #define HSORG_SLOTGROUPS 0x7
55
56 #define PORT_COMMAND_ISSUE 0x38
57 #define PORT_SDBV 0x7C
58
59 #define PORT_OFFSET 0x100
60 #define PORT_MEM_SIZE 0x80
61
62 #define PORT_IRQ_ERR \
63 (PORT_IRQ_HBUS_ERR | PORT_IRQ_IF_ERR | PORT_IRQ_CONNECT | \
64 PORT_IRQ_PHYRDY | PORT_IRQ_UNK_FIS | PORT_IRQ_BAD_PMP | \
65 PORT_IRQ_TF_ERR | PORT_IRQ_HBUS_DATA_ERR | PORT_IRQ_IF_NONFATAL | \
66 PORT_IRQ_OVERFLOW)
67 #define PORT_IRQ_LEGACY \
68 (PORT_IRQ_PIOS_FIS | PORT_IRQ_D2H_REG_FIS)
69 #define PORT_IRQ_HANDLED \
70 (PORT_IRQ_SDB_FIS | PORT_IRQ_LEGACY | \
71 PORT_IRQ_TF_ERR | PORT_IRQ_IF_ERR | \
72 PORT_IRQ_CONNECT | PORT_IRQ_PHYRDY)
73 #define DEF_PORT_IRQ \
74 (PORT_IRQ_ERR | PORT_IRQ_LEGACY | PORT_IRQ_SDB_FIS)
75
76 /* product numbers */
77 #define MTIP_PRODUCT_UNKNOWN 0x00
78 #define MTIP_PRODUCT_ASICFPGA 0x11
79
80 /* Device instance number, incremented each time a device is probed. */
81 static int instance;
82
83 /*
84 * Global variable used to hold the major block device number
85 * allocated in mtip_init().
86 */
87 static int mtip_major;
88
89 static DEFINE_SPINLOCK(rssd_index_lock);
90 static DEFINE_IDA(rssd_index_ida);
91
92 static int mtip_block_initialize(struct driver_data *dd);
93
94 #ifdef CONFIG_COMPAT
95 struct mtip_compat_ide_task_request_s {
96 __u8 io_ports[8];
97 __u8 hob_ports[8];
98 ide_reg_valid_t out_flags;
99 ide_reg_valid_t in_flags;
100 int data_phase;
101 int req_cmd;
102 compat_ulong_t out_size;
103 compat_ulong_t in_size;
104 };
105 #endif
106
107 /*
108 * This function check_for_surprise_removal is called
109 * while card is removed from the system and it will
110 * read the vendor id from the configration space
111 *
112 * @pdev Pointer to the pci_dev structure.
113 *
114 * return value
115 * true if device removed, else false
116 */
117 static bool mtip_check_surprise_removal(struct pci_dev *pdev)
118 {
119 u16 vendor_id = 0;
120
121 /* Read the vendorID from the configuration space */
122 pci_read_config_word(pdev, 0x00, &vendor_id);
123 if (vendor_id == 0xFFFF)
124 return true; /* device removed */
125
126 return false; /* device present */
127 }
128
129 /*
130 * This function is called for clean the pending command in the
131 * command slot during the surprise removal of device and return
132 * error to the upper layer.
133 *
134 * @dd Pointer to the DRIVER_DATA structure.
135 *
136 * return value
137 * None
138 */
139 static void mtip_command_cleanup(struct driver_data *dd)
140 {
141 int group = 0, commandslot = 0, commandindex = 0;
142 struct mtip_cmd *command;
143 struct mtip_port *port = dd->port;
144 static int in_progress;
145
146 if (in_progress)
147 return;
148
149 in_progress = 1;
150
151 for (group = 0; group < 4; group++) {
152 for (commandslot = 0; commandslot < 32; commandslot++) {
153 if (!(port->allocated[group] & (1 << commandslot)))
154 continue;
155
156 commandindex = group << 5 | commandslot;
157 command = &port->commands[commandindex];
158
159 if (atomic_read(&command->active)
160 && (command->async_callback)) {
161 command->async_callback(command->async_data,
162 -ENODEV);
163 command->async_callback = NULL;
164 command->async_data = NULL;
165 }
166
167 dma_unmap_sg(&port->dd->pdev->dev,
168 command->sg,
169 command->scatter_ents,
170 command->direction);
171 }
172 }
173
174 up(&port->cmd_slot);
175
176 set_bit(MTIP_DDF_CLEANUP_BIT, &dd->dd_flag);
177 in_progress = 0;
178 }
179
180 /*
181 * Obtain an empty command slot.
182 *
183 * This function needs to be reentrant since it could be called
184 * at the same time on multiple CPUs. The allocation of the
185 * command slot must be atomic.
186 *
187 * @port Pointer to the port data structure.
188 *
189 * return value
190 * >= 0 Index of command slot obtained.
191 * -1 No command slots available.
192 */
193 static int get_slot(struct mtip_port *port)
194 {
195 int slot, i;
196 unsigned int num_command_slots = port->dd->slot_groups * 32;
197
198 /*
199 * Try 10 times, because there is a small race here.
200 * that's ok, because it's still cheaper than a lock.
201 *
202 * Race: Since this section is not protected by lock, same bit
203 * could be chosen by different process contexts running in
204 * different processor. So instead of costly lock, we are going
205 * with loop.
206 */
207 for (i = 0; i < 10; i++) {
208 slot = find_next_zero_bit(port->allocated,
209 num_command_slots, 1);
210 if ((slot < num_command_slots) &&
211 (!test_and_set_bit(slot, port->allocated)))
212 return slot;
213 }
214 dev_warn(&port->dd->pdev->dev, "Failed to get a tag.\n");
215
216 if (mtip_check_surprise_removal(port->dd->pdev)) {
217 /* Device not present, clean outstanding commands */
218 mtip_command_cleanup(port->dd);
219 }
220 return -1;
221 }
222
223 /*
224 * Release a command slot.
225 *
226 * @port Pointer to the port data structure.
227 * @tag Tag of command to release
228 *
229 * return value
230 * None
231 */
232 static inline void release_slot(struct mtip_port *port, int tag)
233 {
234 smp_mb__before_clear_bit();
235 clear_bit(tag, port->allocated);
236 smp_mb__after_clear_bit();
237 }
238
239 /*
240 * Reset the HBA (without sleeping)
241 *
242 * Just like hba_reset, except does not call sleep, so can be
243 * run from interrupt/tasklet context.
244 *
245 * @dd Pointer to the driver data structure.
246 *
247 * return value
248 * 0 The reset was successful.
249 * -1 The HBA Reset bit did not clear.
250 */
251 static int hba_reset_nosleep(struct driver_data *dd)
252 {
253 unsigned long timeout;
254
255 /* Chip quirk: quiesce any chip function */
256 mdelay(10);
257
258 /* Set the reset bit */
259 writel(HOST_RESET, dd->mmio + HOST_CTL);
260
261 /* Flush */
262 readl(dd->mmio + HOST_CTL);
263
264 /*
265 * Wait 10ms then spin for up to 1 second
266 * waiting for reset acknowledgement
267 */
268 timeout = jiffies + msecs_to_jiffies(1000);
269 mdelay(10);
270 while ((readl(dd->mmio + HOST_CTL) & HOST_RESET)
271 && time_before(jiffies, timeout))
272 mdelay(1);
273
274 if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag))
275 return -1;
276
277 if (readl(dd->mmio + HOST_CTL) & HOST_RESET)
278 return -1;
279
280 return 0;
281 }
282
283 /*
284 * Issue a command to the hardware.
285 *
286 * Set the appropriate bit in the s_active and Command Issue hardware
287 * registers, causing hardware command processing to begin.
288 *
289 * @port Pointer to the port structure.
290 * @tag The tag of the command to be issued.
291 *
292 * return value
293 * None
294 */
295 static inline void mtip_issue_ncq_command(struct mtip_port *port, int tag)
296 {
297 unsigned long flags = 0;
298
299 atomic_set(&port->commands[tag].active, 1);
300
301 spin_lock_irqsave(&port->cmd_issue_lock, flags);
302
303 writel((1 << MTIP_TAG_BIT(tag)),
304 port->s_active[MTIP_TAG_INDEX(tag)]);
305 writel((1 << MTIP_TAG_BIT(tag)),
306 port->cmd_issue[MTIP_TAG_INDEX(tag)]);
307
308 spin_unlock_irqrestore(&port->cmd_issue_lock, flags);
309
310 /* Set the command's timeout value.*/
311 port->commands[tag].comp_time = jiffies + msecs_to_jiffies(
312 MTIP_NCQ_COMMAND_TIMEOUT_MS);
313 }
314
315 /*
316 * Enable/disable the reception of FIS
317 *
318 * @port Pointer to the port data structure
319 * @enable 1 to enable, 0 to disable
320 *
321 * return value
322 * Previous state: 1 enabled, 0 disabled
323 */
324 static int mtip_enable_fis(struct mtip_port *port, int enable)
325 {
326 u32 tmp;
327
328 /* enable FIS reception */
329 tmp = readl(port->mmio + PORT_CMD);
330 if (enable)
331 writel(tmp | PORT_CMD_FIS_RX, port->mmio + PORT_CMD);
332 else
333 writel(tmp & ~PORT_CMD_FIS_RX, port->mmio + PORT_CMD);
334
335 /* Flush */
336 readl(port->mmio + PORT_CMD);
337
338 return (((tmp & PORT_CMD_FIS_RX) == PORT_CMD_FIS_RX));
339 }
340
341 /*
342 * Enable/disable the DMA engine
343 *
344 * @port Pointer to the port data structure
345 * @enable 1 to enable, 0 to disable
346 *
347 * return value
348 * Previous state: 1 enabled, 0 disabled.
349 */
350 static int mtip_enable_engine(struct mtip_port *port, int enable)
351 {
352 u32 tmp;
353
354 /* enable FIS reception */
355 tmp = readl(port->mmio + PORT_CMD);
356 if (enable)
357 writel(tmp | PORT_CMD_START, port->mmio + PORT_CMD);
358 else
359 writel(tmp & ~PORT_CMD_START, port->mmio + PORT_CMD);
360
361 readl(port->mmio + PORT_CMD);
362 return (((tmp & PORT_CMD_START) == PORT_CMD_START));
363 }
364
365 /*
366 * Enables the port DMA engine and FIS reception.
367 *
368 * return value
369 * None
370 */
371 static inline void mtip_start_port(struct mtip_port *port)
372 {
373 /* Enable FIS reception */
374 mtip_enable_fis(port, 1);
375
376 /* Enable the DMA engine */
377 mtip_enable_engine(port, 1);
378 }
379
380 /*
381 * Deinitialize a port by disabling port interrupts, the DMA engine,
382 * and FIS reception.
383 *
384 * @port Pointer to the port structure
385 *
386 * return value
387 * None
388 */
389 static inline void mtip_deinit_port(struct mtip_port *port)
390 {
391 /* Disable interrupts on this port */
392 writel(0, port->mmio + PORT_IRQ_MASK);
393
394 /* Disable the DMA engine */
395 mtip_enable_engine(port, 0);
396
397 /* Disable FIS reception */
398 mtip_enable_fis(port, 0);
399 }
400
401 /*
402 * Initialize a port.
403 *
404 * This function deinitializes the port by calling mtip_deinit_port() and
405 * then initializes it by setting the command header and RX FIS addresses,
406 * clearing the SError register and any pending port interrupts before
407 * re-enabling the default set of port interrupts.
408 *
409 * @port Pointer to the port structure.
410 *
411 * return value
412 * None
413 */
414 static void mtip_init_port(struct mtip_port *port)
415 {
416 int i;
417 mtip_deinit_port(port);
418
419 /* Program the command list base and FIS base addresses */
420 if (readl(port->dd->mmio + HOST_CAP) & HOST_CAP_64) {
421 writel((port->command_list_dma >> 16) >> 16,
422 port->mmio + PORT_LST_ADDR_HI);
423 writel((port->rxfis_dma >> 16) >> 16,
424 port->mmio + PORT_FIS_ADDR_HI);
425 }
426
427 writel(port->command_list_dma & 0xFFFFFFFF,
428 port->mmio + PORT_LST_ADDR);
429 writel(port->rxfis_dma & 0xFFFFFFFF, port->mmio + PORT_FIS_ADDR);
430
431 /* Clear SError */
432 writel(readl(port->mmio + PORT_SCR_ERR), port->mmio + PORT_SCR_ERR);
433
434 /* reset the completed registers.*/
435 for (i = 0; i < port->dd->slot_groups; i++)
436 writel(0xFFFFFFFF, port->completed[i]);
437
438 /* Clear any pending interrupts for this port */
439 writel(readl(port->dd->mmio + PORT_IRQ_STAT),
440 port->dd->mmio + PORT_IRQ_STAT);
441
442 /* Clear any pending interrupts on the HBA. */
443 writel(readl(port->dd->mmio + HOST_IRQ_STAT),
444 port->dd->mmio + HOST_IRQ_STAT);
445
446 /* Enable port interrupts */
447 writel(DEF_PORT_IRQ, port->mmio + PORT_IRQ_MASK);
448 }
449
450 /*
451 * Restart a port
452 *
453 * @port Pointer to the port data structure.
454 *
455 * return value
456 * None
457 */
458 static void mtip_restart_port(struct mtip_port *port)
459 {
460 unsigned long timeout;
461
462 /* Disable the DMA engine */
463 mtip_enable_engine(port, 0);
464
465 /* Chip quirk: wait up to 500ms for PxCMD.CR == 0 */
466 timeout = jiffies + msecs_to_jiffies(500);
467 while ((readl(port->mmio + PORT_CMD) & PORT_CMD_LIST_ON)
468 && time_before(jiffies, timeout))
469 ;
470
471 if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &port->dd->dd_flag))
472 return;
473
474 /*
475 * Chip quirk: escalate to hba reset if
476 * PxCMD.CR not clear after 500 ms
477 */
478 if (readl(port->mmio + PORT_CMD) & PORT_CMD_LIST_ON) {
479 dev_warn(&port->dd->pdev->dev,
480 "PxCMD.CR not clear, escalating reset\n");
481
482 if (hba_reset_nosleep(port->dd))
483 dev_err(&port->dd->pdev->dev,
484 "HBA reset escalation failed.\n");
485
486 /* 30 ms delay before com reset to quiesce chip */
487 mdelay(30);
488 }
489
490 dev_warn(&port->dd->pdev->dev, "Issuing COM reset\n");
491
492 /* Set PxSCTL.DET */
493 writel(readl(port->mmio + PORT_SCR_CTL) |
494 1, port->mmio + PORT_SCR_CTL);
495 readl(port->mmio + PORT_SCR_CTL);
496
497 /* Wait 1 ms to quiesce chip function */
498 timeout = jiffies + msecs_to_jiffies(1);
499 while (time_before(jiffies, timeout))
500 ;
501
502 if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &port->dd->dd_flag))
503 return;
504
505 /* Clear PxSCTL.DET */
506 writel(readl(port->mmio + PORT_SCR_CTL) & ~1,
507 port->mmio + PORT_SCR_CTL);
508 readl(port->mmio + PORT_SCR_CTL);
509
510 /* Wait 500 ms for bit 0 of PORT_SCR_STS to be set */
511 timeout = jiffies + msecs_to_jiffies(500);
512 while (((readl(port->mmio + PORT_SCR_STAT) & 0x01) == 0)
513 && time_before(jiffies, timeout))
514 ;
515
516 if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &port->dd->dd_flag))
517 return;
518
519 if ((readl(port->mmio + PORT_SCR_STAT) & 0x01) == 0)
520 dev_warn(&port->dd->pdev->dev,
521 "COM reset failed\n");
522
523 mtip_init_port(port);
524 mtip_start_port(port);
525
526 }
527
528 /*
529 * Called periodically to see if any read/write commands are
530 * taking too long to complete.
531 *
532 * @data Pointer to the PORT data structure.
533 *
534 * return value
535 * None
536 */
537 static void mtip_timeout_function(unsigned long int data)
538 {
539 struct mtip_port *port = (struct mtip_port *) data;
540 struct host_to_dev_fis *fis;
541 struct mtip_cmd *command;
542 int tag, cmdto_cnt = 0;
543 unsigned int bit, group;
544 unsigned int num_command_slots = port->dd->slot_groups * 32;
545 unsigned long to;
546
547 if (unlikely(!port))
548 return;
549
550 if (test_bit(MTIP_DDF_RESUME_BIT, &port->dd->dd_flag)) {
551 mod_timer(&port->cmd_timer,
552 jiffies + msecs_to_jiffies(30000));
553 return;
554 }
555
556 for (tag = 0; tag < num_command_slots; tag++) {
557 /*
558 * Skip internal command slot as it has
559 * its own timeout mechanism
560 */
561 if (tag == MTIP_TAG_INTERNAL)
562 continue;
563
564 if (atomic_read(&port->commands[tag].active) &&
565 (time_after(jiffies, port->commands[tag].comp_time))) {
566 group = tag >> 5;
567 bit = tag & 0x1F;
568
569 command = &port->commands[tag];
570 fis = (struct host_to_dev_fis *) command->command;
571
572 dev_warn(&port->dd->pdev->dev,
573 "Timeout for command tag %d\n", tag);
574
575 cmdto_cnt++;
576 if (cmdto_cnt == 1)
577 set_bit(MTIP_PF_EH_ACTIVE_BIT, &port->flags);
578
579 /*
580 * Clear the completed bit. This should prevent
581 * any interrupt handlers from trying to retire
582 * the command.
583 */
584 writel(1 << bit, port->completed[group]);
585
586 /* Call the async completion callback. */
587 if (likely(command->async_callback))
588 command->async_callback(command->async_data,
589 -EIO);
590 command->async_callback = NULL;
591 command->comp_func = NULL;
592
593 /* Unmap the DMA scatter list entries */
594 dma_unmap_sg(&port->dd->pdev->dev,
595 command->sg,
596 command->scatter_ents,
597 command->direction);
598
599 /*
600 * Clear the allocated bit and active tag for the
601 * command.
602 */
603 atomic_set(&port->commands[tag].active, 0);
604 release_slot(port, tag);
605
606 up(&port->cmd_slot);
607 }
608 }
609
610 if (cmdto_cnt && !test_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags)) {
611 dev_warn(&port->dd->pdev->dev,
612 "%d commands timed out: restarting port",
613 cmdto_cnt);
614 mtip_restart_port(port);
615 clear_bit(MTIP_PF_EH_ACTIVE_BIT, &port->flags);
616 wake_up_interruptible(&port->svc_wait);
617 }
618
619 if (port->ic_pause_timer) {
620 to = port->ic_pause_timer + msecs_to_jiffies(1000);
621 if (time_after(jiffies, to)) {
622 if (!test_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags)) {
623 port->ic_pause_timer = 0;
624 clear_bit(MTIP_PF_SE_ACTIVE_BIT, &port->flags);
625 clear_bit(MTIP_PF_DM_ACTIVE_BIT, &port->flags);
626 clear_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags);
627 wake_up_interruptible(&port->svc_wait);
628 }
629
630
631 }
632 }
633
634 /* Restart the timer */
635 mod_timer(&port->cmd_timer,
636 jiffies + msecs_to_jiffies(MTIP_TIMEOUT_CHECK_PERIOD));
637 }
638
639 /*
640 * IO completion function.
641 *
642 * This completion function is called by the driver ISR when a
643 * command that was issued by the kernel completes. It first calls the
644 * asynchronous completion function which normally calls back into the block
645 * layer passing the asynchronous callback data, then unmaps the
646 * scatter list associated with the completed command, and finally
647 * clears the allocated bit associated with the completed command.
648 *
649 * @port Pointer to the port data structure.
650 * @tag Tag of the command.
651 * @data Pointer to driver_data.
652 * @status Completion status.
653 *
654 * return value
655 * None
656 */
657 static void mtip_async_complete(struct mtip_port *port,
658 int tag,
659 void *data,
660 int status)
661 {
662 struct mtip_cmd *command;
663 struct driver_data *dd = data;
664 int cb_status = status ? -EIO : 0;
665
666 if (unlikely(!dd) || unlikely(!port))
667 return;
668
669 command = &port->commands[tag];
670
671 if (unlikely(status == PORT_IRQ_TF_ERR)) {
672 dev_warn(&port->dd->pdev->dev,
673 "Command tag %d failed due to TFE\n", tag);
674 }
675
676 /* Upper layer callback */
677 if (likely(command->async_callback))
678 command->async_callback(command->async_data, cb_status);
679
680 command->async_callback = NULL;
681 command->comp_func = NULL;
682
683 /* Unmap the DMA scatter list entries */
684 dma_unmap_sg(&dd->pdev->dev,
685 command->sg,
686 command->scatter_ents,
687 command->direction);
688
689 /* Clear the allocated and active bits for the command */
690 atomic_set(&port->commands[tag].active, 0);
691 release_slot(port, tag);
692
693 up(&port->cmd_slot);
694 }
695
696 /*
697 * Internal command completion callback function.
698 *
699 * This function is normally called by the driver ISR when an internal
700 * command completed. This function signals the command completion by
701 * calling complete().
702 *
703 * @port Pointer to the port data structure.
704 * @tag Tag of the command that has completed.
705 * @data Pointer to a completion structure.
706 * @status Completion status.
707 *
708 * return value
709 * None
710 */
711 static void mtip_completion(struct mtip_port *port,
712 int tag,
713 void *data,
714 int status)
715 {
716 struct mtip_cmd *command = &port->commands[tag];
717 struct completion *waiting = data;
718 if (unlikely(status == PORT_IRQ_TF_ERR))
719 dev_warn(&port->dd->pdev->dev,
720 "Internal command %d completed with TFE\n", tag);
721
722 command->async_callback = NULL;
723 command->comp_func = NULL;
724
725 complete(waiting);
726 }
727
728 static void mtip_null_completion(struct mtip_port *port,
729 int tag,
730 void *data,
731 int status)
732 {
733 return;
734 }
735
736 /*
737 * Helper function for tag logging
738 */
739 static void print_tags(struct driver_data *dd,
740 char *msg,
741 unsigned long *tagbits)
742 {
743 unsigned int tag, count = 0;
744
745 for (tag = 0; tag < (dd->slot_groups) * 32; tag++) {
746 if (test_bit(tag, tagbits))
747 count++;
748 }
749 if (count)
750 dev_info(&dd->pdev->dev, "%s [%i tags]\n", msg, count);
751 }
752
753 static int mtip_read_log_page(struct mtip_port *port, u8 page, u16 *buffer,
754 dma_addr_t buffer_dma, unsigned int sectors);
755 static int mtip_get_smart_attr(struct mtip_port *port, unsigned int id,
756 struct smart_attr *attrib);
757 /*
758 * Handle an error.
759 *
760 * @dd Pointer to the DRIVER_DATA structure.
761 *
762 * return value
763 * None
764 */
765 static void mtip_handle_tfe(struct driver_data *dd)
766 {
767 int group, tag, bit, reissue, rv;
768 struct mtip_port *port;
769 struct mtip_cmd *cmd;
770 u32 completed;
771 struct host_to_dev_fis *fis;
772 unsigned long tagaccum[SLOTBITS_IN_LONGS];
773 unsigned char *buf;
774 char *fail_reason = NULL;
775 int fail_all_ncq_write = 0, fail_all_ncq_cmds = 0;
776
777 dev_warn(&dd->pdev->dev, "Taskfile error\n");
778
779 port = dd->port;
780
781 /* Stop the timer to prevent command timeouts. */
782 del_timer(&port->cmd_timer);
783
784 /* Set eh_active */
785 set_bit(MTIP_PF_EH_ACTIVE_BIT, &port->flags);
786
787 /* Loop through all the groups */
788 for (group = 0; group < dd->slot_groups; group++) {
789 completed = readl(port->completed[group]);
790
791 /* clear completed status register in the hardware.*/
792 writel(completed, port->completed[group]);
793
794 /* clear the tag accumulator */
795 memset(tagaccum, 0, SLOTBITS_IN_LONGS * sizeof(long));
796
797 /* Process successfully completed commands */
798 for (bit = 0; bit < 32 && completed; bit++) {
799 if (!(completed & (1<<bit)))
800 continue;
801 tag = (group << 5) + bit;
802
803 /* Skip the internal command slot */
804 if (tag == MTIP_TAG_INTERNAL)
805 continue;
806
807 cmd = &port->commands[tag];
808 if (likely(cmd->comp_func)) {
809 set_bit(tag, tagaccum);
810 atomic_set(&cmd->active, 0);
811 cmd->comp_func(port,
812 tag,
813 cmd->comp_data,
814 0);
815 } else {
816 dev_err(&port->dd->pdev->dev,
817 "Missing completion func for tag %d",
818 tag);
819 if (mtip_check_surprise_removal(dd->pdev)) {
820 mtip_command_cleanup(dd);
821 /* don't proceed further */
822 return;
823 }
824 }
825 }
826 }
827 print_tags(dd, "TFE tags completed:", tagaccum);
828
829 /* Restart the port */
830 mdelay(20);
831 mtip_restart_port(port);
832
833 /* Trying to determine the cause of the error */
834 rv = mtip_read_log_page(dd->port, ATA_LOG_SATA_NCQ,
835 dd->port->log_buf,
836 dd->port->log_buf_dma, 1);
837 if (rv) {
838 dev_warn(&dd->pdev->dev,
839 "Error in READ LOG EXT (10h) command\n");
840 /* non-critical error, don't fail the load */
841 } else {
842 buf = (unsigned char *)dd->port->log_buf;
843 if (buf[259] & 0x1) {
844 dev_info(&dd->pdev->dev,
845 "Write protect bit is set.\n");
846 set_bit(MTIP_DDF_WRITE_PROTECT_BIT, &dd->dd_flag);
847 fail_all_ncq_write = 1;
848 fail_reason = "write protect";
849 }
850 if (buf[288] == 0xF7) {
851 dev_info(&dd->pdev->dev,
852 "Exceeded Tmax, drive in thermal shutdown.\n");
853 set_bit(MTIP_DDF_OVER_TEMP_BIT, &dd->dd_flag);
854 fail_all_ncq_cmds = 1;
855 fail_reason = "thermal shutdown";
856 }
857 if (buf[288] == 0xBF) {
858 dev_info(&dd->pdev->dev,
859 "Drive indicates rebuild has failed.\n");
860 fail_all_ncq_cmds = 1;
861 fail_reason = "rebuild failed";
862 }
863 }
864
865 /* clear the tag accumulator */
866 memset(tagaccum, 0, SLOTBITS_IN_LONGS * sizeof(long));
867
868 /* Loop through all the groups */
869 for (group = 0; group < dd->slot_groups; group++) {
870 for (bit = 0; bit < 32; bit++) {
871 reissue = 1;
872 tag = (group << 5) + bit;
873 cmd = &port->commands[tag];
874
875 /* If the active bit is set re-issue the command */
876 if (atomic_read(&cmd->active) == 0)
877 continue;
878
879 fis = (struct host_to_dev_fis *)cmd->command;
880
881 /* Should re-issue? */
882 if (tag == MTIP_TAG_INTERNAL ||
883 fis->command == ATA_CMD_SET_FEATURES)
884 reissue = 0;
885 else {
886 if (fail_all_ncq_cmds ||
887 (fail_all_ncq_write &&
888 fis->command == ATA_CMD_FPDMA_WRITE)) {
889 dev_warn(&dd->pdev->dev,
890 " Fail: %s w/tag %d [%s].\n",
891 fis->command == ATA_CMD_FPDMA_WRITE ?
892 "write" : "read",
893 tag,
894 fail_reason != NULL ?
895 fail_reason : "unknown");
896 atomic_set(&cmd->active, 0);
897 if (cmd->comp_func) {
898 cmd->comp_func(port, tag,
899 cmd->comp_data,
900 -ENODATA);
901 }
902 continue;
903 }
904 }
905
906 /*
907 * First check if this command has
908 * exceeded its retries.
909 */
910 if (reissue && (cmd->retries-- > 0)) {
911
912 set_bit(tag, tagaccum);
913
914 /* Re-issue the command. */
915 mtip_issue_ncq_command(port, tag);
916
917 continue;
918 }
919
920 /* Retire a command that will not be reissued */
921 dev_warn(&port->dd->pdev->dev,
922 "retiring tag %d\n", tag);
923 atomic_set(&cmd->active, 0);
924
925 if (cmd->comp_func)
926 cmd->comp_func(
927 port,
928 tag,
929 cmd->comp_data,
930 PORT_IRQ_TF_ERR);
931 else
932 dev_warn(&port->dd->pdev->dev,
933 "Bad completion for tag %d\n",
934 tag);
935 }
936 }
937 print_tags(dd, "TFE tags reissued:", tagaccum);
938
939 /* clear eh_active */
940 clear_bit(MTIP_PF_EH_ACTIVE_BIT, &port->flags);
941 wake_up_interruptible(&port->svc_wait);
942
943 mod_timer(&port->cmd_timer,
944 jiffies + msecs_to_jiffies(MTIP_TIMEOUT_CHECK_PERIOD));
945 }
946
947 /*
948 * Handle a set device bits interrupt
949 */
950 static inline void mtip_process_sdbf(struct driver_data *dd)
951 {
952 struct mtip_port *port = dd->port;
953 int group, tag, bit;
954 u32 completed;
955 struct mtip_cmd *command;
956
957 /* walk all bits in all slot groups */
958 for (group = 0; group < dd->slot_groups; group++) {
959 completed = readl(port->completed[group]);
960
961 /* clear completed status register in the hardware.*/
962 writel(completed, port->completed[group]);
963
964 /* Process completed commands. */
965 for (bit = 0;
966 (bit < 32) && completed;
967 bit++, completed >>= 1) {
968 if (completed & 0x01) {
969 tag = (group << 5) | bit;
970
971 /* skip internal command slot. */
972 if (unlikely(tag == MTIP_TAG_INTERNAL))
973 continue;
974
975 command = &port->commands[tag];
976 /* make internal callback */
977 if (likely(command->comp_func)) {
978 command->comp_func(
979 port,
980 tag,
981 command->comp_data,
982 0);
983 } else {
984 dev_warn(&dd->pdev->dev,
985 "Null completion "
986 "for tag %d",
987 tag);
988
989 if (mtip_check_surprise_removal(
990 dd->pdev)) {
991 mtip_command_cleanup(dd);
992 return;
993 }
994 }
995 }
996 }
997 }
998 }
999
1000 /*
1001 * Process legacy pio and d2h interrupts
1002 */
1003 static inline void mtip_process_legacy(struct driver_data *dd, u32 port_stat)
1004 {
1005 struct mtip_port *port = dd->port;
1006 struct mtip_cmd *cmd = &port->commands[MTIP_TAG_INTERNAL];
1007
1008 if (test_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags) &&
1009 (cmd != NULL) && !(readl(port->cmd_issue[MTIP_TAG_INTERNAL])
1010 & (1 << MTIP_TAG_INTERNAL))) {
1011 if (cmd->comp_func) {
1012 cmd->comp_func(port,
1013 MTIP_TAG_INTERNAL,
1014 cmd->comp_data,
1015 0);
1016 return;
1017 }
1018 }
1019
1020 return;
1021 }
1022
1023 /*
1024 * Demux and handle errors
1025 */
1026 static inline void mtip_process_errors(struct driver_data *dd, u32 port_stat)
1027 {
1028 if (likely(port_stat & (PORT_IRQ_TF_ERR | PORT_IRQ_IF_ERR)))
1029 mtip_handle_tfe(dd);
1030
1031 if (unlikely(port_stat & PORT_IRQ_CONNECT)) {
1032 dev_warn(&dd->pdev->dev,
1033 "Clearing PxSERR.DIAG.x\n");
1034 writel((1 << 26), dd->port->mmio + PORT_SCR_ERR);
1035 }
1036
1037 if (unlikely(port_stat & PORT_IRQ_PHYRDY)) {
1038 dev_warn(&dd->pdev->dev,
1039 "Clearing PxSERR.DIAG.n\n");
1040 writel((1 << 16), dd->port->mmio + PORT_SCR_ERR);
1041 }
1042
1043 if (unlikely(port_stat & ~PORT_IRQ_HANDLED)) {
1044 dev_warn(&dd->pdev->dev,
1045 "Port stat errors %x unhandled\n",
1046 (port_stat & ~PORT_IRQ_HANDLED));
1047 }
1048 }
1049
1050 static inline irqreturn_t mtip_handle_irq(struct driver_data *data)
1051 {
1052 struct driver_data *dd = (struct driver_data *) data;
1053 struct mtip_port *port = dd->port;
1054 u32 hba_stat, port_stat;
1055 int rv = IRQ_NONE;
1056
1057 hba_stat = readl(dd->mmio + HOST_IRQ_STAT);
1058 if (hba_stat) {
1059 rv = IRQ_HANDLED;
1060
1061 /* Acknowledge the interrupt status on the port.*/
1062 port_stat = readl(port->mmio + PORT_IRQ_STAT);
1063 writel(port_stat, port->mmio + PORT_IRQ_STAT);
1064
1065 /* Demux port status */
1066 if (likely(port_stat & PORT_IRQ_SDB_FIS))
1067 mtip_process_sdbf(dd);
1068
1069 if (unlikely(port_stat & PORT_IRQ_ERR)) {
1070 if (unlikely(mtip_check_surprise_removal(dd->pdev))) {
1071 mtip_command_cleanup(dd);
1072 /* don't proceed further */
1073 return IRQ_HANDLED;
1074 }
1075 if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT,
1076 &dd->dd_flag))
1077 return rv;
1078
1079 mtip_process_errors(dd, port_stat & PORT_IRQ_ERR);
1080 }
1081
1082 if (unlikely(port_stat & PORT_IRQ_LEGACY))
1083 mtip_process_legacy(dd, port_stat & PORT_IRQ_LEGACY);
1084 }
1085
1086 /* acknowledge interrupt */
1087 writel(hba_stat, dd->mmio + HOST_IRQ_STAT);
1088
1089 return rv;
1090 }
1091
1092 /*
1093 * Wrapper for mtip_handle_irq
1094 * (ignores return code)
1095 */
1096 static void mtip_tasklet(unsigned long data)
1097 {
1098 mtip_handle_irq((struct driver_data *) data);
1099 }
1100
1101 /*
1102 * HBA interrupt subroutine.
1103 *
1104 * @irq IRQ number.
1105 * @instance Pointer to the driver data structure.
1106 *
1107 * return value
1108 * IRQ_HANDLED A HBA interrupt was pending and handled.
1109 * IRQ_NONE This interrupt was not for the HBA.
1110 */
1111 static irqreturn_t mtip_irq_handler(int irq, void *instance)
1112 {
1113 struct driver_data *dd = instance;
1114 tasklet_schedule(&dd->tasklet);
1115 return IRQ_HANDLED;
1116 }
1117
1118 static void mtip_issue_non_ncq_command(struct mtip_port *port, int tag)
1119 {
1120 atomic_set(&port->commands[tag].active, 1);
1121 writel(1 << MTIP_TAG_BIT(tag),
1122 port->cmd_issue[MTIP_TAG_INDEX(tag)]);
1123 }
1124
1125 static bool mtip_pause_ncq(struct mtip_port *port,
1126 struct host_to_dev_fis *fis)
1127 {
1128 struct host_to_dev_fis *reply;
1129 unsigned long task_file_data;
1130
1131 reply = port->rxfis + RX_FIS_D2H_REG;
1132 task_file_data = readl(port->mmio+PORT_TFDATA);
1133
1134 if ((task_file_data & 1) || (fis->command == ATA_CMD_SEC_ERASE_UNIT))
1135 return false;
1136
1137 if (fis->command == ATA_CMD_SEC_ERASE_PREP) {
1138 set_bit(MTIP_PF_SE_ACTIVE_BIT, &port->flags);
1139 port->ic_pause_timer = jiffies;
1140 return true;
1141 } else if ((fis->command == ATA_CMD_DOWNLOAD_MICRO) &&
1142 (fis->features == 0x03)) {
1143 set_bit(MTIP_PF_DM_ACTIVE_BIT, &port->flags);
1144 port->ic_pause_timer = jiffies;
1145 return true;
1146 } else if ((fis->command == ATA_CMD_SEC_ERASE_UNIT) ||
1147 ((fis->command == 0xFC) &&
1148 (fis->features == 0x27 || fis->features == 0x72 ||
1149 fis->features == 0x62 || fis->features == 0x26))) {
1150 /* Com reset after secure erase or lowlevel format */
1151 mtip_restart_port(port);
1152 return false;
1153 }
1154
1155 return false;
1156 }
1157
1158 /*
1159 * Wait for port to quiesce
1160 *
1161 * @port Pointer to port data structure
1162 * @timeout Max duration to wait (ms)
1163 *
1164 * return value
1165 * 0 Success
1166 * -EBUSY Commands still active
1167 */
1168 static int mtip_quiesce_io(struct mtip_port *port, unsigned long timeout)
1169 {
1170 unsigned long to;
1171 unsigned int n;
1172 unsigned int active = 1;
1173
1174 to = jiffies + msecs_to_jiffies(timeout);
1175 do {
1176 if (test_bit(MTIP_PF_SVC_THD_ACTIVE_BIT, &port->flags) &&
1177 test_bit(MTIP_PF_ISSUE_CMDS_BIT, &port->flags)) {
1178 msleep(20);
1179 continue; /* svc thd is actively issuing commands */
1180 }
1181 if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &port->dd->dd_flag))
1182 return -EFAULT;
1183 /*
1184 * Ignore s_active bit 0 of array element 0.
1185 * This bit will always be set
1186 */
1187 active = readl(port->s_active[0]) & 0xFFFFFFFE;
1188 for (n = 1; n < port->dd->slot_groups; n++)
1189 active |= readl(port->s_active[n]);
1190
1191 if (!active)
1192 break;
1193
1194 msleep(20);
1195 } while (time_before(jiffies, to));
1196
1197 return active ? -EBUSY : 0;
1198 }
1199
1200 /*
1201 * Execute an internal command and wait for the completion.
1202 *
1203 * @port Pointer to the port data structure.
1204 * @fis Pointer to the FIS that describes the command.
1205 * @fis_len Length in WORDS of the FIS.
1206 * @buffer DMA accessible for command data.
1207 * @buf_len Length, in bytes, of the data buffer.
1208 * @opts Command header options, excluding the FIS length
1209 * and the number of PRD entries.
1210 * @timeout Time in ms to wait for the command to complete.
1211 *
1212 * return value
1213 * 0 Command completed successfully.
1214 * -EFAULT The buffer address is not correctly aligned.
1215 * -EBUSY Internal command or other IO in progress.
1216 * -EAGAIN Time out waiting for command to complete.
1217 */
1218 static int mtip_exec_internal_command(struct mtip_port *port,
1219 struct host_to_dev_fis *fis,
1220 int fis_len,
1221 dma_addr_t buffer,
1222 int buf_len,
1223 u32 opts,
1224 gfp_t atomic,
1225 unsigned long timeout)
1226 {
1227 struct mtip_cmd_sg *command_sg;
1228 DECLARE_COMPLETION_ONSTACK(wait);
1229 int rv = 0, ready2go = 1;
1230 struct mtip_cmd *int_cmd = &port->commands[MTIP_TAG_INTERNAL];
1231 unsigned long to;
1232
1233 /* Make sure the buffer is 8 byte aligned. This is asic specific. */
1234 if (buffer & 0x00000007) {
1235 dev_err(&port->dd->pdev->dev,
1236 "SG buffer is not 8 byte aligned\n");
1237 return -EFAULT;
1238 }
1239
1240 to = jiffies + msecs_to_jiffies(timeout);
1241 do {
1242 ready2go = !test_and_set_bit(MTIP_TAG_INTERNAL,
1243 port->allocated);
1244 if (ready2go)
1245 break;
1246 mdelay(100);
1247 } while (time_before(jiffies, to));
1248 if (!ready2go) {
1249 dev_warn(&port->dd->pdev->dev,
1250 "Internal cmd active. new cmd [%02X]\n", fis->command);
1251 return -EBUSY;
1252 }
1253 set_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags);
1254 port->ic_pause_timer = 0;
1255
1256 if (fis->command == ATA_CMD_SEC_ERASE_UNIT)
1257 clear_bit(MTIP_PF_SE_ACTIVE_BIT, &port->flags);
1258 else if (fis->command == ATA_CMD_DOWNLOAD_MICRO)
1259 clear_bit(MTIP_PF_DM_ACTIVE_BIT, &port->flags);
1260
1261 if (atomic == GFP_KERNEL) {
1262 if (fis->command != ATA_CMD_STANDBYNOW1) {
1263 /* wait for io to complete if non atomic */
1264 if (mtip_quiesce_io(port, 5000) < 0) {
1265 dev_warn(&port->dd->pdev->dev,
1266 "Failed to quiesce IO\n");
1267 release_slot(port, MTIP_TAG_INTERNAL);
1268 clear_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags);
1269 wake_up_interruptible(&port->svc_wait);
1270 return -EBUSY;
1271 }
1272 }
1273
1274 /* Set the completion function and data for the command. */
1275 int_cmd->comp_data = &wait;
1276 int_cmd->comp_func = mtip_completion;
1277
1278 } else {
1279 /* Clear completion - we're going to poll */
1280 int_cmd->comp_data = NULL;
1281 int_cmd->comp_func = mtip_null_completion;
1282 }
1283
1284 /* Copy the command to the command table */
1285 memcpy(int_cmd->command, fis, fis_len*4);
1286
1287 /* Populate the SG list */
1288 int_cmd->command_header->opts =
1289 __force_bit2int cpu_to_le32(opts | fis_len);
1290 if (buf_len) {
1291 command_sg = int_cmd->command + AHCI_CMD_TBL_HDR_SZ;
1292
1293 command_sg->info =
1294 __force_bit2int cpu_to_le32((buf_len-1) & 0x3FFFFF);
1295 command_sg->dba =
1296 __force_bit2int cpu_to_le32(buffer & 0xFFFFFFFF);
1297 command_sg->dba_upper =
1298 __force_bit2int cpu_to_le32((buffer >> 16) >> 16);
1299
1300 int_cmd->command_header->opts |=
1301 __force_bit2int cpu_to_le32((1 << 16));
1302 }
1303
1304 /* Populate the command header */
1305 int_cmd->command_header->byte_count = 0;
1306
1307 /* Issue the command to the hardware */
1308 mtip_issue_non_ncq_command(port, MTIP_TAG_INTERNAL);
1309
1310 /* Poll if atomic, wait_for_completion otherwise */
1311 if (atomic == GFP_KERNEL) {
1312 /* Wait for the command to complete or timeout. */
1313 if (wait_for_completion_timeout(
1314 &wait,
1315 msecs_to_jiffies(timeout)) == 0) {
1316 dev_err(&port->dd->pdev->dev,
1317 "Internal command did not complete [%d] "
1318 "within timeout of %lu ms\n",
1319 atomic, timeout);
1320 if (mtip_check_surprise_removal(port->dd->pdev) ||
1321 test_bit(MTIP_DDF_REMOVE_PENDING_BIT,
1322 &port->dd->dd_flag)) {
1323 rv = -ENXIO;
1324 goto exec_ic_exit;
1325 }
1326 rv = -EAGAIN;
1327 }
1328
1329 if (readl(port->cmd_issue[MTIP_TAG_INTERNAL])
1330 & (1 << MTIP_TAG_INTERNAL)) {
1331 dev_warn(&port->dd->pdev->dev,
1332 "Retiring internal command but CI is 1.\n");
1333 if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT,
1334 &port->dd->dd_flag)) {
1335 hba_reset_nosleep(port->dd);
1336 rv = -ENXIO;
1337 } else {
1338 mtip_restart_port(port);
1339 rv = -EAGAIN;
1340 }
1341 goto exec_ic_exit;
1342 }
1343
1344 } else {
1345 /* Spin for <timeout> checking if command still outstanding */
1346 timeout = jiffies + msecs_to_jiffies(timeout);
1347 while ((readl(port->cmd_issue[MTIP_TAG_INTERNAL])
1348 & (1 << MTIP_TAG_INTERNAL))
1349 && time_before(jiffies, timeout)) {
1350 if (mtip_check_surprise_removal(port->dd->pdev)) {
1351 rv = -ENXIO;
1352 goto exec_ic_exit;
1353 }
1354 if ((fis->command != ATA_CMD_STANDBYNOW1) &&
1355 test_bit(MTIP_DDF_REMOVE_PENDING_BIT,
1356 &port->dd->dd_flag)) {
1357 rv = -ENXIO;
1358 goto exec_ic_exit;
1359 }
1360 }
1361
1362 if (readl(port->cmd_issue[MTIP_TAG_INTERNAL])
1363 & (1 << MTIP_TAG_INTERNAL)) {
1364 dev_err(&port->dd->pdev->dev,
1365 "Internal command did not complete [atomic]\n");
1366 rv = -EAGAIN;
1367 if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT,
1368 &port->dd->dd_flag)) {
1369 hba_reset_nosleep(port->dd);
1370 rv = -ENXIO;
1371 } else {
1372 mtip_restart_port(port);
1373 rv = -EAGAIN;
1374 }
1375 }
1376 }
1377 exec_ic_exit:
1378 /* Clear the allocated and active bits for the internal command. */
1379 atomic_set(&int_cmd->active, 0);
1380 release_slot(port, MTIP_TAG_INTERNAL);
1381 if (rv >= 0 && mtip_pause_ncq(port, fis)) {
1382 /* NCQ paused */
1383 return rv;
1384 }
1385 clear_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags);
1386 wake_up_interruptible(&port->svc_wait);
1387
1388 return rv;
1389 }
1390
1391 /*
1392 * Byte-swap ATA ID strings.
1393 *
1394 * ATA identify data contains strings in byte-swapped 16-bit words.
1395 * They must be swapped (on all architectures) to be usable as C strings.
1396 * This function swaps bytes in-place.
1397 *
1398 * @buf The buffer location of the string
1399 * @len The number of bytes to swap
1400 *
1401 * return value
1402 * None
1403 */
1404 static inline void ata_swap_string(u16 *buf, unsigned int len)
1405 {
1406 int i;
1407 for (i = 0; i < (len/2); i++)
1408 be16_to_cpus(&buf[i]);
1409 }
1410
1411 /*
1412 * Request the device identity information.
1413 *
1414 * If a user space buffer is not specified, i.e. is NULL, the
1415 * identify information is still read from the drive and placed
1416 * into the identify data buffer (@e port->identify) in the
1417 * port data structure.
1418 * When the identify buffer contains valid identify information @e
1419 * port->identify_valid is non-zero.
1420 *
1421 * @port Pointer to the port structure.
1422 * @user_buffer A user space buffer where the identify data should be
1423 * copied.
1424 *
1425 * return value
1426 * 0 Command completed successfully.
1427 * -EFAULT An error occurred while coping data to the user buffer.
1428 * -1 Command failed.
1429 */
1430 static int mtip_get_identify(struct mtip_port *port, void __user *user_buffer)
1431 {
1432 int rv = 0;
1433 struct host_to_dev_fis fis;
1434
1435 if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &port->dd->dd_flag))
1436 return -EFAULT;
1437
1438 /* Build the FIS. */
1439 memset(&fis, 0, sizeof(struct host_to_dev_fis));
1440 fis.type = 0x27;
1441 fis.opts = 1 << 7;
1442 fis.command = ATA_CMD_ID_ATA;
1443
1444 /* Set the identify information as invalid. */
1445 port->identify_valid = 0;
1446
1447 /* Clear the identify information. */
1448 memset(port->identify, 0, sizeof(u16) * ATA_ID_WORDS);
1449
1450 /* Execute the command. */
1451 if (mtip_exec_internal_command(port,
1452 &fis,
1453 5,
1454 port->identify_dma,
1455 sizeof(u16) * ATA_ID_WORDS,
1456 0,
1457 GFP_KERNEL,
1458 MTIP_INTERNAL_COMMAND_TIMEOUT_MS)
1459 < 0) {
1460 rv = -1;
1461 goto out;
1462 }
1463
1464 /*
1465 * Perform any necessary byte-swapping. Yes, the kernel does in fact
1466 * perform field-sensitive swapping on the string fields.
1467 * See the kernel use of ata_id_string() for proof of this.
1468 */
1469 #ifdef __LITTLE_ENDIAN
1470 ata_swap_string(port->identify + 27, 40); /* model string*/
1471 ata_swap_string(port->identify + 23, 8); /* firmware string*/
1472 ata_swap_string(port->identify + 10, 20); /* serial# string*/
1473 #else
1474 {
1475 int i;
1476 for (i = 0; i < ATA_ID_WORDS; i++)
1477 port->identify[i] = le16_to_cpu(port->identify[i]);
1478 }
1479 #endif
1480
1481 /* Set the identify buffer as valid. */
1482 port->identify_valid = 1;
1483
1484 if (user_buffer) {
1485 if (copy_to_user(
1486 user_buffer,
1487 port->identify,
1488 ATA_ID_WORDS * sizeof(u16))) {
1489 rv = -EFAULT;
1490 goto out;
1491 }
1492 }
1493
1494 out:
1495 return rv;
1496 }
1497
1498 /*
1499 * Issue a standby immediate command to the device.
1500 *
1501 * @port Pointer to the port structure.
1502 *
1503 * return value
1504 * 0 Command was executed successfully.
1505 * -1 An error occurred while executing the command.
1506 */
1507 static int mtip_standby_immediate(struct mtip_port *port)
1508 {
1509 int rv;
1510 struct host_to_dev_fis fis;
1511 unsigned long start;
1512
1513 /* Build the FIS. */
1514 memset(&fis, 0, sizeof(struct host_to_dev_fis));
1515 fis.type = 0x27;
1516 fis.opts = 1 << 7;
1517 fis.command = ATA_CMD_STANDBYNOW1;
1518
1519 start = jiffies;
1520 rv = mtip_exec_internal_command(port,
1521 &fis,
1522 5,
1523 0,
1524 0,
1525 0,
1526 GFP_ATOMIC,
1527 15000);
1528 dbg_printk(MTIP_DRV_NAME "Time taken to complete standby cmd: %d ms\n",
1529 jiffies_to_msecs(jiffies - start));
1530 if (rv)
1531 dev_warn(&port->dd->pdev->dev,
1532 "STANDBY IMMEDIATE command failed.\n");
1533
1534 return rv;
1535 }
1536
1537 /*
1538 * Issue a READ LOG EXT command to the device.
1539 *
1540 * @port pointer to the port structure.
1541 * @page page number to fetch
1542 * @buffer pointer to buffer
1543 * @buffer_dma dma address corresponding to @buffer
1544 * @sectors page length to fetch, in sectors
1545 *
1546 * return value
1547 * @rv return value from mtip_exec_internal_command()
1548 */
1549 static int mtip_read_log_page(struct mtip_port *port, u8 page, u16 *buffer,
1550 dma_addr_t buffer_dma, unsigned int sectors)
1551 {
1552 struct host_to_dev_fis fis;
1553
1554 memset(&fis, 0, sizeof(struct host_to_dev_fis));
1555 fis.type = 0x27;
1556 fis.opts = 1 << 7;
1557 fis.command = ATA_CMD_READ_LOG_EXT;
1558 fis.sect_count = sectors & 0xFF;
1559 fis.sect_cnt_ex = (sectors >> 8) & 0xFF;
1560 fis.lba_low = page;
1561 fis.lba_mid = 0;
1562 fis.device = ATA_DEVICE_OBS;
1563
1564 memset(buffer, 0, sectors * ATA_SECT_SIZE);
1565
1566 return mtip_exec_internal_command(port,
1567 &fis,
1568 5,
1569 buffer_dma,
1570 sectors * ATA_SECT_SIZE,
1571 0,
1572 GFP_ATOMIC,
1573 MTIP_INTERNAL_COMMAND_TIMEOUT_MS);
1574 }
1575
1576 /*
1577 * Issue a SMART READ DATA command to the device.
1578 *
1579 * @port pointer to the port structure.
1580 * @buffer pointer to buffer
1581 * @buffer_dma dma address corresponding to @buffer
1582 *
1583 * return value
1584 * @rv return value from mtip_exec_internal_command()
1585 */
1586 static int mtip_get_smart_data(struct mtip_port *port, u8 *buffer,
1587 dma_addr_t buffer_dma)
1588 {
1589 struct host_to_dev_fis fis;
1590
1591 memset(&fis, 0, sizeof(struct host_to_dev_fis));
1592 fis.type = 0x27;
1593 fis.opts = 1 << 7;
1594 fis.command = ATA_CMD_SMART;
1595 fis.features = 0xD0;
1596 fis.sect_count = 1;
1597 fis.lba_mid = 0x4F;
1598 fis.lba_hi = 0xC2;
1599 fis.device = ATA_DEVICE_OBS;
1600
1601 return mtip_exec_internal_command(port,
1602 &fis,
1603 5,
1604 buffer_dma,
1605 ATA_SECT_SIZE,
1606 0,
1607 GFP_ATOMIC,
1608 15000);
1609 }
1610
1611 /*
1612 * Get the value of a smart attribute
1613 *
1614 * @port pointer to the port structure
1615 * @id attribute number
1616 * @attrib pointer to return attrib information corresponding to @id
1617 *
1618 * return value
1619 * -EINVAL NULL buffer passed or unsupported attribute @id.
1620 * -EPERM Identify data not valid, SMART not supported or not enabled
1621 */
1622 static int mtip_get_smart_attr(struct mtip_port *port, unsigned int id,
1623 struct smart_attr *attrib)
1624 {
1625 int rv, i;
1626 struct smart_attr *pattr;
1627
1628 if (!attrib)
1629 return -EINVAL;
1630
1631 if (!port->identify_valid) {
1632 dev_warn(&port->dd->pdev->dev, "IDENTIFY DATA not valid\n");
1633 return -EPERM;
1634 }
1635 if (!(port->identify[82] & 0x1)) {
1636 dev_warn(&port->dd->pdev->dev, "SMART not supported\n");
1637 return -EPERM;
1638 }
1639 if (!(port->identify[85] & 0x1)) {
1640 dev_warn(&port->dd->pdev->dev, "SMART not enabled\n");
1641 return -EPERM;
1642 }
1643
1644 memset(port->smart_buf, 0, ATA_SECT_SIZE);
1645 rv = mtip_get_smart_data(port, port->smart_buf, port->smart_buf_dma);
1646 if (rv) {
1647 dev_warn(&port->dd->pdev->dev, "Failed to ge SMART data\n");
1648 return rv;
1649 }
1650
1651 pattr = (struct smart_attr *)(port->smart_buf + 2);
1652 for (i = 0; i < 29; i++, pattr++)
1653 if (pattr->attr_id == id) {
1654 memcpy(attrib, pattr, sizeof(struct smart_attr));
1655 break;
1656 }
1657
1658 if (i == 29) {
1659 dev_warn(&port->dd->pdev->dev,
1660 "Query for invalid SMART attribute ID\n");
1661 rv = -EINVAL;
1662 }
1663
1664 return rv;
1665 }
1666
1667 /*
1668 * Get the drive capacity.
1669 *
1670 * @dd Pointer to the device data structure.
1671 * @sectors Pointer to the variable that will receive the sector count.
1672 *
1673 * return value
1674 * 1 Capacity was returned successfully.
1675 * 0 The identify information is invalid.
1676 */
1677 static bool mtip_hw_get_capacity(struct driver_data *dd, sector_t *sectors)
1678 {
1679 struct mtip_port *port = dd->port;
1680 u64 total, raw0, raw1, raw2, raw3;
1681 raw0 = port->identify[100];
1682 raw1 = port->identify[101];
1683 raw2 = port->identify[102];
1684 raw3 = port->identify[103];
1685 total = raw0 | raw1<<16 | raw2<<32 | raw3<<48;
1686 *sectors = total;
1687 return (bool) !!port->identify_valid;
1688 }
1689
1690 /*
1691 * Reset the HBA.
1692 *
1693 * Resets the HBA by setting the HBA Reset bit in the Global
1694 * HBA Control register. After setting the HBA Reset bit the
1695 * function waits for 1 second before reading the HBA Reset
1696 * bit to make sure it has cleared. If HBA Reset is not clear
1697 * an error is returned. Cannot be used in non-blockable
1698 * context.
1699 *
1700 * @dd Pointer to the driver data structure.
1701 *
1702 * return value
1703 * 0 The reset was successful.
1704 * -1 The HBA Reset bit did not clear.
1705 */
1706 static int mtip_hba_reset(struct driver_data *dd)
1707 {
1708 mtip_deinit_port(dd->port);
1709
1710 /* Set the reset bit */
1711 writel(HOST_RESET, dd->mmio + HOST_CTL);
1712
1713 /* Flush */
1714 readl(dd->mmio + HOST_CTL);
1715
1716 /* Wait for reset to clear */
1717 ssleep(1);
1718
1719 /* Check the bit has cleared */
1720 if (readl(dd->mmio + HOST_CTL) & HOST_RESET) {
1721 dev_err(&dd->pdev->dev,
1722 "Reset bit did not clear.\n");
1723 return -1;
1724 }
1725
1726 return 0;
1727 }
1728
1729 /*
1730 * Display the identify command data.
1731 *
1732 * @port Pointer to the port data structure.
1733 *
1734 * return value
1735 * None
1736 */
1737 static void mtip_dump_identify(struct mtip_port *port)
1738 {
1739 sector_t sectors;
1740 unsigned short revid;
1741 char cbuf[42];
1742
1743 if (!port->identify_valid)
1744 return;
1745
1746 strlcpy(cbuf, (char *)(port->identify+10), 21);
1747 dev_info(&port->dd->pdev->dev,
1748 "Serial No.: %s\n", cbuf);
1749
1750 strlcpy(cbuf, (char *)(port->identify+23), 9);
1751 dev_info(&port->dd->pdev->dev,
1752 "Firmware Ver.: %s\n", cbuf);
1753
1754 strlcpy(cbuf, (char *)(port->identify+27), 41);
1755 dev_info(&port->dd->pdev->dev, "Model: %s\n", cbuf);
1756
1757 if (mtip_hw_get_capacity(port->dd, &sectors))
1758 dev_info(&port->dd->pdev->dev,
1759 "Capacity: %llu sectors (%llu MB)\n",
1760 (u64)sectors,
1761 ((u64)sectors) * ATA_SECT_SIZE >> 20);
1762
1763 pci_read_config_word(port->dd->pdev, PCI_REVISION_ID, &revid);
1764 switch (revid & 0xFF) {
1765 case 0x1:
1766 strlcpy(cbuf, "A0", 3);
1767 break;
1768 case 0x3:
1769 strlcpy(cbuf, "A2", 3);
1770 break;
1771 default:
1772 strlcpy(cbuf, "?", 2);
1773 break;
1774 }
1775 dev_info(&port->dd->pdev->dev,
1776 "Card Type: %s\n", cbuf);
1777 }
1778
1779 /*
1780 * Map the commands scatter list into the command table.
1781 *
1782 * @command Pointer to the command.
1783 * @nents Number of scatter list entries.
1784 *
1785 * return value
1786 * None
1787 */
1788 static inline void fill_command_sg(struct driver_data *dd,
1789 struct mtip_cmd *command,
1790 int nents)
1791 {
1792 int n;
1793 unsigned int dma_len;
1794 struct mtip_cmd_sg *command_sg;
1795 struct scatterlist *sg = command->sg;
1796
1797 command_sg = command->command + AHCI_CMD_TBL_HDR_SZ;
1798
1799 for (n = 0; n < nents; n++) {
1800 dma_len = sg_dma_len(sg);
1801 if (dma_len > 0x400000)
1802 dev_err(&dd->pdev->dev,
1803 "DMA segment length truncated\n");
1804 command_sg->info = __force_bit2int
1805 cpu_to_le32((dma_len-1) & 0x3FFFFF);
1806 command_sg->dba = __force_bit2int
1807 cpu_to_le32(sg_dma_address(sg));
1808 command_sg->dba_upper = __force_bit2int
1809 cpu_to_le32((sg_dma_address(sg) >> 16) >> 16);
1810 command_sg++;
1811 sg++;
1812 }
1813 }
1814
1815 /*
1816 * @brief Execute a drive command.
1817 *
1818 * return value 0 The command completed successfully.
1819 * return value -1 An error occurred while executing the command.
1820 */
1821 static int exec_drive_task(struct mtip_port *port, u8 *command)
1822 {
1823 struct host_to_dev_fis fis;
1824 struct host_to_dev_fis *reply = (port->rxfis + RX_FIS_D2H_REG);
1825
1826 /* Build the FIS. */
1827 memset(&fis, 0, sizeof(struct host_to_dev_fis));
1828 fis.type = 0x27;
1829 fis.opts = 1 << 7;
1830 fis.command = command[0];
1831 fis.features = command[1];
1832 fis.sect_count = command[2];
1833 fis.sector = command[3];
1834 fis.cyl_low = command[4];
1835 fis.cyl_hi = command[5];
1836 fis.device = command[6] & ~0x10; /* Clear the dev bit*/
1837
1838 dbg_printk(MTIP_DRV_NAME " %s: User Command: cmd %x, feat %x, nsect %x, sect %x, lcyl %x, hcyl %x, sel %x\n",
1839 __func__,
1840 command[0],
1841 command[1],
1842 command[2],
1843 command[3],
1844 command[4],
1845 command[5],
1846 command[6]);
1847
1848 /* Execute the command. */
1849 if (mtip_exec_internal_command(port,
1850 &fis,
1851 5,
1852 0,
1853 0,
1854 0,
1855 GFP_KERNEL,
1856 MTIP_IOCTL_COMMAND_TIMEOUT_MS) < 0) {
1857 return -1;
1858 }
1859
1860 command[0] = reply->command; /* Status*/
1861 command[1] = reply->features; /* Error*/
1862 command[4] = reply->cyl_low;
1863 command[5] = reply->cyl_hi;
1864
1865 dbg_printk(MTIP_DRV_NAME " %s: Completion Status: stat %x, err %x , cyl_lo %x cyl_hi %x\n",
1866 __func__,
1867 command[0],
1868 command[1],
1869 command[4],
1870 command[5]);
1871
1872 return 0;
1873 }
1874
1875 /*
1876 * @brief Execute a drive command.
1877 *
1878 * @param port Pointer to the port data structure.
1879 * @param command Pointer to the user specified command parameters.
1880 * @param user_buffer Pointer to the user space buffer where read sector
1881 * data should be copied.
1882 *
1883 * return value 0 The command completed successfully.
1884 * return value -EFAULT An error occurred while copying the completion
1885 * data to the user space buffer.
1886 * return value -1 An error occurred while executing the command.
1887 */
1888 static int exec_drive_command(struct mtip_port *port, u8 *command,
1889 void __user *user_buffer)
1890 {
1891 struct host_to_dev_fis fis;
1892 struct host_to_dev_fis *reply = (port->rxfis + RX_FIS_D2H_REG);
1893
1894 /* Build the FIS. */
1895 memset(&fis, 0, sizeof(struct host_to_dev_fis));
1896 fis.type = 0x27;
1897 fis.opts = 1 << 7;
1898 fis.command = command[0];
1899 fis.features = command[2];
1900 fis.sect_count = command[3];
1901 if (fis.command == ATA_CMD_SMART) {
1902 fis.sector = command[1];
1903 fis.cyl_low = 0x4F;
1904 fis.cyl_hi = 0xC2;
1905 }
1906
1907 dbg_printk(MTIP_DRV_NAME
1908 " %s: User Command: cmd %x, sect %x, "
1909 "feat %x, sectcnt %x\n",
1910 __func__,
1911 command[0],
1912 command[1],
1913 command[2],
1914 command[3]);
1915
1916 memset(port->sector_buffer, 0x00, ATA_SECT_SIZE);
1917
1918 /* Execute the command. */
1919 if (mtip_exec_internal_command(port,
1920 &fis,
1921 5,
1922 port->sector_buffer_dma,
1923 (command[3] != 0) ? ATA_SECT_SIZE : 0,
1924 0,
1925 GFP_KERNEL,
1926 MTIP_IOCTL_COMMAND_TIMEOUT_MS)
1927 < 0) {
1928 return -1;
1929 }
1930
1931 /* Collect the completion status. */
1932 command[0] = reply->command; /* Status*/
1933 command[1] = reply->features; /* Error*/
1934 command[2] = command[3];
1935
1936 dbg_printk(MTIP_DRV_NAME
1937 " %s: Completion Status: stat %x, "
1938 "err %x, cmd %x\n",
1939 __func__,
1940 command[0],
1941 command[1],
1942 command[2]);
1943
1944 if (user_buffer && command[3]) {
1945 if (copy_to_user(user_buffer,
1946 port->sector_buffer,
1947 ATA_SECT_SIZE * command[3])) {
1948 return -EFAULT;
1949 }
1950 }
1951
1952 return 0;
1953 }
1954
1955 /*
1956 * Indicates whether a command has a single sector payload.
1957 *
1958 * @command passed to the device to perform the certain event.
1959 * @features passed to the device to perform the certain event.
1960 *
1961 * return value
1962 * 1 command is one that always has a single sector payload,
1963 * regardless of the value in the Sector Count field.
1964 * 0 otherwise
1965 *
1966 */
1967 static unsigned int implicit_sector(unsigned char command,
1968 unsigned char features)
1969 {
1970 unsigned int rv = 0;
1971
1972 /* list of commands that have an implicit sector count of 1 */
1973 switch (command) {
1974 case ATA_CMD_SEC_SET_PASS:
1975 case ATA_CMD_SEC_UNLOCK:
1976 case ATA_CMD_SEC_ERASE_PREP:
1977 case ATA_CMD_SEC_ERASE_UNIT:
1978 case ATA_CMD_SEC_FREEZE_LOCK:
1979 case ATA_CMD_SEC_DISABLE_PASS:
1980 case ATA_CMD_PMP_READ:
1981 case ATA_CMD_PMP_WRITE:
1982 rv = 1;
1983 break;
1984 case ATA_CMD_SET_MAX:
1985 if (features == ATA_SET_MAX_UNLOCK)
1986 rv = 1;
1987 break;
1988 case ATA_CMD_SMART:
1989 if ((features == ATA_SMART_READ_VALUES) ||
1990 (features == ATA_SMART_READ_THRESHOLDS))
1991 rv = 1;
1992 break;
1993 case ATA_CMD_CONF_OVERLAY:
1994 if ((features == ATA_DCO_IDENTIFY) ||
1995 (features == ATA_DCO_SET))
1996 rv = 1;
1997 break;
1998 }
1999 return rv;
2000 }
2001
2002 /*
2003 * Executes a taskfile
2004 * See ide_taskfile_ioctl() for derivation
2005 */
2006 static int exec_drive_taskfile(struct driver_data *dd,
2007 void __user *buf,
2008 ide_task_request_t *req_task,
2009 int outtotal)
2010 {
2011 struct host_to_dev_fis fis;
2012 struct host_to_dev_fis *reply;
2013 u8 *outbuf = NULL;
2014 u8 *inbuf = NULL;
2015 dma_addr_t outbuf_dma = 0;
2016 dma_addr_t inbuf_dma = 0;
2017 dma_addr_t dma_buffer = 0;
2018 int err = 0;
2019 unsigned int taskin = 0;
2020 unsigned int taskout = 0;
2021 u8 nsect = 0;
2022 unsigned int timeout = MTIP_IOCTL_COMMAND_TIMEOUT_MS;
2023 unsigned int force_single_sector;
2024 unsigned int transfer_size;
2025 unsigned long task_file_data;
2026 int intotal = outtotal + req_task->out_size;
2027
2028 taskout = req_task->out_size;
2029 taskin = req_task->in_size;
2030 /* 130560 = 512 * 0xFF*/
2031 if (taskin > 130560 || taskout > 130560) {
2032 err = -EINVAL;
2033 goto abort;
2034 }
2035
2036 if (taskout) {
2037 outbuf = kzalloc(taskout, GFP_KERNEL);
2038 if (outbuf == NULL) {
2039 err = -ENOMEM;
2040 goto abort;
2041 }
2042 if (copy_from_user(outbuf, buf + outtotal, taskout)) {
2043 err = -EFAULT;
2044 goto abort;
2045 }
2046 outbuf_dma = pci_map_single(dd->pdev,
2047 outbuf,
2048 taskout,
2049 DMA_TO_DEVICE);
2050 if (outbuf_dma == 0) {
2051 err = -ENOMEM;
2052 goto abort;
2053 }
2054 dma_buffer = outbuf_dma;
2055 }
2056
2057 if (taskin) {
2058 inbuf = kzalloc(taskin, GFP_KERNEL);
2059 if (inbuf == NULL) {
2060 err = -ENOMEM;
2061 goto abort;
2062 }
2063
2064 if (copy_from_user(inbuf, buf + intotal, taskin)) {
2065 err = -EFAULT;
2066 goto abort;
2067 }
2068 inbuf_dma = pci_map_single(dd->pdev,
2069 inbuf,
2070 taskin, DMA_FROM_DEVICE);
2071 if (inbuf_dma == 0) {
2072 err = -ENOMEM;
2073 goto abort;
2074 }
2075 dma_buffer = inbuf_dma;
2076 }
2077
2078 /* only supports PIO and non-data commands from this ioctl. */
2079 switch (req_task->data_phase) {
2080 case TASKFILE_OUT:
2081 nsect = taskout / ATA_SECT_SIZE;
2082 reply = (dd->port->rxfis + RX_FIS_PIO_SETUP);
2083 break;
2084 case TASKFILE_IN:
2085 reply = (dd->port->rxfis + RX_FIS_PIO_SETUP);
2086 break;
2087 case TASKFILE_NO_DATA:
2088 reply = (dd->port->rxfis + RX_FIS_D2H_REG);
2089 break;
2090 default:
2091 err = -EINVAL;
2092 goto abort;
2093 }
2094
2095 /* Build the FIS. */
2096 memset(&fis, 0, sizeof(struct host_to_dev_fis));
2097
2098 fis.type = 0x27;
2099 fis.opts = 1 << 7;
2100 fis.command = req_task->io_ports[7];
2101 fis.features = req_task->io_ports[1];
2102 fis.sect_count = req_task->io_ports[2];
2103 fis.lba_low = req_task->io_ports[3];
2104 fis.lba_mid = req_task->io_ports[4];
2105 fis.lba_hi = req_task->io_ports[5];
2106 /* Clear the dev bit*/
2107 fis.device = req_task->io_ports[6] & ~0x10;
2108
2109 if ((req_task->in_flags.all == 0) && (req_task->out_flags.all & 1)) {
2110 req_task->in_flags.all =
2111 IDE_TASKFILE_STD_IN_FLAGS |
2112 (IDE_HOB_STD_IN_FLAGS << 8);
2113 fis.lba_low_ex = req_task->hob_ports[3];
2114 fis.lba_mid_ex = req_task->hob_ports[4];
2115 fis.lba_hi_ex = req_task->hob_ports[5];
2116 fis.features_ex = req_task->hob_ports[1];
2117 fis.sect_cnt_ex = req_task->hob_ports[2];
2118
2119 } else {
2120 req_task->in_flags.all = IDE_TASKFILE_STD_IN_FLAGS;
2121 }
2122
2123 force_single_sector = implicit_sector(fis.command, fis.features);
2124
2125 if ((taskin || taskout) && (!fis.sect_count)) {
2126 if (nsect)
2127 fis.sect_count = nsect;
2128 else {
2129 if (!force_single_sector) {
2130 dev_warn(&dd->pdev->dev,
2131 "data movement but "
2132 "sect_count is 0\n");
2133 err = -EINVAL;
2134 goto abort;
2135 }
2136 }
2137 }
2138
2139 dbg_printk(MTIP_DRV_NAME
2140 " %s: cmd %x, feat %x, nsect %x,"
2141 " sect/lbal %x, lcyl/lbam %x, hcyl/lbah %x,"
2142 " head/dev %x\n",
2143 __func__,
2144 fis.command,
2145 fis.features,
2146 fis.sect_count,
2147 fis.lba_low,
2148 fis.lba_mid,
2149 fis.lba_hi,
2150 fis.device);
2151
2152 switch (fis.command) {
2153 case ATA_CMD_DOWNLOAD_MICRO:
2154 /* Change timeout for Download Microcode to 2 minutes */
2155 timeout = 120000;
2156 break;
2157 case ATA_CMD_SEC_ERASE_UNIT:
2158 /* Change timeout for Security Erase Unit to 4 minutes.*/
2159 timeout = 240000;
2160 break;
2161 case ATA_CMD_STANDBYNOW1:
2162 /* Change timeout for standby immediate to 10 seconds.*/
2163 timeout = 10000;
2164 break;
2165 case 0xF7:
2166 case 0xFA:
2167 /* Change timeout for vendor unique command to 10 secs */
2168 timeout = 10000;
2169 break;
2170 case ATA_CMD_SMART:
2171 /* Change timeout for vendor unique command to 15 secs */
2172 timeout = 15000;
2173 break;
2174 default:
2175 timeout = MTIP_IOCTL_COMMAND_TIMEOUT_MS;
2176 break;
2177 }
2178
2179 /* Determine the correct transfer size.*/
2180 if (force_single_sector)
2181 transfer_size = ATA_SECT_SIZE;
2182 else
2183 transfer_size = ATA_SECT_SIZE * fis.sect_count;
2184
2185 /* Execute the command.*/
2186 if (mtip_exec_internal_command(dd->port,
2187 &fis,
2188 5,
2189 dma_buffer,
2190 transfer_size,
2191 0,
2192 GFP_KERNEL,
2193 timeout) < 0) {
2194 err = -EIO;
2195 goto abort;
2196 }
2197
2198 task_file_data = readl(dd->port->mmio+PORT_TFDATA);
2199
2200 if ((req_task->data_phase == TASKFILE_IN) && !(task_file_data & 1)) {
2201 reply = dd->port->rxfis + RX_FIS_PIO_SETUP;
2202 req_task->io_ports[7] = reply->control;
2203 } else {
2204 reply = dd->port->rxfis + RX_FIS_D2H_REG;
2205 req_task->io_ports[7] = reply->command;
2206 }
2207
2208 /* reclaim the DMA buffers.*/
2209 if (inbuf_dma)
2210 pci_unmap_single(dd->pdev, inbuf_dma,
2211 taskin, DMA_FROM_DEVICE);
2212 if (outbuf_dma)
2213 pci_unmap_single(dd->pdev, outbuf_dma,
2214 taskout, DMA_TO_DEVICE);
2215 inbuf_dma = 0;
2216 outbuf_dma = 0;
2217
2218 /* return the ATA registers to the caller.*/
2219 req_task->io_ports[1] = reply->features;
2220 req_task->io_ports[2] = reply->sect_count;
2221 req_task->io_ports[3] = reply->lba_low;
2222 req_task->io_ports[4] = reply->lba_mid;
2223 req_task->io_ports[5] = reply->lba_hi;
2224 req_task->io_ports[6] = reply->device;
2225
2226 if (req_task->out_flags.all & 1) {
2227
2228 req_task->hob_ports[3] = reply->lba_low_ex;
2229 req_task->hob_ports[4] = reply->lba_mid_ex;
2230 req_task->hob_ports[5] = reply->lba_hi_ex;
2231 req_task->hob_ports[1] = reply->features_ex;
2232 req_task->hob_ports[2] = reply->sect_cnt_ex;
2233 }
2234 dbg_printk(MTIP_DRV_NAME
2235 " %s: Completion: stat %x,"
2236 "err %x, sect_cnt %x, lbalo %x,"
2237 "lbamid %x, lbahi %x, dev %x\n",
2238 __func__,
2239 req_task->io_ports[7],
2240 req_task->io_ports[1],
2241 req_task->io_ports[2],
2242 req_task->io_ports[3],
2243 req_task->io_ports[4],
2244 req_task->io_ports[5],
2245 req_task->io_ports[6]);
2246
2247 if (taskout) {
2248 if (copy_to_user(buf + outtotal, outbuf, taskout)) {
2249 err = -EFAULT;
2250 goto abort;
2251 }
2252 }
2253 if (taskin) {
2254 if (copy_to_user(buf + intotal, inbuf, taskin)) {
2255 err = -EFAULT;
2256 goto abort;
2257 }
2258 }
2259 abort:
2260 if (inbuf_dma)
2261 pci_unmap_single(dd->pdev, inbuf_dma,
2262 taskin, DMA_FROM_DEVICE);
2263 if (outbuf_dma)
2264 pci_unmap_single(dd->pdev, outbuf_dma,
2265 taskout, DMA_TO_DEVICE);
2266 kfree(outbuf);
2267 kfree(inbuf);
2268
2269 return err;
2270 }
2271
2272 /*
2273 * Handle IOCTL calls from the Block Layer.
2274 *
2275 * This function is called by the Block Layer when it receives an IOCTL
2276 * command that it does not understand. If the IOCTL command is not supported
2277 * this function returns -ENOTTY.
2278 *
2279 * @dd Pointer to the driver data structure.
2280 * @cmd IOCTL command passed from the Block Layer.
2281 * @arg IOCTL argument passed from the Block Layer.
2282 *
2283 * return value
2284 * 0 The IOCTL completed successfully.
2285 * -ENOTTY The specified command is not supported.
2286 * -EFAULT An error occurred copying data to a user space buffer.
2287 * -EIO An error occurred while executing the command.
2288 */
2289 static int mtip_hw_ioctl(struct driver_data *dd, unsigned int cmd,
2290 unsigned long arg)
2291 {
2292 switch (cmd) {
2293 case HDIO_GET_IDENTITY:
2294 if (mtip_get_identify(dd->port, (void __user *) arg) < 0) {
2295 dev_warn(&dd->pdev->dev,
2296 "Unable to read identity\n");
2297 return -EIO;
2298 }
2299
2300 break;
2301 case HDIO_DRIVE_CMD:
2302 {
2303 u8 drive_command[4];
2304
2305 /* Copy the user command info to our buffer. */
2306 if (copy_from_user(drive_command,
2307 (void __user *) arg,
2308 sizeof(drive_command)))
2309 return -EFAULT;
2310
2311 /* Execute the drive command. */
2312 if (exec_drive_command(dd->port,
2313 drive_command,
2314 (void __user *) (arg+4)))
2315 return -EIO;
2316
2317 /* Copy the status back to the users buffer. */
2318 if (copy_to_user((void __user *) arg,
2319 drive_command,
2320 sizeof(drive_command)))
2321 return -EFAULT;
2322
2323 break;
2324 }
2325 case HDIO_DRIVE_TASK:
2326 {
2327 u8 drive_command[7];
2328
2329 /* Copy the user command info to our buffer. */
2330 if (copy_from_user(drive_command,
2331 (void __user *) arg,
2332 sizeof(drive_command)))
2333 return -EFAULT;
2334
2335 /* Execute the drive command. */
2336 if (exec_drive_task(dd->port, drive_command))
2337 return -EIO;
2338
2339 /* Copy the status back to the users buffer. */
2340 if (copy_to_user((void __user *) arg,
2341 drive_command,
2342 sizeof(drive_command)))
2343 return -EFAULT;
2344
2345 break;
2346 }
2347 case HDIO_DRIVE_TASKFILE: {
2348 ide_task_request_t req_task;
2349 int ret, outtotal;
2350
2351 if (copy_from_user(&req_task, (void __user *) arg,
2352 sizeof(req_task)))
2353 return -EFAULT;
2354
2355 outtotal = sizeof(req_task);
2356
2357 ret = exec_drive_taskfile(dd, (void __user *) arg,
2358 &req_task, outtotal);
2359
2360 if (copy_to_user((void __user *) arg, &req_task,
2361 sizeof(req_task)))
2362 return -EFAULT;
2363
2364 return ret;
2365 }
2366
2367 default:
2368 return -EINVAL;
2369 }
2370 return 0;
2371 }
2372
2373 /*
2374 * Submit an IO to the hw
2375 *
2376 * This function is called by the block layer to issue an io
2377 * to the device. Upon completion, the callback function will
2378 * be called with the data parameter passed as the callback data.
2379 *
2380 * @dd Pointer to the driver data structure.
2381 * @start First sector to read.
2382 * @nsect Number of sectors to read.
2383 * @nents Number of entries in scatter list for the read command.
2384 * @tag The tag of this read command.
2385 * @callback Pointer to the function that should be called
2386 * when the read completes.
2387 * @data Callback data passed to the callback function
2388 * when the read completes.
2389 * @dir Direction (read or write)
2390 *
2391 * return value
2392 * None
2393 */
2394 static void mtip_hw_submit_io(struct driver_data *dd, sector_t start,
2395 int nsect, int nents, int tag, void *callback,
2396 void *data, int dir)
2397 {
2398 struct host_to_dev_fis *fis;
2399 struct mtip_port *port = dd->port;
2400 struct mtip_cmd *command = &port->commands[tag];
2401 int dma_dir = (dir == READ) ? DMA_FROM_DEVICE : DMA_TO_DEVICE;
2402
2403 /* Map the scatter list for DMA access */
2404 nents = dma_map_sg(&dd->pdev->dev, command->sg, nents, dma_dir);
2405
2406 command->scatter_ents = nents;
2407
2408 /*
2409 * The number of retries for this command before it is
2410 * reported as a failure to the upper layers.
2411 */
2412 command->retries = MTIP_MAX_RETRIES;
2413
2414 /* Fill out fis */
2415 fis = command->command;
2416 fis->type = 0x27;
2417 fis->opts = 1 << 7;
2418 fis->command =
2419 (dir == READ ? ATA_CMD_FPDMA_READ : ATA_CMD_FPDMA_WRITE);
2420 *((unsigned int *) &fis->lba_low) = (start & 0xFFFFFF);
2421 *((unsigned int *) &fis->lba_low_ex) = ((start >> 24) & 0xFFFFFF);
2422 fis->device = 1 << 6;
2423 fis->features = nsect & 0xFF;
2424 fis->features_ex = (nsect >> 8) & 0xFF;
2425 fis->sect_count = ((tag << 3) | (tag >> 5));
2426 fis->sect_cnt_ex = 0;
2427 fis->control = 0;
2428 fis->res2 = 0;
2429 fis->res3 = 0;
2430 fill_command_sg(dd, command, nents);
2431
2432 /* Populate the command header */
2433 command->command_header->opts =
2434 __force_bit2int cpu_to_le32(
2435 (nents << 16) | 5 | AHCI_CMD_PREFETCH);
2436 command->command_header->byte_count = 0;
2437
2438 /*
2439 * Set the completion function and data for the command
2440 * within this layer.
2441 */
2442 command->comp_data = dd;
2443 command->comp_func = mtip_async_complete;
2444 command->direction = dma_dir;
2445
2446 /*
2447 * Set the completion function and data for the command passed
2448 * from the upper layer.
2449 */
2450 command->async_data = data;
2451 command->async_callback = callback;
2452
2453 /*
2454 * To prevent this command from being issued
2455 * if an internal command is in progress or error handling is active.
2456 */
2457 if (port->flags & MTIP_PF_PAUSE_IO) {
2458 set_bit(tag, port->cmds_to_issue);
2459 set_bit(MTIP_PF_ISSUE_CMDS_BIT, &port->flags);
2460 return;
2461 }
2462
2463 /* Issue the command to the hardware */
2464 mtip_issue_ncq_command(port, tag);
2465
2466 return;
2467 }
2468
2469 /*
2470 * Release a command slot.
2471 *
2472 * @dd Pointer to the driver data structure.
2473 * @tag Slot tag
2474 *
2475 * return value
2476 * None
2477 */
2478 static void mtip_hw_release_scatterlist(struct driver_data *dd, int tag)
2479 {
2480 release_slot(dd->port, tag);
2481 }
2482
2483 /*
2484 * Obtain a command slot and return its associated scatter list.
2485 *
2486 * @dd Pointer to the driver data structure.
2487 * @tag Pointer to an int that will receive the allocated command
2488 * slot tag.
2489 *
2490 * return value
2491 * Pointer to the scatter list for the allocated command slot
2492 * or NULL if no command slots are available.
2493 */
2494 static struct scatterlist *mtip_hw_get_scatterlist(struct driver_data *dd,
2495 int *tag)
2496 {
2497 /*
2498 * It is possible that, even with this semaphore, a thread
2499 * may think that no command slots are available. Therefore, we
2500 * need to make an attempt to get_slot().
2501 */
2502 down(&dd->port->cmd_slot);
2503 *tag = get_slot(dd->port);
2504
2505 if (unlikely(test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag))) {
2506 up(&dd->port->cmd_slot);
2507 return NULL;
2508 }
2509 if (unlikely(*tag < 0))
2510 return NULL;
2511
2512 return dd->port->commands[*tag].sg;
2513 }
2514
2515 /*
2516 * Sysfs register/status dump.
2517 *
2518 * @dev Pointer to the device structure, passed by the kernrel.
2519 * @attr Pointer to the device_attribute structure passed by the kernel.
2520 * @buf Pointer to the char buffer that will receive the stats info.
2521 *
2522 * return value
2523 * The size, in bytes, of the data copied into buf.
2524 */
2525 static ssize_t mtip_hw_show_registers(struct device *dev,
2526 struct device_attribute *attr,
2527 char *buf)
2528 {
2529 u32 group_allocated;
2530 struct driver_data *dd = dev_to_disk(dev)->private_data;
2531 int size = 0;
2532 int n;
2533
2534 size += sprintf(&buf[size], "S ACTive:\n");
2535
2536 for (n = 0; n < dd->slot_groups; n++)
2537 size += sprintf(&buf[size], "0x%08x\n",
2538 readl(dd->port->s_active[n]));
2539
2540 size += sprintf(&buf[size], "Command Issue:\n");
2541
2542 for (n = 0; n < dd->slot_groups; n++)
2543 size += sprintf(&buf[size], "0x%08x\n",
2544 readl(dd->port->cmd_issue[n]));
2545
2546 size += sprintf(&buf[size], "Allocated:\n");
2547
2548 for (n = 0; n < dd->slot_groups; n++) {
2549 if (sizeof(long) > sizeof(u32))
2550 group_allocated =
2551 dd->port->allocated[n/2] >> (32*(n&1));
2552 else
2553 group_allocated = dd->port->allocated[n];
2554 size += sprintf(&buf[size], "0x%08x\n",
2555 group_allocated);
2556 }
2557
2558 size += sprintf(&buf[size], "Completed:\n");
2559
2560 for (n = 0; n < dd->slot_groups; n++)
2561 size += sprintf(&buf[size], "0x%08x\n",
2562 readl(dd->port->completed[n]));
2563
2564 size += sprintf(&buf[size], "PORT IRQ STAT : 0x%08x\n",
2565 readl(dd->port->mmio + PORT_IRQ_STAT));
2566 size += sprintf(&buf[size], "HOST IRQ STAT : 0x%08x\n",
2567 readl(dd->mmio + HOST_IRQ_STAT));
2568
2569 return size;
2570 }
2571
2572 static ssize_t mtip_hw_show_status(struct device *dev,
2573 struct device_attribute *attr,
2574 char *buf)
2575 {
2576 struct driver_data *dd = dev_to_disk(dev)->private_data;
2577 int size = 0;
2578
2579 if (test_bit(MTIP_DDF_OVER_TEMP_BIT, &dd->dd_flag))
2580 size += sprintf(buf, "%s", "thermal_shutdown\n");
2581 else if (test_bit(MTIP_DDF_WRITE_PROTECT_BIT, &dd->dd_flag))
2582 size += sprintf(buf, "%s", "write_protect\n");
2583 else
2584 size += sprintf(buf, "%s", "online\n");
2585
2586 return size;
2587 }
2588
2589 static DEVICE_ATTR(registers, S_IRUGO, mtip_hw_show_registers, NULL);
2590 static DEVICE_ATTR(status, S_IRUGO, mtip_hw_show_status, NULL);
2591
2592 /*
2593 * Create the sysfs related attributes.
2594 *
2595 * @dd Pointer to the driver data structure.
2596 * @kobj Pointer to the kobj for the block device.
2597 *
2598 * return value
2599 * 0 Operation completed successfully.
2600 * -EINVAL Invalid parameter.
2601 */
2602 static int mtip_hw_sysfs_init(struct driver_data *dd, struct kobject *kobj)
2603 {
2604 if (!kobj || !dd)
2605 return -EINVAL;
2606
2607 if (sysfs_create_file(kobj, &dev_attr_registers.attr))
2608 dev_warn(&dd->pdev->dev,
2609 "Error creating 'registers' sysfs entry\n");
2610 if (sysfs_create_file(kobj, &dev_attr_status.attr))
2611 dev_warn(&dd->pdev->dev,
2612 "Error creating 'status' sysfs entry\n");
2613 return 0;
2614 }
2615
2616 /*
2617 * Remove the sysfs related attributes.
2618 *
2619 * @dd Pointer to the driver data structure.
2620 * @kobj Pointer to the kobj for the block device.
2621 *
2622 * return value
2623 * 0 Operation completed successfully.
2624 * -EINVAL Invalid parameter.
2625 */
2626 static int mtip_hw_sysfs_exit(struct driver_data *dd, struct kobject *kobj)
2627 {
2628 if (!kobj || !dd)
2629 return -EINVAL;
2630
2631 sysfs_remove_file(kobj, &dev_attr_registers.attr);
2632 sysfs_remove_file(kobj, &dev_attr_status.attr);
2633
2634 return 0;
2635 }
2636
2637 /*
2638 * Perform any init/resume time hardware setup
2639 *
2640 * @dd Pointer to the driver data structure.
2641 *
2642 * return value
2643 * None
2644 */
2645 static inline void hba_setup(struct driver_data *dd)
2646 {
2647 u32 hwdata;
2648 hwdata = readl(dd->mmio + HOST_HSORG);
2649
2650 /* interrupt bug workaround: use only 1 IS bit.*/
2651 writel(hwdata |
2652 HSORG_DISABLE_SLOTGRP_INTR |
2653 HSORG_DISABLE_SLOTGRP_PXIS,
2654 dd->mmio + HOST_HSORG);
2655 }
2656
2657 /*
2658 * Detect the details of the product, and store anything needed
2659 * into the driver data structure. This includes product type and
2660 * version and number of slot groups.
2661 *
2662 * @dd Pointer to the driver data structure.
2663 *
2664 * return value
2665 * None
2666 */
2667 static void mtip_detect_product(struct driver_data *dd)
2668 {
2669 u32 hwdata;
2670 unsigned int rev, slotgroups;
2671
2672 /*
2673 * HBA base + 0xFC [15:0] - vendor-specific hardware interface
2674 * info register:
2675 * [15:8] hardware/software interface rev#
2676 * [ 3] asic-style interface
2677 * [ 2:0] number of slot groups, minus 1 (only valid for asic-style).
2678 */
2679 hwdata = readl(dd->mmio + HOST_HSORG);
2680
2681 dd->product_type = MTIP_PRODUCT_UNKNOWN;
2682 dd->slot_groups = 1;
2683
2684 if (hwdata & 0x8) {
2685 dd->product_type = MTIP_PRODUCT_ASICFPGA;
2686 rev = (hwdata & HSORG_HWREV) >> 8;
2687 slotgroups = (hwdata & HSORG_SLOTGROUPS) + 1;
2688 dev_info(&dd->pdev->dev,
2689 "ASIC-FPGA design, HS rev 0x%x, "
2690 "%i slot groups [%i slots]\n",
2691 rev,
2692 slotgroups,
2693 slotgroups * 32);
2694
2695 if (slotgroups > MTIP_MAX_SLOT_GROUPS) {
2696 dev_warn(&dd->pdev->dev,
2697 "Warning: driver only supports "
2698 "%i slot groups.\n", MTIP_MAX_SLOT_GROUPS);
2699 slotgroups = MTIP_MAX_SLOT_GROUPS;
2700 }
2701 dd->slot_groups = slotgroups;
2702 return;
2703 }
2704
2705 dev_warn(&dd->pdev->dev, "Unrecognized product id\n");
2706 }
2707
2708 /*
2709 * Blocking wait for FTL rebuild to complete
2710 *
2711 * @dd Pointer to the DRIVER_DATA structure.
2712 *
2713 * return value
2714 * 0 FTL rebuild completed successfully
2715 * -EFAULT FTL rebuild error/timeout/interruption
2716 */
2717 static int mtip_ftl_rebuild_poll(struct driver_data *dd)
2718 {
2719 unsigned long timeout, cnt = 0, start;
2720
2721 dev_warn(&dd->pdev->dev,
2722 "FTL rebuild in progress. Polling for completion.\n");
2723
2724 start = jiffies;
2725 timeout = jiffies + msecs_to_jiffies(MTIP_FTL_REBUILD_TIMEOUT_MS);
2726
2727 do {
2728 if (unlikely(test_bit(MTIP_DDF_REMOVE_PENDING_BIT,
2729 &dd->dd_flag)))
2730 return -EFAULT;
2731 if (mtip_check_surprise_removal(dd->pdev))
2732 return -EFAULT;
2733
2734 if (mtip_get_identify(dd->port, NULL) < 0)
2735 return -EFAULT;
2736
2737 if (*(dd->port->identify + MTIP_FTL_REBUILD_OFFSET) ==
2738 MTIP_FTL_REBUILD_MAGIC) {
2739 ssleep(1);
2740 /* Print message every 3 minutes */
2741 if (cnt++ >= 180) {
2742 dev_warn(&dd->pdev->dev,
2743 "FTL rebuild in progress (%d secs).\n",
2744 jiffies_to_msecs(jiffies - start) / 1000);
2745 cnt = 0;
2746 }
2747 } else {
2748 dev_warn(&dd->pdev->dev,
2749 "FTL rebuild complete (%d secs).\n",
2750 jiffies_to_msecs(jiffies - start) / 1000);
2751 mtip_block_initialize(dd);
2752 return 0;
2753 }
2754 ssleep(10);
2755 } while (time_before(jiffies, timeout));
2756
2757 /* Check for timeout */
2758 dev_err(&dd->pdev->dev,
2759 "Timed out waiting for FTL rebuild to complete (%d secs).\n",
2760 jiffies_to_msecs(jiffies - start) / 1000);
2761 return -EFAULT;
2762 }
2763
2764 /*
2765 * service thread to issue queued commands
2766 *
2767 * @data Pointer to the driver data structure.
2768 *
2769 * return value
2770 * 0
2771 */
2772
2773 static int mtip_service_thread(void *data)
2774 {
2775 struct driver_data *dd = (struct driver_data *)data;
2776 unsigned long slot, slot_start, slot_wrap;
2777 unsigned int num_cmd_slots = dd->slot_groups * 32;
2778 struct mtip_port *port = dd->port;
2779
2780 while (1) {
2781 /*
2782 * the condition is to check neither an internal command is
2783 * is in progress nor error handling is active
2784 */
2785 wait_event_interruptible(port->svc_wait, (port->flags) &&
2786 !(port->flags & MTIP_PF_PAUSE_IO));
2787
2788 if (kthread_should_stop())
2789 break;
2790
2791 if (unlikely(test_bit(MTIP_DDF_REMOVE_PENDING_BIT,
2792 &dd->dd_flag)))
2793 break;
2794
2795 set_bit(MTIP_PF_SVC_THD_ACTIVE_BIT, &port->flags);
2796 if (test_bit(MTIP_PF_ISSUE_CMDS_BIT, &port->flags)) {
2797 slot = 1;
2798 /* used to restrict the loop to one iteration */
2799 slot_start = num_cmd_slots;
2800 slot_wrap = 0;
2801 while (1) {
2802 slot = find_next_bit(port->cmds_to_issue,
2803 num_cmd_slots, slot);
2804 if (slot_wrap == 1) {
2805 if ((slot_start >= slot) ||
2806 (slot >= num_cmd_slots))
2807 break;
2808 }
2809 if (unlikely(slot_start == num_cmd_slots))
2810 slot_start = slot;
2811
2812 if (unlikely(slot == num_cmd_slots)) {
2813 slot = 1;
2814 slot_wrap = 1;
2815 continue;
2816 }
2817
2818 /* Issue the command to the hardware */
2819 mtip_issue_ncq_command(port, slot);
2820
2821 clear_bit(slot, port->cmds_to_issue);
2822 }
2823
2824 clear_bit(MTIP_PF_ISSUE_CMDS_BIT, &port->flags);
2825 } else if (test_bit(MTIP_PF_REBUILD_BIT, &port->flags)) {
2826 if (!mtip_ftl_rebuild_poll(dd))
2827 set_bit(MTIP_DDF_REBUILD_FAILED_BIT,
2828 &dd->dd_flag);
2829 clear_bit(MTIP_PF_REBUILD_BIT, &port->flags);
2830 }
2831 clear_bit(MTIP_PF_SVC_THD_ACTIVE_BIT, &port->flags);
2832
2833 if (test_bit(MTIP_PF_SVC_THD_STOP_BIT, &port->flags))
2834 break;
2835 }
2836 return 0;
2837 }
2838
2839 /*
2840 * Called once for each card.
2841 *
2842 * @dd Pointer to the driver data structure.
2843 *
2844 * return value
2845 * 0 on success, else an error code.
2846 */
2847 static int mtip_hw_init(struct driver_data *dd)
2848 {
2849 int i;
2850 int rv;
2851 unsigned int num_command_slots;
2852 unsigned long timeout, timetaken;
2853 unsigned char *buf;
2854 struct smart_attr attr242;
2855
2856 dd->mmio = pcim_iomap_table(dd->pdev)[MTIP_ABAR];
2857
2858 mtip_detect_product(dd);
2859 if (dd->product_type == MTIP_PRODUCT_UNKNOWN) {
2860 rv = -EIO;
2861 goto out1;
2862 }
2863 num_command_slots = dd->slot_groups * 32;
2864
2865 hba_setup(dd);
2866
2867 tasklet_init(&dd->tasklet, mtip_tasklet, (unsigned long)dd);
2868
2869 dd->port = kzalloc(sizeof(struct mtip_port), GFP_KERNEL);
2870 if (!dd->port) {
2871 dev_err(&dd->pdev->dev,
2872 "Memory allocation: port structure\n");
2873 return -ENOMEM;
2874 }
2875
2876 /* Counting semaphore to track command slot usage */
2877 sema_init(&dd->port->cmd_slot, num_command_slots - 1);
2878
2879 /* Spinlock to prevent concurrent issue */
2880 spin_lock_init(&dd->port->cmd_issue_lock);
2881
2882 /* Set the port mmio base address. */
2883 dd->port->mmio = dd->mmio + PORT_OFFSET;
2884 dd->port->dd = dd;
2885
2886 /* Allocate memory for the command list. */
2887 dd->port->command_list =
2888 dmam_alloc_coherent(&dd->pdev->dev,
2889 HW_PORT_PRIV_DMA_SZ + (ATA_SECT_SIZE * 4),
2890 &dd->port->command_list_dma,
2891 GFP_KERNEL);
2892 if (!dd->port->command_list) {
2893 dev_err(&dd->pdev->dev,
2894 "Memory allocation: command list\n");
2895 rv = -ENOMEM;
2896 goto out1;
2897 }
2898
2899 /* Clear the memory we have allocated. */
2900 memset(dd->port->command_list,
2901 0,
2902 HW_PORT_PRIV_DMA_SZ + (ATA_SECT_SIZE * 4));
2903
2904 /* Setup the addresse of the RX FIS. */
2905 dd->port->rxfis = dd->port->command_list + HW_CMD_SLOT_SZ;
2906 dd->port->rxfis_dma = dd->port->command_list_dma + HW_CMD_SLOT_SZ;
2907
2908 /* Setup the address of the command tables. */
2909 dd->port->command_table = dd->port->rxfis + AHCI_RX_FIS_SZ;
2910 dd->port->command_tbl_dma = dd->port->rxfis_dma + AHCI_RX_FIS_SZ;
2911
2912 /* Setup the address of the identify data. */
2913 dd->port->identify = dd->port->command_table +
2914 HW_CMD_TBL_AR_SZ;
2915 dd->port->identify_dma = dd->port->command_tbl_dma +
2916 HW_CMD_TBL_AR_SZ;
2917
2918 /* Setup the address of the sector buffer - for some non-ncq cmds */
2919 dd->port->sector_buffer = (void *) dd->port->identify + ATA_SECT_SIZE;
2920 dd->port->sector_buffer_dma = dd->port->identify_dma + ATA_SECT_SIZE;
2921
2922 /* Setup the address of the log buf - for read log command */
2923 dd->port->log_buf = (void *)dd->port->sector_buffer + ATA_SECT_SIZE;
2924 dd->port->log_buf_dma = dd->port->sector_buffer_dma + ATA_SECT_SIZE;
2925
2926 /* Setup the address of the smart buf - for smart read data command */
2927 dd->port->smart_buf = (void *)dd->port->log_buf + ATA_SECT_SIZE;
2928 dd->port->smart_buf_dma = dd->port->log_buf_dma + ATA_SECT_SIZE;
2929
2930
2931 /* Point the command headers at the command tables. */
2932 for (i = 0; i < num_command_slots; i++) {
2933 dd->port->commands[i].command_header =
2934 dd->port->command_list +
2935 (sizeof(struct mtip_cmd_hdr) * i);
2936 dd->port->commands[i].command_header_dma =
2937 dd->port->command_list_dma +
2938 (sizeof(struct mtip_cmd_hdr) * i);
2939
2940 dd->port->commands[i].command =
2941 dd->port->command_table + (HW_CMD_TBL_SZ * i);
2942 dd->port->commands[i].command_dma =
2943 dd->port->command_tbl_dma + (HW_CMD_TBL_SZ * i);
2944
2945 if (readl(dd->mmio + HOST_CAP) & HOST_CAP_64)
2946 dd->port->commands[i].command_header->ctbau =
2947 __force_bit2int cpu_to_le32(
2948 (dd->port->commands[i].command_dma >> 16) >> 16);
2949 dd->port->commands[i].command_header->ctba =
2950 __force_bit2int cpu_to_le32(
2951 dd->port->commands[i].command_dma & 0xFFFFFFFF);
2952
2953 /*
2954 * If this is not done, a bug is reported by the stock
2955 * FC11 i386. Due to the fact that it has lots of kernel
2956 * debugging enabled.
2957 */
2958 sg_init_table(dd->port->commands[i].sg, MTIP_MAX_SG);
2959
2960 /* Mark all commands as currently inactive.*/
2961 atomic_set(&dd->port->commands[i].active, 0);
2962 }
2963
2964 /* Setup the pointers to the extended s_active and CI registers. */
2965 for (i = 0; i < dd->slot_groups; i++) {
2966 dd->port->s_active[i] =
2967 dd->port->mmio + i*0x80 + PORT_SCR_ACT;
2968 dd->port->cmd_issue[i] =
2969 dd->port->mmio + i*0x80 + PORT_COMMAND_ISSUE;
2970 dd->port->completed[i] =
2971 dd->port->mmio + i*0x80 + PORT_SDBV;
2972 }
2973
2974 timetaken = jiffies;
2975 timeout = jiffies + msecs_to_jiffies(30000);
2976 while (((readl(dd->port->mmio + PORT_SCR_STAT) & 0x0F) != 0x03) &&
2977 time_before(jiffies, timeout)) {
2978 mdelay(100);
2979 }
2980 if (unlikely(mtip_check_surprise_removal(dd->pdev))) {
2981 timetaken = jiffies - timetaken;
2982 dev_warn(&dd->pdev->dev,
2983 "Surprise removal detected at %u ms\n",
2984 jiffies_to_msecs(timetaken));
2985 rv = -ENODEV;
2986 goto out2 ;
2987 }
2988 if (unlikely(test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag))) {
2989 timetaken = jiffies - timetaken;
2990 dev_warn(&dd->pdev->dev,
2991 "Removal detected at %u ms\n",
2992 jiffies_to_msecs(timetaken));
2993 rv = -EFAULT;
2994 goto out2;
2995 }
2996
2997 /* Conditionally reset the HBA. */
2998 if (!(readl(dd->mmio + HOST_CAP) & HOST_CAP_NZDMA)) {
2999 if (mtip_hba_reset(dd) < 0) {
3000 dev_err(&dd->pdev->dev,
3001 "Card did not reset within timeout\n");
3002 rv = -EIO;
3003 goto out2;
3004 }
3005 } else {
3006 /* Clear any pending interrupts on the HBA */
3007 writel(readl(dd->mmio + HOST_IRQ_STAT),
3008 dd->mmio + HOST_IRQ_STAT);
3009 }
3010
3011 mtip_init_port(dd->port);
3012 mtip_start_port(dd->port);
3013
3014 /* Setup the ISR and enable interrupts. */
3015 rv = devm_request_irq(&dd->pdev->dev,
3016 dd->pdev->irq,
3017 mtip_irq_handler,
3018 IRQF_SHARED,
3019 dev_driver_string(&dd->pdev->dev),
3020 dd);
3021
3022 if (rv) {
3023 dev_err(&dd->pdev->dev,
3024 "Unable to allocate IRQ %d\n", dd->pdev->irq);
3025 goto out2;
3026 }
3027
3028 /* Enable interrupts on the HBA. */
3029 writel(readl(dd->mmio + HOST_CTL) | HOST_IRQ_EN,
3030 dd->mmio + HOST_CTL);
3031
3032 init_timer(&dd->port->cmd_timer);
3033 init_waitqueue_head(&dd->port->svc_wait);
3034
3035 dd->port->cmd_timer.data = (unsigned long int) dd->port;
3036 dd->port->cmd_timer.function = mtip_timeout_function;
3037 mod_timer(&dd->port->cmd_timer,
3038 jiffies + msecs_to_jiffies(MTIP_TIMEOUT_CHECK_PERIOD));
3039
3040
3041 if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag)) {
3042 rv = -EFAULT;
3043 goto out3;
3044 }
3045
3046 if (mtip_get_identify(dd->port, NULL) < 0) {
3047 rv = -EFAULT;
3048 goto out3;
3049 }
3050
3051 if (*(dd->port->identify + MTIP_FTL_REBUILD_OFFSET) ==
3052 MTIP_FTL_REBUILD_MAGIC) {
3053 set_bit(MTIP_PF_REBUILD_BIT, &dd->port->flags);
3054 return MTIP_FTL_REBUILD_MAGIC;
3055 }
3056 mtip_dump_identify(dd->port);
3057
3058 /* check write protect, over temp and rebuild statuses */
3059 rv = mtip_read_log_page(dd->port, ATA_LOG_SATA_NCQ,
3060 dd->port->log_buf,
3061 dd->port->log_buf_dma, 1);
3062 if (rv) {
3063 dev_warn(&dd->pdev->dev,
3064 "Error in READ LOG EXT (10h) command\n");
3065 /* non-critical error, don't fail the load */
3066 } else {
3067 buf = (unsigned char *)dd->port->log_buf;
3068 if (buf[259] & 0x1) {
3069 dev_info(&dd->pdev->dev,
3070 "Write protect bit is set.\n");
3071 set_bit(MTIP_DDF_WRITE_PROTECT_BIT, &dd->dd_flag);
3072 }
3073 if (buf[288] == 0xF7) {
3074 dev_info(&dd->pdev->dev,
3075 "Exceeded Tmax, drive in thermal shutdown.\n");
3076 set_bit(MTIP_DDF_OVER_TEMP_BIT, &dd->dd_flag);
3077 }
3078 if (buf[288] == 0xBF) {
3079 dev_info(&dd->pdev->dev,
3080 "Drive indicates rebuild has failed.\n");
3081 /* TODO */
3082 }
3083 }
3084
3085 /* get write protect progess */
3086 memset(&attr242, 0, sizeof(struct smart_attr));
3087 if (mtip_get_smart_attr(dd->port, 242, &attr242))
3088 dev_warn(&dd->pdev->dev,
3089 "Unable to check write protect progress\n");
3090 else
3091 dev_info(&dd->pdev->dev,
3092 "Write protect progress: %d%% (%d blocks)\n",
3093 attr242.cur, attr242.data);
3094 return rv;
3095
3096 out3:
3097 del_timer_sync(&dd->port->cmd_timer);
3098
3099 /* Disable interrupts on the HBA. */
3100 writel(readl(dd->mmio + HOST_CTL) & ~HOST_IRQ_EN,
3101 dd->mmio + HOST_CTL);
3102
3103 /*Release the IRQ. */
3104 devm_free_irq(&dd->pdev->dev, dd->pdev->irq, dd);
3105
3106 out2:
3107 mtip_deinit_port(dd->port);
3108
3109 /* Free the command/command header memory. */
3110 dmam_free_coherent(&dd->pdev->dev,
3111 HW_PORT_PRIV_DMA_SZ + (ATA_SECT_SIZE * 4),
3112 dd->port->command_list,
3113 dd->port->command_list_dma);
3114 out1:
3115 /* Free the memory allocated for the for structure. */
3116 kfree(dd->port);
3117
3118 return rv;
3119 }
3120
3121 /*
3122 * Called to deinitialize an interface.
3123 *
3124 * @dd Pointer to the driver data structure.
3125 *
3126 * return value
3127 * 0
3128 */
3129 static int mtip_hw_exit(struct driver_data *dd)
3130 {
3131 /*
3132 * Send standby immediate (E0h) to the drive so that it
3133 * saves its state.
3134 */
3135 if (!test_bit(MTIP_DDF_CLEANUP_BIT, &dd->dd_flag)) {
3136
3137 if (!test_bit(MTIP_PF_REBUILD_BIT, &dd->port->flags))
3138 if (mtip_standby_immediate(dd->port))
3139 dev_warn(&dd->pdev->dev,
3140 "STANDBY IMMEDIATE failed\n");
3141
3142 /* de-initialize the port. */
3143 mtip_deinit_port(dd->port);
3144
3145 /* Disable interrupts on the HBA. */
3146 writel(readl(dd->mmio + HOST_CTL) & ~HOST_IRQ_EN,
3147 dd->mmio + HOST_CTL);
3148 }
3149
3150 del_timer_sync(&dd->port->cmd_timer);
3151
3152 /* Release the IRQ. */
3153 devm_free_irq(&dd->pdev->dev, dd->pdev->irq, dd);
3154
3155 /* Stop the bottom half tasklet. */
3156 tasklet_kill(&dd->tasklet);
3157
3158 /* Free the command/command header memory. */
3159 dmam_free_coherent(&dd->pdev->dev,
3160 HW_PORT_PRIV_DMA_SZ + (ATA_SECT_SIZE * 4),
3161 dd->port->command_list,
3162 dd->port->command_list_dma);
3163 /* Free the memory allocated for the for structure. */
3164 kfree(dd->port);
3165
3166 return 0;
3167 }
3168
3169 /*
3170 * Issue a Standby Immediate command to the device.
3171 *
3172 * This function is called by the Block Layer just before the
3173 * system powers off during a shutdown.
3174 *
3175 * @dd Pointer to the driver data structure.
3176 *
3177 * return value
3178 * 0
3179 */
3180 static int mtip_hw_shutdown(struct driver_data *dd)
3181 {
3182 /*
3183 * Send standby immediate (E0h) to the drive so that it
3184 * saves its state.
3185 */
3186 mtip_standby_immediate(dd->port);
3187
3188 return 0;
3189 }
3190
3191 /*
3192 * Suspend function
3193 *
3194 * This function is called by the Block Layer just before the
3195 * system hibernates.
3196 *
3197 * @dd Pointer to the driver data structure.
3198 *
3199 * return value
3200 * 0 Suspend was successful
3201 * -EFAULT Suspend was not successful
3202 */
3203 static int mtip_hw_suspend(struct driver_data *dd)
3204 {
3205 /*
3206 * Send standby immediate (E0h) to the drive
3207 * so that it saves its state.
3208 */
3209 if (mtip_standby_immediate(dd->port) != 0) {
3210 dev_err(&dd->pdev->dev,
3211 "Failed standby-immediate command\n");
3212 return -EFAULT;
3213 }
3214
3215 /* Disable interrupts on the HBA.*/
3216 writel(readl(dd->mmio + HOST_CTL) & ~HOST_IRQ_EN,
3217 dd->mmio + HOST_CTL);
3218 mtip_deinit_port(dd->port);
3219
3220 return 0;
3221 }
3222
3223 /*
3224 * Resume function
3225 *
3226 * This function is called by the Block Layer as the
3227 * system resumes.
3228 *
3229 * @dd Pointer to the driver data structure.
3230 *
3231 * return value
3232 * 0 Resume was successful
3233 * -EFAULT Resume was not successful
3234 */
3235 static int mtip_hw_resume(struct driver_data *dd)
3236 {
3237 /* Perform any needed hardware setup steps */
3238 hba_setup(dd);
3239
3240 /* Reset the HBA */
3241 if (mtip_hba_reset(dd) != 0) {
3242 dev_err(&dd->pdev->dev,
3243 "Unable to reset the HBA\n");
3244 return -EFAULT;
3245 }
3246
3247 /*
3248 * Enable the port, DMA engine, and FIS reception specific
3249 * h/w in controller.
3250 */
3251 mtip_init_port(dd->port);
3252 mtip_start_port(dd->port);
3253
3254 /* Enable interrupts on the HBA.*/
3255 writel(readl(dd->mmio + HOST_CTL) | HOST_IRQ_EN,
3256 dd->mmio + HOST_CTL);
3257
3258 return 0;
3259 }
3260
3261 /*
3262 * Helper function for reusing disk name
3263 * upon hot insertion.
3264 */
3265 static int rssd_disk_name_format(char *prefix,
3266 int index,
3267 char *buf,
3268 int buflen)
3269 {
3270 const int base = 'z' - 'a' + 1;
3271 char *begin = buf + strlen(prefix);
3272 char *end = buf + buflen;
3273 char *p;
3274 int unit;
3275
3276 p = end - 1;
3277 *p = '\0';
3278 unit = base;
3279 do {
3280 if (p == begin)
3281 return -EINVAL;
3282 *--p = 'a' + (index % unit);
3283 index = (index / unit) - 1;
3284 } while (index >= 0);
3285
3286 memmove(begin, p, end - p);
3287 memcpy(buf, prefix, strlen(prefix));
3288
3289 return 0;
3290 }
3291
3292 /*
3293 * Block layer IOCTL handler.
3294 *
3295 * @dev Pointer to the block_device structure.
3296 * @mode ignored
3297 * @cmd IOCTL command passed from the user application.
3298 * @arg Argument passed from the user application.
3299 *
3300 * return value
3301 * 0 IOCTL completed successfully.
3302 * -ENOTTY IOCTL not supported or invalid driver data
3303 * structure pointer.
3304 */
3305 static int mtip_block_ioctl(struct block_device *dev,
3306 fmode_t mode,
3307 unsigned cmd,
3308 unsigned long arg)
3309 {
3310 struct driver_data *dd = dev->bd_disk->private_data;
3311
3312 if (!capable(CAP_SYS_ADMIN))
3313 return -EACCES;
3314
3315 if (!dd)
3316 return -ENOTTY;
3317
3318 if (unlikely(test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag)))
3319 return -ENOTTY;
3320
3321 switch (cmd) {
3322 case BLKFLSBUF:
3323 return -ENOTTY;
3324 default:
3325 return mtip_hw_ioctl(dd, cmd, arg);
3326 }
3327 }
3328
3329 #ifdef CONFIG_COMPAT
3330 /*
3331 * Block layer compat IOCTL handler.
3332 *
3333 * @dev Pointer to the block_device structure.
3334 * @mode ignored
3335 * @cmd IOCTL command passed from the user application.
3336 * @arg Argument passed from the user application.
3337 *
3338 * return value
3339 * 0 IOCTL completed successfully.
3340 * -ENOTTY IOCTL not supported or invalid driver data
3341 * structure pointer.
3342 */
3343 static int mtip_block_compat_ioctl(struct block_device *dev,
3344 fmode_t mode,
3345 unsigned cmd,
3346 unsigned long arg)
3347 {
3348 struct driver_data *dd = dev->bd_disk->private_data;
3349
3350 if (!capable(CAP_SYS_ADMIN))
3351 return -EACCES;
3352
3353 if (!dd)
3354 return -ENOTTY;
3355
3356 if (unlikely(test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag)))
3357 return -ENOTTY;
3358
3359 switch (cmd) {
3360 case BLKFLSBUF:
3361 return -ENOTTY;
3362 case HDIO_DRIVE_TASKFILE: {
3363 struct mtip_compat_ide_task_request_s __user *compat_req_task;
3364 ide_task_request_t req_task;
3365 int compat_tasksize, outtotal, ret;
3366
3367 compat_tasksize =
3368 sizeof(struct mtip_compat_ide_task_request_s);
3369
3370 compat_req_task =
3371 (struct mtip_compat_ide_task_request_s __user *) arg;
3372
3373 if (copy_from_user(&req_task, (void __user *) arg,
3374 compat_tasksize - (2 * sizeof(compat_long_t))))
3375 return -EFAULT;
3376
3377 if (get_user(req_task.out_size, &compat_req_task->out_size))
3378 return -EFAULT;
3379
3380 if (get_user(req_task.in_size, &compat_req_task->in_size))
3381 return -EFAULT;
3382
3383 outtotal = sizeof(struct mtip_compat_ide_task_request_s);
3384
3385 ret = exec_drive_taskfile(dd, (void __user *) arg,
3386 &req_task, outtotal);
3387
3388 if (copy_to_user((void __user *) arg, &req_task,
3389 compat_tasksize -
3390 (2 * sizeof(compat_long_t))))
3391 return -EFAULT;
3392
3393 if (put_user(req_task.out_size, &compat_req_task->out_size))
3394 return -EFAULT;
3395
3396 if (put_user(req_task.in_size, &compat_req_task->in_size))
3397 return -EFAULT;
3398
3399 return ret;
3400 }
3401 default:
3402 return mtip_hw_ioctl(dd, cmd, arg);
3403 }
3404 }
3405 #endif
3406
3407 /*
3408 * Obtain the geometry of the device.
3409 *
3410 * You may think that this function is obsolete, but some applications,
3411 * fdisk for example still used CHS values. This function describes the
3412 * device as having 224 heads and 56 sectors per cylinder. These values are
3413 * chosen so that each cylinder is aligned on a 4KB boundary. Since a
3414 * partition is described in terms of a start and end cylinder this means
3415 * that each partition is also 4KB aligned. Non-aligned partitions adversely
3416 * affects performance.
3417 *
3418 * @dev Pointer to the block_device strucutre.
3419 * @geo Pointer to a hd_geometry structure.
3420 *
3421 * return value
3422 * 0 Operation completed successfully.
3423 * -ENOTTY An error occurred while reading the drive capacity.
3424 */
3425 static int mtip_block_getgeo(struct block_device *dev,
3426 struct hd_geometry *geo)
3427 {
3428 struct driver_data *dd = dev->bd_disk->private_data;
3429 sector_t capacity;
3430
3431 if (!dd)
3432 return -ENOTTY;
3433
3434 if (!(mtip_hw_get_capacity(dd, &capacity))) {
3435 dev_warn(&dd->pdev->dev,
3436 "Could not get drive capacity.\n");
3437 return -ENOTTY;
3438 }
3439
3440 geo->heads = 224;
3441 geo->sectors = 56;
3442 sector_div(capacity, (geo->heads * geo->sectors));
3443 geo->cylinders = capacity;
3444 return 0;
3445 }
3446
3447 /*
3448 * Block device operation function.
3449 *
3450 * This structure contains pointers to the functions required by the block
3451 * layer.
3452 */
3453 static const struct block_device_operations mtip_block_ops = {
3454 .ioctl = mtip_block_ioctl,
3455 #ifdef CONFIG_COMPAT
3456 .compat_ioctl = mtip_block_compat_ioctl,
3457 #endif
3458 .getgeo = mtip_block_getgeo,
3459 .owner = THIS_MODULE
3460 };
3461
3462 /*
3463 * Block layer make request function.
3464 *
3465 * This function is called by the kernel to process a BIO for
3466 * the P320 device.
3467 *
3468 * @queue Pointer to the request queue. Unused other than to obtain
3469 * the driver data structure.
3470 * @bio Pointer to the BIO.
3471 *
3472 */
3473 static void mtip_make_request(struct request_queue *queue, struct bio *bio)
3474 {
3475 struct driver_data *dd = queue->queuedata;
3476 struct scatterlist *sg;
3477 struct bio_vec *bvec;
3478 int nents = 0;
3479 int tag = 0;
3480
3481 if (unlikely(dd->dd_flag & MTIP_DDF_STOP_IO)) {
3482 if (unlikely(test_bit(MTIP_DDF_REMOVE_PENDING_BIT,
3483 &dd->dd_flag))) {
3484 bio_endio(bio, -ENXIO);
3485 return;
3486 }
3487 if (unlikely(test_bit(MTIP_DDF_OVER_TEMP_BIT, &dd->dd_flag))) {
3488 bio_endio(bio, -ENODATA);
3489 return;
3490 }
3491 if (unlikely(test_bit(MTIP_DDF_WRITE_PROTECT_BIT,
3492 &dd->dd_flag) &&
3493 bio_data_dir(bio))) {
3494 bio_endio(bio, -ENODATA);
3495 return;
3496 }
3497 }
3498
3499 if (unlikely(!bio_has_data(bio))) {
3500 blk_queue_flush(queue, 0);
3501 bio_endio(bio, 0);
3502 return;
3503 }
3504
3505 sg = mtip_hw_get_scatterlist(dd, &tag);
3506 if (likely(sg != NULL)) {
3507 blk_queue_bounce(queue, &bio);
3508
3509 if (unlikely((bio)->bi_vcnt > MTIP_MAX_SG)) {
3510 dev_warn(&dd->pdev->dev,
3511 "Maximum number of SGL entries exceeded\n");
3512 bio_io_error(bio);
3513 mtip_hw_release_scatterlist(dd, tag);
3514 return;
3515 }
3516
3517 /* Create the scatter list for this bio. */
3518 bio_for_each_segment(bvec, bio, nents) {
3519 sg_set_page(&sg[nents],
3520 bvec->bv_page,
3521 bvec->bv_len,
3522 bvec->bv_offset);
3523 }
3524
3525 /* Issue the read/write. */
3526 mtip_hw_submit_io(dd,
3527 bio->bi_sector,
3528 bio_sectors(bio),
3529 nents,
3530 tag,
3531 bio_endio,
3532 bio,
3533 bio_data_dir(bio));
3534 } else
3535 bio_io_error(bio);
3536 }
3537
3538 /*
3539 * Block layer initialization function.
3540 *
3541 * This function is called once by the PCI layer for each P320
3542 * device that is connected to the system.
3543 *
3544 * @dd Pointer to the driver data structure.
3545 *
3546 * return value
3547 * 0 on success else an error code.
3548 */
3549 static int mtip_block_initialize(struct driver_data *dd)
3550 {
3551 int rv = 0, wait_for_rebuild = 0;
3552 sector_t capacity;
3553 unsigned int index = 0;
3554 struct kobject *kobj;
3555 unsigned char thd_name[16];
3556
3557 if (dd->disk)
3558 goto skip_create_disk; /* hw init done, before rebuild */
3559
3560 /* Initialize the protocol layer. */
3561 wait_for_rebuild = mtip_hw_init(dd);
3562 if (wait_for_rebuild < 0) {
3563 dev_err(&dd->pdev->dev,
3564 "Protocol layer initialization failed\n");
3565 rv = -EINVAL;
3566 goto protocol_init_error;
3567 }
3568
3569 dd->disk = alloc_disk(MTIP_MAX_MINORS);
3570 if (dd->disk == NULL) {
3571 dev_err(&dd->pdev->dev,
3572 "Unable to allocate gendisk structure\n");
3573 rv = -EINVAL;
3574 goto alloc_disk_error;
3575 }
3576
3577 /* Generate the disk name, implemented same as in sd.c */
3578 do {
3579 if (!ida_pre_get(&rssd_index_ida, GFP_KERNEL))
3580 goto ida_get_error;
3581
3582 spin_lock(&rssd_index_lock);
3583 rv = ida_get_new(&rssd_index_ida, &index);
3584 spin_unlock(&rssd_index_lock);
3585 } while (rv == -EAGAIN);
3586
3587 if (rv)
3588 goto ida_get_error;
3589
3590 rv = rssd_disk_name_format("rssd",
3591 index,
3592 dd->disk->disk_name,
3593 DISK_NAME_LEN);
3594 if (rv)
3595 goto disk_index_error;
3596
3597 dd->disk->driverfs_dev = &dd->pdev->dev;
3598 dd->disk->major = dd->major;
3599 dd->disk->first_minor = dd->instance * MTIP_MAX_MINORS;
3600 dd->disk->fops = &mtip_block_ops;
3601 dd->disk->private_data = dd;
3602 dd->index = index;
3603
3604 /*
3605 * if rebuild pending, start the service thread, and delay the block
3606 * queue creation and add_disk()
3607 */
3608 if (wait_for_rebuild == MTIP_FTL_REBUILD_MAGIC)
3609 goto start_service_thread;
3610
3611 skip_create_disk:
3612 /* Allocate the request queue. */
3613 dd->queue = blk_alloc_queue(GFP_KERNEL);
3614 if (dd->queue == NULL) {
3615 dev_err(&dd->pdev->dev,
3616 "Unable to allocate request queue\n");
3617 rv = -ENOMEM;
3618 goto block_queue_alloc_init_error;
3619 }
3620
3621 /* Attach our request function to the request queue. */
3622 blk_queue_make_request(dd->queue, mtip_make_request);
3623
3624 dd->disk->queue = dd->queue;
3625 dd->queue->queuedata = dd;
3626
3627 /* Set device limits. */
3628 set_bit(QUEUE_FLAG_NONROT, &dd->queue->queue_flags);
3629 blk_queue_max_segments(dd->queue, MTIP_MAX_SG);
3630 blk_queue_physical_block_size(dd->queue, 4096);
3631 blk_queue_io_min(dd->queue, 4096);
3632 /*
3633 * write back cache is not supported in the device. FUA depends on
3634 * write back cache support, hence setting flush support to zero.
3635 */
3636 blk_queue_flush(dd->queue, 0);
3637
3638 /* Set the capacity of the device in 512 byte sectors. */
3639 if (!(mtip_hw_get_capacity(dd, &capacity))) {
3640 dev_warn(&dd->pdev->dev,
3641 "Could not read drive capacity\n");
3642 rv = -EIO;
3643 goto read_capacity_error;
3644 }
3645 set_capacity(dd->disk, capacity);
3646
3647 /* Enable the block device and add it to /dev */
3648 add_disk(dd->disk);
3649
3650 /*
3651 * Now that the disk is active, initialize any sysfs attributes
3652 * managed by the protocol layer.
3653 */
3654 kobj = kobject_get(&disk_to_dev(dd->disk)->kobj);
3655 if (kobj) {
3656 mtip_hw_sysfs_init(dd, kobj);
3657 kobject_put(kobj);
3658 }
3659
3660 if (dd->mtip_svc_handler) {
3661 set_bit(MTIP_DDF_INIT_DONE_BIT, &dd->dd_flag);
3662 return rv; /* service thread created for handling rebuild */
3663 }
3664
3665 start_service_thread:
3666 sprintf(thd_name, "mtip_svc_thd_%02d", index);
3667
3668 dd->mtip_svc_handler = kthread_run(mtip_service_thread,
3669 dd, thd_name);
3670
3671 if (IS_ERR(dd->mtip_svc_handler)) {
3672 dev_err(&dd->pdev->dev, "service thread failed to start\n");
3673 dd->mtip_svc_handler = NULL;
3674 rv = -EFAULT;
3675 goto kthread_run_error;
3676 }
3677
3678 if (wait_for_rebuild == MTIP_FTL_REBUILD_MAGIC)
3679 rv = wait_for_rebuild;
3680
3681 return rv;
3682
3683 kthread_run_error:
3684 /* Delete our gendisk. This also removes the device from /dev */
3685 del_gendisk(dd->disk);
3686
3687 read_capacity_error:
3688 blk_cleanup_queue(dd->queue);
3689
3690 block_queue_alloc_init_error:
3691 disk_index_error:
3692 spin_lock(&rssd_index_lock);
3693 ida_remove(&rssd_index_ida, index);
3694 spin_unlock(&rssd_index_lock);
3695
3696 ida_get_error:
3697 put_disk(dd->disk);
3698
3699 alloc_disk_error:
3700 mtip_hw_exit(dd); /* De-initialize the protocol layer. */
3701
3702 protocol_init_error:
3703 return rv;
3704 }
3705
3706 /*
3707 * Block layer deinitialization function.
3708 *
3709 * Called by the PCI layer as each P320 device is removed.
3710 *
3711 * @dd Pointer to the driver data structure.
3712 *
3713 * return value
3714 * 0
3715 */
3716 static int mtip_block_remove(struct driver_data *dd)
3717 {
3718 struct kobject *kobj;
3719
3720 if (dd->mtip_svc_handler) {
3721 set_bit(MTIP_PF_SVC_THD_STOP_BIT, &dd->port->flags);
3722 wake_up_interruptible(&dd->port->svc_wait);
3723 kthread_stop(dd->mtip_svc_handler);
3724 }
3725
3726 /* Clean up the sysfs attributes, if created */
3727 if (test_bit(MTIP_DDF_INIT_DONE_BIT, &dd->dd_flag)) {
3728 kobj = kobject_get(&disk_to_dev(dd->disk)->kobj);
3729 if (kobj) {
3730 mtip_hw_sysfs_exit(dd, kobj);
3731 kobject_put(kobj);
3732 }
3733 }
3734
3735 /*
3736 * Delete our gendisk structure. This also removes the device
3737 * from /dev
3738 */
3739 del_gendisk(dd->disk);
3740
3741 spin_lock(&rssd_index_lock);
3742 ida_remove(&rssd_index_ida, dd->index);
3743 spin_unlock(&rssd_index_lock);
3744
3745 blk_cleanup_queue(dd->queue);
3746 dd->disk = NULL;
3747 dd->queue = NULL;
3748
3749 /* De-initialize the protocol layer. */
3750 mtip_hw_exit(dd);
3751
3752 return 0;
3753 }
3754
3755 /*
3756 * Function called by the PCI layer when just before the
3757 * machine shuts down.
3758 *
3759 * If a protocol layer shutdown function is present it will be called
3760 * by this function.
3761 *
3762 * @dd Pointer to the driver data structure.
3763 *
3764 * return value
3765 * 0
3766 */
3767 static int mtip_block_shutdown(struct driver_data *dd)
3768 {
3769 dev_info(&dd->pdev->dev,
3770 "Shutting down %s ...\n", dd->disk->disk_name);
3771
3772 /* Delete our gendisk structure, and cleanup the blk queue. */
3773 del_gendisk(dd->disk);
3774
3775 spin_lock(&rssd_index_lock);
3776 ida_remove(&rssd_index_ida, dd->index);
3777 spin_unlock(&rssd_index_lock);
3778
3779 blk_cleanup_queue(dd->queue);
3780 dd->disk = NULL;
3781 dd->queue = NULL;
3782
3783 mtip_hw_shutdown(dd);
3784 return 0;
3785 }
3786
3787 static int mtip_block_suspend(struct driver_data *dd)
3788 {
3789 dev_info(&dd->pdev->dev,
3790 "Suspending %s ...\n", dd->disk->disk_name);
3791 mtip_hw_suspend(dd);
3792 return 0;
3793 }
3794
3795 static int mtip_block_resume(struct driver_data *dd)
3796 {
3797 dev_info(&dd->pdev->dev, "Resuming %s ...\n",
3798 dd->disk->disk_name);
3799 mtip_hw_resume(dd);
3800 return 0;
3801 }
3802
3803 /*
3804 * Called for each supported PCI device detected.
3805 *
3806 * This function allocates the private data structure, enables the
3807 * PCI device and then calls the block layer initialization function.
3808 *
3809 * return value
3810 * 0 on success else an error code.
3811 */
3812 static int mtip_pci_probe(struct pci_dev *pdev,
3813 const struct pci_device_id *ent)
3814 {
3815 int rv = 0;
3816 struct driver_data *dd = NULL;
3817
3818 /* Allocate memory for this devices private data. */
3819 dd = kzalloc(sizeof(struct driver_data), GFP_KERNEL);
3820 if (dd == NULL) {
3821 dev_err(&pdev->dev,
3822 "Unable to allocate memory for driver data\n");
3823 return -ENOMEM;
3824 }
3825
3826 /* Attach the private data to this PCI device. */
3827 pci_set_drvdata(pdev, dd);
3828
3829 rv = pcim_enable_device(pdev);
3830 if (rv < 0) {
3831 dev_err(&pdev->dev, "Unable to enable device\n");
3832 goto iomap_err;
3833 }
3834
3835 /* Map BAR5 to memory. */
3836 rv = pcim_iomap_regions(pdev, 1 << MTIP_ABAR, MTIP_DRV_NAME);
3837 if (rv < 0) {
3838 dev_err(&pdev->dev, "Unable to map regions\n");
3839 goto iomap_err;
3840 }
3841
3842 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64))) {
3843 rv = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64));
3844
3845 if (rv) {
3846 rv = pci_set_consistent_dma_mask(pdev,
3847 DMA_BIT_MASK(32));
3848 if (rv) {
3849 dev_warn(&pdev->dev,
3850 "64-bit DMA enable failed\n");
3851 goto setmask_err;
3852 }
3853 }
3854 }
3855
3856 pci_set_master(pdev);
3857
3858 if (pci_enable_msi(pdev)) {
3859 dev_warn(&pdev->dev,
3860 "Unable to enable MSI interrupt.\n");
3861 goto block_initialize_err;
3862 }
3863
3864 /* Copy the info we may need later into the private data structure. */
3865 dd->major = mtip_major;
3866 dd->instance = instance;
3867 dd->pdev = pdev;
3868
3869 /* Initialize the block layer. */
3870 rv = mtip_block_initialize(dd);
3871 if (rv < 0) {
3872 dev_err(&pdev->dev,
3873 "Unable to initialize block layer\n");
3874 goto block_initialize_err;
3875 }
3876
3877 /*
3878 * Increment the instance count so that each device has a unique
3879 * instance number.
3880 */
3881 instance++;
3882 if (rv != MTIP_FTL_REBUILD_MAGIC)
3883 set_bit(MTIP_DDF_INIT_DONE_BIT, &dd->dd_flag);
3884 goto done;
3885
3886 block_initialize_err:
3887 pci_disable_msi(pdev);
3888
3889 setmask_err:
3890 pcim_iounmap_regions(pdev, 1 << MTIP_ABAR);
3891
3892 iomap_err:
3893 kfree(dd);
3894 pci_set_drvdata(pdev, NULL);
3895 return rv;
3896 done:
3897 return rv;
3898 }
3899
3900 /*
3901 * Called for each probed device when the device is removed or the
3902 * driver is unloaded.
3903 *
3904 * return value
3905 * None
3906 */
3907 static void mtip_pci_remove(struct pci_dev *pdev)
3908 {
3909 struct driver_data *dd = pci_get_drvdata(pdev);
3910 int counter = 0;
3911
3912 set_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag);
3913
3914 if (mtip_check_surprise_removal(pdev)) {
3915 while (!test_bit(MTIP_DDF_CLEANUP_BIT, &dd->dd_flag)) {
3916 counter++;
3917 msleep(20);
3918 if (counter == 10) {
3919 /* Cleanup the outstanding commands */
3920 mtip_command_cleanup(dd);
3921 break;
3922 }
3923 }
3924 }
3925
3926 /* Clean up the block layer. */
3927 mtip_block_remove(dd);
3928
3929 pci_disable_msi(pdev);
3930
3931 kfree(dd);
3932 pcim_iounmap_regions(pdev, 1 << MTIP_ABAR);
3933 }
3934
3935 /*
3936 * Called for each probed device when the device is suspended.
3937 *
3938 * return value
3939 * 0 Success
3940 * <0 Error
3941 */
3942 static int mtip_pci_suspend(struct pci_dev *pdev, pm_message_t mesg)
3943 {
3944 int rv = 0;
3945 struct driver_data *dd = pci_get_drvdata(pdev);
3946
3947 if (!dd) {
3948 dev_err(&pdev->dev,
3949 "Driver private datastructure is NULL\n");
3950 return -EFAULT;
3951 }
3952
3953 set_bit(MTIP_DDF_RESUME_BIT, &dd->dd_flag);
3954
3955 /* Disable ports & interrupts then send standby immediate */
3956 rv = mtip_block_suspend(dd);
3957 if (rv < 0) {
3958 dev_err(&pdev->dev,
3959 "Failed to suspend controller\n");
3960 return rv;
3961 }
3962
3963 /*
3964 * Save the pci config space to pdev structure &
3965 * disable the device
3966 */
3967 pci_save_state(pdev);
3968 pci_disable_device(pdev);
3969
3970 /* Move to Low power state*/
3971 pci_set_power_state(pdev, PCI_D3hot);
3972
3973 return rv;
3974 }
3975
3976 /*
3977 * Called for each probed device when the device is resumed.
3978 *
3979 * return value
3980 * 0 Success
3981 * <0 Error
3982 */
3983 static int mtip_pci_resume(struct pci_dev *pdev)
3984 {
3985 int rv = 0;
3986 struct driver_data *dd;
3987
3988 dd = pci_get_drvdata(pdev);
3989 if (!dd) {
3990 dev_err(&pdev->dev,
3991 "Driver private datastructure is NULL\n");
3992 return -EFAULT;
3993 }
3994
3995 /* Move the device to active State */
3996 pci_set_power_state(pdev, PCI_D0);
3997
3998 /* Restore PCI configuration space */
3999 pci_restore_state(pdev);
4000
4001 /* Enable the PCI device*/
4002 rv = pcim_enable_device(pdev);
4003 if (rv < 0) {
4004 dev_err(&pdev->dev,
4005 "Failed to enable card during resume\n");
4006 goto err;
4007 }
4008 pci_set_master(pdev);
4009
4010 /*
4011 * Calls hbaReset, initPort, & startPort function
4012 * then enables interrupts
4013 */
4014 rv = mtip_block_resume(dd);
4015 if (rv < 0)
4016 dev_err(&pdev->dev, "Unable to resume\n");
4017
4018 err:
4019 clear_bit(MTIP_DDF_RESUME_BIT, &dd->dd_flag);
4020
4021 return rv;
4022 }
4023
4024 /*
4025 * Shutdown routine
4026 *
4027 * return value
4028 * None
4029 */
4030 static void mtip_pci_shutdown(struct pci_dev *pdev)
4031 {
4032 struct driver_data *dd = pci_get_drvdata(pdev);
4033 if (dd)
4034 mtip_block_shutdown(dd);
4035 }
4036
4037 /* Table of device ids supported by this driver. */
4038 static DEFINE_PCI_DEVICE_TABLE(mtip_pci_tbl) = {
4039 { PCI_DEVICE(PCI_VENDOR_ID_MICRON, P320_DEVICE_ID) },
4040 { 0 }
4041 };
4042
4043 /* Structure that describes the PCI driver functions. */
4044 static struct pci_driver mtip_pci_driver = {
4045 .name = MTIP_DRV_NAME,
4046 .id_table = mtip_pci_tbl,
4047 .probe = mtip_pci_probe,
4048 .remove = mtip_pci_remove,
4049 .suspend = mtip_pci_suspend,
4050 .resume = mtip_pci_resume,
4051 .shutdown = mtip_pci_shutdown,
4052 };
4053
4054 MODULE_DEVICE_TABLE(pci, mtip_pci_tbl);
4055
4056 /*
4057 * Module initialization function.
4058 *
4059 * Called once when the module is loaded. This function allocates a major
4060 * block device number to the Cyclone devices and registers the PCI layer
4061 * of the driver.
4062 *
4063 * Return value
4064 * 0 on success else error code.
4065 */
4066 static int __init mtip_init(void)
4067 {
4068 int error;
4069
4070 printk(KERN_INFO MTIP_DRV_NAME " Version " MTIP_DRV_VERSION "\n");
4071
4072 /* Allocate a major block device number to use with this driver. */
4073 error = register_blkdev(0, MTIP_DRV_NAME);
4074 if (error <= 0) {
4075 printk(KERN_ERR "Unable to register block device (%d)\n",
4076 error);
4077 return -EBUSY;
4078 }
4079 mtip_major = error;
4080
4081 /* Register our PCI operations. */
4082 error = pci_register_driver(&mtip_pci_driver);
4083 if (error)
4084 unregister_blkdev(mtip_major, MTIP_DRV_NAME);
4085
4086 return error;
4087 }
4088
4089 /*
4090 * Module de-initialization function.
4091 *
4092 * Called once when the module is unloaded. This function deallocates
4093 * the major block device number allocated by mtip_init() and
4094 * unregisters the PCI layer of the driver.
4095 *
4096 * Return value
4097 * none
4098 */
4099 static void __exit mtip_exit(void)
4100 {
4101 /* Release the allocated major block device number. */
4102 unregister_blkdev(mtip_major, MTIP_DRV_NAME);
4103
4104 /* Unregister the PCI driver. */
4105 pci_unregister_driver(&mtip_pci_driver);
4106 }
4107
4108 MODULE_AUTHOR("Micron Technology, Inc");
4109 MODULE_DESCRIPTION("Micron RealSSD PCIe Block Driver");
4110 MODULE_LICENSE("GPL");
4111 MODULE_VERSION(MTIP_DRV_VERSION);
4112
4113 module_init(mtip_init);
4114 module_exit(mtip_exit);