2 * Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com>
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
11 #include <linux/clk-provider.h>
12 #include <linux/clkdev.h>
13 #include <linux/clk/at91_pmc.h>
15 #include <linux/mfd/syscon.h>
16 #include <linux/regmap.h>
22 #define PROG_STATUS_MASK(id) (1 << ((id) + 8))
23 #define PROG_PRES(layout, pckr) ((pckr >> layout->pres_shift) & layout->pres_mask)
24 #define PROG_MAX_RM9200_CSS 3
26 struct clk_programmable
{
28 struct regmap
*regmap
;
30 const struct clk_programmable_layout
*layout
;
33 #define to_clk_programmable(hw) container_of(hw, struct clk_programmable, hw)
35 static unsigned long clk_programmable_recalc_rate(struct clk_hw
*hw
,
36 unsigned long parent_rate
)
38 struct clk_programmable
*prog
= to_clk_programmable(hw
);
39 const struct clk_programmable_layout
*layout
= prog
->layout
;
43 regmap_read(prog
->regmap
, AT91_PMC_PCKR(prog
->id
), &pckr
);
45 if (layout
->is_pres_direct
)
46 rate
= parent_rate
/ (PROG_PRES(layout
, pckr
) + 1);
48 rate
= parent_rate
>> PROG_PRES(layout
, pckr
);
53 static int clk_programmable_determine_rate(struct clk_hw
*hw
,
54 struct clk_rate_request
*req
)
56 struct clk_programmable
*prog
= to_clk_programmable(hw
);
57 const struct clk_programmable_layout
*layout
= prog
->layout
;
58 struct clk_hw
*parent
;
59 long best_rate
= -EINVAL
;
60 unsigned long parent_rate
;
61 unsigned long tmp_rate
= 0;
65 for (i
= 0; i
< clk_hw_get_num_parents(hw
); i
++) {
66 parent
= clk_hw_get_parent_by_index(hw
, i
);
70 parent_rate
= clk_hw_get_rate(parent
);
71 if (layout
->is_pres_direct
) {
72 for (shift
= 0; shift
<= layout
->pres_mask
; shift
++) {
73 tmp_rate
= parent_rate
/ (shift
+ 1);
74 if (tmp_rate
<= req
->rate
)
78 for (shift
= 0; shift
< layout
->pres_mask
; shift
++) {
79 tmp_rate
= parent_rate
>> shift
;
80 if (tmp_rate
<= req
->rate
)
85 if (tmp_rate
> req
->rate
)
89 (req
->rate
- tmp_rate
) < (req
->rate
- best_rate
)) {
91 req
->best_parent_rate
= parent_rate
;
92 req
->best_parent_hw
= parent
;
102 req
->rate
= best_rate
;
106 static int clk_programmable_set_parent(struct clk_hw
*hw
, u8 index
)
108 struct clk_programmable
*prog
= to_clk_programmable(hw
);
109 const struct clk_programmable_layout
*layout
= prog
->layout
;
110 unsigned int mask
= layout
->css_mask
;
111 unsigned int pckr
= index
;
113 if (layout
->have_slck_mck
)
114 mask
|= AT91_PMC_CSSMCK_MCK
;
116 if (index
> layout
->css_mask
) {
117 if (index
> PROG_MAX_RM9200_CSS
&& !layout
->have_slck_mck
)
120 pckr
|= AT91_PMC_CSSMCK_MCK
;
123 regmap_update_bits(prog
->regmap
, AT91_PMC_PCKR(prog
->id
), mask
, pckr
);
128 static u8
clk_programmable_get_parent(struct clk_hw
*hw
)
130 struct clk_programmable
*prog
= to_clk_programmable(hw
);
131 const struct clk_programmable_layout
*layout
= prog
->layout
;
135 regmap_read(prog
->regmap
, AT91_PMC_PCKR(prog
->id
), &pckr
);
137 ret
= pckr
& layout
->css_mask
;
139 if (layout
->have_slck_mck
&& (pckr
& AT91_PMC_CSSMCK_MCK
) && !ret
)
140 ret
= PROG_MAX_RM9200_CSS
+ 1;
145 static int clk_programmable_set_rate(struct clk_hw
*hw
, unsigned long rate
,
146 unsigned long parent_rate
)
148 struct clk_programmable
*prog
= to_clk_programmable(hw
);
149 const struct clk_programmable_layout
*layout
= prog
->layout
;
150 unsigned long div
= parent_rate
/ rate
;
156 if (layout
->is_pres_direct
) {
159 if (shift
> layout
->pres_mask
)
162 shift
= fls(div
) - 1;
164 if (div
!= (1 << shift
))
167 if (shift
>= layout
->pres_mask
)
171 regmap_update_bits(prog
->regmap
, AT91_PMC_PCKR(prog
->id
),
172 layout
->pres_mask
<< layout
->pres_shift
,
173 shift
<< layout
->pres_shift
);
178 static const struct clk_ops programmable_ops
= {
179 .recalc_rate
= clk_programmable_recalc_rate
,
180 .determine_rate
= clk_programmable_determine_rate
,
181 .get_parent
= clk_programmable_get_parent
,
182 .set_parent
= clk_programmable_set_parent
,
183 .set_rate
= clk_programmable_set_rate
,
186 struct clk_hw
* __init
187 at91_clk_register_programmable(struct regmap
*regmap
,
188 const char *name
, const char **parent_names
,
189 u8 num_parents
, u8 id
,
190 const struct clk_programmable_layout
*layout
)
192 struct clk_programmable
*prog
;
194 struct clk_init_data init
;
197 if (id
> PROG_ID_MAX
)
198 return ERR_PTR(-EINVAL
);
200 prog
= kzalloc(sizeof(*prog
), GFP_KERNEL
);
202 return ERR_PTR(-ENOMEM
);
205 init
.ops
= &programmable_ops
;
206 init
.parent_names
= parent_names
;
207 init
.num_parents
= num_parents
;
208 init
.flags
= CLK_SET_RATE_GATE
| CLK_SET_PARENT_GATE
;
211 prog
->layout
= layout
;
212 prog
->hw
.init
= &init
;
213 prog
->regmap
= regmap
;
216 ret
= clk_hw_register(NULL
, &prog
->hw
);
221 pmc_register_pck(id
);
227 const struct clk_programmable_layout at91rm9200_programmable_layout
= {
235 const struct clk_programmable_layout at91sam9g45_programmable_layout
= {
243 const struct clk_programmable_layout at91sam9x5_programmable_layout
= {