drivers/crypto/caam/error.c

   1 /*
   2  * CAAM Error Reporting
   3  *
   4  * Copyright 2009-2011 Freescale Semiconductor, Inc.
   5  */
   6
   7 #include "compat.h"
   8 #include "regs.h"
   9 #include "desc.h"
  10 #include "error.h"
  11
  12 static const struct {
  13         u8 value;
  14         const char *error_text;
  15 } desc_error_list[] = {
  16         { 0x00, "No error." },
  17         { 0x01, "SGT Length Error. The descriptor is trying to read more data than is contained in the SGT table." },
  18         { 0x02, "SGT Null Entry Error." },
  19         { 0x03, "Job Ring Control Error. There is a bad value in the Job Ring Control register." },
  20         { 0x04, "Invalid Descriptor Command. The Descriptor Command field is invalid." },
  21         { 0x05, "Reserved." },
  22         { 0x06, "Invalid KEY Command" },
  23         { 0x07, "Invalid LOAD Command" },
  24         { 0x08, "Invalid STORE Command" },
  25         { 0x09, "Invalid OPERATION Command" },
  26         { 0x0A, "Invalid FIFO LOAD Command" },
  27         { 0x0B, "Invalid FIFO STORE Command" },
  28         { 0x0C, "Invalid MOVE/MOVE_LEN Command" },
  29         { 0x0D, "Invalid JUMP Command. A nonlocal JUMP Command is invalid because the target is not a Job Header Command, or the jump is from a Trusted Descriptor to a Job Descriptor, or because the target Descriptor contains a Shared Descriptor." },
  30         { 0x0E, "Invalid MATH Command" },
  31         { 0x0F, "Invalid SIGNATURE Command" },
  32         { 0x10, "Invalid Sequence Command. A SEQ IN PTR OR SEQ OUT PTR Command is invalid or a SEQ KEY, SEQ LOAD, SEQ FIFO LOAD, or SEQ FIFO STORE decremented the input or output sequence length below 0. This error may result if a built-in PROTOCOL Command has encountered a malformed PDU." },
  33         { 0x11, "Skip data type invalid. The type must be 0xE or 0xF."},
  34         { 0x12, "Shared Descriptor Header Error" },
  35         { 0x13, "Header Error. Invalid length or parity, or certain other problems." },
  36         { 0x14, "Burster Error. Burster has gotten to an illegal state" },
  37         { 0x15, "Context Register Length Error. The descriptor is trying to read or write past the end of the Context Register. A SEQ LOAD or SEQ STORE with the VLF bit set was executed with too large a length in the variable length register (VSOL for SEQ STORE or VSIL for SEQ LOAD)." },
  38         { 0x16, "DMA Error" },
  39         { 0x17, "Reserved." },
  40         { 0x1A, "Job failed due to JR reset" },
  41         { 0x1B, "Job failed due to Fail Mode" },
  42         { 0x1C, "DECO Watchdog timer timeout error" },
  43         { 0x1D, "DECO tried to copy a key from another DECO but the other DECO's Key Registers were locked" },
  44         { 0x1E, "DECO attempted to copy data from a DECO that had an unmasked Descriptor error" },
  45         { 0x1F, "LIODN error. DECO was trying to share from itself or from another DECO but the two Non-SEQ LIODN values didn't match or the 'shared from' DECO's Descriptor required that the SEQ LIODNs be the same and they aren't." },
  46         { 0x20, "DECO has completed a reset initiated via the DRR register" },
  47         { 0x21, "Nonce error. When using EKT (CCM) key encryption option in the FIFO STORE Command, the Nonce counter reached its maximum value and this encryption mode can no longer be used." },
  48         { 0x22, "Meta data is too large (> 511 bytes) for TLS decap (input frame; block ciphers) and IPsec decap (output frame, when doing the next header byte update) and DCRC (output frame)." },
  49         { 0x23, "Read Input Frame error" },
  50         { 0x24, "JDKEK, TDKEK or TDSK not loaded error" },
  51         { 0x80, "DNR (do not run) error" },
  52         { 0x81, "undefined protocol command" },
  53         { 0x82, "invalid setting in PDB" },
  54         { 0x83, "Anti-replay LATE error" },
  55         { 0x84, "Anti-replay REPLAY error" },
  56         { 0x85, "Sequence number overflow" },
  57         { 0x86, "Sigver invalid signature" },
  58         { 0x87, "DSA Sign Illegal test descriptor" },
  59         { 0x88, "Protocol Format Error - A protocol has seen an error in the format of data received. When running RSA, this means that formatting with random padding was used, and did not follow the form: 0x00, 0x02, 8-to-N bytes of non-zero pad, 0x00, F data." },
  60         { 0x89, "Protocol Size Error - A protocol has seen an error in size. When running RSA, pdb size N < (size of F) when no formatting is used; or pdb size N < (F + 11) when formatting is used." },
  61         { 0xC1, "Blob Command error: Undefined mode" },
  62         { 0xC2, "Blob Command error: Secure Memory Blob mode error" },
  63         { 0xC4, "Blob Command error: Black Blob key or input size error" },
  64         { 0xC5, "Blob Command error: Invalid key destination" },
  65         { 0xC8, "Blob Command error: Trusted/Secure mode error" },
  66         { 0xF0, "IPsec TTL or hop limit field either came in as 0, or was decremented to 0" },
  67         { 0xF1, "3GPP HFN matches or exceeds the Threshold" },
  68 };
  69
  70 static const char * const cha_id_list[] = {
  71         "",
  72         "AES",
  73         "DES",
  74         "ARC4",
  75         "MDHA",
  76         "RNG",
  77         "SNOW f8",
  78         "Kasumi f8/9",
  79         "PKHA",
  80         "CRCA",
  81         "SNOW f9",
  82         "ZUCE",
  83         "ZUCA",
  84 };
  85
  86 static const char * const err_id_list[] = {
  87         "No error.",
  88         "Mode error.",
  89         "Data size error.",
  90         "Key size error.",
  91         "PKHA A memory size error.",
  92         "PKHA B memory size error.",
  93         "Data arrived out of sequence error.",
  94         "PKHA divide-by-zero error.",
  95         "PKHA modulus even error.",
  96         "DES key parity error.",
  97         "ICV check failed.",
  98         "Hardware error.",
  99         "Unsupported CCM AAD size.",
 100         "Class 1 CHA is not reset",
 101         "Invalid CHA combination was selected",
 102         "Invalid CHA selected.",
 103 };
 104
 105 static const char * const rng_err_id_list[] = {
 106         "",
 107         "",
 108         "",
 109         "Instantiate",
 110         "Not instantiated",
 111         "Test instantiate",
 112         "Prediction resistance",
 113         "Prediction resistance and test request",
 114         "Uninstantiate",
 115         "Secure key generation",
 116 };
 117
 118 static void report_ccb_status(struct device *jrdev, const u32 status,
 119                               const char *error)
 120 {
 121         u8 cha_id = (status & JRSTA_CCBERR_CHAID_MASK) >>
 122                     JRSTA_CCBERR_CHAID_SHIFT;
 123         u8 err_id = status & JRSTA_CCBERR_ERRID_MASK;
 124         u8 idx = (status & JRSTA_DECOERR_INDEX_MASK) >>
 125                   JRSTA_DECOERR_INDEX_SHIFT;
 126         char *idx_str;
 127         const char *cha_str = "unidentified cha_id value 0x";
 128         char cha_err_code[3] = { 0 };
 129         const char *err_str = "unidentified err_id value 0x";
 130         char err_err_code[3] = { 0 };
 131
 132         if (status & JRSTA_DECOERR_JUMP)
 133                 idx_str = "jump tgt desc idx";
 134         else
 135                 idx_str = "desc idx";
 136
 137         if (cha_id < ARRAY_SIZE(cha_id_list))
 138                 cha_str = cha_id_list[cha_id];
 139         else
 140                 snprintf(cha_err_code, sizeof(cha_err_code), "%02x", cha_id);
 141
 142         if ((cha_id << JRSTA_CCBERR_CHAID_SHIFT) == JRSTA_CCBERR_CHAID_RNG &&
 143             err_id < ARRAY_SIZE(rng_err_id_list) &&
 144             strlen(rng_err_id_list[err_id])) {
 145                 /* RNG-only error */
 146                 err_str = rng_err_id_list[err_id];
 147         } else {
 148                 err_str = err_id_list[err_id];
 149         }
 150
 151         /*
 152          * CCB ICV check failures are part of normal operation life;
 153          * we leave the upper layers to do what they want with them.
 154          */
 155         if (err_id != JRSTA_CCBERR_ERRID_ICVCHK)
 156                 dev_err(jrdev, "%08x: %s: %s %d: %s%s: %s%s\n",
 157                         status, error, idx_str, idx,
 158                         cha_str, cha_err_code,
 159                         err_str, err_err_code);
 160 }
 161
 162 static void report_jump_status(struct device *jrdev, const u32 status,
 163                                const char *error)
 164 {
 165         dev_err(jrdev, "%08x: %s: %s() not implemented\n",
 166                 status, error, __func__);
 167 }
 168
 169 static void report_deco_status(struct device *jrdev, const u32 status,
 170                                const char *error)
 171 {
 172         u8 err_id = status & JRSTA_DECOERR_ERROR_MASK;
 173         u8 idx = (status & JRSTA_DECOERR_INDEX_MASK) >>
 174                   JRSTA_DECOERR_INDEX_SHIFT;
 175         char *idx_str;
 176         const char *err_str = "unidentified error value 0x";
 177         char err_err_code[3] = { 0 };
 178         int i;
 179
 180         if (status & JRSTA_DECOERR_JUMP)
 181                 idx_str = "jump tgt desc idx";
 182         else
 183                 idx_str = "desc idx";
 184
 185         for (i = 0; i < ARRAY_SIZE(desc_error_list); i++)
 186                 if (desc_error_list[i].value == err_id)
 187                         break;
 188
 189         if (i != ARRAY_SIZE(desc_error_list) && desc_error_list[i].error_text)
 190                 err_str = desc_error_list[i].error_text;
 191         else
 192                 snprintf(err_err_code, sizeof(err_err_code), "%02x", err_id);
 193
 194         dev_err(jrdev, "%08x: %s: %s %d: %s%s\n",
 195                 status, error, idx_str, idx, err_str, err_err_code);
 196 }
 197
 198 static void report_jr_status(struct device *jrdev, const u32 status,
 199                              const char *error)
 200 {
 201         dev_err(jrdev, "%08x: %s: %s() not implemented\n",
 202                 status, error, __func__);
 203 }
 204
 205 static void report_cond_code_status(struct device *jrdev, const u32 status,
 206                                     const char *error)
 207 {
 208         dev_err(jrdev, "%08x: %s: %s() not implemented\n",
 209                 status, error, __func__);
 210 }
 211
 212 void caam_jr_strstatus(struct device *jrdev, u32 status)
 213 {
 214         static const struct stat_src {
 215                 void (*report_ssed)(struct device *jrdev, const u32 status,
 216                                     const char *error);
 217                 const char *error;
 218         } status_src[16] = {
 219                 { NULL, "No error" },
 220                 { NULL, NULL },
 221                 { report_ccb_status, "CCB" },
 222                 { report_jump_status, "Jump" },
 223                 { report_deco_status, "DECO" },
 224                 { NULL, "Queue Manager Interface" },
 225                 { report_jr_status, "Job Ring" },
 226                 { report_cond_code_status, "Condition Code" },
 227                 { NULL, NULL },
 228                 { NULL, NULL },
 229                 { NULL, NULL },
 230                 { NULL, NULL },
 231                 { NULL, NULL },
 232                 { NULL, NULL },
 233                 { NULL, NULL },
 234                 { NULL, NULL },
 235         };
 236         u32 ssrc = status >> JRSTA_SSRC_SHIFT;
 237         const char *error = status_src[ssrc].error;
 238
 239         /*
 240          * If there is an error handling function, call it to report the error.
 241          * Otherwise print the error source name.
 242          */
 243         if (status_src[ssrc].report_ssed)
 244                 status_src[ssrc].report_ssed(jrdev, status, error);
 245         else if (error)
 246                 dev_err(jrdev, "%d: %s\n", ssrc, error);
 247         else
 248                 dev_err(jrdev, "%d: unknown error source\n", ssrc);
 249 }
 250 EXPORT_SYMBOL(caam_jr_strstatus);