2 # DMA engine configuration
6 bool "DMA Engine support"
9 DMA engines can do asynchronous data transfers without
10 involving the host CPU. Currently, this framework can be
11 used to offload memory copies in the network stack and
12 RAID operations in the MD driver. This menu only presents
13 DMA Device drivers supported by the configured arch, it may
14 be empty in some cases.
16 config DMADEVICES_DEBUG
17 bool "DMA Engine debugging"
18 depends on DMADEVICES != n
20 This is an option for use by developers; most people should
21 say N here. This enables DMA engine core and driver debugging.
23 config DMADEVICES_VDEBUG
24 bool "DMA Engine verbose debugging"
25 depends on DMADEVICES_DEBUG != n
27 This is an option for use by developers; most people should
28 say N here. This enables deeper (more verbose) debugging of
29 the DMA engine core and drivers.
37 config ASYNC_TX_ENABLE_CHANNEL_SWITCH
40 config ARCH_HAS_ASYNC_TX_FIND_CHANNEL
46 config DMA_VIRTUAL_CHANNELS
60 bool "ARM PrimeCell PL080 or PL081 support"
63 select DMA_VIRTUAL_CHANNELS
65 Say yes if your platform has a PL08x DMAC device which can
66 provide DMA engine support. This includes the original ARM
67 PL080 and PL081, Samsungs PL080 derivative and Faraday
68 Technology's FTDMAC020 PL080 derivative.
70 config AMCC_PPC440SPE_ADMA
71 tristate "AMCC PPC440SPe ADMA support"
72 depends on 440SPe || 440SP
74 select DMA_ENGINE_RAID
75 select ARCH_HAS_ASYNC_TX_FIND_CHANNEL
76 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
78 Enable support for the AMCC PPC440SPe RAID engines.
81 tristate "Atmel AHB DMA support"
85 Support the Atmel AHB DMA controller.
88 tristate "Atmel XDMA support"
92 Support the Atmel XDMA controller.
95 tristate "Analog Devices AXI-DMAC DMA support"
96 depends on MICROBLAZE || NIOS2 || ARCH_ZYNQ || ARCH_SOCFPGA || COMPILE_TEST
98 select DMA_VIRTUAL_CHANNELS
100 Enable support for the Analog Devices AXI-DMAC peripheral. This DMA
101 controller is often used in Analog Device's reference designs for FPGA
105 tristate "Broadcom SBA RAID engine support"
106 depends on ARM64 || COMPILE_TEST
107 depends on MAILBOX && RAID6_PQ
109 select DMA_ENGINE_RAID
110 select ASYNC_TX_DISABLE_XOR_VAL_DMA
111 select ASYNC_TX_DISABLE_PQ_VAL_DMA
112 default ARCH_BCM_IPROC
114 Enable support for Broadcom SBA RAID Engine. The SBA RAID
115 engine is available on most of the Broadcom iProc SoCs. It
116 has the capability to offload memcpy, xor and pq computation
120 bool "ST-Ericsson COH901318 DMA support"
122 depends on ARCH_U300 || COMPILE_TEST
124 Enable support for ST-Ericsson COH 901 318 DMA.
127 tristate "BCM2835 DMA engine support"
128 depends on ARCH_BCM2835
130 select DMA_VIRTUAL_CHANNELS
133 tristate "JZ4740 DMA support"
134 depends on MACH_JZ4740 || COMPILE_TEST
136 select DMA_VIRTUAL_CHANNELS
139 tristate "JZ4780 DMA support"
140 depends on MACH_JZ4780 || COMPILE_TEST
142 select DMA_VIRTUAL_CHANNELS
144 This selects support for the DMA controller in Ingenic JZ4780 SoCs.
145 If you have a board based on such a SoC and wish to use DMA for
146 devices which can use the DMA controller, say Y or M here.
149 tristate "OMAP DMA support"
150 depends on ARCH_OMAP || COMPILE_TEST
152 select DMA_VIRTUAL_CHANNELS
153 select TI_DMA_CROSSBAR if (SOC_DRA7XX || COMPILE_TEST)
156 tristate "SA-11x0 DMA support"
157 depends on ARCH_SA1100 || COMPILE_TEST
159 select DMA_VIRTUAL_CHANNELS
161 Support the DMA engine found on Intel StrongARM SA-1100 and
162 SA-1110 SoCs. This DMA engine can only be used with on-chip
166 tristate "Allwinner A10 DMA SoCs support"
167 depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I
168 default (MACH_SUN4I || MACH_SUN5I || MACH_SUN7I)
170 select DMA_VIRTUAL_CHANNELS
172 Enable support for the DMA controller present in the sun4i,
173 sun5i and sun7i Allwinner ARM SoCs.
176 tristate "Allwinner A31 SoCs DMA support"
177 depends on MACH_SUN6I || MACH_SUN8I || (ARM64 && ARCH_SUNXI) || COMPILE_TEST
178 depends on RESET_CONTROLLER
180 select DMA_VIRTUAL_CHANNELS
182 Support for the DMA engine first found in Allwinner A31 SoCs.
185 bool "Cirrus Logic EP93xx DMA support"
186 depends on ARCH_EP93XX || COMPILE_TEST
189 Enable support for the Cirrus Logic EP93xx M2P/M2M DMA controller.
192 tristate "Freescale Elo series DMA support"
195 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
197 Enable support for the Freescale Elo series DMA controllers.
198 The Elo is the DMA controller on some mpc82xx and mpc83xx parts, the
199 EloPlus is on mpc85xx and mpc86xx and Pxxx parts, and the Elo3 is on
200 some Txxx and Bxxx parts.
203 tristate "Freescale eDMA engine support"
206 select DMA_VIRTUAL_CHANNELS
208 Support the Freescale eDMA engine with programmable channel
209 multiplexing capability for DMA request sources(slot).
210 This module can be found on Freescale Vybrid and LS-1 SoCs.
213 tristate "Freescale RAID engine Support"
214 depends on FSL_SOC && !ASYNC_TX_ENABLE_CHANNEL_SWITCH
216 select DMA_ENGINE_RAID
218 Enable support for Freescale RAID Engine. RAID Engine is
219 available on some QorIQ SoCs (like P5020/P5040). It has
220 the capability to offload memcpy, xor and pq computation
224 tristate "IMG MDC support"
225 depends on MIPS || COMPILE_TEST
226 depends on MFD_SYSCON
228 select DMA_VIRTUAL_CHANNELS
230 Enable support for the IMG multi-threaded DMA controller (MDC).
233 tristate "i.MX DMA support"
237 Support the i.MX DMA engine. This engine is integrated into
238 Freescale i.MX1/21/27 chips.
241 tristate "i.MX SDMA support"
245 Support the i.MX SDMA engine. This engine is integrated into
246 Freescale i.MX25/31/35/51/53/6 chips.
249 tristate "Intel integrated DMA 64-bit support"
251 select DMA_VIRTUAL_CHANNELS
253 Enable DMA support for Intel Low Power Subsystem such as found on
257 tristate "Intel I/OAT DMA support"
258 depends on PCI && X86_64
260 select DMA_ENGINE_RAID
263 Enable support for the Intel(R) I/OAT DMA engine present
264 in recent Intel Xeon chipsets.
266 Say Y here if you have such a chipset.
270 config INTEL_IOP_ADMA
271 tristate "Intel IOP ADMA support"
272 depends on ARCH_IOP32X || ARCH_IOP33X || ARCH_IOP13XX
274 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
276 Enable support for the Intel(R) IOP Series RAID engines.
278 config INTEL_MIC_X100_DMA
279 tristate "Intel MIC X100 DMA Driver"
280 depends on 64BIT && X86 && INTEL_MIC_BUS
283 This enables DMA support for the Intel Many Integrated Core
284 (MIC) family of PCIe form factor coprocessor X100 devices that
285 run a 64 bit Linux OS. This driver will be used by both MIC
286 host and card drivers.
288 If you are building host kernel with a MIC device or a card
289 kernel for a MIC device, then say M (recommended) or Y, else
290 say N. If unsure say N.
292 More information about the Intel MIC family as well as the Linux
293 OS and tools for MIC to use with this driver are available from
294 <http://software.intel.com/en-us/mic-developer>.
297 tristate "Hisilicon K3 DMA support"
298 depends on ARCH_HI3xxx || ARCH_HISI || COMPILE_TEST
300 select DMA_VIRTUAL_CHANNELS
302 Support the DMA engine for Hisilicon K3 platform
305 config LPC18XX_DMAMUX
306 bool "NXP LPC18xx/43xx DMA MUX for PL080"
307 depends on ARCH_LPC18XX || COMPILE_TEST
308 depends on OF && AMBA_PL08X
311 Enable support for DMA on NXP LPC18xx/43xx platforms
312 with PL080 and multiplexed DMA request lines.
315 bool "MMP PDMA support"
316 depends on ARCH_MMP || ARCH_PXA || COMPILE_TEST
319 Support the MMP PDMA engine for PXA and MMP platform.
322 bool "MMP Two-Channel DMA support"
323 depends on ARCH_MMP || COMPILE_TEST
325 select MMP_SRAM if ARCH_MMP
326 select GENERIC_ALLOCATOR
328 Support the MMP Two-Channel DMA engine.
329 This engine used for MMP Audio DMA and pxa910 SQU.
330 It needs sram driver under mach-mmp.
333 tristate "MOXART DMA support"
334 depends on ARCH_MOXART
336 select DMA_VIRTUAL_CHANNELS
338 Enable support for the MOXA ART SoC DMA controller.
340 Say Y here if you enabled MMP ADMA, otherwise say N.
343 tristate "Freescale MPC512x built-in DMA engine support"
344 depends on PPC_MPC512x || PPC_MPC831x
347 Enable support for the Freescale MPC512x built-in DMA engine.
350 bool "Marvell XOR engine support"
351 depends on PLAT_ORION || ARCH_MVEBU || COMPILE_TEST
353 select DMA_ENGINE_RAID
354 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
356 Enable support for the Marvell XOR engine.
359 bool "Marvell XOR engine version 2 support "
362 select DMA_ENGINE_RAID
363 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
364 select GENERIC_MSI_IRQ_DOMAIN
366 Enable support for the Marvell version 2 XOR engine.
368 This engine provides acceleration for copy, XOR and RAID6
369 operations, and is available on Marvell Armada 7K and 8K
373 bool "MXS DMA support"
374 depends on ARCH_MXS || ARCH_MXC || COMPILE_TEST
378 Support the MXS DMA engine. This engine including APBH-DMA
379 and APBX-DMA is integrated into some Freescale chips.
382 bool "MX3x Image Processing Unit support"
387 If you plan to use the Image Processing unit in the i.MX3x, say
388 Y here. If unsure, select Y.
391 int "Number of dynamically mapped interrupts for IPU"
396 Out of 137 interrupt sources on i.MX31 IPU only very few are used.
397 To avoid bloating the irq_desc[] array we allocate a sufficient
398 number of IRQ slots and map them dynamically to specific sources.
401 tristate "Renesas Type-AXI NBPF DMA support"
403 depends on ARM || COMPILE_TEST
405 Support for "Type-AXI" NBPF DMA IPs from Renesas
408 tristate "Intel EG20T PCH / LAPIS Semicon IOH(ML7213/ML7223/ML7831) DMA"
409 depends on PCI && (X86_32 || COMPILE_TEST)
412 Enable support for Intel EG20T PCH DMA engine.
414 This driver also can be used for LAPIS Semiconductor IOH(Input/
415 Output Hub), ML7213, ML7223 and ML7831.
416 ML7213 IOH is for IVI(In-Vehicle Infotainment) use, ML7223 IOH is
417 for MP(Media Phone) use and ML7831 IOH is for general purpose use.
418 ML7213/ML7223/ML7831 is companion chip for Intel Atom E6xx series.
419 ML7213/ML7223/ML7831 is completely compatible for Intel EG20T PCH.
422 tristate "DMA API Driver for PL330"
426 Select if your platform has one or more PL330 DMACs.
427 You need to provide platform specific settings via
428 platform_data for a dma-pl330 device.
431 bool "PXA DMA support"
432 depends on (ARCH_MMP || ARCH_PXA)
434 select DMA_VIRTUAL_CHANNELS
436 Support the DMA engine for PXA. It is also compatible with MMP PDMA
437 platform. The internal DMA IP of all PXA variants is supported, with
438 16 to 32 channels for peripheral to memory or memory to memory
442 tristate "CSR SiRFprimaII/SiRFmarco DMA support"
446 Enable support for the CSR SiRFprimaII DMA engine.
449 bool "ST-Ericsson DMA40 support"
450 depends on ARCH_U8500
453 Support for ST-Ericsson DMA40 controller
456 tristate "ST FDMA dmaengine support"
458 depends on REMOTEPROC
459 select ST_SLIM_REMOTEPROC
461 select DMA_VIRTUAL_CHANNELS
463 Enable support for ST FDMA controller.
464 It supports 16 independent DMA channels, accepts up to 32 DMA requests
466 Say Y here if you have such a chipset.
470 bool "STMicroelectronics STM32 DMA support"
471 depends on ARCH_STM32 || COMPILE_TEST
473 select DMA_VIRTUAL_CHANNELS
475 Enable support for the on-chip DMA controller on STMicroelectronics
477 If you have a board based on such a MCU and wish to use DMA say Y
481 bool "Samsung S3C24XX DMA support"
482 depends on ARCH_S3C24XX || COMPILE_TEST
484 select DMA_VIRTUAL_CHANNELS
486 Support for the Samsung S3C24XX DMA controller driver. The
487 DMA controller is having multiple DMA channels which can be
488 configured for different peripherals like audio, UART, SPI.
489 The DMA controller can transfer data from memory to peripheral,
490 periphal to memory, periphal to periphal and memory to memory.
493 tristate "Toshiba TXx9 SoC DMA support"
494 depends on MACH_TX49XX || MACH_TX39XX
497 Support the TXx9 SoC internal DMA controller. This can be
498 integrated in chips such as the Toshiba TX4927/38/39.
500 config TEGRA20_APB_DMA
501 bool "NVIDIA Tegra20 APB DMA support"
502 depends on ARCH_TEGRA
505 Support for the NVIDIA Tegra20 APB DMA controller driver. The
506 DMA controller is having multiple DMA channel which can be
507 configured for different peripherals like audio, UART, SPI,
508 I2C etc which is in APB bus.
509 This DMA controller transfers data from memory to peripheral fifo
510 or vice versa. It does not support memory to memory data transfer.
513 tristate "NVIDIA Tegra210 ADMA support"
514 depends on (ARCH_TEGRA_210_SOC || COMPILE_TEST) && PM_CLK
516 select DMA_VIRTUAL_CHANNELS
518 Support for the NVIDIA Tegra210 ADMA controller driver. The
519 DMA controller has multiple DMA channels and is used to service
520 various audio clients in the Tegra210 audio processing engine
521 (APE). This DMA controller transfers data from memory to
522 peripheral and vice versa. It does not support memory to
523 memory data transfer.
526 tristate "Timberdale FPGA DMA support"
527 depends on MFD_TIMBERDALE || COMPILE_TEST
530 Enable support for the Timberdale FPGA DMA engine.
533 tristate "CPPI 4.1 DMA support"
534 depends on (ARCH_OMAP || ARCH_DAVINCI_DA8XX)
537 The Communications Port Programming Interface (CPPI) 4.1 DMA engine
538 is currently used by the USB driver on AM335x and DA8xx platforms.
540 config TI_DMA_CROSSBAR
544 bool "TI EDMA support"
545 depends on ARCH_DAVINCI || ARCH_OMAP || ARCH_KEYSTONE || COMPILE_TEST
547 select DMA_VIRTUAL_CHANNELS
548 select TI_DMA_CROSSBAR if (ARCH_OMAP || COMPILE_TEST)
551 Enable support for the TI EDMA controller. This DMA
552 engine is found on TI DaVinci and AM33xx parts.
555 tristate "APM X-Gene DMA support"
556 depends on ARCH_XGENE || COMPILE_TEST
558 select DMA_ENGINE_RAID
559 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
561 Enable support for the APM X-Gene SoC DMA engine.
564 tristate "Xilinx AXI DMAS Engine"
565 depends on (ARCH_ZYNQ || MICROBLAZE || ARM64)
568 Enable support for Xilinx AXI VDMA Soft IP.
570 AXI VDMA engine provides high-bandwidth direct memory access
571 between memory and AXI4-Stream video type target
572 peripherals including peripherals which support AXI4-
573 Stream Video Protocol. It has two stream interfaces/
574 channels, Memory Mapped to Stream (MM2S) and Stream to
575 Memory Mapped (S2MM) for the data transfers.
576 AXI CDMA engine provides high-bandwidth direct memory access
577 between a memory-mapped source address and a memory-mapped
579 AXI DMA engine provides high-bandwidth one dimensional direct
580 memory access between memory and AXI4-Stream target peripherals.
582 config XILINX_ZYNQMP_DMA
583 tristate "Xilinx ZynqMP DMA Engine"
584 depends on (ARCH_ZYNQ || MICROBLAZE || ARM64)
587 Enable support for Xilinx ZynqMP DMA controller.
590 tristate "ZTE ZX DMA support"
591 depends on ARCH_ZX || COMPILE_TEST
593 select DMA_VIRTUAL_CHANNELS
595 Support the DMA engine for ZTE ZX family platform devices.
599 source "drivers/dma/bestcomm/Kconfig"
601 source "drivers/dma/qcom/Kconfig"
603 source "drivers/dma/dw/Kconfig"
605 source "drivers/dma/hsu/Kconfig"
607 source "drivers/dma/sh/Kconfig"
610 comment "DMA Clients"
611 depends on DMA_ENGINE
614 bool "Async_tx: Offload support for the async_tx api"
615 depends on DMA_ENGINE
617 This allows the async_tx api to take advantage of offload engines for
618 memcpy, memset, xor, and raid6 p+q operations. If your platform has
619 a dma engine that can perform raid operations and you have enabled
625 tristate "DMA Test client"
626 depends on DMA_ENGINE
627 select DMA_ENGINE_RAID
629 Simple DMA test client. Say N unless you're debugging a
632 config DMA_ENGINE_RAID